CN105116573B - A kind of detection method of array base palte - Google Patents

A kind of detection method of array base palte Download PDF

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Publication number
CN105116573B
CN105116573B CN201510618605.1A CN201510618605A CN105116573B CN 105116573 B CN105116573 B CN 105116573B CN 201510618605 A CN201510618605 A CN 201510618605A CN 105116573 B CN105116573 B CN 105116573B
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China
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array base
base palte
tft
standard
current value
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CN105116573A (en
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薛静
吴昊
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BOE Technology Group Co Ltd
Beijing BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Beijing BOE Optoelectronics Technology Co Ltd
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/1306—Details
    • G02F1/1309—Repairing; Testing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays

Abstract

The invention discloses a kind of detection method of array base palte, this method includes：Under preset temperature, according to predetermined standard gate cut-in voltage value, the firing current value corresponding with standard gate cut-in voltage value of each array base palte included in test sample group is determined；According to the firing current value of determination and predetermined standard critical current value, determine whether the TFT in test sample group reaches default qualification rate；If not up to default qualification rate, the TFT designs of array substrate are improved, and are remake test sample group and detected, until the TFT in the test sample group after improving reaches default qualification rate.Method provided in an embodiment of the present invention can ensure before module is made, array base palte sample has reached default qualification rate, and then make to the display panel after box under preset temperature can normal boot-strap start display picture, specifically ensure that the function of starting in low temperature occurs without problem, while save back-end process and module goods, materials and equipments.

Description

A kind of detection method of array base palte
Technical field
The present invention relates to display technology field, espespecially a kind of detection method of array base palte.
Background technology
At present, liquid crystal display panel (Liquid Crystal Display, LCD) has high picture quality, small volume, again The advantages that light is measured, is widely used in the products such as mobile phone, notebook computer, television set and display.
TFT switch in thin film transistor (TFT) (Thin Film Transistor, TFT) array base palte has to liquid crystal display Extremely important effect, the quality of TFT switch performance directly affect the height of liquid crystal display quality.But traditional uses liquid crystal The LCD of technology shows product due to increase resolution, and the threshold current level of TFT switch is more and more lower, thus brings The problem of be under the relatively low environment of a certain specified temp, especially temperature, the viewing area of array base palte and raster data model electricity The TFT switch on road can not be normally-open, functional bad so as to occur.The existing method for starting test at a certain temperature Usually will display production into after module, put into the test furnace under specified temp more than several hours, re-start Lighting, which is opened, to be realized, can not the person of lighting be considered as product design failure, but product experienced substrate to the processing procedure of module, and the cycle is very It is long, there is no time enough to be designed modification after problem exposure.
Therefore, how to ensure at a certain temperature display panel can normal boot-strap start, be those skilled in the art urgently Technical problem to be solved.
The content of the invention
In view of this, the embodiment of the present invention provides a kind of detection method of array base palte, it can be ensured that under preset temperature Can normal boot-strap start, while save substrate to the back-end process and module goods, materials and equipments of module.
Therefore, the embodiments of the invention provide a kind of detection method of array base palte, including：
Under preset temperature, according to predetermined standard gate cut-in voltage value, determine what is included in test sample group The firing current value corresponding with the standard gate cut-in voltage value of each array base palte；
According to each array base palte of determination firing current value corresponding with the standard gate cut-in voltage value and in advance The standard critical current value first determined, determines whether the TFT in the test sample group reaches default qualification rate；
If not up to default qualification rate, the TFT designs to the array base palte are improved, and remake test specimens Product group is detected, until the TFT in the test sample group after improving reaches default qualification rate.
In a kind of possible implementation, in the detection method of above-mentioned array base palte provided in an embodiment of the present invention, Under preset temperature, according to predetermined standard gate cut-in voltage value, each array included in test sample group is determined The firing current value corresponding with the standard gate cut-in voltage value of substrate, is specifically included：
Under preset temperature, it is bent that TFT characteristics are carried out to the test point on each array base palte for being included in test sample group Line measures；The test point be arranged on the non-display area of the array base palte and comprising with viewing area and gate driving circuit TFT shape identicals TFT；
It is true in the TFT characteristic curves that each array base palte obtains according to predetermined standard gate cut-in voltage value The firing current value corresponding with the standard gate cut-in voltage value of fixed each array base palte.
In a kind of possible implementation, in the detection method of above-mentioned array base palte provided in an embodiment of the present invention, According to each array base palte of determination firing current value corresponding with the standard gate cut-in voltage value with it is predetermined Standard critical current value, determines whether the TFT in the test sample group reaches default qualification rate, specifically includes：
The firing current value corresponding with the standard gate cut-in voltage value of each array base palte to determining is carried out Normal distribution statistical；
In the result of the normal distribution statistical, it is determined that the firing current more than or equal to the standard critical current value It is worth percentage；
By the percentage determined compared with default qualification rate, however, it is determined that the percentage is less than described default Qualification rate, it is determined that the not up to default qualification rates of TFT in the test sample group；If it is determined that the percentage is more than or equal to The default qualification rate, it is determined that the TFT in the test sample group reaches default qualification rate.
In a kind of possible implementation, in the detection method of above-mentioned array base palte provided in an embodiment of the present invention, Standard gate cut-in voltage value is determined using following manner：
Under preset temperature, the one group of grid of array base palte loading from small to large to standard shows panel group opens letter Number, when all pixels point in meeting the standard shows panel is lit, it is determined that the grid open signal now loaded is made For standard gate cut-in voltage value；The standard shows panel group includes uncut multiple display panels.
In a kind of possible implementation, in the detection method of above-mentioned array base palte provided in an embodiment of the present invention, The one group of grid open signal of array base palte loading from small to large to standard shows panel group, is specifically included：
Pass through the enabling signal being electrically connected with all array base paltes set in the neighboring area of standard shows panel group Hold one group of grid open signal from small to large to the loading of all array base paltes；Or,
One group of grid open signal to the loading of all array base paltes from small to large respectively.
In a kind of possible implementation, in the detection method of above-mentioned array base palte provided in an embodiment of the present invention, Standard critical current value is determined using following manner：
It is in the motherboard for including each array base palte by the standard shows panel assembling and dismantling solution；
Under preset temperature, TFT characteristic curve measurements are carried out to the test point on each array base palte；The test point is set The array base palte non-display area and include the TFT shape identicals TFT with viewing area and gate driving circuit；
According to the predetermined standard gate cut-in voltage value, in the TFT characteristics that each array base palte obtains Each array base palte firing current value corresponding with the standard gate cut-in voltage value is determined in curve；
Maximum in firing current value corresponding to the standard gate cut-in voltage value is as standard critical current value.
In a kind of possible implementation, in the detection method of above-mentioned array base palte provided in an embodiment of the present invention, TFT designs to the array base palte are improved, and are specifically included：
Increase the breadth length ratio of the channel region of each TFT on the array base palte.
In a kind of possible implementation, in the detection method of above-mentioned array base palte provided in an embodiment of the present invention, The span of the preset temperature is subzero 60 degrees Celsius to 0 degree Celsius.
In a kind of possible implementation, in the detection method of above-mentioned array base palte provided in an embodiment of the present invention, The preset temperature is subzero 30 degrees Celsius.
In a kind of possible implementation, in the detection method of above-mentioned array base palte provided in an embodiment of the present invention, The span of the default qualification rate is 90% to 100%.
The beneficial effect of the embodiment of the present invention includes：
A kind of detection method of array base palte provided in an embodiment of the present invention, this method include：Under preset temperature, according to Predetermined standard gate cut-in voltage value, each array base palte for determining to include in test sample group are opened with standard gate Open firing current value corresponding to magnitude of voltage；Opened according to each array base palte of determination is corresponding with standard gate cut-in voltage value Current value and predetermined standard critical current value are opened, determines whether the TFT in test sample group reaches default qualification rate；If Not up to default qualification rate, then the TFT designs of array substrate are improved, and are remake test sample group and detected, Up to the TFT in the test sample group after improving reaches default qualification rate.Method provided in an embodiment of the present invention can ensure It is made before module, array base palte sample has reached default qualification rate, and then makes to the display panel after box under default temperature Can normal boot-strap start display picture, specifically ensure that the function of starting when temperature is relatively low occurs without problem, save simultaneously Back-end process and module goods, materials and equipments of the substrate to module.
Brief description of the drawings
Fig. 1 is the flow chart of the detection method of array base palte provided in an embodiment of the present invention；
Fig. 2 opens for each the corresponding with the standard gate cut-in voltage value of array base palte provided in an embodiment of the present invention Open the normal distribution of current value electric current；
Fig. 3 is test system schematic diagram provided in an embodiment of the present invention；
Fig. 4 is provided in an embodiment of the present invention to disassembling the motherboard for including each array base palte after standard shows panel group TFT performance diagrams.
Embodiment
Below in conjunction with the accompanying drawings, the embodiment of the detection method of array base palte provided in an embodiment of the present invention is carried out Explain.
The embodiments of the invention provide a kind of detection method of array base palte, as shown in figure 1, may comprise steps of：
S101, under preset temperature, according to predetermined standard gate cut-in voltage value, determine to wrap in test sample group The firing current value corresponding with standard gate cut-in voltage value of each array base palte contained；
S102, according to the firing current value corresponding with standard gate cut-in voltage value of each array base palte of determination with it is pre- The standard critical current value first determined, determines whether the TFT in test sample group reaches default qualification rate；If not up to default close During lattice rate, then step S103 is performed；
S103, array substrate TFT designs are improved, and are remake test sample group and detected, until changing The TFT in test sample group after entering reaches default qualification rate；
S104, the TFT designs in the test sample group after improvement are produced.
In the detection method of above-mentioned array base palte provided in an embodiment of the present invention, first under preset temperature, according to pre- The standard gate cut-in voltage value first determined, each array base palte for determining to include in test sample group are opened with standard gate Firing current value corresponding to magnitude of voltage；Then it is corresponding with standard gate cut-in voltage value according to each array base palte of determination Firing current value and predetermined standard critical current value, can not reach default qualification rate for the TFT in test sample group In the case of, the TFT designs of array substrate are improved, and are remake test sample group and detected, until after improving Test sample group in TFT reach default qualification rate.The above method provided in an embodiment of the present invention can ensure that mould is being made Before group, array base palte sample has reached default qualification rate, and then make can under preset temperature to the display panel after box Normal boot-strap starts display picture, specifically ensures that the function of starting when temperature is relatively low occurs without problem, while save substrate To the back-end process and module goods, materials and equipments of module.
Further, in the specific implementation, when step S102 determines to reach default qualification rate, as shown in figure 1, performing step Rapid S105：TFT designs in test sample group are directly produced.
In the specific implementation, in the detection method of above-mentioned array base palte provided in an embodiment of the present invention, step is performed S101 is under preset temperature, according to predetermined standard gate cut-in voltage value, determines to include in test sample group each The firing current value corresponding with standard gate cut-in voltage value of array base palte, can specifically include：
Under preset temperature, it is bent that TFT characteristics are carried out to the test point on each array base palte for being included in test sample group Line measures；The test point can be arranged on the non-display area of array base palte and comprising with viewing area and gate driving circuit TFT shape identicals TFT；
It is true in the TFT characteristic curves that each array base palte obtains according to predetermined standard gate cut-in voltage value The firing current value corresponding with standard gate cut-in voltage value of fixed each array base palte.
Specifically, the non-display area of each array base palte included in test sample group is provided with test point, the survey Pilot is used for the viewing area of characterization array substrate and the TFT of gate driving circuit, so, is not destroying the situation of array base palte Under, can be directly using the characteristic of test point instead of viewing area and multiple TFT of gate driving circuit characteristic, method letter It is single；TFT characteristic curve measurements are carried out to test point, the relation of firing current and grid voltage can be obtained, according to firing current Relation and predetermined standard gate cut-in voltage value with grid voltage, it can accurately find out and open electricity with standard gate Firing current value corresponding to pressure value.
In the specific implementation, in the detection method of above-mentioned array base palte provided in an embodiment of the present invention, step is performed S102 according to each array base palte of determination firing current value corresponding with standard gate cut-in voltage value with it is predetermined Standard critical current value, determines whether the TFT in test sample group reaches default qualification rate, can specifically include：
The firing current value corresponding with standard gate cut-in voltage value of each array base palte to determining carries out normal state Distribution statisticses；
In the result of normal distribution statistical, it is determined that more than or equal to hundred shared by the firing current value of standard critical current value Divide ratio；
By the percentage determined compared with default qualification rate, however, it is determined that percentage is less than default qualification rate, then really The not up to default qualification rates of TFT in location survey test agent group；If it is determined that percentage is more than or equal to default qualification rate, it is determined that surveys TFT in test agent group reaches default qualification rate.
Specifically, as shown in Fig. 2 opening the corresponding with standard gate cut-in voltage value of each array base palte determined Open current value carry out normal distribution statistical, it is assumed that standard critical current value is 0.6uA, then in fig. 2 it is possible to calculate be more than or Percentage (ratio shared by the right side of dotted line) shared by firing current value equal to 0.6uA, the percentage of determination is less than default Qualification rate, then need to perform step S103, however, it is determined that percentage be more than or equal to default qualification rate, then need to perform step S105. Whether the TFT in test sample group is judged reaches default qualification rate, the method being compared using normal distribution statistical, both simple It is single and accurate.
In the specific implementation, specifically, can be with the detection method of above-mentioned array base palte provided in an embodiment of the present invention Standard gate cut-in voltage value is determined using following manner：
Under preset temperature, the one group of grid of array base palte loading from small to large to standard shows panel group opens letter Number, when all pixels point in meeting standard shows panel is lit, it is determined that the grid open signal now loaded is as mark Quasi- gate turn-on voltage value；Standard shows panel group includes uncut multiple display panels.Need to standard shows panel group In TFT carry out test and draw standard gate cut-in voltage value, compared with prior art, save back-end process and module money Material.
Specifically, as shown in figure 3, standard shows panel group 1 is placed in test device 2 into the (environment in this test device Temperature could be arranged to preset temperature, and this test device can also make in other steps that environment temperature is preset temperature are needed With), temperature can be arranged on subzero 30 degrees Celsius, to one group of the array base palte of standard shows panel group 1 loading from small to large Grid open signal, it is when all pixels point in meeting standard shows panel is lit, i.e., all in standard shows panel When TFT is opened, it is determined that the grid open signal now loaded is as standard gate cut-in voltage value.
In the specific implementation, in the detection method of above-mentioned array base palte provided in an embodiment of the present invention, to standard shows The one group of grid open signal of the array base palte loading of panel group from small to large, can specifically include：
Pass through the enabling signal being electrically connected with all array base paltes set in the neighboring area of standard shows panel group Hold one group of grid open signal from small to large to the loading of all array base paltes；Or,
One group of grid open signal to the loading of all array base paltes from small to large respectively.
Specifically, as shown in figure 3, passing through the enabling signal end 4 that is electrically connected with all array base paltes by signal generator 3 Or letter directly is opened to the one group of grid of all array base paltes loading from small to large by using the signal wire on array base palte Number, it can further ensure to find the gate turn-on voltage value that disclosure satisfy that starting up under preset temperature.
In the specific implementation, specifically, can be with the detection method of above-mentioned array base palte provided in an embodiment of the present invention Standard critical current value is determined using following manner：
It is in the motherboard for including each array base palte by standard shows panel assembling and dismantling solution；
Under preset temperature, TFT characteristic curve measurements are carried out to the test point on each array base palte；Test point is arranged on battle array The non-display area of row substrate and include the TFT shape identicals TFT with viewing area and gate driving circuit；
It is true in the TFT characteristic curves that each array base palte obtains according to predetermined standard gate cut-in voltage value Fixed each array base palte firing current value corresponding with standard gate cut-in voltage value；
Maximum in firing current value corresponding to standard gate cut-in voltage value is as standard critical current value.
Specifically, as shown in figure 4, carrying out characteristic curve test to the motherboard comprising each array base palte after disassembling, obtain The relation of firing current and grid voltage, opened according to firing current and the relation of grid voltage and predetermined standard gate Magnitude of voltage, corresponding Maximum Power-up Current value can be accurately found out, by taking Fig. 4 as an example, predetermined standard gate opens electricity Pressure value is 10V, according to the relation and predetermined standard gate cut-in voltage value of firing current and grid voltage, can be found The scope of corresponding firing current value is defined in 0.4~0.6uA, capping 0.6uA.
In the specific implementation, in the detection method of above-mentioned array base palte provided in an embodiment of the present invention, step is performed The TFT designs of S103 array substrates are improved, and can specifically use following manner：
Increase the breadth length ratio of the channel region of each TFT on array base palte.
Specifically, due to the breadth length ratio in TFT channel region firing current value corresponding with standard gate cut-in voltage value into Direct ratio, the breadth length ratio of channel region can be directly adjusted, technique is simple, saves cost, it is assumed that firing current value is 0.4uA, and Standard critical current value is 0.6uA, then adjusts the breadth length ratio of TFT channel region to 1.5 times of former breadth length ratio design load i.e. Can.
In the specific implementation, in the detection method of above-mentioned array base palte provided in an embodiment of the present invention, preset temperature Span could be arranged to subzero 60 degrees Celsius to 0 degree Celsius.
Further, in the specific implementation, in the detection method of above-mentioned array base palte provided in an embodiment of the present invention, in advance If temperature could be arranged to subzero 30 degrees Celsius.Setting for preset temperature, can as the case may be depending on, do not do herein Limit.
In the specific implementation, in the detection method of above-mentioned array base palte provided in an embodiment of the present invention, qualification rate is preset Span could be arranged to 90% to 100%.This default qualification rate is usually depending on the requirement of client, is not done herein Limit.
A kind of detection method of array base palte provided in an embodiment of the present invention, this method include：Under preset temperature, according to Predetermined standard gate cut-in voltage value, each array base palte for determining to include in test sample group are opened with standard gate Open firing current value corresponding to magnitude of voltage；Opened according to each array base palte of determination is corresponding with standard gate cut-in voltage value Current value and predetermined standard critical current value are opened, determines whether the TFT in test sample group reaches default qualification rate；If Not up to default qualification rate, then the TFT designs of array substrate are improved, and are remake test sample group and detected, Up to the TFT in the test sample group after improving reaches default qualification rate.Method provided in an embodiment of the present invention can ensure It is made before module, array base palte sample has reached default qualification rate, and then makes to the display panel after box in preset temperature Under can normal boot-strap start display picture, specifically ensure that the function of starting when temperature is relatively low occurs without problem, save simultaneously Back-end process and module goods, materials and equipments of the substrate to module.
Obviously, those skilled in the art can carry out the essence of various changes and modification without departing from the present invention to the present invention God and scope.So, if these modifications and variations of the present invention belong to the scope of the claims in the present invention and its equivalent technologies Within, then the present invention is also intended to comprising including these changes and modification.

Claims (10)

  1. A kind of 1. detection method of array base palte, it is characterised in that including：
    Under preset temperature, according to predetermined standard gate cut-in voltage value, determine to include in test sample group each The firing current value corresponding with the standard gate cut-in voltage value of array base palte；The standard gate cut-in voltage value is full The grid open signal that all pixels point in sufficient standard shows panel group loads when being lit, the standard shows panel group bag Include uncut multiple display panels；
    It is according to each array base palte of determination firing current value corresponding with the standard gate cut-in voltage value and true in advance Fixed standard critical current value, determines whether the TFT in the test sample group reaches default qualification rate；The standard critical electricity Flow valuve is the maximum in firing current value corresponding to the standard gate cut-in voltage value；
    If not up to default qualification rate, the TFT designs to the array base palte are improved, and remake test sample group Detected, until the TFT in the test sample group after improving reaches default qualification rate.
  2. 2. the method as described in claim 1, it is characterised in that under preset temperature, opened according to predetermined standard gate Magnitude of voltage is opened, the corresponding with the standard gate cut-in voltage value of each array base palte for determining to include in test sample group is opened Current value is opened, is specifically included：
    Under preset temperature, TFT characteristic curve surveys are carried out to the test point on each array base palte for being included in test sample group Amount；The test point be arranged on the non-display area of the array base palte and comprising with viewing area and gate driving circuit TFT shape identicals TFT；
    According to predetermined standard gate cut-in voltage value, determined in the TFT characteristic curves that each array base palte obtains every The firing current value corresponding with the standard gate cut-in voltage value of individual array base palte.
  3. 3. the method as described in claim 1, it is characterised in that according to each array base palte of determination and the standard gate Firing current value corresponding to cut-in voltage value and predetermined standard critical current value, are determined in the test sample group Whether TFT reaches default qualification rate, specifically includes：
    The firing current value corresponding with the standard gate cut-in voltage value of each array base palte to determining carries out normal state Distribution statisticses；
    In the result of the normal distribution statistical, it is determined that the firing current value institute more than or equal to the standard critical current value Account for percentage；
    By the percentage determined compared with default qualification rate, however, it is determined that the percentage is less than described default qualified Rate, it is determined that the not up to default qualification rates of TFT in the test sample group；If it is determined that the percentage is more than or equal to described Default qualification rate, it is determined that the TFT in the test sample group reaches default qualification rate.
  4. 4. the method as described in claim 1, it is characterised in that standard gate cut-in voltage value is determined using following manner：
    Under preset temperature, the one group of grid open signal of array base palte loading from small to large to standard shows panel group, When meeting that all pixels point in the standard shows panel is lit, it is determined that the grid open signal now loaded is as standard Gate turn-on voltage value；The standard shows panel group includes uncut multiple display panels.
  5. 5. method as claimed in claim 4, it is characterised in that the array base palte loading to standard shows panel group is from small to large One group of grid open signal, specifically include：
    Pass through the enabling signal end pair being electrically connected with all array base paltes set in the neighboring area of standard shows panel group The one group of grid open signal of all array base palte loadings from small to large；Or,
    One group of grid open signal to the loading of all array base paltes from small to large respectively.
  6. 6. method as claimed in claim 4, it is characterised in that standard critical current value is determined using following manner：
    It is in the motherboard for including each array base palte by the standard shows panel assembling and dismantling solution；
    Under preset temperature, TFT characteristic curve measurements are carried out to the test point on each array base palte；The test point is arranged on institute State the non-display area of array base palte and comprising the TFT shape identicals TFT with viewing area and gate driving circuit；
    According to the predetermined standard gate cut-in voltage value, in the TFT characteristic curves that each array base palte obtains It is middle to determine each array base palte firing current value corresponding with the standard gate cut-in voltage value；
    Maximum in firing current value corresponding to the standard gate cut-in voltage value is as standard critical current value.
  7. 7. the method as described in claim 1, it is characterised in that the TFT designs to the array base palte are improved, specific bag Include：
    Increase the breadth length ratio of the channel region of each TFT on the array base palte.
  8. 8. the method as described in claim any one of 1-7, it is characterised in that the span of the preset temperature is subzero 60 Degree Celsius to 0 degree Celsius.
  9. 9. method as claimed in claim 8, it is characterised in that the preset temperature is subzero 30 degrees Celsius.
  10. 10. the method as described in claim any one of 1-7, it is characterised in that the span of the default qualification rate is 90% to 100%.
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CN107792668B (en) * 2017-06-29 2019-07-23 武汉华星光电技术有限公司 A kind of method for measurement of measurement system and glass substrate

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