CN104935296B - The rest-set flip-flop of gallium nitride base low-leakage current cantilever beam - Google Patents
The rest-set flip-flop of gallium nitride base low-leakage current cantilever beam Download PDFInfo
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- CN104935296B CN104935296B CN201510379289.7A CN201510379289A CN104935296B CN 104935296 B CN104935296 B CN 104935296B CN 201510379289 A CN201510379289 A CN 201510379289A CN 104935296 B CN104935296 B CN 104935296B
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- cantilever beam
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- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims abstract description 26
- 229910002601 GaN Inorganic materials 0.000 title claims abstract description 21
- 239000000203 mixture Substances 0.000 claims abstract description 7
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 12
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 12
- 239000000463 material Substances 0.000 claims description 4
- 239000000725 suspension Substances 0.000 claims description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 15
- 239000010931 gold Substances 0.000 description 12
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 9
- 229910052737 gold Inorganic materials 0.000 description 9
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 7
- 238000001259 photo etching Methods 0.000 description 7
- 239000010936 titanium Substances 0.000 description 7
- 229910052719 titanium Inorganic materials 0.000 description 7
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 6
- 239000004642 Polyimide Substances 0.000 description 5
- 229920001721 polyimide Polymers 0.000 description 5
- 108091006146 Channels Proteins 0.000 description 3
- 229910052697 platinum Inorganic materials 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- BYDQGSVXQDOSJJ-UHFFFAOYSA-N [Ge].[Au] Chemical compound [Ge].[Au] BYDQGSVXQDOSJJ-UHFFFAOYSA-N 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000011068 loading method Methods 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 1
- 102000004129 N-Type Calcium Channels Human genes 0.000 description 1
- 108090000699 N-Type Calcium Channels Proteins 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005465 channeling Effects 0.000 description 1
- 230000018044 dehydration Effects 0.000 description 1
- 238000006297 dehydration reaction Methods 0.000 description 1
- 238000002242 deionisation method Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 230000001960 triggered effect Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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Abstract
The rest-set flip-flop of gallium nitride base low-leakage current cantilever beam of the invention is produced on semi-insulating type GaN substrate (2), (1) is switched by four N-type MESFET and two resistance R are constituted, two of which N-type MESFET switches are connected in series the first NAND gate of composition (1.), another two N-type MESFET switches (11) is connected in series the second NAND gate of composition (2.), wherein the output end of the first NAND gate is connected by wire with an input of the second NAND gate, the output end of same second NAND gate is connected also by wire with an input of the first NAND gate, form full symmetric structure；It is respectively first input end R and the second input S that rest-set flip-flop has two outer signal inputs, and two output ends are respectively the first output end Q and the second output endN-type MESFET switches have the cantilever beam (7) for suspending, and one end of the cantilever beam is fixed in anchor area (6), and center section and the other end are across in grid (4) top.
Description
Technical field
The present invention proposes the rest-set flip-flop of gallium nitride base low-leakage current cantilever beam, belongs to the technology of microelectromechanical systems
Field.
Background technology
With continuing to develop for digital integrated electronic circuit, requirement of the people to digital integrated electronic circuit also more and more higher, Ren Menxi
Hope device speed can increasingly faster, power consumption can more and more lower, cost also can be more and more lower, but traditional MOS device
Can not meet the requirement of people because of its many limitation, and GaN metals-semiconductor field effect transistor (MESFET)
Appearance solves the matter of great urgency of people, this MESFET devices with electron mobility it is high, carrier drift speed is fast, forbidden band is wide
Many advantages, such as degree is big, capability of resistance to radiation is strong, operating temperature range is wide is widely used in various digital integrated electronic circuits, wherein
The rest-set flip-flop for being switched using GaN types MESFET and being made just is loved by people.But digital integrated electronic circuit is more
It is new to regenerate very soon, under the trend that nowadays footprint constantly increases, size constantly reduces, it has been found that traditional RS
The power consumption of trigger is all the time a problem, and the integrated level especially with circuit is improved constantly, and this power consumption occupies high
Problem under not annoyings people always.
With the deep development of MEMS technology, a kind of MESFET switches with MEMS cantilever beam structures can be solved effectively
The certainly problem of grid leakage current, it is possible to reduce the power consumption of whole rest-set flip-flop, therefore the present invention is in semi-insulating type GaN substrate
Devise a kind of rest-set flip-flop of the cantilever beam of the gate leakage current with very little.
The content of the invention
Technical problem：It is an object of the invention to provide a kind of rest-set flip-flop of gallium nitride base low-leakage current cantilever beam, pass
The grid of system MESFET devices is formed Schottky contacts by metal and channel region and is constituted, because control signal directly adds
It is loaded on grid, this just inevitably results from leakage current, so as to the DC power that result in whole rest-set flip-flop is bigger than normal, and
The just extremely effective grid leakage current reduced in rest-set flip-flop of the invention, such that it is able to reduce the direct current work(of rest-set flip-flop
Consumption.
Technical scheme：The rest-set flip-flop of gallium nitride base low-leakage current cantilever beam of the invention is produced on semi-insulating type GaN linings
On bottom, be made up of four N-type MESFET switch and two resistance R, N-type MESFET switch include source electrode, drain electrode, grid and
Raceway groove is constituted, and two of which N-type MESFET switches are connected in series the first NAND gate of composition, another two N-type MESFET switch series connection
Connection the second NAND gate of composition, wherein the output end of the first NAND gate passes through an input phase of wire and the second NAND gate
Connect, the output end of same second NAND gate is connected also by wire with an input of the first NAND gate, it is completely right to be formed
The structure of title；It is respectively first input end R and the second input S that rest-set flip-flop has two outer signal inputs, and two
Output end is respectively the first output end Q and the second output endN-type MESFET switches have the cantilever beam for suspending, the cantilever beam
One end be fixed in anchor area, center section and the other end across above grid, there is a gap between grid, cantilever beam by
What Au materials made, two pull-down electrodes are additionally provided with below cantilever beam, pull-down electrode is ground connection, and nitridation is also covered with thereon
Silicon dielectric layer, this structure can greatly reduce gate leakage current, so as to reduce the power consumption of device.
The threshold voltage designs of four N-type MESFET switches are equal, and the actuation voltage of cantilever beam is designed as and N
The threshold voltage of type MESFET is equal；Only when the voltage between cantilever beam and pull-down electrode is more than threshold voltage, suspension
Cantilever beam drop-down can be just labelled to and N-channel MESFET conductings are caused on grid, and offset signal is connected on grid by cantilever beam, otherwise
N-channel MESFET just ends.
When R ends and S ends are all high level, the cantilever beam 7 of the N-type MESFET being connected with this two ends drop-down can lead it
It is logical, but two input signals to output Q andDo not have an impact, by Q andThe N-type MESFET for being controlled is in original shape
State, so flip-flop states keep constant；When R ends be high level, S ends be low level when, the N-type MESFET being connected with R ends leads
The logical N-type MESFET cut-offs being connected with S ends, thereforeIt is high level, withThe connected N-type MESFET conductings in end, then Q outputs
Low level, now flip-flop states stabilize to low level；When R ends be low level, S ends be high level when, the N-type being connected with R ends
The N-type MESFET conductings that MESFET cut-offs are connected with S ends, therefore Q is high level, the N-type MESFET conductings being connected with Q ends, in
It isLow level is exported, now flip-flop states stabilize to high level；When R ends and S ends are all low level, it is connected with this two ends
N-type MESFET all end, therefore Q withAll it is high level, at this moment rest-set flip-flop is in neither 1 non-zero nondeterministic statement again,
Therefore to make rest-set flip-flop normal work, input signal have to comply with the constraints of R+S=1, i.e., not allow R=S=0.
Beneficial effect：The rest-set flip-flop of gallium nitride base low-leakage current cantilever beam of the invention has the cantilever beam knot for suspending
There is one layer of space between structure, with grid, therefore can greatly reduce grid leakage current, so as to reduce whole rest-set flip-flop
DC power, improves the stability of system.
Brief description of the drawings
Fig. 1 is the schematic diagram of the rest-set flip-flop of gallium nitride base low-leakage current cantilever beam of the invention,
Fig. 2 is the inside schematic diagram of the rest-set flip-flop of gallium nitride base low-leakage current cantilever beam of the invention,
Fig. 3 is the top view of the rest-set flip-flop of gallium nitride base low-leakage current cantilever beam of the invention,
Fig. 4 for Fig. 3 gallium nitride base low-leakage current cantilever beams rest-set flip-flop P-P ' to profile,
Fig. 5 for Fig. 3 gallium nitride base low-leakage current cantilever beams rest-set flip-flop A-A ' to profile.
Figure includes：N-type MESFET switches 1, semi-insulating type GaN substrate 2, lead 3, grid 4, N-type MESFET raceway grooves 5,
Anchor area 6, cantilever beam 7, pull-down electrode 8, silicon nitride medium layer 9, the source electrode 10 of N-type MESFET, the drain electrode 11 of N-type MESFET, electricity
Resistance R, 1., the second NAND gate is 2. for the first NAND gate.
Specific embodiment
The rest-set flip-flop of gallium nitride base low-leakage current cantilever beam of the invention is made based on semi-insulating type GaN substrate 2,
Wherein N-type MESFET switches 1 are by source electrode 10, drain electrode 11, anchor area 6, cantilever beam 7,9 group of pull-down electrode 8 and silicon nitride medium floor
Into it possesses the MEMS cantilever beam structures of uniqueness, and the cantilever beam 7 is across in the top of grid 4, and the cantilever beam is by Au material systems
Make, there is a pull-down electrode 8 below cantilever beam, the pull-down electrode 8 is ground connection, silicon nitride Jie is coated with pull-down electrode 8
Matter layer 9, control signal is attached on the cantilever beam 7, and is not to be loaded directly on grid.
The rest-set flip-flop of gallium nitride base low-leakage current cantilever beam of the invention is mainly what is be made up of two NAND gates, wherein
First NAND gate output end Q and a second NAND gate 1. input 2. is connected, and the second NAND gate output end 2.
It is connected with the first NAND gate input 1., the first NAND gate another input 1. is R ends (clear terminal), and second
NAND gate another input 2. is S ends (set end).The two NAND gates are switched by two identical N-type MESFET
Be connected in series what is constituted with a pull-up resistor R, and taken between N-type MESFET and resistance a little as output end Q and
So whole rest-set flip-flop has altogether possesses four N-type MESFET switches.
Whole rest-set flip-flop is made based on semi-insulating type GaN substrate, wherein the most key is exactly four N-types
The structure of MESFET switches, they are made up of source electrode, drain electrode, grid and raceway groove, and the source electrode of MESFET and drain electrode are by gold and N-type weight
The ohmic contact regions that doped region is formed are constituted, and grid is that the Schottky contact region formed by gold and raceway groove is constituted, even more important
It is that N-type MESFET possesses unique MEMS cantilever beam structures, by anchor area across on grid, there is one layer between grid
Space, control signal is attached on the cantilever beam, and is not to be loaded directly into grid as traditional MESFET devices
On, the cantilever beam is made by Au materials, there is a pull-down electrode below cantilever beam, is distributed between anchor area and grid, under this
Pulling electrode is ground connection, and silicon nitride medium layer is coated with pull-down electrode.
From the point of view of single NAND gate, when all high level ' 1 ' is loaded with two cantilever beams of N-type MESFET, due under
Pulling electrode is grounded, so that the suspension cantilever beam of N-type MESFET is pulled down electrode adsorption and is labelled to the grid above N-type channel
On, now two N-type MESFET are both turned on, and then whole circuit forms path, and output end is caused because the partial pressure of resistance R is acted on
It is low level ' 0 '；When loading the outstanding of high level ' 1 ' and another N-type MESFET on the cantilever beam of one of N-type MESFET
When loading low level ' 0 ' on arm beam so that a N-type MESFET conducting, another N-type MESFET cut-offs, whole circuit does not have
Path is formed, so output end is high level ' 1 '；When all low level ' 0 ' is loaded with two cantilever beams of N-type MESFET,
Two suspension cantilever beams of N-type MESFET are all without being pulled down so that two N-type MESFET are off state, whole circuit
Path is not formed, so output end is high level ' 1 ', this is the operation principle of single NAND gate.Triggered from whole RS again
From the point of view of device, when R ends and S ends all be high level ' 1 ' when, two input signals to output Q andWithout influence, so flip-flop states
Keep constant；When R ends be high level ' 1 ', S ends be low level ' 0 ' when, output end Q be low level ' 0 ',It is high level ' 1 ',
Now flip-flop states are low level ' 0 '；When R ends are low level ' 0 ', and S ends are high level ' 1 ', output end Q is high level
‘1’、It is low level ' 0 ', now flip-flop states are high level ' 1 '；When R ends and S ends are all low level ' 0 ', Q ends are obtained
WithEnd output is all high level ' 1 ', and at this moment trigger is in neither 1 non-zero nondeterministic statement again, therefore to make trigger
Normal work, input signal has to comply with the constraints of R+S=1, i.e., do not allow R=S=0.
The preparation method of the rest-set flip-flop of gallium nitride base low-leakage current cantilever beam of the invention is：
1) semi-insulating type GaN substrate 2 is prepared；
2) one layer of silicon nitride, photoetching and etch silicon nitride, the silicon nitride of removal N-type MESFET channel regions 5 are deposited；
3) N-type MESFET Channeling implantations：Injection phosphorus, anneals in a nitrogen environment；After the completion of annealing, carry out at high temperature miscellaneous
Matter is redistributed, and forms the channel region 5 of N-type MESFET；
4) silicon nitride layer is removed：Silicon nitride is all removed using dry etching technology；
5) photoetched grid 4, remove the photoresist in grid region；
6) electron beam evaporation titanium/platinum/gold；
7) titanium/platinum/gold on remaining photoresist and photoresist is removed；
8) heat, titanium/platinum/billon is formed Schottky contacts with N-type MESFET raceway grooves 5；
9) photoresist is coated, photoetching simultaneously etches N-type MESFET source electrodes 10 and the photoresist in 11 regions that drain；
10) N-type heavy doping is carried out to the region, in the N-type heavy doping that N-type MESFET source electrodes 10 and 11 regions of drain electrode are formed
Area, carries out short annealing treatment；
11) photoresist of photoetching source electrode 10 and drain electrode 11, removal source electrode 10 and drain electrode 11；
12) it is evaporated in vacuo gold germanium ni au；
13) the gold germanium ni au on photoresist and photoresist is removed；
14) alloying forms Ohmic contact, forms source electrode 10 and drain electrode 11；
15) photoresist, the photoresist of the position of anchor area 6 of removal lead 3, pull-down electrode 8 and cantilever beam are coated；
16) evaporation ground floor gold, its thickness is about 0.3 μm；
17) gold on photoresist and photoresist is removed, the anchor area 6 of lead 3, pull-down electrode 8 and cantilever beam is formed；
18) one layer is depositedThick silicon nitride；
19) photoetching and etch nitride silicon dielectric layer, are retained in the silicon nitride medium layer 9 in pull-down electrode；
20) deposit and photoetching polyimide sacrificial layer：The polyimide sacrificial layer of 1.6 μ m-thicks is coated in GaN substrate 2,
It is required that filling up pit；Photoetching polyimide sacrificial layer, only retains the sacrifice layer of the lower section of cantilever beam 7；
21) titanium/gold/titanium is evaporated, its thickness is 500/1500/
22) photoetching：Removal will electroplate the photoresist in place；
23) gold is electroplated, its thickness is 2 μm；
24) photoresist is removed：Removal need not electroplate the photoresist in place；
25) titanium/gold/titanium is anti-carved, corrodes down payment, form MEMS cantilever beams 7；
26) polyimide sacrificial layer is discharged：Developer solution soaks, the polyimide sacrificial layer under removal cantilever beam 7, deionization
Water soaks slightly, absolute ethyl alcohol dehydration, is volatilized under normal temperature, dries.
Present invention be distinguished in that：
Four switches for constituting rest-set flip-flop are made up of the N-type MESFET with cantilever beam structure, and the cantilever beam passes through
Anchor area is provided with two pull-down electrodes across above grid, there is one layer of space between grid below cantilever beam, the drop-down electricity
Pole is ground connection, and two threshold voltage designs of N-type MESFET are equal, and the actuation voltage of cantilever beam is designed as and N-type
The threshold voltage of MESFET is equal.When the voltage between cantilever beam and pull-down electrode is more than threshold voltage, the drop-down patch of cantilever beam
To grid, so that N-type MESFET is turned on, otherwise N-type MESFET cut-offs, due to the presence of the cantilever beam of N-type MESFET,
So that grid leakage current is substantially reduced, DC power also further reduces.
The structure for meeting conditions above is considered as the rest-set flip-flop of gallium nitride base low-leakage current cantilever beam of the invention.
The symbol and truth table of rest-set flip-flop are as follows in Fig. 1：
Claims (2)
1. a kind of rest-set flip-flop of gallium nitride base low-leakage current cantilever beam, it is characterised in that the rest-set flip-flop is produced on semi-insulating type
In GaN substrate (2), switch (1) by four N-type MESFET and two resistance R are constituted, N-type MESFET switchs (1) including source
Pole, drain electrode, grid and raceway groove composition, two of which N-type MESFET switches (1) are connected in series the first NAND gate of composition (1.), separately
Two N-type MESFET switches (1) are connected in series the second NAND gate of composition (2.), wherein the output end of the first NAND gate (1.) passes through
Wire connects with an input of the second NAND gate (2.), and the output end of same second NAND gate (2.) is also by wire and
One input of one NAND gate (1.) is connected, and forms full symmetric structure；Rest-set flip-flop has two outer signals to be input into
End is respectively first input end R and the second input S, and two output ends are respectively the first output end Q and the second output endN-type MESFET switchs (1) with the cantilever beam (7) for suspending, and one end of the cantilever beam (7) is fixed in anchor area (6), pars intermedia
Divide and the other end is across in grid (4) top, there is a gap between grid (4), cantilever beam (7) is made by Au materials,
Cantilever beam (7) lower section is additionally provided with two pull-down electrodes (8), and pull-down electrode (8) is ground connection, and silicon nitride medium is also covered with thereon
Layer (9), this structure can greatly reduce gate leakage current, so as to reduce the power consumption of device.
2. the rest-set flip-flop of gallium nitride base low-leakage current cantilever beam according to claim 1, it is characterised in that four N
The threshold voltage designs of type MESFET switches (1) are equal, and the actuation voltage of cantilever beam (7) is designed as with N-type MESFET's
Threshold voltage is equal；Only when the voltage between cantilever beam (7) and pull-down electrode (8) is more than threshold voltage, the cantilever of suspension
Beam (7) drop-down can just be labelled to and N-channel MESFET conductings are caused on grid (4), and offset signal is connected to grid by cantilever beam (7)
(4) on, otherwise N-channel MESFET just ends.
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| CN201510379289.7A CN104935296B (en) | 2015-07-01 | 2015-07-01 | The rest-set flip-flop of gallium nitride base low-leakage current cantilever beam |
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| CN201510379289.7A CN104935296B (en) | 2015-07-01 | 2015-07-01 | The rest-set flip-flop of gallium nitride base low-leakage current cantilever beam |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6229405B1 (en) * | 1997-11-14 | 2001-05-08 | Seiko Epson Corporation | Low-voltage oscillation amplifying circuit |
| CN1744437B (en) * | 2005-09-30 | 2010-04-21 | 清华大学 | High-performance low power consumption master-slave D trigger |
| CN102420586A (en) * | 2011-12-29 | 2012-04-18 | 北京大学 | Clock gate control circuit and trigger |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3865689B2 (en) * | 2002-01-15 | 2007-01-10 | 松下電器産業株式会社 | Level shift circuit |
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2015
- 2015-07-01 CN CN201510379289.7A patent/CN104935296B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6229405B1 (en) * | 1997-11-14 | 2001-05-08 | Seiko Epson Corporation | Low-voltage oscillation amplifying circuit |
| CN1744437B (en) * | 2005-09-30 | 2010-04-21 | 清华大学 | High-performance low power consumption master-slave D trigger |
| CN102420586A (en) * | 2011-12-29 | 2012-04-18 | 北京大学 | Clock gate control circuit and trigger |
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| CN104935296A (en) | 2015-09-23 |
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