CN104914640A - 一种阵列基板及其制作方法、显示面板、显示装置 - Google Patents
一种阵列基板及其制作方法、显示面板、显示装置 Download PDFInfo
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- 238000000059 patterning Methods 0.000 claims description 27
- 229920002120 photoresistant polymer Polymers 0.000 claims description 16
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- 238000005530 etching Methods 0.000 claims description 4
- 238000003491 array Methods 0.000 abstract 1
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- 238000013461 design Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 238000002360 preparation method Methods 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
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- 239000002131 composite material Substances 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 229910052681 coesite Inorganic materials 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
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- 239000012528 membrane Substances 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
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- 238000000576 coating method Methods 0.000 description 1
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- 239000011521 glass Substances 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
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- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
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- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- H—ELECTRICITY
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
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Abstract
本发明公开了一种阵列基板及其制作方法、显示面板、显示装置,用以提高公共电极信号的均匀性,提高像素的开口率。所述阵列基板包括若干阵列排列的亚像素单元、薄膜晶体管、栅极线和数据线,其中,还包括公共电极和公共电极线;公共电极线与数据线平行,相邻两列亚像素单元之间间隔分布有数据线和公共电极线,公共电极线与公共电极直接接触电连接,每一数据线与该数据线相邻的两列亚像素单元连接;每一行亚像素单元两侧均分布有一条栅极线,每一行连接在同一数据线上的相邻两个亚像素单元分别与该行亚像素单元两侧分布的不同栅极线连接。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种阵列基板及其制作方法、显示面板、显示装置。
背景技术
薄膜晶体管液晶显示器(Thin Film Transistor Liquid Crystal Display,TFT-LCD)是目前常用的平板显示器,薄膜晶体管液晶显示器以其低电压、低功耗、适宜于电路集成、轻巧便携等优点而受到广泛的研究与应用。
目前传统的高开口率-高级超维场转换(High-Advanced Super DimensionSwitch,HADS)模式薄膜晶体管(Thin Film Transistor,TFT)基板如图1所示,HADS模式TFT基板水平方向分布有公共电极线11和栅极线12,竖直方向分布有数据线13,TFT15的漏极与第一层氧化铟锡(Indium Tin Oxide,ITO)层(图中未示出)相连,提供像素电极信号,第二层ITO层(图中未示出)通过过孔14与公共电极线11相连,加载公共电极信号。
图1中的公共电极线11采用与栅极线12同层的金属制作形成,因此公共电极线11的电阻远小于第二层ITO层的电阻,电阻小时传输电信号的能力强,进而能够提高公共电极信号的均一性。但此设计需要单独设计过孔14与第二层ITO层相连,过孔的设计会占用像素内的显示面积,导致TFT基板像素的开口率降低,不利于产品特性的提高。另外,这种设计虽然在一定程度上提高了公共电极信号的均匀性,但这种设计公共电极线11与公共电极,即第二层ITO层是通过过孔14连接的,属于点接触,接触面积小,接触电阻较大,公共电极信号的均匀性仍然较差。由于接触电阻较大,一般需要每隔三个像素或每个像素都设计过孔14,过孔的设计进一步降低了像素的开口率。
综上所述,现有技术HADS模式TFT基板像素的开口率较低,公共电极信号的均匀性较差。
发明内容
本发明实施例提供了一种阵列基板及其制作方法、显示面板、显示装置,用以提高公共电极信号的均匀性,提高像素的开口率。
本发明实施例提供的一种阵列基板,包括若干阵列排列的亚像素单元、薄膜晶体管、栅极线和数据线,其中,还包括公共电极和公共电极线;
所述公共电极线与所述数据线平行,相邻两列所述亚像素单元之间间隔分布有所述数据线和所述公共电极线,所述公共电极线与所述公共电极直接接触电连接,每一所述数据线与该数据线相邻的两列亚像素单元连接;
每一行所述亚像素单元两侧均分布有一条栅极线,每一行连接在同一数据线上的相邻两个亚像素单元分别与该行亚像素单元两侧分布的不同栅极线连接。
由本发明实施例提供的阵列基板,包括若干阵列排列的亚像素单元、薄膜晶体管、栅极线和数据线,其中,还包括公共电极和公共电极线;所述公共电极线与所述数据线平行,相邻两列所述亚像素单元之间间隔分布有所述数据线和所述公共电极线,所述公共电极线与所述公共电极直接接触电连接,每一所述数据线与该数据线相邻的两列亚像素单元连接;每一行所述亚像素单元两侧均分布有一条栅极线,每一行连接在同一数据线上的相邻两个亚像素单元分别与该行亚像素单元两侧分布的不同栅极线连接。由于本发明实施例中公共电极线与公共电极直接接触电连接,与现有技术公共电极和公共电极线通过过孔电连接相比,本发明实施例中公共电极线与公共电极的接触面积较大,接触电阻较小,因此能够提高公共电极信号的均匀性。另外,与现有技术公共电极和公共电极线连接时需要设置过孔相比,本发明实施例公共电极和公共电极线直接连接,不需要设置过孔,因此能够提高像素的开口率。
较佳地,所述公共电极线和所述数据线同层设置。
较佳地,所述公共电极线与所述数据线按照在列方向上第奇数条为数据线,第偶数条为公共电极线分布;或,
所述公共电极线与所述数据线按照在列方向上第偶数条为数据线,第奇数条为公共电极线分布。
较佳地,包括第一绝缘层,所述第一绝缘层位于所述栅极线和所述公共电极线之间,所述公共电极位于所述公共电极线上,与所述公共电极线直接接触电连接。
较佳地,包括像素电极,所述像素电极位于所述公共电极上方。
较佳地,包括第二绝缘层,所述第二绝缘层位于所述公共电极和所述像素电极之间。
本发明实施例还提供了一种显示面板,所述显示面板包括上述的阵列基板。
本发明实施例还提供了一种显示装置,所述显示装置包括上述的显示面板。
本发明实施例还提供了一种阵列基板的制作方法,所述方法包括:
在衬底基板上通过构图工艺制作栅极和栅极线,每一行亚像素单元两侧均分布有一条栅极线;
在完成上述步骤的衬底基板上通过构图工艺依次制作第一绝缘层和半导体有源层;
在完成上述步骤的衬底基板上通过构图工艺制作源极、漏极、数据线和公共电极线,所述公共电极线与所述数据线平行,所述公共电极线与所述数据线间隔分布在相邻两列亚像素单元之间,每一所述数据线与该数据线相邻的两列亚像素单元连接,每一行连接在同一数据线上的相邻两个亚像素单元分别与该行亚像素单元两侧分布的不同栅极线连接;
在完成上述步骤的衬底基板上通过构图工艺制作公共电极,所述公共电极与所述公共电极线直接电连接;
在完成上述步骤的衬底基板上通过构图工艺制作第二绝缘层和贯穿所述第二绝缘层的过孔;
在完成上述步骤的衬底基板上通过构图工艺制作像素电极,所述像素电极通过所述过孔与所述源极或所述漏极电连接。
较佳地,所述在完成上述步骤的衬底基板上通过构图工艺制作公共电极,包括:
在完成上述步骤的衬底基板上沉积一层透明导电层;
在所述透明导电层上涂覆光刻胶,并对所述光刻胶进行曝光、显影,保留公共电极线和像素区的光刻胶;
通过刻蚀,去除暴露出的透明导电层,并去除剩余的光刻胶,形成公共电极。
附图说明
图1为现有技术阵列基板的平面结构示意图;
图2为本发明实施例提供的一种阵列基板的平面结构示意图;
图3为本发明实施例提供的另一阵列基板的平面结构示意图;
图4为图2或图3中沿AA1方向的截面结构示意图;
图5为图2或图3中沿BB1方向的截面结构示意图;
图6为本发明实施例提供的一种阵列基板的制作方法流程图。
具体实施方式
本发明实施例提供了一种阵列基板及其制作方法、显示面板、显示装置,用以提高公共电极信号的均匀性,提高像素的开口率。
为了使本发明的目的、技术方案和优点更加清楚,下面将结合附图对本发明作进一步地详细描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例,都属于本发明保护的范围。
附图中各层薄膜厚度和区域大小、形状不反应各膜层的真实比例,目的只是示意说明本发明内容。
下面结合附图详细介绍本发明具体实施例提供的阵列基板。
如图2所示,本发明具体实施例提供了一种阵列基板,包括若干阵列排列的亚像素单元20、薄膜晶体管21、栅极线22、数据线23、公共电极24和公共电极线25,其中;
公共电极线25与数据线23平行,相邻两列亚像素单元20之间间隔分布有数据线23和公共电极线25,公共电极线25与公共电极24直接接触电连接,每一数据线23与该数据线23相邻的两列亚像素单元20连接;优选地,本发明具体实施例中公共电极线25和数据线23同层设置;
每一行亚像素单元20两侧均分布有一条栅极线22,每一行连接在同一数据线23上的相邻两个亚像素单元20分别与该行亚像素单元20两侧分布的不同栅极线22连接。
优选地,如图2所示,本发明具体实施例中公共电极线25与数据线23按照在列方向上第奇数条为数据线,第偶数条为公共电极线分布,如:图中第一列为数据线Data1,第二列为公共电极线Com1,第三列为数据线Data2,第四列为公共电极线Com2,第五列为数据线Data3;或;
如图3所示,本发明具体实施例中公共电极线25与数据线23按照在列方向上第偶数条为数据线,第奇数条为公共电极线分布,如:图中第一列为公共电极线Com1,第二列为数据线Data1,第三列为公共电极线Com2,第四列为数据线Data2。
图2或图3中沿AA1方向的截面图如图4所示,本发明具体实施例中的阵列基板包括第一绝缘层41,第一绝缘层41位于栅极线22和公共电极线25之间,公共电极24位于公共电极线25上,与公共电极线25直接接触电连接,具体地,本发明具体实施例中的栅极线22位于衬底基板40上。
图2或图3中沿BB1方向的截面图如图5所示,本发明具体实施例中的阵列基板包括像素电极51和第二绝缘层52,其中,像素电极51位于公共电极24上方,第二绝缘层52位于公共电极24和像素电极51之间,本发明具体实施例中的像素电极51为狭缝状电极。
由图4和图5可以看到,本发明具体实施例中公共电极24和公共电极线25直接接触电连接,直接接触电连接的接触面积为整条公共电极线25,与现有技术中公共电极和公共电极线通过过孔连接相比,本发明具体实施例中公共电极和公共电极线的接触面积较大,接触电阻较低,因此能够提高公共电极信号的均匀性。
如图6所示,本发明具体实施例还提供了一种阵列基板的制作方法,所述方法包括:
S601、在衬底基板上通过构图工艺制作栅极和栅极线,每一行亚像素单元两侧均分布有一条栅极线;
S602、在完成上述步骤的衬底基板上通过构图工艺依次制作第一绝缘层和半导体有源层;
S603、在完成上述步骤的衬底基板上通过构图工艺制作源极、漏极、数据线和公共电极线,所述公共电极线与所述数据线平行,所述公共电极线与所述数据线间隔分布在相邻两列亚像素单元之间,每一所述数据线与该数据线相邻的两列亚像素单元连接,每一行连接在同一数据线上的相邻两个亚像素单元分别与该行亚像素单元两侧分布的不同栅极线连接;
S604、在完成上述步骤的衬底基板上通过构图工艺制作公共电极,所述公共电极与所述公共电极线直接接触电连接;
S605、在完成上述步骤的衬底基板上通过构图工艺制作第二绝缘层和贯穿所述第二绝缘层的过孔;
S606、在完成上述步骤的衬底基板上通过构图工艺制作像素电极,所述像素电极通过所述过孔与所述源极或所述漏极电连接。
具体地,参见图2-图5,首先,本发明具体实施例在衬底基板上沉积一层金属膜层,之后对该金属膜层采用构图工艺形成栅极(图中未示出)和栅极线22,本发明具体实施例中的构图工艺包括光刻胶的涂覆、曝光、显影、刻蚀以及去除光刻胶的部分或全部过程。具体地,本发明具体实施例中的衬底基板为玻璃基板,当然,在实际生产过程中,衬底基板还可以为陶瓷基板等类型的基板。本发明具体实施例在衬底基板上沉积的金属膜层为金属钼(Mo)、金属铝(Al)等金属的单层膜,或由多种金属组成的复合膜,本发明具体实施例并不对金属膜层的材料作具体限定。
接着,在完成上述步骤的衬底基板上通过构图工艺制作第一绝缘层41和半导体有源层26,本发明具体实施例中第一绝缘层的材料为氧化硅(SiO2)或氮化硅(SiN)的单层膜,或为SiO2和SiN组成的复合膜,本发明具体实施例并不对第一绝缘层的材料作具体限定。本发明具体实施例中制作第一绝缘层和半导体有源层的方法与现有技术相同,这里不再赘述。
接着,在完成上述步骤的衬底基板上沉积一层金属膜层,之后对该金属膜层采用构图工艺形成源极(图中未示出)、漏极(图中未示出)、数据线23和公共电极线25,其中,公共电极线25与数据线23平行,公共电极线25与数据线23间隔分布在相邻两列亚像素单元20之间。本发明具体实施例通过一次构图工艺即可制作出数据线23和公共电极线25,不需要增加生产工序,在实际生产过程中更加简单、方便。本发明具体实施例该步骤在衬底基板上沉积的金属膜层的材料可以与制作栅极和栅极线时沉积的金属膜层的材料相同,当然,在实际生产过程中,该步骤中沉积的金属膜层的材料也可以与制作栅极和栅极线时沉积的金属膜层的材料不同,本发明具体实施例并不对该步骤中沉积的金属膜层的材料作具体限定。
接着,在完成上述步骤的衬底基板上沉积一层透明导电层,本发明具体实施例中沉积的透明导电层为氧化铟锡(ITO)膜层,或为氧化铟锌(IZO)膜层,或为ITO和IZO组成的复合膜层,本发明具体实施例并不对透明导电层的材料作具体限定。之后,在透明导电层上涂覆光刻胶,并对光刻胶进行曝光、显影,保留公共电极线和像素区的光刻胶,去除其余区域的光刻胶,光刻胶去除区暴露出透明导电层。之后,通过刻蚀,优选地,本发明具体实施例中通过湿法刻蚀,去除暴露出的透明导电层,此时,只有位于公共电极线和像素区上方的透明导电层被保留,其余区域的透明导电层均被去掉。最后,去除剩余的光刻胶,在公共电极线和像素区上方形成公共电极24,公共电极24与公共电极线25直接接触电连接。
接着,在完成上述步骤的衬底基板上通过构图工艺制作第二绝缘层52和贯穿第二绝缘层52的过孔27,优选地,本发明具体实施例中第二绝缘层52的材料与第一绝缘层41的材料相同,当然,在实际生产过程中,第二绝缘层的材料与第一绝缘层的材料也可以不同,本发明具体实施例并不对第二绝缘层的具体材料作限定。本发明具体实施例中制作第二绝缘层和贯穿第二绝缘层52的过孔的方法与现有技术相同,这里不再赘述。
接着,在完成上述步骤的衬底基板上沉积一层透明导电层,之后对该透明导电层采用构图工艺形成像素电极51,像素电极51通过过孔27与源极或漏极电连接。优选地,本发明具体实施例中形成像素电极的透明导电层的材料与形成公共电极的透明导电层的材料相同,当然,在实际生产过程中,形成像素电极的透明导电层的材料与形成公共电极的透明导电层的材料也可以不同,本发明具体实施例并不对形成像素电极的透明导电层的材料作具体限定。
综上所述,本发明具体实施例提供一种阵列基板及其制作方法、显示面板、显示装置,阵列基板包括若干阵列排列的亚像素单元、薄膜晶体管、栅极线和数据线,其中,还包括公共电极和公共电极线;所述公共电极线与所述数据线平行,相邻两列所述亚像素单元之间间隔分布有所述数据线和所述公共电极线,所述公共电极线与所述公共电极直接接触电连接,每一所述数据线与该数据线相邻的两列亚像素单元连接;每一行所述亚像素单元两侧均分布有一条栅极线,每一行连接在同一数据线上的相邻两个亚像素单元分别与该行亚像素单元两侧分布的不同栅极线连接。由于本发明具体实施例中公共电极线与所述公共电极直接接触电连接,与现有技术公共电极和公共电极线通过过孔电连接相比,本发明具体实施例中公共电极线与公共电极的接触面积较大,接触电阻相对较小,因此能够提高公共电极信号的均匀性。另外,与现有技术公共电极和公共电极线连接时需要设置过孔相比,本发明具体实施例公共电极和公共电极线直接连接,不需要设置过孔,因此能够提高像素的开口率。
显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。
Claims (10)
1.一种阵列基板,包括若干阵列排列的亚像素单元、薄膜晶体管、栅极线和数据线,其特征在于,还包括公共电极和公共电极线;
所述公共电极线与所述数据线平行,相邻两列所述亚像素单元之间间隔分布有所述数据线和所述公共电极线,所述公共电极线与所述公共电极直接接触电连接,每一所述数据线与该数据线相邻的两列亚像素单元连接;
每一行所述亚像素单元两侧均分布有一条栅极线,每一行连接在同一数据线上的相邻两个亚像素单元分别与该行亚像素单元两侧分布的不同栅极线连接。
2.根据权利要求1所述的阵列基板,其特征在于,所述公共电极线和所述数据线同层设置。
3.根据权利要求2所述的阵列基板,其特征在于,所述公共电极线与所述数据线按照在列方向上第奇数条为数据线,第偶数条为公共电极线分布;或,
所述公共电极线与所述数据线按照在列方向上第偶数条为数据线,第奇数条为公共电极线分布。
4.根据权利要求3所述的阵列基板,其特征在于,包括第一绝缘层,所述第一绝缘层位于所述栅极线和所述公共电极线之间,所述公共电极位于所述公共电极线上,与所述公共电极线直接接触电连接。
5.根据权利要求4所述的阵列基板,其特征在于,包括像素电极,所述像素电极位于所述公共电极上方。
6.根据权利要求5所述的阵列基板,其特征在于,包括第二绝缘层,所述第二绝缘层位于所述公共电极和所述像素电极之间。
7.一种显示面板,其特征在于,所述显示面板包括权利要求1-6任一权项所述的阵列基板。
8.一种显示装置,其特征在于,所述显示装置包括权利要求7所述的显示面板。
9.一种阵列基板的制作方法,其特征在于,所述方法包括:
在衬底基板上通过构图工艺制作栅极和栅极线,每一行亚像素单元两侧均分布有一条栅极线;
在完成上述步骤的衬底基板上通过构图工艺依次制作第一绝缘层和半导体有源层;
在完成上述步骤的衬底基板上通过构图工艺制作源极、漏极、数据线和公共电极线,所述公共电极线与所述数据线平行,所述公共电极线与所述数据线间隔分布在相邻两列亚像素单元之间,每一所述数据线与该数据线相邻的两列亚像素单元连接,每一行连接在同一数据线上的相邻两个亚像素单元分别与该行亚像素单元两侧分布的不同栅极线连接;
在完成上述步骤的衬底基板上通过构图工艺制作公共电极,所述公共电极与所述公共电极线直接电连接;
在完成上述步骤的衬底基板上通过构图工艺制作第二绝缘层和贯穿所述第二绝缘层的过孔;
在完成上述步骤的衬底基板上通过构图工艺制作像素电极,所述像素电极通过所述过孔与所述源极或所述漏极电连接。
10.根据权利要求9所述的方法,其特征在于,所述在完成上述步骤的衬底基板上通过构图工艺制作公共电极,包括:
在完成上述步骤的衬底基板上沉积一层透明导电层;
在所述透明导电层上涂覆光刻胶,并对所述光刻胶进行曝光、显影,保留公共电极线和像素区的光刻胶;
通过刻蚀,去除暴露出的透明导电层,并去除剩余的光刻胶,形成公共电极。
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CN107357105A (zh) * | 2017-09-05 | 2017-11-17 | 京东方科技集团股份有限公司 | 一种阵列基板、显示面板、显示装置 |
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