CN104718615A - 半导体电路板及其制造方法和使用其的半导体装置 - Google Patents
半导体电路板及其制造方法和使用其的半导体装置 Download PDFInfo
- Publication number
- CN104718615A CN104718615A CN201380051959.1A CN201380051959A CN104718615A CN 104718615 A CN104718615 A CN 104718615A CN 201380051959 A CN201380051959 A CN 201380051959A CN 104718615 A CN104718615 A CN 104718615A
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- Prior art keywords
- conductor part
- semiconductor
- semiconductor element
- circuit board
- substrate
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- Granted
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 261
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 239000004020 conductor Substances 0.000 claims abstract description 153
- 239000000758 substrate Substances 0.000 claims abstract description 122
- 230000003746 surface roughness Effects 0.000 claims abstract description 10
- 238000000034 method Methods 0.000 claims description 78
- 239000000463 material Substances 0.000 claims description 64
- 239000010949 copper Substances 0.000 claims description 33
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 29
- 229910052802 copper Inorganic materials 0.000 claims description 29
- 239000011230 binding agent Substances 0.000 claims description 22
- 239000000919 ceramic Substances 0.000 claims description 21
- PBZHKWVYRQRZQC-UHFFFAOYSA-N [Si+4].[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O Chemical compound [Si+4].[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O PBZHKWVYRQRZQC-UHFFFAOYSA-N 0.000 claims description 14
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 claims description 10
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 10
- 239000011347 resin Substances 0.000 claims description 10
- 229920005989 resin Polymers 0.000 claims description 10
- 229910017083 AlN Inorganic materials 0.000 claims description 9
- 238000003825 pressing Methods 0.000 claims description 7
- 238000005498 polishing Methods 0.000 claims description 6
- 229910045601 alloy Inorganic materials 0.000 claims description 5
- 239000000956 alloy Substances 0.000 claims description 5
- 230000008569 process Effects 0.000 claims description 5
- 229910000881 Cu alloy Inorganic materials 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 238000004381 surface treatment Methods 0.000 claims description 4
- 230000020169 heat generation Effects 0.000 abstract description 10
- 229910052751 metal Inorganic materials 0.000 description 26
- 239000002184 metal Substances 0.000 description 26
- 238000005219 brazing Methods 0.000 description 18
- 230000005855 radiation Effects 0.000 description 15
- 229910000679 solder Inorganic materials 0.000 description 12
- 238000003756 stirring Methods 0.000 description 10
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- 230000007547 defect Effects 0.000 description 8
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- 238000012546 transfer Methods 0.000 description 6
- 238000003466 welding Methods 0.000 description 5
- 230000004087 circulation Effects 0.000 description 4
- 238000009940 knitting Methods 0.000 description 4
- 238000002156 mixing Methods 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- 229910052760 oxygen Inorganic materials 0.000 description 4
- 239000001301 oxygen Substances 0.000 description 4
- 238000001816 cooling Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 229910052738 indium Inorganic materials 0.000 description 3
- 229910052718 tin Inorganic materials 0.000 description 3
- 229910017944 Ag—Cu Inorganic materials 0.000 description 2
- 229910017945 Cu—Ti Inorganic materials 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 239000006185 dispersion Substances 0.000 description 2
- 238000006073 displacement reaction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005496 eutectics Effects 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 238000007689 inspection Methods 0.000 description 2
- 230000002687 intercalation Effects 0.000 description 2
- 238000009830 intercalation Methods 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
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- 230000004044 response Effects 0.000 description 2
- 230000008719 thickening Effects 0.000 description 2
- 229910002651 NO3 Inorganic materials 0.000 description 1
- NHNBFGGVMKEFGY-UHFFFAOYSA-N Nitrate Chemical compound [O-][N+]([O-])=O NHNBFGGVMKEFGY-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
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- 238000010586 diagram Methods 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
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- 238000003780 insertion Methods 0.000 description 1
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- 239000007788 liquid Substances 0.000 description 1
- 238000011068 loading method Methods 0.000 description 1
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- 238000001465 metallisation Methods 0.000 description 1
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- 230000000630 rising effect Effects 0.000 description 1
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- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
Classifications
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- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
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- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
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Abstract
本发明提供了半导体电路板,其中导体部分设置在绝缘衬底上,其中所述导体部分的半导体元件安装部的表面粗糙度按算术平均粗糙度Ra是0.3μm或更低,按十点平均粗糙度Rzjis是2.5μm或更低,按最大高度Rz是2.0μm或更小,并且按算术平均波纹度Wa是0.5μm或更低。另外,假定绝缘衬底的厚度是t1并且导体部分的厚度是t2,厚度t1和t2满足关系:0.1≤t2/t1≤50。由于上述结构,即使半导体元件的热产生量增加,也可以提供具有优异的TCT特性的半导体电路板和半导体装置。
Description
技术领域
本发明涉及半导体电路板,使用所述半导体电路板的半导体装置,以及用于制造所述半导体电路板的方法。
背景技术
用于电子控制的半导体芯片(半导体元件)在尺寸上已经日益减小,并且所述芯片的热产生量稳步增加。因此,提高安装有半导体芯片的半导体电路板(包括模块)的散热是重要的。这是因为如果半导体芯片即使仅在芯片的一个点处超过芯片的本征温度,所述芯片的电阻也会变为负侧温度系数。这种改变导致其中电力电流强烈流动的热逸散,由此立即破坏所述芯片。即,存在着如下需求:进行考虑了与芯片的功率损耗一致的裕量的散热设计。
热阻(Rth)可以用公式Rth=L/(k×A)表达。在此公式中,Rth是热阻,L是热传递路径,k是热导率,以及A是散热面积。根据此公式,随着热传递路径(L)的下降以及热导率(k)和散热面积(A)的增加,热阻(Rth)变小。注意,通常热传递路径(L)对应于电路板的厚度。
公知的使用半导体芯片的半导体装置涉及不同材料之间的接触,其中所述半导体装置的热传递路径表示为:芯片→焊料→电极电路材料→绝缘衬底→背面金属板→焊料→散热构件(热沉)。除了所述散热构件,这些热介质都属于绝缘电路板。即,除非充当大部分热传递路径的绝缘电路板的散热性能出众,否则不可能实现半导体装置性能的提高。
当前主流的半导体芯片的Si芯片已经遇到了其响应速度的极限。因此,使用SiC和GaN作为下一代半导体元件的芯片的开发正作为国家项目快步前进,其目的是进一步降低装置的尺寸和提高装置的性能。具体地,SiC芯片可以在高达600℃的温度可用,而主流的Si芯片的工作温度是125到150℃。因此,除了快的响应速度之外,高的工作温度是SiC芯片的另一个特性特征。
然而,如果使用传统焊料材料将芯片和电极电路材料结合在一起,则工作温度下降到所述焊料材料的熔点或更低。由此不可能充分利用所述芯片的高的工作温度的特征。在正在开发高熔点焊料材料的当前情况下,还没有开发出充分可靠并且具有600℃或更高的熔点的任何焊料材料。例如,国际公布号WO2007/105361(专利文件1)的小册子建议使用Ag-Cu钎焊料代替高熔点焊料材料。如专利文件1所述的,已经证实使用这种具有600℃或更高的接合温度的高熔点钎焊料使电极电路材料和半导体元件之间的接合(结合)可靠性增强到了一定程度。
另一方面,不仅仅尝试增强接合可靠性,也做出尝试以进一步改善散热。例如,研究了由一种用于在没有将诸如钎焊料之类的任何接合材料置于其间而直接将半导体芯片结合到电极电路材料的方法,以及一种用于通过加厚电极电路材料不仅在纬度方向散热而且在横向方向散热的方法。此外,虽然半导体芯片通过绝缘电路板接合(结合)到热沉的单面冷却方法在传统半导体电路板模块中是主流,但是也已经使用从半导体芯片的两面对半导体芯片冷却的双面冷却方法等。
现有技术文件
专利文件
专利文件1:国际公布号WO2007/105361的小册子
专利文件2:日本专利号3797905
发明内容
本发明要解决的问题
如上所述,已经做出了对散热结构的各种改善的尝试,为半导体元件的工作温度的升高做准备。一种用于在不将诸如钎焊料之类的任何结合材料置于其间的情况下直接将半导体芯片结合(接合)到电极电路材料的方法,使得热传递路径(L)缩短。
另外,一种用于通过加厚电极电路材料不仅在纬度方向散热而且在横向方向散热的方法,使得散热面积(A)增加。从半导体芯片的两面对半导体芯片冷却的双面冷却方法,也使得散热面积(A)增加。
然而,已经存在这样一个问题,没有用于热阻减少从而进一步改善散热(热辐射特性)的各种方法的合适的半导体电路板。
本发明旨在处理此问题并且提供散热出众的半导体电路板。
解决所述问题的手段
本发明的半导体电路板,其中导体部分设置在绝缘衬底(板)上,其特征在于所述导体部分的半导体元件安装部的表面粗糙度按算术平均粗糙度Ra是0.3μm或更低,按十点平均粗糙度Rzjis是2.5μm或更低,按最大高度Rz是2.0μm或更小,并且按算术平均波纹度Wa是0.5μm或更低。
假定绝缘衬底的厚度是t1并且导体部分的厚度是t2,其优选地满足关系:0.1≤t2/t1≤50。此外,所述导体部分的侧面边缘的截面角度优选的是45°或更小。另外,所述导体部分优选地由金属板制成,而所述绝缘衬底优选地由陶瓷衬底制成,并且用于结合所述金属板和所述陶瓷衬底的结合层的从所述金属板突出的突出区域(宽度)优选地是0.2mm或更小。此外,所述绝缘衬底优选地由氧化铝衬底、氮化铝衬底、氮化硅衬底、和绝缘树脂衬底中的一个构成。此外,所述导体部分优选地由铜、铜合金、铝和铝合金中的一个构成。
根据本发明的半导体装置的特征在于半导体元件安装在本发明的半导体电路板的导体部分上。所述半导体元件优选地由一个或多于一个元件构成,所述元件从由Si元件、GaN元件、和SiC元件组成的组中选出。另外,所述半导体元件优选地通过置于其间的接合材料结合到导体部分。可选地,不使用置于其间的结合材料而将半导体元件直接结合到所述导体部分也是优选的。
一种用于制造本发明的半导体电路板的方法包括:在绝缘衬底上形成导体部分的导体部分形成步骤;以及将所述导体部分的半导体元件安装部(表面)的表面粗糙度设定为按算术平均粗糙度Ra是0.3μm或更低,按十点平均粗糙度Rzjis是2.5μm或更低,按最大高度是2.0μm或更小,并且按算术平均波纹度Wa是0.5μm或更低的表面处理步骤。
所述表面处理步骤优选地是抛光步骤。替代地,抛光步骤优选地是刻蚀步骤。另外替代地,抛光步骤优选地是压制(press)过程。
本发明的优点
本发明的半导体电路板在导体部分的半导体元件安装部的平面度上显著改善,并且由此散热出众。此外,安装有半导体元件的半导体装置可以改善散热。此外,当安装有半导体元件时,所述半导体电路板对使用结合材料和不使用结合材料这两种情况下都适用。
附图说明
图1是示出根据本发明的半导体电路板的一种实施例的截面视图;
图2是示出根据本发明的半导体电路板的另一种实施例的截面视图;
图3是示出根据本发明的半导体电路板的此外另一种实施例的截面视图;
图4是示出根据本发明的半导体电路板的又一种实施例的截面视图;
图5是示出根据本发明的半导体装置的一种实施例的截面视图;
图6是示出根据本发明的半导体装置的另一种实施例的截面视图;
图7是示出根据本发明的半导体装置的此外另一种实施例的截面视图。
具体实施方式
根据本发明的半导体电路板,其中导体部分设置在绝缘衬底上,其特征在于所述导体部分的半导体元件安装部的表面粗糙度按算术平均粗糙度Ra是0.3μm或更低,按十点平均粗糙度Rzjis是2.5μm或更低,按最大高度Rz是2.0μm或更小,并且按算术平均波纹度Wa是0.5μm或更低。
图1示出了本发明的半导体电路板的一种实施例。在图1中,附图标记1指代半导体电路板,附图标记2指代绝缘衬底,附图标记3指代导体部分,附图标记4指代另一个导体部分(背面(后面)导体部分),以及附图标记5指代绝缘衬底与导体部分之间的结合层(接合层)。
只要能够保证设置于衬底的两侧的导体部分3与导体部分4之间的绝缘,所述绝缘衬底并不特定受限。但是,优选的,所述绝缘衬底由氧化铝衬底、氮化铝衬底、氮化硅衬底、和绝缘树脂衬底中的一个构成。因为所有这些氧化铝衬底、氮化铝衬底、氮化硅衬底、和绝缘树脂衬底都具有优异的绝缘性能,即使薄至1.5㎜或更小的衬底厚度,这些衬底仍然可用。在这些衬底之间,氮化硅衬底是优选的。例如,如日本专利号3797905(专利文件2)描述的,已经开发出具有500MPa或更高的三点弯曲强度和50W/m·k或更高的热导率,并且因此在强度和热导率两方面都出众的氮化硅衬底。
类似于随后将要描述的SiC元件,即使经受高达200℃或更高的工作温度,氮化硅衬底依然显示出优异的耐久性。在200℃或更高的高温下使用的衬底不限于氮化硅衬底。诸如氧化铝衬底和氮化铝衬底之类的陶瓷衬底也是优选的,因为所述衬底耐热性出众。
所述导体部分优选地由铜、铜合金、铝和铝合金中的一个构成。这些金属电导率出众并且因此是优选的。这些金属热导率出众并且因此散热也出众。此外,所述导体部分优选的是由铜、铜合金、铝和铝合金中的一个构成的金属板。此外,导体部分3与导体部分4优选地通过结合层5结合到绝缘衬底2。
所述导体部分可以不使用置于其间的结合层而结合到绝缘衬底。如果陶瓷衬底被用作如上所述的绝缘衬底,可以应用此结合方法作为使用钎焊料的活性金属结合方法或者作为不使用所述钎焊料的直接结合方法。
本发明的半导体电路板的特征在于其中所述导体部分的半导体元件安装部的表面粗糙度按算术平均粗糙度Ra是0.3μm或更低,按十点平均粗糙度Rzjis是2.5μm或更低,按最大高度Rz是2.0μm或更小,并且按算术平均波纹度Wa是0.5μm或更低。
注意,上述算术平均粗糙度Ra、十点平均粗糙度Rzjis、2.0μm或更小的最大高度Rz、以及算术平均波纹度Wa遵循日本工业标准(JIS)的JIS-B-0601(2001)。JIS-B-0601(2001)的最大高度Rz对应于JIS-B-0601(1994)中的Ry。类似的,JIS-B-0601(2001)中的十点平均粗糙度Rzijs对应于JIS-B-0601(1994)中的Rz。
所述导体部分的半导体元件安装部的表面粗糙度被限定为按算术平均粗糙度Ra是0.3μm或更低,按十点平均粗糙度Rzjis是2.5μm或更低,按最大高度Rz是2.0μm或更小,并且按算术平均波纹度Wa是0.5μm或更低,意味着所述导体部分的半导体元件安装部的平面度是极其出众的。
如随后将描述的,由于半导体元件性能的增加,热产生量也预期增加。例如,将Si元件的接合温度提升到高至150-170℃的努力已被做出。此外,GaN元件或SiC元件的接合温度预期增加到300-400℃。
每个元件的实际工作温度,尽管低于其接合温度,倾向于高于公知的Si元件的工作温度。
如果半导体元件的热产生量增加,导体部分由于热膨胀会变变形。如果此刻所述导体部分的半导体元件安装部的平面度不好,当所述导体部分便变形时,所述半导体元件会遭受诸如移位或分层(delamination)之类的问题。
在本发明中,半导体电路板在导体部分的半导体元件安装部的平面度是极其出众的。因此,即使由于热膨胀所述导体部分出现变形,所述变形可以被均衡以阻止半导体元件的移位或分层。
此外,改善了半导体电路板在导体部分与半导体元件之间的粘合性。因此,可以阻止产生任何未反应部分和空隙(未结合部分),所述未反应部分和空隙可以发展成导体部分与半导体元件之间的结中的缺陷。当导体部分与半导体元件通过结合材料而结合时,也可以阻止产生未反应部分和空隙。
所述导体部分的半导体元件安装部的表面粗糙度被限定为按算术平均粗糙度Ra是0.1μm或更低,按十点平均粗糙度Rzjis是2.0μm或更低,按最大高度Rz是1.2μm或更小,并且按算术平均波纹度Wa是0.1μm或更低。
此外,假定绝缘衬底的厚度是t1并且导体部分的厚度是t2,优选地t1和t2满足关系:0.1≤t2/t1≤50。如随后将描述的,半导体元件可从各种类型得到,包括Si元件、GaN元件和SiC元件。在任一种情况中,由于输出功率增加,热产生量倾向于增加。
为有效耗散由半导体元件产生的热,高热导率的导体部分优选地具有特定厚度。所述厚度优选地满足t1≤1.5㎜,并且更优选地满足0.1㎜≤t1≤0.8㎜。
小于0.1㎜的绝缘衬底厚度可能不能确保导体部分3与导体部分4之间的绝缘。另一方面,大于1.5㎜的绝缘衬底厚度t1使得绝缘板本身充当热阻元件,由此降低了半导体电路板的散热。此外,导体部分的厚度t2优选地满足1≤t2/t1≤10。背部表面导体部分(导体部分4)也优选地具有与所述绝缘衬底同样的厚度关系。
所述导体部分的侧面边缘的截面角度优选的是45°或更小。图2示出了半导体电路板的例子,其中导体部分的侧面边缘是成角度的。在图2中,附图标记1指代半导体电路板,附图标记2指代绝缘衬底,附图标记3指代导体部分,附图标记4指代另一个导体部分(背面(后面)导体部分),附图标记5指代绝缘衬底与导体部分之间的结合层(接合层),附图标记6指代所述结合层的突出区域(宽度),以及θ指代所述导体部分的侧面边缘的角度。
如先前所述,如果半导体元件的热产生量增加,导体部分由于热膨胀会变形。在此刻,如果导体部分的侧面边缘的截面角度θ减少到45°或更小,所述导体部分的侧面边缘由于热膨胀的变形可被减少。如果所述导体部分的侧面边缘的变形可被减少,则可以阻止绝缘衬底与导体部分分层(剥离)。
此外,所述导体部分优选地由金属板制成,而所述绝缘衬底优选地由陶瓷衬底制成,并且用于结合所述金属板和所述陶瓷衬底的结合层的从所述金属板突出的突出区域(宽度)优选地是0.2mm或更小。结合层的突出区域6是陶瓷衬底与金属板之间的结合面中从所述金属板的侧面边缘突出的部分。
通过提供结合层的突出区域6,可以阻止陶瓷衬底从金属板的结合边面分层。大于0.2㎜的突出区域6的宽度不能提供进一步阻止分层的效果,而替代地可以使得成本增加。将此技术与上述的设定导体部分的侧面边缘的截面角度为45°或更小的技术结合起来更有效。当为半导体电路板提供具有2㎜或更大的厚度t2的厚导体部分时,所述结合的技术尤其有效。
图3和图4示出了本发明的半导体电路板的另一种实施例。在图中,附图标记和字母与图1中所示的一样。图3示出了形成凸形状的导体部分3,而图4示出了形成凹形状的导体部分3。在图3中,导体部分的半导体元件安装部可以是其凸表面或台阶部分的最高位置。
在图4中,导体部分的半导体元件安装部可以是凹表面的最低位置或最高位置。在任一情况中,所述半导体元件安装部被处理以具有平面表面,其表面粗操度按算术平均粗糙度Ra是0.3μm或更低,按十点平均粗糙度Rzjis是2.5μm或更低,按最大高度Rz是2.0μm或更小,并且按算术平均波纹度Wa是0.5μm或更低。
通过将半导体元件安装在导体部分的凸表面的最高位置处,如图3中所示的这种凸导体部分允许导体部分的边的热膨胀得到缓解。由此可以阻止绝缘衬底和导体部分分层。
此外,通过将半导体元件安装在导体部分的凹陷部分的最低位置处,如图4中所示的这种凹导体部分允许半导体元件的热有效地通过导体部分耗散。
注意,如图3所示的这种凸导体的情况中,导体部分的厚度t2指的是所述导体部分的最厚位置。还有在如图4所示的这种凹导体的情况中,导体部分的厚度t2指的是所述导体部分的最厚位置。
在上述半导体电路板中,导体部分的半导体元件安装部具有出众的平面度。因此,即使半导体元件的热产生量增加,也可以阻止所述导体部分的变形。由此可能阻止半导体元件的诸如分层之类的问题。作为结果,使用本发明的半导体电路板的半导体装置可以改善可靠性。
各种半导体元件,包括Si元件、GaN元件、SiC元件和热电元件,可被用于所述半导体装置。特别地,所述半导体元件优选地由Si元件、GaN元件和SiC元件这些元件中的一个或多于一个组成。将Si元件的接合温度提升到高至150-170℃的努力已被做出。此外,GaN元件或SiC元件的接合温度预期增加到300-400℃。所有这些半导体元件的工作温度倾向于增加到130℃或更高,并且甚至到200℃或更高。
本发明的半导体电路板中的半导体元件安装部的平面度被改善。因此,即使工作温度上升,半导体元件的位置移位也可被阻止。由此既可以应用用于使用接合材料将半导体元件接合到导体部分的方法,又可以应用用于不使用置于其间的接合材料而直接将半导体元件接合到导体部分的方法。
图5示出了通过结合层8将半导体元件7安装到半导体装置的一种实施例。图6示出了不使用置于其间的结合层8将将半导体元件7安装到半导体装置的一种实施例。在图5和图6中,附图标记1指代半导体电路板(半导体装置),附图标记2指代绝缘衬底,附图标记3指代导体部分,附图标记4指代另一个导体部分(背面导体部分),以及附图标记5指代绝缘衬底与导体部分之间的结合层,附图标记7指代半导体元件,以及附图标记8指代用于结合半导体元件的结合层。
在采用半导体元件通过结合材料被结合到导体部分的结构的情况中,结合材料的例子包括焊料、活性金属钎焊料、和热导树脂。
对焊料而言,无铅焊料是优选的,并且所述焊料优选地具有比半导体元件的工作温度高100℃或更多的熔点。
活性金属钎焊料是包含至少一种从Ti、Zr和Hf组成的组中选择的活性金属的Ag-Cu合金钎焊料。所述活性金属钎焊料优选地由以下成分组成:质量比重为1到6%的活性金属、10到35%的Cu、以及其余为Ag,并且如果必要可添加质量比重为10到20%的In或Sn。活性金属钎焊料具有高至700℃或更高的熔点,并且因此即使半导体元件的工作温度升至高至200℃或更高,仍可维持强结合状态。
另一方面,用于采用不使用置于其间的接合材料而直接将半导体元件接合到导体部分的结构的方法的例子包括压力结合方法、摩擦搅拌焊接(FSW)方法和常温结合方法。
上述压力结合方法是一种如下的方法:将半导体元件与导体部分的半导体元件安装部接触并且使用特定压力将所述半导体元件压入所述安装部分以便结合所述半导体元件。半导体元件可以通过使用一定压力压半导体元件同时如果必要的话施加热来结合。替代地,可以在真空中使用Ar光束等辐射半导体元件的结合面并且由此表面-激活所述结合面来结合所述半导体元件。
所述摩擦搅拌焊接(FSW)方法是一种如下的方法:通过将半导体元件对着半导体电路板施压和压制来结合所述半导体元件,同时旋转半导体元件和半导体电路板的任一个,由此通过摩擦热和搅拌力结合所述半导体元件。此方法充分利用摩擦热和搅拌力,并且因此不必熔化基础材料就能够实现基于塑料流的固相接合。
如上所述,上述的压力结合方法、摩擦搅拌焊接方法和常温结合方法不使用任何结合材料直接结合半导体元件与导体部分,并且因此不产生由于结合材料的分层导致的任何结合失败。此外,因为半导体元件直接结合到导体部分,即使半导体元件的热产生量增加,所述半导体电路板的散热也是出众的。
图7示出了接合(结合)了热沉的半导体装置(半导体电路板)。在图7中,附图标记1指代半导体电路板,附图标记2指代绝缘衬底,附图标记3指代导体部分,附图标记4指代另一个导体部分(背面导体部分),附图标记5指代绝缘衬底与导体部分之间的结合层,附图标记7指代半导体元件,以及附图标记8指代用于结合半导体元件的结合层,以及附图标记9指代热沉。通过将热沉9结合到背面导体部分4,可以进一步改善散热性能。
即使半导体元件的热产生量增加,本发明的半导体装置可以维持半导体元件与导体部分之间的结合(接合)的可靠性,同时维持优异的散热。
此外,通过调整导体部分的侧表面边的形状和导体部分与绝缘衬底之间的结合层的突出的量,可以改善所述导体部分和绝缘衬底的TCT(热循环测试)特性。因此,可以阻止分层问题的出现。
作为结果,半导体装置的TCT特性显著改善,从而使得可以改善半导体装置的可靠性。因此,所述半导体装置可应用于各种领域,包括用在汽车、电动车辆、电动有轨车辆、工业机械和空调的逆变器的功率控制单元(PCU)、IGBT(绝缘栅双极型晶体管)、和IPM(智能功率单元)等。
接着,将描述一种制造方法。尽管用于制造本发明的半导体电路板的方法不特定受限,下述方法可用作有效获得电路板的方法。
首先,准备绝缘衬底。绝缘衬底的例子包括陶瓷衬底和绝缘树脂衬底。作为陶瓷衬底,优选的是氧化铝衬底、氮化铝衬底、或氮化硅衬底。氧化铝衬底(Al2O3),尽管热导率为10到30W/m·k,具有高至400Mpa或更高的三点弯曲强度。此外,相比起氮化铝衬底和氮化硅衬底,氧化铝衬底不贵并且因此有效地减少成本。氮化铝(AlN)衬底优选地具有170W/m·k或更高的热导率。氮化铝衬底具有250Mpa或更高的三点弯曲强度,这低于氧化铝衬底,但是可通过改善烧结添加剂成分等将强度增加到350-550Mpa。氮化硅衬底(Si3N4)优选的是高热导率和高强度,具有50W/m·k或更高的热导率以及500Mpa或更高的三点弯曲强度。
只要保证绝缘性能,所述绝缘树脂衬底不特定受限。相比起陶瓷衬底,所述绝缘树脂衬底不贵。根据要被安装的半导体元件的热产生量和应用的使用环境来作出绝缘衬底的选择。例如,如果元件产生如SiC元件的高热,陶瓷衬底是优选的。特别的,通过使得衬底有高热导率和高强度,氮化硅衬底可薄至0.4mm或更小的衬底厚度。因为通过减少衬底厚度可以阻止氮化硅衬底作为热阻元件,可以进一步改善散热。此外,绝缘衬底的厚度优选的是1.5mm或更小,并且更优选的是0.1到1.0mm。
接着,执行在绝缘衬底中提供导体部分的步骤。所述导体部分的例子包括金属板、由焙烧(烧结)金属粉膏制成的导体、诸如溅射膜之类的金属沉积膜、和镀金属膜。这些材料中,金属板是优选的。所述金属板使得容易调整金属板厚度t2与绝缘衬底厚度t1之间的比率。
对金属板与绝缘衬底之间的结合(接合)操作,如果绝缘衬底是陶瓷衬底,则直接结合铜方法(DBC方法)或活性金属钎焊料方法是优选的。如果绝缘衬底是绝缘树脂衬底,则使用粘合剂等的结合方法可被引用为例子。
如果要被安装在半导体元件的导体部分形成为如图3所示的这种凸导体部分或者如图4所示的这种凹导体部分,先前可使用凸金属板或凹金属板,或者所述导体部分可由如后所述的刻蚀或压制操作来成型。
如果必要,通过刻蚀或压制操作将电路几何结构(电路图案)给予所述导体部分。此外,导体部分的侧面边缘的形状和结合层的突出区域(宽度)可通过刻蚀来调整。
在准备好要与导体部分结合的绝缘衬底后,执行抛光工艺以改善导体部分的半导体元件安装部的平面度。用于改善平面度的抛光工艺是刻蚀或压制操作。用于获得平面表面的目的的抛光工艺的条件与在用于添加上述电路几何结构(电路图案)的目的的刻蚀或压制操作的条件是不同的,所述平面表面按算术平均粗糙度Ra是0.3μm或更低,按十点平均粗糙度Rzjis是2.5μm或更低,按最大高度Rz是2.0μm或更小,并且按算术平均波纹度Wa是0.5μm或更低。
即,在用于调整电路几何结构的目的的工艺的情况中,需要完全移除掉所述导体部分的不必要部分。相对照地,用于改善平面度的目的的抛光工艺未完全移除所述导体部分,而是只将半导体元件安装部处理成想要的平面表面。所述平面表面通过移除导体部分的1到50μm厚的上部来形成。
特别地,如果半导体元件是通过不涉及***接合材料的上述方法安装的,则所述导体部分的半导体元件安装部的表面粗糙度被限定为按算术平均粗糙度Ra是0.1μm或更低,按十点平均粗糙度Rzjis是2.0μm或更低,按最大高度Rz是1.2μm或更小,并且按算术平均波纹度Wa是0.1μm或更低。因此期望将所述导体部分移除到10μm或更深的深度。
在刻蚀的情况中,根据导体部分的材料和需要的平面度程度来选择刻蚀液和诸如浸泡时间或流动时间之类的处理条件。在压制操作的情况中,形成为期望的平面表面的压制模具在真空中对着导体部分被施压,同时将模具加热到700到860℃,从而执行压制操作。
通过仅将导体部分的半导体元件安装部形成为平面表面,可以获得容易识别将要安装所述半导体元件的位置的显著效果。毋庸赘述,导体部分的整个表面可被形成为平面表面,尽管只有所述导体部分的半导体元件安装部需要被形成为平面表面。
接着,执行将半导体元件安装到获得的半导体电路板的步骤,作为用于制造半导体装置的方法。如前所述的,半导体元件与导体部分的半导体元件安装部之间的结合操作可以通过涉及***接合材料的方法或者不涉及***接合材料的方法执行。
在采用半导体元件通过结合材料被结合到导体部分的结构的情况中,结合材料的例子包括焊料、活性金属钎焊料、和导热树脂。所述结合材料优选的是薄至30μm或更薄,并且更优选的薄至10μm或更薄。通过使结合材料变薄,可以更有效地将半导体元件安装部形成为平面表面。
假定金属成分的总和是100wt(质量)%,用于结合半导体元件的活性金属钎焊料优选地由以下成分构成:1-6wt%的Ti、10-35%的Cu、10-20wt%的Sn或In的一个或两者,以及其余为Ag。通过将Sn或In的一个或两者添加到由Ag-Cu-Ti构成的活性金属钎焊料中,所述活性金属钎焊料的共熔温度可以降低。
通过降低所述活性金属钎焊料的共熔温度,可以将结合温度提升到650-800℃。在陶瓷衬底和铜板结合的情况中,所述由Ag-Cu-Ti构成的活性金属钎焊料的结合温度升至820-900℃。
另一方面,通过将用于结合半导体元件的所述活性金属钎焊料的结合温度设定到800℃或更低,可以使陶瓷衬底和铜板结合的结合温度降低。作为结果,可以避免接合半导体元件的步骤中的热处理对陶瓷板和铜板之间的接合层产生不利影响。
注意,如果同时执行陶瓷衬底和铜板之间的结合操作以及所述铜板和半导体元件之间的接合操作,则优选地使用具有相同成分的活性金属钎焊料。
不***任何结合材料的结合方法的例子包括压力结合方法、摩擦搅拌焊接(FSW)方法、和常温结合方法。
压力结合方法是一种如下的方法:将半导体元件与导体部分的半导体元件安装部接触并且使用一定压力将所述半导体元件压入所述安装部分以便结合所述半导体元件。半导体元件可以通过使用一定压力压半导体元件同时如果必要的话施加热来结合。替代地,可以在真空中使用Ar光束等辐射半导体元件的结合面并且由此表面-激活所述结合面来结合所述半导体元件。
所述摩擦搅拌焊接(FSW)方法是一种如下的方法:通过将半导体元件对着半导体电路板施压和压制来结合所述半导体元件,同时旋转半导体元件和半导体电路板的任一个,由此通过摩擦热和搅拌力结合所述半导体元件。此方法利用摩擦热和搅拌力,并且因此不必熔化基础材料就能够实现基于塑料流的固相接合。
各种元件,包括Si元件、GaN元件、SiC元件,可被用于所述半导体元件。特别地,即使半导体元件具有倾向于高至130℃或更高的工作温度,并且甚至施加了高至200℃或更高的工作温度,也可以改善导体部分与半导体元件之间的结合(接合)的可靠性是可能的,因为导体部分的半导体元件安装部被形成为平面表面。
此外,因为可以阻止半导体元件与导体部分之间形成任何未反应部分和空隙,结合面中不形成任何可充当热阻元件的部分。因此可有效地耗散从半导体元件中生成的热。因此,不涉及***任何结合材料的方法,诸如压力结合方法、摩擦搅拌焊接(FSW)方法、和常温结合方法,在安装工作温度倾向于高的半导体元件的情况下是优选的。
当不使用***的任何结合材料将半导体元件接合到导体部分的半导体元件安装部时,优选地通过应用2kN或更高的负载结合所述半导体元件。作为铜板,适合使用无氧铜板。无氧铜板的维氏硬度(HV)按JIS-H-3100定义为55或更高,并且甚至定义为55到大约120。通过应用2kN或更高的负载,不使半导体元件倾斜,可以将所述半导体元件精确压装到由无氧铜板构成的导体部分的半导体元件安装部。注意负载的上限优选的是2kN或更低。超过20kN的负载上限会使得铜板变形。因此,负载优选的是2到20kN,并且更优选的是3到10kN。
对于摩擦搅拌焊接方法,通过对半导体元件应用对应于500到4000rpm的旋转速度的运动,所述负载可以低于2kN。
在上述条件下实施压力结合方法或摩擦搅拌焊接方法使得可以结合半导体元件与导体部分的半导体元件安装部以便其间的结合部分不形成任何空隙。使用超声波缺陷监测方法,可以分析是否形成了空隙。注意,所述超声波缺陷监测方法通过使用脉冲反射方法的垂直缺陷监测方法来实施。
在图5到图7中,仅安装一个半导体元件的结构作为一种实施例被示出。但是,本发明不限于此实施例。替代地可以安装多个半导体元件。考虑到产出和成本,倾向于减小半导体元件的面积。当安装小尺寸半导体元件时,即使与导体部分的结合中微小的故障都使得所述半导体元件充当热阻元件,从而影响散热。此外,为增加小面积半导体元件作为半导体装置的能力,需要将多个半导体元件并联。即使在此情况中,通过将要安装半导体元件的导体部分的半导体元件安装部处理成平面表面,可获得相同的效果。因此,本发明也适用于安装有多个半导体元件的半导体装置。
(例子)
(实践例子1到10以及对比例子1到3)
绝缘(陶瓷)衬底(30mm长×35mm宽),准备有氧化铝衬底(厚度:0.635mm,热导率:15W/m·k,三点弯曲强度:450Mpa)、氮化铝衬底(厚度:0.635mm,热导率:180W/m·k,三点弯曲强度:400Mpa)、以及氮化硅衬底(厚度:0.320mm,热导率:90W/m·k,三点弯曲强度:650Mpa)。
接着,铜板(25mm长×30mm宽)通过活性金属钎焊料被结合到每个绝缘衬底的两面。注意作为活性金属钎焊料,使用了由如下成分构成的钎焊料:3wt%的Ti、30wt%的Cu、其余为Ag,所述钎焊料被涂覆到15μm厚,并且所述铜板在真空(10-3Pa或更低)中于820-860℃的温度被热结合。作为铜板,无氧铜板(维氏硬度:Hv80)被使用。
接着,为提供电路几何结构将抗蚀剂涂在铜板的前面,执行刻蚀处理以形成电路图案,并且接着分离所述抗蚀剂。此外,如果必要,所述电路图案的边缘被刻蚀以调整铜板的侧表面边缘的截面角度θ与结合层的突出区域。
由此得到的半导体电路板的尺寸规格如表1中列的样本1到8。
表1
接着,对于如样本1到8指示出的半导体电路板,半导体元件安装部被处理成具有表2所示的平面表面。注意刻蚀被执行为抛光工艺方法的例子被指定为实践例子。相反,没有执行抛光工艺的例子被指定为对比例子。
表2
对于根据实践例子1到10和对比例子1到3的半导体电路板,半导体元件被安装在导体部分的半导体元件安装部上从而制造半导体装置。所述导体部分与所述半导体元件之间的结合状况在表3中示出。注意,活性金属钎焊料被用作涉及***结合材料的方法,而压力结合方法或摩擦搅拌焊接方法(FSW)被用作不涉及***结合材料的方法。
注意,对于使用活性金属钎焊料的结合方法,使用由如下成分组成的活性金属钎焊料:3wt%的Ti、20wt%的Cu、8wt%的Sn、8wt%的In、其余为Ag,所述钎焊料被涂覆到10μm厚,并且所述铜板在真空(10-3Pa或更低)中于700-750℃的温度被热结合。此外,通过应用3到10kN的负载实施压力结合方法。此外,在摩擦搅拌焊接方法(FSW)中,通过应用1kN的负载同时以1000-3000rpm的旋转速度旋转半导体元件来结合所述半导体元件。
对每个如此制造的半导体装置执行TCT测试(热循环测试)。对于TCT测试,-50℃×30分钟→室温×10分钟→155℃×30分钟→室温×10分钟的过程被定义为一个循环,并且执行2000个循环作为测试1。
此外,对使用氮化硅沉底作为陶瓷衬底的样本,-50℃×30分钟→室温×10分钟→210℃×30分钟→室温×10分钟的过程被定义为一个循环,并且执行2000个循环作为测试2。
在测试之后,通过视觉或者超声波缺陷检测方法来验证陶瓷衬底与铜板以及铜板与半导体元件之间是否存在任何故障(缺陷)。注意,作为超声波缺陷检测方法,使用脉冲反射方法的垂直缺陷检测方法被用以确定其中铜板与半导体元件之间的结合(半导体元件与铜板的半导体元件安装部之间的结合)中未观察到空隙的半导体装置作为可接受的单元(无缺陷的单元)。作为结果,在表3种将无缺陷的单元被标记为“O”并且有缺陷的单元被标记为“×”。
表3
如从以上表3示出的结果中证明的,根据每个实践例子的半导体装置即使在150℃或更高、或者甚至200℃或更高的使用环境的高温中,都展示出出众的TCT特性。特别地,使用氮化硅衬底的半导体装置示出了优异的特性。此外,在根据实践例子的半导体装置中,即使在测试2完成后,都未在半导体元件与铜板之间的接合(结合的部分)中观察到空隙。注意即使对于实践例子1到4在测试2中观察到铜板的分层,相比于对比例子1和2,分层的量也是小的。
尽管已经描述了本发明的若干实施例,但这些实施例仅被示出作为例子并且不旨在限制本发明的范围。可以用其他各种方式实现这些新实施例,并且在不背离本发明的要旨情况下,可以做出各种省略、替换和修改。因此应当指出这些实施例及其修改都落入本发明的要旨或范围内,以及由所附权利要求和其等同物所限定的本发明的范围内。
参考符号列表
1:半导体电路板(半导体装置)
2:绝缘衬底
3:导体部分(铜电路板)
4:导体部分(背面导体部分,背面电路板)
5:绝缘衬底与导体部分之间的结合层
6:结合层(接合层)的突出区域(宽度)
7:半导体元件
8:用于结合半导体元件的结合层
9:热沉
Claims (14)
1.一种半导体电路板,其中导体部分设置在绝缘衬底上,其中所述导体部分的半导体元件安装部的表面粗糙度按算术平均粗糙度Ra是0.3μm或更低,按十点平均粗糙度Rzjis是2.5μm或更低,按最大高度Rz是2.0μm或更小,并且按算术平均波纹度Wa是0.5μm或更低。
2.根据权利要求1所述的半导体电路板,其中假定所述绝缘衬底的厚度是t1并且所述导体部分的厚度是t2,所述厚度t1和t2满足关系:0.1≤t2/t1≤50。
3.根据权利要求1或2所述的半导体电路板,其中所述导体部分的侧面边缘的截面角度是45°或更小。
4.根据权利要求1到3的任意一个所述的半导体电路板,其中所述导体部分由金属板制成,而所述绝缘衬底由陶瓷衬底制成,并且用于接合所述金属板和所述陶瓷衬底的结合层的从所述金属板突出的区域(宽度)是0.2mm或更小。
5.根据权利要求1到4的任意一个所述的半导体电路板,其中所述绝缘衬底由氧化铝衬底、氮化铝衬底、氮化硅衬底、和绝缘树脂衬底中的一个构成。
6.根据权利要求1到5的任意一个所述的半导体电路板,其中所述导体部分由铜、铜合金、铝和铝合金中的一个构成。
7.一种半导体装置,其中半导体元件被安装到根据权利要求1到6的任意一个所述的半导体电路板的导体部分上。
8.根据权利要求7所述的半导体装置,其中所述半导体元件包括从由Si元件、GaN元件、和SiC元件组成的组中选出的一个或多于一个元件。
9.根据权利要求7或8所述的半导体装置,其中所述半导体元件使用置于其间的结合材料结合到所述导体部分。
10.根据权利要求7或8所述的半导体装置,其中所述半导体元件在不使用置于其间的结合材料的情况下直接结合到所述导体部分。
11.一种用于制造半导体电路板的方法,包括:
在绝缘衬底上形成导体部分的导体部分形成步骤;
将所述导体部分的半导体元件安装部的表面粗糙度设定为按算术平均粗糙度Ra是0.3μm或更低,按十点平均粗糙度Rzjis是2.5μm或更低,按最大高度是2.0μm或更小,并且按算术平均波纹度Wa是0.5μm或更低的表面处理步骤;以及
将半导体元件结合到所述导体部分的所述半导体元件安装部的结合步骤。
12.根据权利要求11所述的制造半导体电路板的方法,其中所述表面处理步骤是抛光步骤。
13.根据权利要求12所述的制造半导体电路板的方法,其中所述抛光步骤是刻蚀步骤。
14.根据权利要求12所述的制造半导体电路板的方法,其中所述抛光步骤是压制工艺。
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US9277639B2 (en) | 2016-03-01 |
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