CN104241121A - 制造二极管的方法 - Google Patents
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Abstract
本发明公开了一种制造二极管的方法,其中处理晶片以产生掺杂层结构。该晶片掺杂有n-杂质并且具有前表面和背表面。该方法包括:在前表面上形成阳极;研磨背表面以减小晶片的厚度;利用n+杂质对背表面进行掺杂并且通过激光退火活化n+杂质以形成阴极层;穿过背表面利用多次n型质子注入并且对质子注入进行退火在阴极层的内部形成缓冲层。
Description
技术领域
本发明涉及一种制造二极管的方法,所述二极管例如功率二极管,特别是快速恢复型的功率二极管。
背景技术
快速恢复功率二极管通常由p-n--n-n+掺杂区构成,也就是分别为p型阳极层、n-电压阻挡层、逐渐增加的n型掺杂的缓冲区和浅的但重掺杂的n+背面阴极层。n-区的厚度取决于针对其应用的二极管额定电压,n-区的厚度代表器件总厚度的主要部分。n型缓冲区的掺杂分布确定二极管恢复特性的平稳性。之前已经证明了n型缓冲区对于二极管恢复的强度的重要性[见参考文献1至参照文献3]。因此,现在大多数功率二极管由长扩散n型缓冲区构成,其可以通过高温退火结合在衬底水平处。对于中间至低额定电压二极管(<1700V),n-区的厚度通常小于150μm,并且包括所有四个区(p-n--n-n+)的总厚度可以仅为约200μm或甚至更小。
目前,用于二极管制造的Si衬底通常开始于在背面预扩散n型缓冲区,因此,n-区的厚度或器件额定电压也被预先确定。因此,不同的Si衬底用于不同额定电压的二极管的制造。然而,由于为了机械稳定性,衬底的厚度必须随着晶片直径而增加,为了保持n-区(即,器件额定电压)恒定,预扩散n型缓冲区的厚度也增加。
例如,对于6英寸(150mm)直径的晶片生产线,用于二极管生产的衬底厚度为约320μm,其中对于1700V额定电压二极管,n型预扩散缓冲区的厚度为约170μm,并且对于1200V或更低额定电压的二极管n型预扩散缓冲区的厚度更厚。通过扩散制造长缓冲区是相当耗时且昂贵的。对于8英寸(200mm)晶片生产线该问题变得更糟糕,这是因为在光刻工艺期间衬底厚度必须显著增加用于机械强度。对于8英寸(200mm)晶片的典型的衬底厚度为约700μm,对于1700V或更低额定电压的二极管需要比500μm更厚的扩散n型缓冲区。对于8英寸晶片生产线要求这样的厚预扩散n型缓冲衬底是很困难且非常昂贵的。本发明的一个目的是提供一种用于薄晶片快速恢复二极管和IGBT制造的可替代的方法。
参考文献[4]和参考文献[5]公开了质子的注入。质子不是非常有效的掺杂剂,这是因为质子本身不是掺杂剂。它们必须与其他物质(如硅中的氧)反应以形成n型掺杂剂。
发明内容
根据本发明,提供了一种制造二极管的方法,其中处理衬底晶片以产生掺杂层结构,该晶片掺杂有n-杂质并且具有前表面和背表面,该方法包括:在前表面上形成阳极;研磨背表面以减小晶片的厚度;利用n+杂质对背表面进行掺杂并且通过激光退火活化n+杂质以形成阴极层;利用多次n型质子注入穿过背表面并且对质子注入进行退火在阴极层的内部形成缓冲层。
衬底晶片通常为硅,但是也可以使用其他衬底例如碳化硅。
可以通过在炉中加热至低于500℃并且合适地为约450℃来对质子注入进行退火,但是可替选地可以通过激光退火进行退火,优选地在激光退火之前或期间将晶片加热至低于退火温度的升高的温度,由此使得能够更有效地实现在晶片的厚度内在期望的位置处进行局部退火。根据在晶片内部质子注入的位置,发现用于有效预加热的温度为约300℃至350℃,但是可以采用更低的温度。
可以利用硼注入和热扩散在前表面上形成阳极。也可以或可替选地在研磨之前在前表面上执行光刻工艺。可以在阴极层上沉积薄Ti层并且通过激光退火进行退火。
本发明还提供了一种制造半导体器件的方法,包括通过将杂质注入到衬底晶片内部来在晶片内形成掺杂层,然后对杂质进行激光退火,其特征在于在施加激光退火之前将晶片预加热至低于退火温度的升高的温度。
附图说明
在附图中:
图1是示出了根据本发明的在薄晶片二极管制造中涉及的关键处理步骤的示意图;
图2示出了利用多次质子注入对于1700V快速恢复型二极管的典型的掺杂分布;
图3是对于三个不同缓冲结构模拟的正向I-V特性的曲线图;
图4是对于三个不同缓冲结构模拟的反向阻断电压(blockingvoltage)的曲线图;
图5是在300A和di/dt=1000A/μs的初始电流条件下对于阴极电流和电压的瞬时反向恢复波形的曲线图;
图6是在三个不同条件下对于具有预扩散n型缓冲区的二极管测量的动态恢复波形的曲线图;
图7是在三个不同条件下对于具有注入质子的缓冲区的二极管测量的动态恢复波形的曲线图;以及
图8是将具有常规扩散缓冲区的二极管与根据本发明的具有注入质子的缓冲区的二级管的相对于操作电流的恢复能量损失进行比较的曲线图。
具体实施方式
图1a示出了用作初始衬底的标准均匀n-掺杂的Si晶片。通过硼注入和热扩散在晶片的正面形成p型阳极接触层。在该阶段还向正面施加所有光刻工艺步骤,要求晶片对于一些精细的步骤(例如用于特征校准的步进机(stepper))具有必需的机械强度,因此在该阶段衬底的厚度大于适合于最终器件的额定电压的厚度。
然后利用标准晶片研磨设备对衬底进行研磨以减小厚度至适合于二极管的额定电压的厚度。该阶段通过图1b表示。
然后通过高剂量的磷注入在背面上形成n型阴极接触层,结果通过图1c示出。一旦完全处理了正面,晶片温度必须限制在低于500℃以保护正面上的经处理的图案。这样的温度限制对n型缓冲区的形成和对于背面接触层的杂质活化二者均产生不利影响。用于缓冲区形成的杂质扩散和用于低接触电阻的活化二者通常均需要高于1000℃的温度,而高温退火以实现用于缓冲区形成的杂质扩散和在阴极接触处用于低接触电阻的活化的常规方法在这里不合适。
相反,将激光退火用于背面杂质活化以实现良好的欧姆接触,如图1d所示。激光退火的关键优点在于该退火高度局限于在距背表面非常浅的深度内的事实。仅在激光斑点下的温度非常高(>1400℃)并且其可以熔化下面的Si。而远离直接激光斑点的温度急剧下降,并且沿着硅内部的垂直方向也下降得非常快。其可以熔化背表面最高达几百nm的厚度,并因此完全活化在熔化区内的掺杂剂。然后在短距离内温度急剧下降以在距背表面50μm处达到低于100℃。在前表面处,在退火期间期望保持在室温条件下。因此,在前表面处存在温度限制的情况下,激光退火理想地适合于背表面n+注入活化。
为了进一步提高用于背面阴极接触的接触电阻,可以在n+接触层上沉积Ti的薄层,然后再次利用激光进行退火并且形成TiSi层。这是因为对于在n+层上形成欧姆接触,Ti是固有的比铝更好的金属。对于在使用金属铝的p型掺杂阳极接触,反之亦然。
对于背面缓冲区形成,使用多次n型质子注入,如图1e所示。在此对于n型缓冲区选择质子注入的原因为至少两方面。
首先,质子是能够注入足够深(几十微米)以用于缓冲目的唯一的可利用的物质。例如,根据SRIM程序的模拟结果,具有离子能量为1.5MeV的质子可以在硅内部穿透约30μm的深度,而碳仅穿透约2μm的深度,磷仅穿透约1.4μm的深度。需要多次注入以实现可以导致平滑反向恢复的掺杂分布。然而,需要相对高剂量以实现用于电压阻断目的的需要的掺杂水平。从质子向n型掺杂剂的转换效率非常低,通常低于百分之一。换言之,1e13cm-2的质子剂量产生少于1e11cm-2的n型掺杂剂。在US6482681B1和US7514750B2中已经描述了利用多次注入质子以在半导体器件中形成缓冲区或场截止区(field stop zone)。
其次,质子注入的活化温度在约450℃,在之前我们讨论的500℃的温度限制内。质子注入的活化可以通过在例如炉中在450℃下的常规热退火实现,也可以通过激光退火结合在晶片保持器中升高的温度来实现。激光退火的方法具有将晶片的正面一半的温度保持在350℃以下的优点。
图2示出了用于额定1700V二极管的典型掺杂分布,其中在完成正面处理,然后通过利用串联加速器的多次质子注入和在450℃下的后续退火获得了n型缓冲区之后,晶片从背面减薄至期望厚度。利用具有三种不同能量和剂量(例如350KeV和8e13cm-2;700KeV和6e13cm-2;1.2MeV和4e13cm-2)重复三次质子注入以实现所示出的掺杂分布。单独的SRP测量证实了该模拟的掺杂分布。在此使用的最高质子注入能量为低于2MeV。
图3示出了三种不同缓冲结构的模拟的正向电流特征,其中注入的次数分别为2次、3次和4次。在100A电流条件下对于2次、3次和4次质子注入,正向电压Vf分别计算为1.63V、1.58V和1.56V。Vf随着注入次数的增加而下降可以通过电子注入的有益效果来解释。在图4中示出了反向阻断特征,其中对于所有三种注入条件实现了1950V的阻断能力。图5示出了在di/dt条件为1000A/μs并且初始正向电流为300A下的反向恢复性能。对于所有三种情况获得了平滑恢复,并且对于所有三种缓冲结构,恢复曲线几乎相同。
图6和图7比较了由两个二极管构成的组合衬底的动态恢复特征。图6表示从具有预扩散n型缓冲区的晶片获得的恢复波形,图7表示从没有预扩散n型缓冲区而是具有通过利用在本文中之前所确定的不同的能量和剂量的三次质子注入实现的缓冲区的晶片获得的恢复波形。示出了三种测试条件:初始电压为900V,电流600A(相当于每个二极管300A);然后电流降低为56A,同时保持电压在900V水平;以及最后电压增加至1100V,电流读数为66A。后两个条件代表约10%的标称电流条件(每个芯片约30A)。众所周知二极管在低电流条件下更容易瞬间恢复。然而,对于两种类型的二极管在所有这些测试条件下所获得的恢复波形非常平滑。对于预扩散晶片制造出来的二极管(图6)比有质子注入晶片制造的二极管(图7)观察到更长的恢复电流拖尾。
参照图8,示出了相对于操作电流所测得的恢复能量损失(Erec),发现具有预扩散缓冲区的二极管比由质子注入制造的二极管的在恢复期间的能量损失(Erec)更高。通常,对于一种情况,在600A电流条件下的观察到超过100mJ,对于另一种情况观察到约40mJ。较高的能量损失可以通过之前提到的在恢复期间更长的电流拖尾来解释。然而,对于质子注入的缓冲二极管,发现在正向电流条件下的静态损失(VF)在600A的电流(每个二极管300A)下为约2.6V,然而对于其他二极管同样的VF损失仅为约1.82V。所以在此清楚地是,在正向VF损失和反向恢复损失(Erec)之间存在权衡。之前广泛报道了类似的权衡[参考文献7]。
参考文献
[1]Felsl H.P.,Heinze B.和Lutz J.,“Effects of Different Buffer Structureson the Avalanche Behaviour of High Voltage Diodes Under High ReverseCurrent Conditions”IEE Proc.-Circuits Devices Syst.,vol.153,No.1,p.11-15(2006)
[2]Heinzea B.,Lutza J.,Felslb H.P.,Schulze H.J.,“Ruggedness Analysisof3.3kV High Voltage Diodes Considering Various Buffer Structures andEdge Terminations”,Microelectronics Journal Vol.39,p.868-877(2008)
[3]Lutz J.,Baburske R.,Chen R.M.,Heinze B.,Domeij M.,Felsl H.P.,和Schulze H.J.,“The nn+-Junction as the Key to Improved Ruggednessand Soft Recovery of Power Diodes”,IEEE Transactions on ElectronDevices,Vol.56,No.11,p.2825-2832(2009)
[4]Mauder A.,Schulze H.J.,Hille F.,Schulze H.,Pfaffenlehner M.,Schaffer C.,Niedernostheide F.J.,“Semiconductor Device andFabrication Method Suitable Therefor”US Patent No:US7514750B2(2009)
[5]Klug J.N.,Lutz J.,Meijer J.B.,“n-type doping of silicon by protonImplantation”Proceedings of the14th European conference on PowerElectronics and Applications(EPE2011),p.1-7(2011)
[6]Rahimo M.,Corvasce C.,Vobecky J.,Otani Y.,Huet K.,“Thin-wafersilicon IGBT with advanced laser annealing and sintering process”IEEEElectron Device Letters,vol.33,No.11,p.1601-1603(2012)
[7]Siemieniec R.和Lutz J.“Axial lifetime control by radiation inducedcenters in fast recovery diodes”Proc.ISPSD-2002,p.83-90(Prague2002)
Claims (14)
1.一种制造二极管的方法,其中处理衬底晶片以产生掺杂层结构,所述晶片掺杂有n-杂质并且具有前表面和背表面,所述方法包括:在所述前表面上形成阳极;研磨所述背表面以减小所述晶片的厚度;利用n+杂质对所述背表面进行掺杂并且通过激光退火活化所述n+杂质以形成阴极层;利用多次n型质子注入穿过所述背表面并且对所述质子注入进行退火在所述阴极层的内部形成缓冲层。
2.根据权利要求1所述的方法,其中所述衬底晶片为硅晶片。
3.根据权利要求1或2所述的方法,其中所述质子注入通过激光进行退火。
4.根据权利要求3所述的方法,包括加热所述晶片至低于退火所需温度的升高的温度,以及对经加热的晶片施用激光退火。
5.根据权利要求4所述的方法,包括加热所述晶片至300℃至350℃。
6.根据权利要求1或2所述的方法,包括在炉中在低于500℃的温度下对所述质子注入进行退火。
7.根据权利要求6所述的方法,其中所述温度为450℃。
8.根据任一项前述权利要求所述的方法,包括利用硼注入和热扩散在所述前表面上形成所述阳极。
9.根据任一项前述权利要求所述的方法,包括利用砷或磷对所述背表面进行注入以形成所述n+杂质。
10.根据任一项前述权利要求所述的方法,包括在研磨之前在所述前表面上执行光刻工艺。
11.根据任一项前述权利要求所述的方法,包括在所述阴极层上沉积薄Ti层并且对所述Ti层进行激光退火。
12.一种制造半导体器件的方法,包括通过将杂质注入到衬底晶片中以在所述晶片内形成掺杂层,然后对所述杂质进行激光退火,其特征在于在施加所述激光退火之前将所述晶片预加热至低于退火温度的升高的温度。
13.根据权利要求12所述的方法,包括加热所述晶片至300℃至350℃。
14.根据权利要求12或13所述的方法,其中通过多次质子注入形成所述掺杂层。
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CN107564806A (zh) * | 2016-07-01 | 2018-01-09 | 英飞凌科技股份有限公司 | 降低半导体本体中的杂质浓度 |
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US7728409B2 (en) * | 2005-11-10 | 2010-06-01 | Fuji Electric Device Technology Co., Ltd. | Semiconductor device and method of manufacturing the same |
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CN107564806A (zh) * | 2016-07-01 | 2018-01-09 | 英飞凌科技股份有限公司 | 降低半导体本体中的杂质浓度 |
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