CN104112794B - A kind of manufacturing method of selective emitter solar battery - Google Patents

A kind of manufacturing method of selective emitter solar battery Download PDF

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Publication number
CN104112794B
CN104112794B CN201410360132.5A CN201410360132A CN104112794B CN 104112794 B CN104112794 B CN 104112794B CN 201410360132 A CN201410360132 A CN 201410360132A CN 104112794 B CN104112794 B CN 104112794B
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electrode
groove
wall
electrode piece
wall electrode
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CN104112794A (en
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司红康
马梅
谢发忠
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Zhonghuan Xinneng Anhui Advanced Battery Manufacturing Co ltd
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LU'AN DAYU HIGH POLYMER MATERIAL Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Development (AREA)
  • Sustainable Energy (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)

Abstract

The present invention provides a kind of manufacturing method of selective emitter solar battery, this method includes damaging layer removal, two steps are spread, front electrode trench etch, the sintering of front electrode filling, anti-erosion form high-doped zone and doped regions, insertion electrode slice, the main electrode item which is included side-wall electrode piece, extended in a manner of broken line, the diffusion of two steps includes constant temperature tentatively diffusion and cooling propulsion diffusion, and cooling diffusion time is 1.5 2 times of preliminary diffusion time.Selective emitter solar battery prepared by this method can improve efficiency of light absorption on the whole, and photo-generated carrier collection efficiency avoids surface dead layer phenomenon, while adjusting short circuit current and open-circuit voltage, improve battery filling rate.

Description

A kind of manufacturing method of selective emitter solar battery
Technical field
The present invention relates to a kind of method for manufacturing solar battery, more particularly, to a kind of selective emitter solar battery Manufacturing method.
Background technology
Solar battery technology is most potential and realistic meaning New Energy Industry, is greatly helped by national governments It holds, the research and development of manufacturing technology also great meaning;
For conventional production solar cell, it is desirable to obtain higher short-circuit current density, then need to obtain light Doping concentration and shallower section are deep;And to obtain higher open-circuit voltage, then need higher surface dopant concentration.Meanwhile compared with High doping concentration is conducive to obtain preferable Ohmic contact, reduces the series resistance of battery.Selective emitter solar electricity Pool structure can preferably balance above-mentioned requirements, and the method for usually preparing selective emitter solar battery includes anti-erosion method, Mask corrosion method buries grid method etc., but there are photo-generated carrier collection efficiency and efficiency of light absorption are low for previous conventional method The problem of, or even often will appear and the phenomenon that " dead layer " occur since surface concentration is excessively high, lead to increasing for series resistance, drops The low filling rate of battery.
Invention content
The present invention provides a kind of manufacturing method of selective emitter solar battery, the selectivity prepared using the present invention Emitter solar battery can improve efficiency of light absorption on the whole, and photo-generated carrier collection efficiency avoids surface dead layer existing As, while short circuit current and open-circuit voltage can be adjusted, to improve battery filling rate;
The preparation method of the present invention includes step:
(1) monocrystalline silicon piece of the first conduction type is provided, NaOH solution carries out damaging layer removal to the monocrystalline silicon piece, Deionized water cleaning and drying and processing then are carried out to the monocrystalline silicon piece;
(2)Technique is diffused to the front of the monocrystalline silicon piece, forms the second conduction type doped region, the doped region Junction depth is 0.5-1.5um;
(3)Anti- etching technique forms high-doped zone and doped regions;
(4)Deposit anti-reflective film;
The diffusion technique spreads for two steps, and includes:It is to take phosphorus gas with nitrogen, phosphorus oxychloride is phosphorus source, Constant temperature is carried out in 950-1050 degree Celsius temperature ranges tentatively to spread;Final temperature is cooled to constant rate later, simultaneously Propulsion diffusion is carried out, when temperature reaches final temperature, stops leading to phosphorus source;
Further, the diffusion time summation of the preliminary diffusion and propulsion diffusion is 25 minutes, terminates diffusion temperature and is 750 degrees Celsius, and it is 1.5-2 times of preliminary diffusion time to promote the time of diffusion;
Further include further front electrode forming step, the front electrode forming step packet between step and step It includes:Front electrode channel patterns, the depth of the front electrode groove are formed in the front-side etch of the monocrystalline silicon piece doped region For the junction depth a quarter to half;And fill silver paste in the groove of the front electrode channel patterns;
Further, the anti-reflective film is double-layer structure, wherein being more than lower layer closer to the upper layer refractive index that light irradiates;
Further, it is sintered after filling silver paste to be formed just in the groove of front electrode channel patterns Face electrode;
Further, the front electrode channel patterns include:The multiple side-wall electrode piece grooves pair being mutually parallel, each Side-wall electrode piece groove is to having there are two the side-wall electrode piece groove being mutually parallel, and side-wall electrode piece groove is by the one of front side of silicon wafer Side extends to the other side, multiple side-wall electrode piece grooves to the distance between be more than side-wall electrode piece groove centering side-wall electrode piece The distance between groove;
Further, the side-wall electrode piece groove to the distance between be side described in the side-wall electrode piece groove pair 2 times of distance between wall electrode slice groove;
Further, also there is edge between the side-wall electrode piece groove in the multiple side-wall electrode piece groove pair The insertion electrode slice groove that broken line mode extends, the insertion electrode slice groove connect at dog-ear with the side-wall electrode piece groove It is logical, and a plurality of main electrode groove passes through at the dog-ear;It is corresponding, after the sintering processes, the side wall electricity Silver paste in pole piece groove, main electrode groove and embedded electrode slice groove is respectively formed the side-wall electrode in front electrode Piece, main electrode item and embedded electrode slice;
Further, the anti-etching technique includes:In front side of silicon wafer electrode zone, institute are covered using anti-etching mask pattern Stating electrode zone refers to:The side-wall electrode piece of multiple side-wall electrode piece centerings and the two side walls electrode slice of side-wall electrode centering it Between region and main electrode strip area;Front side of silicon wafer region not by the doping that anti-etching mask pattern covers is done Method etches, and etch depth is identical as the depth of front electrode, i.e., etches into the position parallel with front electrode bottom always;Clearly It washes, removes anti-resistant layer, heavily doped region and doped regions are so far formd by the doped region, complete selective emitter The preparation of structure;
The wherein described side-wall electrode piece is to referring to that internally formed by side-wall electrode piece groove includes two side walls electrode The combination of piece;
Description of the drawings
Silicon chip schematic diagram after Fig. 1 diffusing, dopings;
Fig. 2(a)-2(c)Doping concentration with depth distribution;
Fig. 3 front side of silicon wafer electrode trenches pattern schematic diagrames;
Along the sectional view in the directions A-B in Fig. 4 Fig. 3;
The selective emitting electrode structure formed after the anti-etching techniques of Fig. 5(Anti-reflecting layer is not shown);
Along the sectional view in the directions A-B in Fig. 6 Fig. 5.
Specific implementation mode
In order to enable the purpose of the present invention and advantageous effect and advantage become more intuitive and remove, below with reference to implementation Example and attached drawing, next the present invention will be further described in detail.It should be appreciated that specific embodiment provided herein is only to manage The solution present invention, can not limit the present invention;
" A layers on B layers " used in specification are interpreted as the B layers of more top for being located at A layers on position relationship, but Can not rule out also has additional layer between A layers and B layers;
First by taking a more complex embodiment as an example, the present invention is made a detailed explanation, but the reality should be specified It is only the enforceable one side of the present invention to apply example, does not represent the full content of the present invention, cannot be used for limiting this hair Bright practical range;
- 5 are please referred to Fig.1, first, is selected for example(111)The boron doping p type single crystal silicon piece in face(1)As semiconductor substrate, Damaging layer removal is carried out to the monocrystalline silicon piece using a concentration of 15% NaOH solution, then to the monocrystalline silicon piece(1)Gone from Sub- water cleaning and drying and processing, the monocrystalline silicon piece before being spread(1);
Then by silicon chip(1)Stopped pipe high temperature dispersing furnace is sent into front side of silicon wafer(S1)Two step diffusion techniques are carried out, with nitrogen To take phosphorus gas, phosphorus oxychloride is phosphorus source, and just diffusion is carried out in 950-1050 degree Celsius temperature ranges, and diffusion time is 20 points Clock;Temperature is cooled down with the speed of 20 degrees celsius/minutes later, is carried out at the same time propulsion diffusion;It is Celsius to wait for that temperature is down to 750-850 After degree, stop leading to phosphorus oxychloride;Heavy doping is completed in heat preservation, forms doped region(2), the doped region(2)Junction depth (d1) in 0.5- Within the scope of 1.5um, doping concentration self-assembling formation be from front face surface to silicon chip inside be gradually reduced.Here, with a traditional step Constant temperature diffusion heavy doping technique compare, this two steps diffusion technique can adjust doping concentration from silicon chip surface to silicon chip inside it is dense Gradient is spent, this plays an important role the balance between balance short circuit current and open-circuit voltage;
Diffusion time is spread and promoted to the total time that two above-mentioned step diffusion techniques are adjusted with the diffusion of two steps with preliminary Ratio obtain different doping concentration distributions, in technique, the distribution of doping concentration is to the service life of carrier to very Sensitivity, gentle doping concentration gradient are conducive to improve the service life of carrier, can occasionally effectively reduce the series resistance of battery, put down The short circuit current that weighs can open-circuit voltage;
Fig. 2(a)-2(c)Show that 950-1050 degrees Celsius is preliminary diffusion temperature, 750 degrees Celsius are propulsion diffusion temperature Final temperature, total diffusion time is 25 minutes doping concentrations with the distribution of depth, and data are according to spreading resistance(SPR)Method It measures.The depth refers to a distance from front side of silicon wafer surface.Preliminary diffusion is spread using constant temperature, promotes diffusion using uniformly drop Temperature diffusion, i.e., cool to final temperature with constant rate of temperature fall, and temperature reaches final temperature and stops logical phosphorus source.Fig. 2(a)It retouches State be 15 minutes preliminary diffusion time, propulsion the case where being diffused as 10 minutes, Fig. 2(b)Preliminary diffusion time is described It is 10 minutes, promotes the case where being diffused as 15 minutes, Fig. 2(b)It is 8 minutes to describe preliminary diffusion time, and propulsion is diffused as 17 minutes the case where.The distribution of doping concentration is degree Celsius insensitive to tentatively spreading, when the distribution of doping concentration is spread to promoting Between it is sensitive with the ratio of preliminary diffusion time, when promoting the ratio between diffusion time and preliminary diffusion time to be more than 1.5, ginseng Examine Fig. 2(b)The case where description, can reach optimal doping concentration distribution;But excessive ratio also result in doping it is dense It spends in uniform, has a negative impact instead to the efficiency of battery, such as short circuit current can be significantly reduced, preferably promote diffusion Ratio between time and preliminary diffusion time is less than 2;
Cooling is come out of the stove, using conventional photoetching-etch process, in silicon chip doped region(2)Front(S1)Etching is formed just Face electrode trenches pattern, the front electrode channel patterns are consistent with finally formed electrode whole position;It, should with reference to figure 2 Electrode trenches pattern has the multiple side-wall electrode piece grooves being mutually parallel to (41), each side-wall electrode piece groove pair(41)Tool There are two the side-wall electrode piece groove (411) being mutually parallel, side-wall electrode piece groove (411) is prolonged by the side of front side of silicon wafer (S1) Reach the other side, multiple side-wall electrode piece grooves pair(41)The distance between(d21)More than side-wall electrode piece groove pair(41)In Side-wall electrode piece groove(411)The distance between(d22), preferably side-wall electrode piece groove pair(41)The distance between be side wall Electrode slice groove pair(41)Middle side-wall electrode piece groove(411)Between 2 times of distance;Multiple main electrode grooves(5), along with Side-wall electrode piece groove(411)The direction that intersects extends, preferably with side-wall electrode piece groove(411)Vertically;Multiple Side-wall electrode piece groove pair(41)In side-wall electrode piece groove(411)Between also there is the insertion electrode that extends along broken line mode Piece groove(42), the insertion electrode slice groove(42)At dog-ear with side-wall electrode piece groove(411)Connection, and a plurality of master Electrode strip groove(5)At the dog-ear, main electrode groove(5)With side-wall electrode piece groove(411)In main electrode groove (5)With side-wall electrode piece groove(411)The place connection to intersect;The side-wall electrode piece groove(411), main electrode groove (5)With embedded electrode trenches(42)Depth be junction depth a quarter between half;
Front electrode is filled, to side-wall electrode piece groove(411), main electrode groove(5)With embedded electrode slice groove (42)Interior filling silver paste, and silicon chip back side by silk-screen printing technique formed back electrode, through sintering formed front electrode and Backplate (6);It is corresponding, side-wall electrode piece groove(411), main electrode groove(5)With embedded electrode slice groove(42)It is interior Silver paste be respectively formed the side-wall electrode piece in front electrode(411E), main electrode item(5E)With embedded electrode slice (42E).Cause This, main electrode item (5E) is connected with side-wall electrode piece (411E) in the place that it intersects, embedded electrode slice (42E) and side wall Electrode slice (411E) is in embedded electrode slice(42E)It is connected at dog-ear, main electrode item (5) passes through the insertion electrode slice(42E) At dog-ear;
Anti- etching technique covers electrode zone in the anti-etching mask pattern of front side of silicon wafer, which can be by known Photoetching-masking process realize that the electrode zone refers to:Multiple side-wall electrode pieces pair(41E)(side-wall electrode piece herein is to being Refer to by side-wall electrode piece groove internally formed include two side walls electrode slice combination) in side-wall electrode piece (411E) and The two side walls electrode slice of side-wall electrode centering(411E)Between region and main electrode item(5E)Region, i.e. it is non-in Fig. 2 The regions C;Dry etching carried out to the front side of silicon wafer region C of doping not covered by anti-etching mask pattern, etch depth with just The depth (d3) of face electrode is identical, i.e., etches into always and front electrode(Including side-wall electrode piece(411E), main electrode item (5E) With embedded electrode slice (42E))The parallel position in bottom;Cleaning, removes anti-resistant layer, so far by doped region(2)Form weight Doped region(21)With doped regions (22), the preparation of selective emitting electrode structure is completed;
It should be noted that the insertion electrode slice extended along broken line(42E)It can not only collect in heavily doped region along side Wall electrode slice(411E)Vertical direction is migrated mobile photo-generated carrier and can also be collected along side-wall electrode piece(411E)Parallel side To migrating mobile photo-generated carrier;
In addition, with reference to figure 4, in the doped regions of formation(21)And heavily doped region(22)And the side-wall electrode of front electrode Piece(411E)With embedded electrode slice(42)Upper surface deposit anti-reflective film(7), side-wall electrode piece(411E)Side wall do not deposit Anti-reflective film(7), this is because being covered in heavily doped region(22)Side-wall electrode layer on side wall(411E)Side wall be conducive to instead The sunlight being irradiated at a certain angle on electrode layer is penetrated to be irradiated to the active region of battery to improve efficiency of light absorption;Antireflection The material of layer can be silicon nitride, silica, titanium dioxide, and can be set to double-layer structure, wherein closer to illumination The upper layer penetrated(71)Refractive index is more than lower layer(72), the advantage of doing so is that can effectively utilize with very wide-angle(Such as 60 Degree or more)It is incident on the light that solar-electricity aurora are shown up, and the light for being incident on first surface can be locked in It is not easy to reflect in high refractive index layer.Identical material but the double-layer structure conduct with different refractivity can be used for example Anti-reflective film can also use different materials as the anti-reflective film of double-layer structure;
In addition, after being diffused technique, plasma etch process is carried out to remove edge PN junction;
In addition, due to side-wall electrode piece(411E)Side wall construction, side-wall electrode piece (411E) and main electrode item (5E) Width of the contact area with main electrode item (5E)(Be parallel to front side of silicon wafer and on main electrode extending direction away from From)It is not related.Therefore in the case where not reducing carrier collection efficiency, the ratio that the width of main electrode item (5E) can be done is normal That advises is narrower, such as the height of main electrode item (5E) can be more than the width of main electrode item, the width of preferred main electrode item The a quarter of main electrode item height is to 1/8th.The advantages of so doing is to reduce the electrode coverage of battery light-receiving surface Product increases illuminating area;
It should be apparent to what is invented above from the angle of those skilled in the art to the understanding of the present invention recorded above Deformation and factor substitute and the technical solution that is formed are all within protection scope of the present invention.

Claims (7)

1. a kind of preparation method of solar battery, includes the following steps:(1) monocrystalline silicon piece of the first conduction type is provided, NaOH solution carries out damaging layer removal to the monocrystalline silicon piece, then carries out deionized water cleaning and drying to the monocrystalline silicon piece Processing;(2)Silicon chip feeding stopped pipe high temperature dispersing furnace is diffused technique to front side of silicon wafer;(3)Anti- etching technique is formed highly doped Miscellaneous area and doped regions;(4)Deposit anti-reflective film;It is characterized in that, the diffusion technique spreads for two steps, and include: It is to take phosphorus gas with nitrogen, phosphorus oxychloride is phosphorus source, and constant temperature is carried out in 950-1050 degree Celsius temperature ranges and is tentatively spread;It Final temperature is cooled to constant rate afterwards, is carried out at the same time propulsion diffusion, when temperature reaches final temperature, stops leading to phosphorus source; In step(2)And step(3)Between further include front electrode forming step, the front electrode forming step includes:Described The front-side etch of monocrystalline silicon piece doped region forms front electrode channel patterns, and the depth of the front electrode groove is the four of junction depth / mono- arrives half;And fill silver paste in the groove of the front electrode channel patterns;
The front electrode channel patterns have the multiple side-wall electrode piece grooves being mutually parallel to (41), each side-wall electrode piece ditch Slot pair(41)Tool is there are two the side-wall electrode piece groove (411) being mutually parallel, and side-wall electrode piece groove (411) is by front side of silicon wafer (S1) side extends to the other side, multiple side-wall electrode piece grooves pair(41)The distance between(d21)More than side-wall electrode piece Groove pair(41)Middle side-wall electrode piece groove(411)The distance between(d22), side-wall electrode piece groove pair(41)The distance between It is side-wall electrode piece groove pair(41)Middle side-wall electrode piece groove(411)Between 2 times of distance;Multiple main electrode grooves(5), Along with side-wall electrode piece groove(411)The direction to intersect extends, with side-wall electrode piece groove(411)Vertically;Multiple Side-wall electrode piece groove pair(41)In side-wall electrode piece groove(411)Between also there is the insertion electrode that extends along broken line mode Piece groove(42), the insertion electrode slice groove(42)At dog-ear with side-wall electrode piece groove(411)Connection, and multiple master Electrode strip groove(5)At the dog-ear, main electrode groove(5)With side-wall electrode piece groove(411)In main electrode groove (5)With side-wall electrode piece groove(411)The place connection to intersect;The side-wall electrode piece groove(411), main electrode groove (5)With embedded electrode trenches(42)Depth be junction depth a quarter between half;
Front electrode is filled, to side-wall electrode piece groove(411), main electrode groove(5)With embedded electrode slice groove(42)It is interior Silver paste is filled, and back electrode is formed by silk-screen printing technique in silicon chip back side, front electrode and back side electricity are formed through sintering Pole (6);It is corresponding, side-wall electrode piece groove(411), main electrode groove(5)With embedded electrode slice groove(42)Interior silver paste Material is respectively formed the side-wall electrode piece in front electrode(411E), main electrode item(5E)It is therefore, main with embedded electrode slice (42E) Electrode strip (5E) is connected with side-wall electrode piece (411E) in the place that it intersects, embedded electrode slice (42E) and side-wall electrode Piece (411E) is in embedded electrode slice(42E)It is connected at dog-ear, main electrode item (5E) passes through the insertion electrode slice(42E)Dog-ear Place.
2. the diffusion time of preparation method of solar battery as described in claim 1, the preliminary diffusion and propulsion diffusion is total Be 25 minutes, it is 750 degrees Celsius to terminate diffusion temperature, and it is 1.5-2 times of preliminary diffusion time to promote the time of diffusion.
3. preparation method of solar battery as described in claim 1 fills silver paste in the groove of front electrode channel patterns It is sintered after material to form front electrode.
4. preparation method of solar battery as claimed in claim 3, the front electrode channel patterns include:It is mutually parallel Multiple side-wall electrode piece grooves pair, there are two the side-wall electrode piece groove being mutually parallel, sides to having for each side-wall electrode piece groove Wall electrode slice groove extends to the other side by the side of front side of silicon wafer, multiple side-wall electrode piece grooves to the distance between be more than side The distance between wall electrode slice groove centering side-wall electrode piece groove.
5. preparation method of solar battery as claimed in claim 4, the side-wall electrode piece groove to the distance between be institute State distance between side-wall electrode piece groove described in side-wall electrode piece groove pair 2 times.
6. preparation method of solar battery as claimed in claim 5, in the multiple side-wall electrode piece groove pair described in Also there is the insertion electrode slice groove extended along broken line mode, the insertion electrode slice groove is in dog-ear between side-wall electrode piece groove Place is connected to the side-wall electrode piece groove, and the multiple main electrode groove passes through at the dog-ear;It is corresponding, described After sintering processes, the silver paste in the side-wall electrode piece groove, main electrode groove and embedded electrode slice groove distinguishes shape At side-wall electrode piece, main electrode item and the embedded electrode slice in front electrode.
7. preparation method of solar battery as claimed in claim 6, the anti-etching technique include:It is used in front side of silicon wafer against corrosion It carves mask pattern and covers electrode zone, the electrode zone refers to:The side-wall electrode piece and side wall of multiple side-wall electrode piece centerings Region between the two side walls electrode slice of electrode centering and main electrode strip area;To not covered by anti-etching mask pattern Doping front side of silicon wafer region carry out dry etching, etch depth is identical as the depth of front electrode, i.e., etch into always with The parallel position in front electrode bottom;Cleaning, removes anti-resistant layer, so far forms heavily doped region and low by the doped region Doped region completes the preparation of selective emitting electrode structure;The wherein described side-wall electrode piece is to referring to by side-wall electrode piece groove What is internally formed includes the combination of two side walls electrode slice.
CN201410360132.5A 2014-07-28 2014-07-28 A kind of manufacturing method of selective emitter solar battery Active CN104112794B (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101794845A (en) * 2010-03-15 2010-08-04 常州天合光能有限公司 Method for preparing selective emitter by one-time diffusion
CN101820009A (en) * 2009-12-25 2010-09-01 欧贝黎新能源科技股份有限公司 Crystal silicon solar cell with selective emitter and preparation method thereof
CN103346205A (en) * 2013-06-08 2013-10-09 中山大学 Method for preparing crystalline silicon solar cell with cross vertical emitting electrode structure

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101820009A (en) * 2009-12-25 2010-09-01 欧贝黎新能源科技股份有限公司 Crystal silicon solar cell with selective emitter and preparation method thereof
CN101794845A (en) * 2010-03-15 2010-08-04 常州天合光能有限公司 Method for preparing selective emitter by one-time diffusion
CN103346205A (en) * 2013-06-08 2013-10-09 中山大学 Method for preparing crystalline silicon solar cell with cross vertical emitting electrode structure

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