Invention content
The present invention provides a kind of manufacturing method of selective emitter solar battery, the selectivity prepared using the present invention
Emitter solar battery can improve efficiency of light absorption on the whole, and photo-generated carrier collection efficiency avoids surface dead layer existing
As, while short circuit current and open-circuit voltage can be adjusted, to improve battery filling rate;
The preparation method of the present invention includes step:
(1) monocrystalline silicon piece of the first conduction type is provided, NaOH solution carries out damaging layer removal to the monocrystalline silicon piece,
Deionized water cleaning and drying and processing then are carried out to the monocrystalline silicon piece;
(2)Technique is diffused to the front of the monocrystalline silicon piece, forms the second conduction type doped region, the doped region
Junction depth is 0.5-1.5um;
(3)Anti- etching technique forms high-doped zone and doped regions;
(4)Deposit anti-reflective film;
The diffusion technique spreads for two steps, and includes:It is to take phosphorus gas with nitrogen, phosphorus oxychloride is phosphorus source,
Constant temperature is carried out in 950-1050 degree Celsius temperature ranges tentatively to spread;Final temperature is cooled to constant rate later, simultaneously
Propulsion diffusion is carried out, when temperature reaches final temperature, stops leading to phosphorus source;
Further, the diffusion time summation of the preliminary diffusion and propulsion diffusion is 25 minutes, terminates diffusion temperature and is
750 degrees Celsius, and it is 1.5-2 times of preliminary diffusion time to promote the time of diffusion;
Further include further front electrode forming step, the front electrode forming step packet between step and step
It includes:Front electrode channel patterns, the depth of the front electrode groove are formed in the front-side etch of the monocrystalline silicon piece doped region
For the junction depth a quarter to half;And fill silver paste in the groove of the front electrode channel patterns;
Further, the anti-reflective film is double-layer structure, wherein being more than lower layer closer to the upper layer refractive index that light irradiates;
Further, it is sintered after filling silver paste to be formed just in the groove of front electrode channel patterns
Face electrode;
Further, the front electrode channel patterns include:The multiple side-wall electrode piece grooves pair being mutually parallel, each
Side-wall electrode piece groove is to having there are two the side-wall electrode piece groove being mutually parallel, and side-wall electrode piece groove is by the one of front side of silicon wafer
Side extends to the other side, multiple side-wall electrode piece grooves to the distance between be more than side-wall electrode piece groove centering side-wall electrode piece
The distance between groove;
Further, the side-wall electrode piece groove to the distance between be side described in the side-wall electrode piece groove pair
2 times of distance between wall electrode slice groove;
Further, also there is edge between the side-wall electrode piece groove in the multiple side-wall electrode piece groove pair
The insertion electrode slice groove that broken line mode extends, the insertion electrode slice groove connect at dog-ear with the side-wall electrode piece groove
It is logical, and a plurality of main electrode groove passes through at the dog-ear;It is corresponding, after the sintering processes, the side wall electricity
Silver paste in pole piece groove, main electrode groove and embedded electrode slice groove is respectively formed the side-wall electrode in front electrode
Piece, main electrode item and embedded electrode slice;
Further, the anti-etching technique includes:In front side of silicon wafer electrode zone, institute are covered using anti-etching mask pattern
Stating electrode zone refers to:The side-wall electrode piece of multiple side-wall electrode piece centerings and the two side walls electrode slice of side-wall electrode centering it
Between region and main electrode strip area;Front side of silicon wafer region not by the doping that anti-etching mask pattern covers is done
Method etches, and etch depth is identical as the depth of front electrode, i.e., etches into the position parallel with front electrode bottom always;Clearly
It washes, removes anti-resistant layer, heavily doped region and doped regions are so far formd by the doped region, complete selective emitter
The preparation of structure;
The wherein described side-wall electrode piece is to referring to that internally formed by side-wall electrode piece groove includes two side walls electrode
The combination of piece;
Specific implementation mode
In order to enable the purpose of the present invention and advantageous effect and advantage become more intuitive and remove, below with reference to implementation
Example and attached drawing, next the present invention will be further described in detail.It should be appreciated that specific embodiment provided herein is only to manage
The solution present invention, can not limit the present invention;
" A layers on B layers " used in specification are interpreted as the B layers of more top for being located at A layers on position relationship, but
Can not rule out also has additional layer between A layers and B layers;
First by taking a more complex embodiment as an example, the present invention is made a detailed explanation, but the reality should be specified
It is only the enforceable one side of the present invention to apply example, does not represent the full content of the present invention, cannot be used for limiting this hair
Bright practical range;
- 5 are please referred to Fig.1, first, is selected for example(111)The boron doping p type single crystal silicon piece in face(1)As semiconductor substrate,
Damaging layer removal is carried out to the monocrystalline silicon piece using a concentration of 15% NaOH solution, then to the monocrystalline silicon piece(1)Gone from
Sub- water cleaning and drying and processing, the monocrystalline silicon piece before being spread(1);
Then by silicon chip(1)Stopped pipe high temperature dispersing furnace is sent into front side of silicon wafer(S1)Two step diffusion techniques are carried out, with nitrogen
To take phosphorus gas, phosphorus oxychloride is phosphorus source, and just diffusion is carried out in 950-1050 degree Celsius temperature ranges, and diffusion time is 20 points
Clock;Temperature is cooled down with the speed of 20 degrees celsius/minutes later, is carried out at the same time propulsion diffusion;It is Celsius to wait for that temperature is down to 750-850
After degree, stop leading to phosphorus oxychloride;Heavy doping is completed in heat preservation, forms doped region(2), the doped region(2)Junction depth (d1) in 0.5-
Within the scope of 1.5um, doping concentration self-assembling formation be from front face surface to silicon chip inside be gradually reduced.Here, with a traditional step
Constant temperature diffusion heavy doping technique compare, this two steps diffusion technique can adjust doping concentration from silicon chip surface to silicon chip inside it is dense
Gradient is spent, this plays an important role the balance between balance short circuit current and open-circuit voltage;
Diffusion time is spread and promoted to the total time that two above-mentioned step diffusion techniques are adjusted with the diffusion of two steps with preliminary
Ratio obtain different doping concentration distributions, in technique, the distribution of doping concentration is to the service life of carrier to very
Sensitivity, gentle doping concentration gradient are conducive to improve the service life of carrier, can occasionally effectively reduce the series resistance of battery, put down
The short circuit current that weighs can open-circuit voltage;
Fig. 2(a)-2(c)Show that 950-1050 degrees Celsius is preliminary diffusion temperature, 750 degrees Celsius are propulsion diffusion temperature
Final temperature, total diffusion time is 25 minutes doping concentrations with the distribution of depth, and data are according to spreading resistance(SPR)Method
It measures.The depth refers to a distance from front side of silicon wafer surface.Preliminary diffusion is spread using constant temperature, promotes diffusion using uniformly drop
Temperature diffusion, i.e., cool to final temperature with constant rate of temperature fall, and temperature reaches final temperature and stops logical phosphorus source.Fig. 2(a)It retouches
State be 15 minutes preliminary diffusion time, propulsion the case where being diffused as 10 minutes, Fig. 2(b)Preliminary diffusion time is described
It is 10 minutes, promotes the case where being diffused as 15 minutes, Fig. 2(b)It is 8 minutes to describe preliminary diffusion time, and propulsion is diffused as
17 minutes the case where.The distribution of doping concentration is degree Celsius insensitive to tentatively spreading, when the distribution of doping concentration is spread to promoting
Between it is sensitive with the ratio of preliminary diffusion time, when promoting the ratio between diffusion time and preliminary diffusion time to be more than 1.5, ginseng
Examine Fig. 2(b)The case where description, can reach optimal doping concentration distribution;But excessive ratio also result in doping it is dense
It spends in uniform, has a negative impact instead to the efficiency of battery, such as short circuit current can be significantly reduced, preferably promote diffusion
Ratio between time and preliminary diffusion time is less than 2;
Cooling is come out of the stove, using conventional photoetching-etch process, in silicon chip doped region(2)Front(S1)Etching is formed just
Face electrode trenches pattern, the front electrode channel patterns are consistent with finally formed electrode whole position;It, should with reference to figure 2
Electrode trenches pattern has the multiple side-wall electrode piece grooves being mutually parallel to (41), each side-wall electrode piece groove pair(41)Tool
There are two the side-wall electrode piece groove (411) being mutually parallel, side-wall electrode piece groove (411) is prolonged by the side of front side of silicon wafer (S1)
Reach the other side, multiple side-wall electrode piece grooves pair(41)The distance between(d21)More than side-wall electrode piece groove pair(41)In
Side-wall electrode piece groove(411)The distance between(d22), preferably side-wall electrode piece groove pair(41)The distance between be side wall
Electrode slice groove pair(41)Middle side-wall electrode piece groove(411)Between 2 times of distance;Multiple main electrode grooves(5), along with
Side-wall electrode piece groove(411)The direction that intersects extends, preferably with side-wall electrode piece groove(411)Vertically;Multiple
Side-wall electrode piece groove pair(41)In side-wall electrode piece groove(411)Between also there is the insertion electrode that extends along broken line mode
Piece groove(42), the insertion electrode slice groove(42)At dog-ear with side-wall electrode piece groove(411)Connection, and a plurality of master
Electrode strip groove(5)At the dog-ear, main electrode groove(5)With side-wall electrode piece groove(411)In main electrode groove
(5)With side-wall electrode piece groove(411)The place connection to intersect;The side-wall electrode piece groove(411), main electrode groove
(5)With embedded electrode trenches(42)Depth be junction depth a quarter between half;
Front electrode is filled, to side-wall electrode piece groove(411), main electrode groove(5)With embedded electrode slice groove
(42)Interior filling silver paste, and silicon chip back side by silk-screen printing technique formed back electrode, through sintering formed front electrode and
Backplate (6);It is corresponding, side-wall electrode piece groove(411), main electrode groove(5)With embedded electrode slice groove(42)It is interior
Silver paste be respectively formed the side-wall electrode piece in front electrode(411E), main electrode item(5E)With embedded electrode slice (42E).Cause
This, main electrode item (5E) is connected with side-wall electrode piece (411E) in the place that it intersects, embedded electrode slice (42E) and side wall
Electrode slice (411E) is in embedded electrode slice(42E)It is connected at dog-ear, main electrode item (5) passes through the insertion electrode slice(42E)
At dog-ear;
Anti- etching technique covers electrode zone in the anti-etching mask pattern of front side of silicon wafer, which can be by known
Photoetching-masking process realize that the electrode zone refers to:Multiple side-wall electrode pieces pair(41E)(side-wall electrode piece herein is to being
Refer to by side-wall electrode piece groove internally formed include two side walls electrode slice combination) in side-wall electrode piece (411E) and
The two side walls electrode slice of side-wall electrode centering(411E)Between region and main electrode item(5E)Region, i.e. it is non-in Fig. 2
The regions C;Dry etching carried out to the front side of silicon wafer region C of doping not covered by anti-etching mask pattern, etch depth with just
The depth (d3) of face electrode is identical, i.e., etches into always and front electrode(Including side-wall electrode piece(411E), main electrode item (5E)
With embedded electrode slice (42E))The parallel position in bottom;Cleaning, removes anti-resistant layer, so far by doped region(2)Form weight
Doped region(21)With doped regions (22), the preparation of selective emitting electrode structure is completed;
It should be noted that the insertion electrode slice extended along broken line(42E)It can not only collect in heavily doped region along side
Wall electrode slice(411E)Vertical direction is migrated mobile photo-generated carrier and can also be collected along side-wall electrode piece(411E)Parallel side
To migrating mobile photo-generated carrier;
In addition, with reference to figure 4, in the doped regions of formation(21)And heavily doped region(22)And the side-wall electrode of front electrode
Piece(411E)With embedded electrode slice(42)Upper surface deposit anti-reflective film(7), side-wall electrode piece(411E)Side wall do not deposit
Anti-reflective film(7), this is because being covered in heavily doped region(22)Side-wall electrode layer on side wall(411E)Side wall be conducive to instead
The sunlight being irradiated at a certain angle on electrode layer is penetrated to be irradiated to the active region of battery to improve efficiency of light absorption;Antireflection
The material of layer can be silicon nitride, silica, titanium dioxide, and can be set to double-layer structure, wherein closer to illumination
The upper layer penetrated(71)Refractive index is more than lower layer(72), the advantage of doing so is that can effectively utilize with very wide-angle(Such as 60
Degree or more)It is incident on the light that solar-electricity aurora are shown up, and the light for being incident on first surface can be locked in
It is not easy to reflect in high refractive index layer.Identical material but the double-layer structure conduct with different refractivity can be used for example
Anti-reflective film can also use different materials as the anti-reflective film of double-layer structure;
In addition, after being diffused technique, plasma etch process is carried out to remove edge PN junction;
In addition, due to side-wall electrode piece(411E)Side wall construction, side-wall electrode piece (411E) and main electrode item (5E)
Width of the contact area with main electrode item (5E)(Be parallel to front side of silicon wafer and on main electrode extending direction away from
From)It is not related.Therefore in the case where not reducing carrier collection efficiency, the ratio that the width of main electrode item (5E) can be done is normal
That advises is narrower, such as the height of main electrode item (5E) can be more than the width of main electrode item, the width of preferred main electrode item
The a quarter of main electrode item height is to 1/8th.The advantages of so doing is to reduce the electrode coverage of battery light-receiving surface
Product increases illuminating area;
It should be apparent to what is invented above from the angle of those skilled in the art to the understanding of the present invention recorded above
Deformation and factor substitute and the technical solution that is formed are all within protection scope of the present invention.