CN104035218B - 一种阵列基板及数据线断线的修复方法 - Google Patents

一种阵列基板及数据线断线的修复方法 Download PDF

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CN104035218B
CN104035218B CN201410217057.7A CN201410217057A CN104035218B CN 104035218 B CN104035218 B CN 104035218B CN 201410217057 A CN201410217057 A CN 201410217057A CN 104035218 B CN104035218 B CN 104035218B
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郭会斌
王守坤
李梁梁
冯玉春
郭总杰
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BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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Abstract

本发明涉及一种阵列基板及数据线断线的修复方法。该数据线断线的修复方法用于对制备于阵列基板上的数据线的缺口进行修复;其包括下述步骤:将预设元素的离子掺杂进入半导体层上对应于所述缺口下方,以及对应于数据线位于缺口两侧的端部的下方的区域,使半导体层上掺杂有预设元素的离子的区域变为导电层,以使数据线位于所述缺口两侧的端部通过所述导电层电连接。本发明提供的上述数据线断线的修复方法不受数据线的线宽的影响,从而其可以在数据线的线宽较窄的情况下,将数据线的断线修复。

Description

一种阵列基板及数据线断线的修复方法
技术领域
本发明涉及液晶显示技术领域,具体地,涉及一种阵列基板,以
及对阵列基板上的数据线的断线进行修复的方法。
背景技术
目前,随着显示技术的快速发展,显示装置的分辨率不断提高,为使显示装置具有较好的显示效果,显示装置的阵列基板需要具有较高的开口率。在现有技术中,一般通过降低数据线的线宽来提高阵列基板的开口率,如将数据线的线宽由4.5μm以上降低至2~3μm。
在现有技术中,阵列基板上的数据线一般通过湿法刻蚀工艺制备。而在湿法刻蚀工艺中,刻蚀的均匀性和数据线线宽呈反比,也就是说,数据线的线宽越窄,刻蚀的均匀性越差。特别是,在当数据线的线宽降低至2~3μm时,较差的刻蚀均匀性会导致数据线上出现较多的断线。
并且,由于数据线的线宽较窄,该断线难以修复,因此,在制备过程中降低了数据线的线宽后,阵列基板的良品率会随之降低。
发明内容
本发明旨在至少解决现有技术中存在的技术问题之一,提出了一种阵列基板及数据线断线的修复方法,其位于数据线下方的半导体层上的对应于数据线上的缺口下方,以及对应于数据线的位于缺口两侧的端部下方的区域掺杂有预设元素的离子,使其可以将被缺口分隔开的数据线电连接,从而提高阵列基板的良品率。
为实现本发明的目的而提供一种阵列基板,该阵列基板包括多条数据线和多个薄膜晶体管,所述数据线下方设置有半导体层,至少一条所述数据线上形成有缺口,所述半导体层上对应于所述缺口下方,以及对应于所述数据线位于所述缺口两侧的端部的下方的区域掺杂有预设元素的离子,以使所述数据线位于所述缺口两侧的端部通过所述半导体层上掺杂有预设元素的离子的区域电连接。
其中,所述预设元素为P、B和N中任意一种或几种。
其中,所述数据线的线宽为2~5μm。
其中,所述半导体层与薄膜晶体管的有源层同层设置,且二者材料相同。
其中,所述半导体层由a-Si制成。
作为另一个技术方案,本发明还提供一种数据线断线的修复方法,用于对制备于阵列基板上的数据线的缺口进行修复;所述数据线下方设有半导体层,所述数据线断线的修复方法包括下述步骤:将预设元素的离子掺杂进入所述半导体层上对应于所述缺口下方,以及对应于所述数据线位于所述缺口两侧的端部的下方的区域,使半导体层上掺杂有预设元素的离子的区域变为导电层,以使所述数据线位于所述缺口两侧的端部通过所述导电层电连接。
其中,通过离子注入技术向所述半导体层上对应于所述缺口下方的区域掺杂预设元素的离子。
其中,所述预设元素为P、B和N中任意一种或几种。
其中,所述半导体层由a-Si制成。
其中,所述数据线的线宽为2~5μm。
其中,所述数据线断线的修复方法还包括在对数据线上的断线进行修复之前,检测阵列基板上存在缺口的数据线,以及所述缺口所在的位置的步骤。
本发明具有以下有益效果:
本发明提供的阵列基板,其位于数据线下方的半导体层上的对应于数据线上的缺口下方,以及对应于数据线的位于缺口两侧的端部下方的区域掺杂有预设元素的离子,使其可以将被缺口分隔开的数据线电连接,从而提高阵列基板的良品率。
本发明提供的数据线断线的修复方法,其通过向半导体层上的对应于数据线上的缺口下方,以及对应于数据线的位于缺口两侧的端部下方的区域掺杂有预设元素的离子,使半导体层上掺杂预设元素的离子的区域导电,从而将被缺口分隔开的数据线电连接,提高阵列基板的良品率;并且,上述修复方法不受数据线的线宽的影响,从而本发明提供的数据线断线的修复方法,可以在数据线的线宽较窄的情况下,将数据线上的断线修复。
附图说明
附图是用来提供对本发明的进一步理解,并且构成说明书的一部分,与下面的具体实施方式一起用于解释本发明,但并不构成对本发明的限制。在附图中:
图1为本发明实施例提供的阵列基板的示意图;
图2为本发明实施例提供的数据线断线的修复方法的流程图;
图3为数据线中缺口的示意图;
图4为通过离子注入技术向半导体层上注入预设元素的离子的示意图。
附图标记说明
1:阵列基板;10:玻璃基板;11:数据线;110:缺口;12半导体层。
具体实施方式
以下结合附图对本发明的具体实施方式进行详细说明。应当理解的是,此处所描述的具体实施方式仅用于说明和解释本发明,并不用于限制本发明。
请参看图1,图1为本发明实施例提供的阵列基板的示意图。阵列基板1包括玻璃基板10,以及制备于玻璃基板10上的多条数据线11和多个薄膜晶体管(图中未示出)。数据线11下方设置有半导体层12,具体地,半导体层12与薄膜晶体管的有源层同层设置,且材料相同,这样在玻璃基板10制备薄膜晶体管及数据线的过程中,可以通过一次掩膜工序实现在玻璃基板10上同时制备有源层和半导体层12,从而可以节约上述工艺所需的时间和材料;具体地,在本实施例中,制作半导体层12的材料为a-Si。
在本实施例中,至少一条数据线11上形成有缺口110,具体地,该缺口一般是在通过湿法刻蚀技术制备数据线11的过程中,特别是在所需制备的数据线11的线宽较窄的情况下形成的。在本实施例中,优选地,数据线11的线宽为2~5μm;具体地,在数据线11的线宽为2~5μm,在通过湿法刻蚀技术制备数据线11的过程中,数据线11上会产生较多的缺口110。
在本实施例中,半导体层12上对应于缺口110下方,以及对应于数据线11位于缺口110两侧的端部的下方的区域掺杂有预设元素的离子,以使数据线11位于缺口110两侧的端部通过半导体层12上掺杂有预设元素的离子的区域电连接。具体地,预设元素为P、B和N中任意一种或几种,通过在半导体层12上对应于缺口110下方,以及对应于数据线11位于缺口110两侧的端部的下方的区域掺杂上述元素的离子,可以使上述区域导电,从而被缺口110分隔开的数据线11可以通过半导体层12上的上述区域电连接。
本实施例提供的阵列基板,其位于数据线11下方的半导体层12的与数据线11上的缺口110对应的区域,以及与数据线11的位于缺口110两侧的端部对应的区域掺杂有预设元素的离子,使其可以将被缺口110分隔开的数据线11电连接,从而可以提高阵列基板1的良品率。
作为另一个技术方案,本发明实施例还提供一种数据线断线的修复方法,用于对制备于阵列基板上的数据线的缺口进行修复。图2为本发明实施例提供的数据线断线的修复方法的流程图。图3为数据线中缺口的示意图。如图3所示,在本实施例中,数据线11下方设有半导体层12,优选地,半导体层12由a-Si制成。
具体地,如图2所示,数据线断线的修复方法包括下述步骤:
步骤S1,检测阵列基板1上存在缺口110的数据线11,以及缺口110所在的位置;
步骤S2,将预设元素的离子掺杂进入半导体层12上对应于缺口110下方,以及对应于数据线11位于缺口110两侧的端部的下方的区域,使半导体层12上掺杂有预设元素的离子的区域变为导电层,以使数据线11位于缺口两侧的端部通过导电层电连接,如图1所示。
具体地,如图4所示,在步骤S2中,通过离子注入技术向半导体层12上对应于缺口110下方的区域掺杂预设元素的离子。在实际应用中,在向半导体层12上对应于缺口110下方的区域注入预设元素的离子时,预设元素的离子以较高的速度进入半导体层12后,其运动会受到半导体层12内部结构的影响,如半导体层12内部密度不均匀等因素,预设元素的离子的运动轨迹会发生偏移,在此情况下,部分预设元素的离子会向半导体层12上与数据线11位于缺口110两侧的端部对应的区域偏移,从而使半导体层12上与数据线11的位于缺口110两侧的端部对应的区域也会掺杂入预设元素的离子,如图1所示,从而半导体层12上掺杂预设元素的离子的区域可以将被缺口110分隔开的数据线电连接。优选地,在本实施例中,预设元素为P、B和N中任意一种或多种。
在本实施例中,沿数据线11在缺口110处的走向,将预设元素的离子注入半导体层12上位于缺口110下方的区域,以实现数据线11上断线的电连接,其不受数据线11的线宽的影响,因此,在数据线11的线宽较窄的情况下,本发明实施例提供的修复方法仍然可以将数据线11上的断线修复。优选地,在本实施例中,数据线11的线宽为2~5μm。
综上所述,本发明实施例提供的数据线断线的修复方法,其通过向半导体层12上的对应于数据线11上的缺口110下方,以及对应于数据线11的位于缺口110两侧的端部下方的区域掺杂有预设元素的离子,使半导体层12上掺杂预设元素的离子的区域导电,从而将被缺口110分隔开的数据线11电连接,提高阵列基板1的良品率;并且,上述修复方法不受数据线11的线宽的影响,从而本实施例提供的数据线11断线的修复方法,可以在数据线11的线宽较窄的情况下,将数据线11上的断线修复。
需要说明的是,在本实施例中,预设元素为P、B和N中的任意一种或多种,但本发明并不限于此,在实际应用中,预设元素还可以为P、B和N之外的其他元素,只需满足掺杂预设元素的离子后,可以使半导体层12上的相应区域导电即可。
还需要说明的是,在本实施例中,半导体层12由a-Si制成,但本发明并不限于此,在实际应用中,半导体层12还可以由p-Si等其他半导体材料制成。
可以理解的是,以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式,然而本发明并不局限于此。对于本领域内的普通技术人员而言,在不脱离本发明的精神和实质的情况下,可以做出各种变型和改进,这些变型和改进也视为本发明的保护范围。

Claims (5)

1.一种数据线断线的修复方法,用于对制备于阵列基板上的数据线的缺口进行修复;所述数据线下方设有半导体层,其特征在于,所述数据线断线的修复方法包括下述步骤:
检测阵列基板上存在缺口的数据线,以及所述缺口所在的位置的步骤;
将预设元素的离子掺杂进入所述半导体层上对应于所述缺口下方,以及对应于所述数据线位于所述缺口两侧的端部的下方的区域,使半导体层上掺杂有预设元素的离子的区域变为导电层,以使所述数据线位于所述缺口两侧的端部通过所述导电层电连接。
2.根据权利要求1所述的数据线断线的修复方法,其特征在于,通过离子注入技术向所述半导体层上对应于所述缺口下方的区域掺杂预设元素的离子。
3.根据权利要求1或2所述的数据线断线的修复方法,其特征在于,所述预设元素为P、B和N中任意一种或几种。
4.根据权利要求1所述的数据线断线的修复方法,其特征在于,所述半导体层由a-Si制成。
5.根据权利要求1所述的数据线断线的修复方法,其特征在于,所述数据线的线宽为2~5μm。
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