CN103605632A - Method and device for communication between AXI (advanced extensible interface) bus and AHB (advanced high-performance bus) - Google Patents
Method and device for communication between AXI (advanced extensible interface) bus and AHB (advanced high-performance bus) Download PDFInfo
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Abstract
The invention discloses a method for communication between an AXI (advanced extensible interface) bus and an AHB (advanced high-performance bus). By using the method, reading and writing operation between the AXI bus and the AHB is finished, and the communication between the AXI bus and the AHB is realized. The method comprises the following steps that after main equipment of the AXI bus sends out a reading and writing request, a reading and writing address is latched by an AXI bus and AHB communication bridge, effective addresses are kept in a transmitting process, and reading and writing control signals are latched; the AXI bus and AHB communication bridge decodes the latched address and generates selection signals, and only one selection signal can be activated in a transmitting process, namely the unique AHB is selected to perform reading and writing operation from the equipment; during writing operation, the AXI bus and AHB communication bridge sends data transmitted from the AXI bus to the AHB by using a data buffer; and during reading operation, the AXI bus and AHB communication bridge sends the data on the AHB to the AXI bus by using the data buffer.
Description
Technical field
The present invention relates to the method and apparatus of the intercommunication of a kind of AXI bus and ahb bus, belong to the technical field of SOC (system on a chip) (SOC) bus design.
Background technology
Along with the development of large scale integrated circuit and semiconductor technology, SOC (system on a chip) is applied to every field more and more widely.In classical design method, from equipment, be mainly in plate level with being connected of processor, be all integrated into chip internal greatly now, can avoid like this shortcoming of many PCB designs, such as reducing system power dissipation, reach object lightening, low priceization.But the scale of whole chip and complexity increase, chip design personnel's requirement is also improved thereupon, system designer has faced many new problems.The key addressing these problems is to have suitable on-chip bus structure.Most important part in the AMBA3.0 agreement that AXI bus ShiARM company proposes is a kind of bus on chip towards high-performance, high bandwidth, low delay.Its address/control and data phase are separated, the data transmission that support does not line up in burst transfer, only needs first address simultaneously, the separated passage that reads and writes data, also significantly transmission access and out of order access of support simultaneously, and be more prone to just timing closure.AXI is a new High Performance Protocol in AMBA.AXI technology has been enriched existing AMBA standard content, meets the demand that very-high performance and complicated SOC (system on a chip) (SOC) design.AXI bus is applied in the design of on-chip bus more and more widely, but ahb bus relies on self and peripheral hardware to have the feature of good interactivity, can't be replaced completely by AXI bus.
In the design of actual SOC (system on a chip) (SOC); designer can use AXI bus and ahb bus conventionally in a system simultaneously; or the peripheral hardware of ahb bus is mounted in AXI bus, how makes AXI bus and ahb bus collaborative work, become the problem that SOC deviser faces.
Summary of the invention
The problem existing for existing technology, the present invention proposes the communication means of a kind of AXI bus and ahb bus.
The present invention also provides a kind of device of realizing above-mentioned communication means.
Technical scheme of the present invention is as follows:
A communication means for AXI bus and ahb bus, comprises the steps:
(1) utilize the communicator between AXI bus and ahb bus to complete the mutual read-write operation between AXI bus and ahb bus;
(2) by the external unit connecting in AXI bus, to ahb bus, send and read or write request;
(3) communicator between AXI bus and ahb bus responds above-mentioned request, and the address information transport module in communicator latchs its reference address;
(4) communicator between AXI bus and ahb bus judges in AXI bus, whether the desired Access status of external unit meets AXI bus and ahb bus communicator status, and in AXI bus, whether the address of the desired access of external unit and access type meet the form of AXI and ahb bus interface signal;
(5) as reference address that external unit requires in AXI bus, access type and Access status are all correct, meet communicator status between AXI bus and ahb bus and the form of AXI and ahb bus interface signal, by AXI bus, the control module in communicator between ahb bus produces read procedure (corresponding read request) or writes the relevant control information in process (corresponding write request), send to respectively between AXI bus and ahb bus the read data module in communicator and write data module, control read data module and write data module the external unit being connected on ahb bus is conducted interviews,
(6) as wrong in reference address, access type or Access status, the communicator between AXI bus and ahb bus produces error message and feeds back this error message to the external unit connecting that sends read-write requests in AXI bus, require it again to AXI bus, to send relevant reading or write request to ahb bus communicator, start once the access process of new AXI bus to ahb bus;
(7), in read procedure, the control information that the address information that read data module produces according to address information transmission modular and control module produce, carries out read operation to the external unit connecting on ahb bus;
(8) in writing process, write data module according to the control information of the address information of address information transmission modular generation and control module generation, the external unit connecting on ahb bus is carried out to write operation;
(9) because AXI bus and ahb bus belong to different clock zones, in reading and writing process by the asynchronous FIFO in the communicator between AXI bus and ahb bus as data buffer buffering all read address information and the data message write;
(10) by the external unit connecting on ahb bus, to AXI bus, send and read or write request;
(11) communicator between AXI bus and ahb bus responds above-mentioned request, and the address information transport module in communicator latchs its reference address;
(12) communicator between AXI bus and ahb bus judges in AXI bus, whether the desired Access status of external unit meets AXI bus and ahb bus communicator status, and on ahb bus, whether the address of the desired access of external unit and access type meet the form of AXI and ahb bus interface signal;
(13) as reference address that external unit requires on ahb bus, access type and Access status are all correct, meet communicator status between AXI bus and ahb bus and the form of AXI and ahb bus interface signal, by AXI bus, the control module in communicator between ahb bus produces read procedure (corresponding read request) or writes the relevant control information in process (corresponding write request), send to respectively between AXI bus and ahb bus the read data module in communicator and write data module, control read data module and write data module the external unit being connected in AXI bus is conducted interviews,
(14) as wrong in reference address, access type or Access status, the communicator between AXI bus and ahb bus produces error message and feeds back this error message to the external unit connecting that sends read-write requests on ahb bus, require it again to AXI bus, to send relevant reading or write request to ahb bus communicator, start once the access process of new ahb bus to AXI bus;
(15), in read procedure, the control information that the address information that read data module produces according to address information transmission modular and control module produce, carries out read operation to the external unit connecting in AXI bus;
(16) in writing process, write data module according to the control information of the address information of address information transmission modular generation and control module generation, the external unit connecting in AXI bus is carried out to write operation;
(17) because AXI bus and ahb bus belong to different clock zones, in reading and writing process by the asynchronous FIFO in the communicator between AXI bus and ahb bus as data buffer buffering all read address information and the data message write.
The application of the communication means of a kind of AXI bus and ahb bus: utilize the communication means of above-mentioned AXI bus and ahb bus that AXI bus external device is mounted on ahb bus, or ahb bus external unit is mounted in AXI bus.
Realize the device that AXI bus is communicated by letter with ahb bus, comprise data buffering module, address information transport module, control module, write data module and read data module;
Described data buffering module: adopt asynchronous FIFO to carry out the snubber assembly of reading and writing data between AXI bus and ahb bus; Data buffering module is with address information transport module, read data module and write data module and be connected respectively; For cushion read address and the data message of write operation; AXI bus and ahb bus, when carrying out data transmission by communications bridge, need to have data buffer device;
Described address information transport module: this module completes the buffering to the address from AXI bus master, control information by asynchronous FIFO, complete with control module simultaneously, write communicating by letter of data module and read data module, to them, provide address, the control information from AXI bus master, thus complete AXI bus master to ahb bus from equipment read write access; Described address information transport module and read data module with write data module and be connected, relative address information is provided for reading and writing data, in addition, address information transport module is also connected with control module, receives the relevant control information of control module;
Described control module: this module intercoms mutually with address information transport module, address information transport module is produced read the output signal of write address, word length, length, transport-type through the control of state machine, be transferred on ahb bus interface, in order to control to ahb bus from equipment read write access; Address information transport module is produced read the output signal of write address, word length, length, transport-type through the control of state machine, be transferred in AXI bus interface, in order to control to AXI bus slave read write access; Produce simultaneously for read write the signal that data module is controlled; Described control module with read data module, write data module and be connected respectively with address information transport module, produce read write the associated control signal of process;
Write data module: the data-signal that this module is sent AXI bus master by asynchronous FIFO is sent to ahb bus interface, thus write ahb bus from equipment, complete the write operation of AXI bus to ahb bus; The feedback signal of writing simultaneously by asynchronous FIFO, ahb bus being produced from equipment is sent to AXI bus interface, thereby feeds back to AXI bus master; Data-signal ahb bus main equipment being sent by asynchronous FIFO is sent to AXI bus interface, thereby writes AXI bus slave, completes the write operation of ahb bus to AXI bus; The feedback signal of writing simultaneously by asynchronous FIFO, AXI bus slave being produced is sent to ahb bus interface, thereby feeds back to ahb bus main equipment; Writing data module is connected respectively with control module with address information transport module;
Described read data module: this module is sent ahb bus by asynchronous FIFO data-signal from equipment is sent to AXI bus interface, thus be transferred to AXI bus master, complete the read operation of AXI bus to ahb bus; The feedback signal of reading simultaneously by asynchronous FIFO, ahb bus being produced from equipment is sent to AXI bus interface, thereby feeds back to AXI bus master; Data-signal AXI bus slave being sent by asynchronous FIFO is sent to ahb bus interface, thereby is transferred to ahb bus main equipment, completes the read operation of ahb bus to AXI bus; The feedback signal of reading simultaneously by asynchronous FIFO, AXI bus slave being produced is sent to ahb bus interface, thereby feeds back to ahb bus main equipment; Read data module is connected respectively with control module with address information transport module.
Compared with prior art, advantage of the present invention and good effect are:
The present invention has realized the intercommunication mutually of AXI bus and ahb bus, the external unit of ahb bus can be mounted in AXI bus by apparatus of the present invention, also the external unit of AXI bus can be mounted on ahb bus by apparatus of the present invention, enrich the method for designing of on-chip bus, improved the dirigibility of system-on-chip designs.In addition, the present invention is simple in structure, and it is convenient to realize, and can realize extensive, multi-level application.
Accompanying drawing explanation
Fig. 1 is the structural drawing of the preferred embodiment of the present invention;
Fig. 2 is the system construction drawing of the preferred embodiment of the present invention;
Fig. 3 is that the present invention is at a kind of real application systems structural drawing.
Embodiment
Below in conjunction with accompanying drawing and preferred embodiment, the present invention is further described in detail, but is not limited to this.
Referring to Fig. 1.
A communication means for AXI bus and ahb bus, comprises the steps:
(1) utilize the communicator between AXI bus and ahb bus to complete the mutual read-write operation between AXI bus and ahb bus;
(2) by the external unit connecting in AXI bus, to ahb bus, send and read or write request;
(3) communicator between AXI bus and ahb bus responds above-mentioned request, and the address information transport module in communicator latchs its reference address;
(4) communicator between AXI bus and ahb bus judges in AXI bus, whether the desired Access status of external unit meets AXI bus and ahb bus communicator status, and in AXI bus, whether the address of the desired access of external unit and access type meet the form of AXI and ahb bus interface signal;
(5) as reference address that external unit requires in AXI bus, access type and Access status are all correct, meet communicator status between AXI bus and ahb bus and the form of AXI and ahb bus interface signal, by AXI bus, the control module in communicator between ahb bus produces read procedure (corresponding read request) or writes the relevant control information in process (corresponding write request), send to respectively between AXI bus and ahb bus the read data module in communicator and write data module, control read data module and write data module the external unit being connected on ahb bus is conducted interviews,
(6) as wrong in reference address, access type or Access status, the communicator between AXI bus and ahb bus produces error message and feeds back this error message to the external unit connecting that sends read-write requests in AXI bus, require it again to AXI bus, to send relevant reading or write request to ahb bus communicator, start once the access process of new AXI bus to ahb bus;
(7), in read procedure, the control information that the address information that read data module produces according to address information transmission modular and control module produce, carries out read operation to the external unit connecting on ahb bus;
(8) in writing process, write data module according to the control information of the address information of address information transmission modular generation and control module generation, the external unit connecting on ahb bus is carried out to write operation;
(9) because AXI bus and ahb bus belong to different clock zones, in reading and writing process by the asynchronous FIFO in the communicator between AXI bus and ahb bus as data buffer buffering all read address information and the data message write;
(10) by the external unit connecting on ahb bus, to AXI bus, send and read or write request;
(11) communicator between AXI bus and ahb bus responds above-mentioned request, and the address information transport module in communicator latchs its reference address;
(12) communicator between AXI bus and ahb bus judges in AXI bus, whether the desired Access status of external unit meets AXI bus and ahb bus communicator status, and on ahb bus, whether the address of the desired access of external unit and access type meet the form of AXI and ahb bus interface signal;
(13) as reference address that external unit requires on ahb bus, access type and Access status are all correct, meet communicator status between AXI bus and ahb bus and the form of AXI and ahb bus interface signal, by AXI bus, the control module in communicator between ahb bus produces read procedure (corresponding read request) or writes the relevant control information in process (corresponding write request), send to respectively between AXI bus and ahb bus the read data module in communicator and write data module, control read data module and write data module the external unit being connected in AXI bus is conducted interviews,
(14) as wrong in reference address, access type or Access status, the communicator between AXI bus and ahb bus produces error message and feeds back this error message to the external unit connecting that sends read-write requests on ahb bus, require it again to AXI bus, to send relevant reading or write request to ahb bus communicator, start once the access process of new ahb bus to AXI bus;
(15), in read procedure, the control information that the address information that read data module produces according to address information transmission modular and control module produce, carries out read operation to the external unit connecting in AXI bus;
(16) in writing process, write data module according to the control information of the address information of address information transmission modular generation and control module generation, the external unit connecting in AXI bus is carried out to write operation;
(17) because AXI bus and ahb bus belong to different clock zones, in reading and writing process by the asynchronous FIFO in the communicator between AXI bus and ahb bus as data buffer buffering all read address information and the data message write.
Embodiment 2,
The application of the communication means of a kind of AXI bus and ahb bus as described in Example 1: utilize the communication means of above-mentioned AXI bus and ahb bus that AXI bus external device is mounted on ahb bus, or ahb bus external unit is mounted in AXI bus.
Embodiment 3,
As shown in Figure 2.
Realize the device that AXI bus is communicated by letter with ahb bus, comprise data buffering module, address information transport module, control module, write data module and read data module;
Described data buffering module: adopt asynchronous FIFO to carry out the snubber assembly of reading and writing data between AXI bus and ahb bus; Data buffering module is with address information transport module, read data module and write data module and be connected respectively; For cushion read address and the data message of write operation; AXI bus and ahb bus, when carrying out data transmission by communications bridge, need to have data buffer device;
Described address information transport module: this module completes the buffering to the address from AXI bus master, control information by asynchronous FIFO, complete with control module simultaneously, write communicating by letter of data module and read data module, to them, provide address, the control information from AXI bus master, thus complete AXI bus master to ahb bus from equipment read write access; Described address information transport module and read data module with write data module and be connected, relative address information is provided for reading and writing data, in addition, address information transport module is also connected with control module, receives the relevant control information of control module;
Described control module: this module intercoms mutually with address information transport module, address information transport module is produced read the output signal of write address, word length, length, transport-type through the control of state machine, be transferred on ahb bus interface, in order to control to ahb bus from equipment read write access; Address information transport module is produced read the output signal of write address, word length, length, transport-type through the control of state machine, be transferred in AXI bus interface, in order to control to AXI bus slave read write access; Produce simultaneously for read write the signal that data module is controlled; Described control module with read data module, write data module and be connected respectively with address information transport module, produce read write the associated control signal of process;
Write data module: the data-signal that this module is sent AXI bus master by asynchronous FIFO is sent to ahb bus interface, thus write ahb bus from equipment, complete the write operation of AXI bus to ahb bus; The feedback signal of writing simultaneously by asynchronous FIFO, ahb bus being produced from equipment is sent to AXI bus interface, thereby feeds back to AXI bus master; Data-signal ahb bus main equipment being sent by asynchronous FIFO is sent to AXI bus interface, thereby writes AXI bus slave, completes the write operation of ahb bus to AXI bus; The feedback signal of writing simultaneously by asynchronous FIFO, AXI bus slave being produced is sent to ahb bus interface, thereby feeds back to ahb bus main equipment; Writing data module is connected respectively with control module with address information transport module;
Described read data module: this module is sent ahb bus by asynchronous FIFO data-signal from equipment is sent to AXI bus interface, thus be transferred to AXI bus master, complete the read operation of AXI bus to ahb bus; The feedback signal of reading simultaneously by asynchronous FIFO, ahb bus being produced from equipment is sent to AXI bus interface, thereby feeds back to AXI bus master; Data-signal AXI bus slave being sent by asynchronous FIFO is sent to ahb bus interface, thereby is transferred to ahb bus main equipment, completes the read operation of ahb bus to AXI bus; The feedback signal of reading simultaneously by asynchronous FIFO, AXI bus slave being produced is sent to ahb bus interface, thereby feeds back to ahb bus main equipment; Read data module is connected respectively with control module with address information transport module.
Claims (3)
1. a communication means for AXI bus and ahb bus, comprises the steps:
(1) utilize the communicator between AXI bus and ahb bus to complete the mutual read-write operation between AXI bus and ahb bus;
(2) by the external unit connecting in AXI bus, to ahb bus, send and read or write request;
(3) communicator between AXI bus and ahb bus responds above-mentioned request, and the address information transport module in communicator latchs its reference address;
(4) communicator between AXI bus and ahb bus judges in AXI bus, whether the desired Access status of external unit meets AXI bus and ahb bus communicator status, and in AXI bus, whether the address of the desired access of external unit and access type meet the form of AXI and ahb bus interface signal;
(5) as reference address that external unit requires in AXI bus, access type and Access status are all correct, meet communicator status between AXI bus and ahb bus and the form of AXI and ahb bus interface signal, by AXI bus, the control module in communicator between ahb bus produces read procedure (corresponding read request) or writes the relevant control information in process (corresponding write request), send to respectively between AXI bus and ahb bus the read data module in communicator and write data module, control read data module and write data module the external unit being connected on ahb bus is conducted interviews,
(6) as wrong in reference address, access type or Access status, the communicator between AXI bus and ahb bus produces error message and feeds back this error message to the external unit connecting that sends read-write requests in AXI bus, require it again to AXI bus, to send relevant reading or write request to ahb bus communicator, start once the access process of new AXI bus to ahb bus;
(7), in read procedure, the control information that the address information that read data module produces according to address information transmission modular and control module produce, carries out read operation to the external unit connecting on ahb bus;
(8) in writing process, write data module according to the control information of the address information of address information transmission modular generation and control module generation, the external unit connecting on ahb bus is carried out to write operation;
(9) because AXI bus and ahb bus belong to different clock zones, in reading and writing process by the asynchronous FIFO in the communicator between AXI bus and ahb bus as data buffer buffering all read address information and the data message write;
(10) by the external unit connecting on ahb bus, to AXI bus, send and read or write request;
(11) communicator between AXI bus and ahb bus responds above-mentioned request, and the address information transport module in communicator latchs its reference address;
(12) communicator between AXI bus and ahb bus judges in AXI bus, whether the desired Access status of external unit meets AXI bus and ahb bus communicator status, and on ahb bus, whether the address of the desired access of external unit and access type meet the form of AXI and ahb bus interface signal;
(13) as reference address that external unit requires on ahb bus, access type and Access status are all correct, meet communicator status between AXI bus and ahb bus and the form of AXI and ahb bus interface signal, by AXI bus, the control module in communicator between ahb bus produces read procedure (corresponding read request) or writes the relevant control information in process (corresponding write request), send to respectively between AXI bus and ahb bus the read data module in communicator and write data module, control read data module and write data module the external unit being connected in AXI bus is conducted interviews,
(14) as wrong in reference address, access type or Access status, the communicator between AXI bus and ahb bus produces error message and feeds back this error message to the external unit connecting that sends read-write requests on ahb bus, require it again to AXI bus, to send relevant reading or write request to ahb bus communicator, start once the access process of new ahb bus to AXI bus;
(15), in read procedure, the control information that the address information that read data module produces according to address information transmission modular and control module produce, carries out read operation to the external unit connecting in AXI bus;
(16) in writing process, write data module according to the control information of the address information of address information transmission modular generation and control module generation, the external unit connecting in AXI bus is carried out to write operation;
(17) because AXI bus and ahb bus belong to different clock zones, in reading and writing process by the asynchronous FIFO in the communicator between AXI bus and ahb bus as data buffer buffering all read address information and the data message write.
2. the application of the communication means of a kind of AXI bus according to claim 1 and ahb bus: utilize the communication means of above-mentioned AXI bus and ahb bus that AXI bus external device is mounted on ahb bus, or ahb bus external unit is mounted in AXI bus.
3. realize a device for AXI bus and ahb bus communication means as claimed in claim 1, it is characterized in that, this device comprises data buffering module, address information transport module, control module, writes data module and read data module;
Described data buffering module: adopt asynchronous FIFO to carry out the snubber assembly of reading and writing data between AXI bus and ahb bus; Data buffering module is with address information transport module, read data module and write data module and be connected respectively;
Described address information transport module: described address information transport module and read data module with write data module and be connected, relative address information is provided for reading and writing data, in addition, address information transport module is also connected with control module, receives the relevant control information of control module;
Described control module: this module intercoms mutually with address information transport module, address information transport module is produced read the output signal of write address, word length, length, transport-type through the control of state machine, be transferred on ahb bus interface, in order to control to ahb bus from equipment read write access; Address information transport module is produced read the output signal of write address, word length, length, transport-type through the control of state machine, be transferred in AXI bus interface, in order to control to AXI bus slave read write access; Produce simultaneously for read write the signal that data module is controlled; Described control module with read data module, write data module and be connected respectively with address information transport module, produce read write the associated control signal of process;
Write data module: the data-signal that this module is sent AXI bus master by asynchronous FIFO is sent to ahb bus interface, thus write ahb bus from equipment, complete the write operation of AXI bus to ahb bus; The feedback signal of writing simultaneously by asynchronous FIFO, ahb bus being produced from equipment is sent to AXI bus interface, thereby feeds back to AXI bus master; Data-signal ahb bus main equipment being sent by asynchronous FIFO is sent to AXI bus interface, thereby writes AXI bus slave, completes the write operation of ahb bus to AXI bus; The feedback signal of writing simultaneously by asynchronous FIFO, AXI bus slave being produced is sent to ahb bus interface, thereby feeds back to ahb bus main equipment; Writing data module is connected respectively with control module with address information transport module;
Described read data module: this module is sent ahb bus by asynchronous FIFO data-signal from equipment is sent to AXI bus interface, thus be transferred to AXI bus master, complete the read operation of AXI bus to ahb bus; The feedback signal of reading simultaneously by asynchronous FIFO, ahb bus being produced from equipment is sent to AXI bus interface, thereby feeds back to AXI bus master; Data-signal AXI bus slave being sent by asynchronous FIFO is sent to ahb bus interface, thereby is transferred to ahb bus main equipment, completes the read operation of ahb bus to AXI bus; The feedback signal of reading simultaneously by asynchronous FIFO, AXI bus slave being produced is sent to ahb bus interface, thereby feeds back to ahb bus main equipment; Read data module is connected respectively with control module with address information transport module.
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