CN103098206A - 具有偏移裸片叠层的多芯片封装及其制造方法 - Google Patents

具有偏移裸片叠层的多芯片封装及其制造方法 Download PDF

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CN103098206A
CN103098206A CN2011800143724A CN201180014372A CN103098206A CN 103098206 A CN103098206 A CN 103098206A CN 2011800143724 A CN2011800143724 A CN 2011800143724A CN 201180014372 A CN201180014372 A CN 201180014372A CN 103098206 A CN103098206 A CN 103098206A
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nude film
group
substrate
pad
nude
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P·吉利厄姆
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Mosaid Technologies Inc
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Mosaid Technologies Inc
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Abstract

一种半导体器件，该半导体器件具有被安装在基底上的多个被堆叠的半导体裸片。每个裸片具有相似的尺寸。每个裸片具有沿该裸片的焊边布置的第一多个焊盘。将第一组裸片安装至所述基底，其中该焊边在第一方向上取向。将第二组裸片安装至所述基底，其中该焊边在与所述第一方向相反的第二方向上取向。每个裸片相对于剩余裸片在第二方向上横向偏移一段各自的横向偏移距离，使得在垂直于所述基底的方向上，每个裸片的焊盘不被放置在所述基底与所述剩余裸片的任一部分之间。多个焊线将焊盘连接至基底。还公开了一种制造半导体器件的方法。

Description

具有偏移裸片叠层的多芯片封装及其制造方法
相关申请
本申请要求美国临时申请No.61/315,111的优先权，其全部内容通用引用包含在本发明中。
技术领域
本发明总地涉及半导体存储器件。
背景技术
半导体集成电路芯片（例如便携式闪存卡）已普遍用于数据存储。这些设备的使用者总期望数据存储容量能不断增长，并且制造者力求以低成本方式提供较大的存储容量，同时保持标准的封装尺寸，以确保与现有电子器件的兼容性。
已知通过在单个封装中堆叠多个半导体裸片（所谓的“多芯片封装”，MCP）能提高单个封装中的存储密度。相对于单个裸片（die），裸片数量的增多会相应地提高存储容量。参见图1，MCP 100由四个NAND闪存裸片102构成。应理解，该方法可等同应用到其他类型的存储设备中。每个裸片102具有焊盘104，该焊盘104经焊线106电连接至共同的基底108。尽管所示的裸片102在其相对的两侧均具有焊盘，但是应理解，每个裸片102可替代地具有不同布置方式的焊盘104，例如可以布置在单侧上，或布置在相邻的两侧上，或任一其他布置方式。基底108在其相对一侧上提供其他从焊线106到焊料球110的电连接，从而形成用于连接至外部设备（未示出）的球栅阵列（BGA）。***物112位于每对相邻的裸片102之间，以在二者之间提供足够的间隙以允许焊线106接附至焊盘104。该结构的缺点是，***物112的厚度限制了在尺寸固定的封装中可被堆叠的裸片102的数量，由此限制了MCP 100的总存储容量。另外，因为每个裸片102悬盖于下面裸片102的焊盘104之上，所以用于每个裸片102的焊线106必须在堆叠下一个裸片102之前进行接附，这样将导致制造步骤的增加，以及在组装时耗时又费力。
图2示出了另一种方法。MCP 200由四个NAND闪存裸片202构成，每个NAND闪存裸片202沿一侧具有焊盘204。可替代地，还可以采用具有沿相邻的两侧布置的焊盘204的裸片202，如下面将详细讨论的。裸片202在横向上彼此偏移以暴露出每个裸片202的焊盘204。在该结构中，所有的裸片202均可在一单独的步骤中堆叠，然后可在一单独的步骤中利用焊线机（未示出）接附所有的焊线206。该结构不需要***物来提供到焊盘204的通道，这样在结构上更紧凑。但是，该结构的缺点在于，用于所有裸片202的所有焊线206必须沿裸片202的同一侧接附，并且都接附至基底208的同一表面。所产生的高互连密度可能是拥挤的并且呈现逻辑阻碍，尤其是在诸如HLNANDTM闪存设备之类的设备中，其中每个裸片202都需要在基底208上有单独的互连迹线。尽管可以通过在基底208上提供另外的互连层来克服上述问题，但这将提高制造成本。
图3中示出了另一种方法。MCP 300由交错布置的四个NAND闪存裸片302A、302B、302C、302D构成。裸片302A、302C具有沿左侧取向的焊盘304，裸片302B、302D具有沿右侧取向的焊盘304。在相邻的裸片302之间的横向偏移暴露出焊盘304，裸片302的厚度提供了用以连接焊线306的足够的间隙。例如，裸片302B在裸片302A和裸片302C之间提供了足够的间隙以连接焊线306至裸片302A的焊盘304。因此，通过交替焊盘304的取向减轻了基底308的互连拥挤问题，从而允许一半的互连线置于叠层的任一侧上。然而，这种结构的缺陷在于，焊线306不能在一单独的制造步骤中都被接附，因为裸片302C和302D分别悬出并阻挡了到裸片302A和302B的焊盘304的通道。另外，裸片302B和302C的厚度必须提供足够的间隙以使焊线306分别连接至裸片302A和302B。该间隙一般要求为100微米的量级。尽管可以制造出更薄的裸片302，但用在这种结构中形成不了间隙，因此不能使用它们来减少叠层的总高度，从而限制了在尺寸固定的封装中可被堆叠的裸片302的数量。其结果是，MCP 300的总存储容量也受到限制，而且也无法通过降低裸片302的厚度来进一步提高总存储容量。
图4中示出了另一种方法。MCP 400由三个NAND闪存裸片402A、402B、402C构成，每个裸片具有布置在其相对两侧的焊盘404。每个裸片402在长度上都足够短于紧位于其下的裸片402，从而使上面的裸片不会叠盖住下面裸片402的焊盘404。在该结构中，所有的焊盘404均易于在一单独步骤中与焊线406接附，从而连接至基底408。然而，这种结构的其中一个缺点是，不能把裸片402都制造成同一尺寸，因此，这会增加制造上的复杂性。另外，不同尺寸的裸片不具有相同的数据存储容量，这进而需要更复杂的控制电路。
至少一部分上述方法可以改成在裸片的相邻两侧或相邻的更多侧上具有焊盘，这例如通过图5所示的在两个维度上将裸片横向偏移来实现。然而，这些结构都不足以解决以上提到的缺点，例如焊线拥挤、悬盖于下面裸片的焊盘上的较高的裸片。
因此，需要提供具有高存储容量的多芯片封装。
还需要提供具有低制造成本的多芯片封装。
还需要提供结构紧凑的多芯片封装。
还需要提供减少了制造步骤的制造多芯片封装的方法。
发明内容
本发明的目的是克服现有技术中的一个或多个缺点。
本发明的另一个目的是提供一种多芯片封装，其中多个相同的芯片被堆叠在基底上，该多个相同芯片具有在相反方向上取向的焊盘，并且其中没有一个芯片悬盖在靠近基底的任何其他芯片的焊盘上。
本发明的另一个目的是提供一种制造多芯片封装的方法，其中多个相同的裸片被堆叠在基底上，该多个相同芯片具有在相反方向上取向的焊盘，以及在一单独制作步骤中将所有裸片的焊盘连接至基底。
本发明的另一个目的是在一单独操作中组装一堆器件以及在一单独操作中导线连接所有被堆叠的器件，无需为了在两个裸片之间留出焊线的空隙而放置***物或对裸片的最低厚度作限制。
根据本发明的第一方面，提供一种半导体器件，包括大体平坦的基底。多个被堆叠的半导体裸片被安装在所述基底上。该多个裸片中的每个裸片具有相似的尺寸。每个裸片具有沿该裸片的第一焊边布置的第一多个焊盘。多个裸片包括：安装至所述基底的第一组裸片，其中每个裸片的所述第一焊边在第一方向上取向；和安装至所述基底的第二组裸片，其中每个裸片的所述第一焊边在与所述第一方向相反的第二方向上取向。所述多个裸片中的每个裸片相对于所述多个裸片中的剩余裸片在所述第二方向上横向偏移一段各自的横向偏移距离，使得在垂直于所述基底的方向上，每个裸片的焊盘不被放置在所述基底与所述剩余裸片的任一部分之间。多个焊线将焊盘连接至基底。
在进一步方面中，所述多个半导体裸片还包括安装至所述基底的第三组裸片，其中每个裸片的所述第一焊边在不同于所述第一方向和所述第二方向的第三方向上取向；和安装至所述基底的第四组裸片，其中每个裸片的所述第一焊边在与所述第三方向相反的第四方向上取向。所述第三方向和所述第四方向中的每一个相对于所述第一方向和所述第二方向呈90度取向。
在进一步方面中，所述多个裸片以交替取向被安装在所述基底上，使得每一对相邻裸片包括所述第一组中的一个裸片和所述第二组中的一个裸片。
在进一步方面中，每个裸片还包括沿第二焊边布置的第二多个焊盘。
在进一步方面中，所述第一方向与所述第二方向相反。所述第一组裸片中每个裸片的所述第二焊边在不同于所述第一方向和所述第二方向的第三方向上取向。所述第二组裸片中每个裸片的所述第二焊边在与所述第三方向相反的第四方向上取向。
在进一步方面中，所述第一组裸片包括m个裸片。所述第二组裸片包括n个裸片。所述第一组裸片的第一个裸片为最接近所述基底的裸片。所述第一组裸片的从所述基底起的第i个裸片的横向偏移距离Δi是：Δi=(i-1)d；以及所述第二组裸片的从所述基底起的第j个裸片的横向偏移距离Δj是：Δj=[m+(n-j)]d，其中d为每个裸片的所述第一多个焊盘在所述第二方向上的横向宽度。
另一方面，提供一种制造半导体器件的方法，包括提供具有多个电连接的基底和安装第一组裸片中的第一半导体裸片至所述基底，使得沿该第一裸片的第一焊边布置的第一多个焊盘在第一方向上取向。安装所述第一组裸片中的剩余裸片至所述基底，使得：沿所述第一组裸片的每个裸片的第一焊边布置的第一多个焊盘在所述第一方向上取向；且所述第一组裸片的每个剩余裸片相对于所述第一裸片在与所述第一方向相反的第二方向上横向偏移一段各自的横向偏移距离。安装第二组半导体裸片至所述基底，使得：沿所述第二组裸片的每个裸片的第一焊边布置的第一多个焊盘在所述第二方向上取向；且所述第二组裸片中的每个裸片相对于所述第一裸片在所述第二方向上横向偏移一段各自的横向偏移距离。在将所述第一组半导体裸片和第二组半导体裸片安装至所述基底之后，在第一和第二组半导体裸片的焊盘与所述基底间连接焊线。
在进一步方面中，每个半导体裸片的各自的横向偏移距离被选定为使得在垂直于所述基底的方向上，每个裸片的所述焊盘不被放置在所述基底与所述剩余裸片的任一部分之间。
在进一步方面中，所述第一组裸片包括m个裸片；所述第二组裸片包括n个裸片；所述第一组裸片的从所述基底起的第i个裸片的横向偏移距离Δi是Δi=(i-1)d；以及所述第二组裸片的从所述基底起的第j个裸片的横向偏移距离Δj是Δj=[m+(n-j)]d。
在进一步方面中，在把第一组半导体裸片中的剩余裸片安装至基底之后，再把第二组半导体裸片安装到基底上。
在进一步方面中，安装所述第一组半导体裸片和所述第二组半导体裸片至所述基底包括以交替取向安装所述半导体裸片，使得每个裸片仅与具有相反取向的裸片相邻。
在进一步方面中，该方法包括安装第三组半导体裸片至所述基底，使得：沿所述第三组裸片的每个裸片的第一焊边布置的第一多个焊盘在不同于所述第一方向和所述第二方向的第三方向上取向。安装第四组半导体裸片至所述基底，使得：沿所述第二组裸片的每个裸片的第一焊边布置的第一多个焊盘在与所述第三方向相反的第四方向上取向；且所述第四组裸片的每个裸片相对于所述第三组裸片中最接近所述基底的裸片在第四方向上横向偏移一段各自的横向偏移距离。连接焊线还包括在第三和第四组半导体裸片的焊盘与所述基底间连接焊线。在将所述第三组半导体裸片和所述第四组半导体裸片安装至所述基底之后，执行所述焊线的连接。
在进一步方面中，所述第三方向和所述第四方向相对于所述第一方向和所述第二方向呈90度取向。
通过下面的描述、附图及所附的权利要求，本发明实施例的其他和/或可替代的特征、方面及有点将会更明显。以下是对附图的简要说明。
附图说明
图1至4是根据各种现有技术的实施例的多芯片封装（MCP）的截面示意图；
图5是根据现有技术的实施例的多芯片封装的透视图；
图6是根据第一实施例的MCP的截面示意图；
图7是根据第二实施例的MCP的截面示意图；
图8是图6和图7中MCP的示意性俯视图；
图9是根据第三实施例的MCP的截面示意图；
图10是根据第四实施例的MCP的截面示意图；
图11是根据第五实施例的MCP的示意性俯视图；
图12是根据第六实施例的MCP的示意性俯视图；
图13是根据第七实施例的MCP的示意性俯视图；和
图14是根据另一个实施例的MCP的组装方法的逻辑框图。
具体实施方式
参考图6和图8，根据第一实施例的MCP 600具有四个裸片602A、602B、602C、602D。每个裸片可以是具有相同尺寸和相同存储容量的存储芯片，例如NAND闪存芯片。应该理解，本文描述的各个结构和方法可被等同地应用到其他类型的存储设备，并且裸片叠层的高度并不限制于任何具体高度。每个裸片602A、602B、602C、602D具有经各自的焊线606A、606B、606C、606D连接至基底608的一个表面的焊盘604A、604B、604C、604D。在基底608的相反表面上的多个焊料球110形成用于连接至外部设备的球栅阵列（BGA）。焊料球110的位置和数量为本领域已知，因此这并不构成本发明的任何部分。可预期的是，其他已知的将MCP连接至外部设备的连接方法也可在此替代使用。
参考图8，每一个裸片602B、602C、602D均相对于底部裸片602A的横向位置横向偏移了一段各自的偏移距离ΔB、ΔC、ΔD。距离Δ足以使裸片602C、602D不悬盖于焊盘604A、604B上，从而允许在把所有的裸片602A、602B、602C、602D堆叠在基底608上之后，在一单独的制作步骤中接附上所有四个裸片602A、602B、602C、602D的焊线606A、606B、606C、606D。偏移距离ΔB为距离d，该距离d足以暴露出焊盘604A从而允许焊线机（未示出）接近并用于接附焊线606A。距离d一般在几百微米的范围内，但应该理解，该距离d可根据不同类型的裸片或不同的连接方法而改变。偏移距离ΔC为距离3d，且偏移距离ΔC为距离2d，使得裸片602D暴露出焊盘604C，并且裸片602C、602D不悬盖在焊盘604A、604B中的任一个上。这种结构能使焊线机无障碍地即刻接近所有焊盘604，并由此能在所有的裸片602被堆叠在基底608上之后，在一单独的制作步骤中接附上所有焊线606。另外，这种结构不要求裸片602的厚度来提供用于焊线606的足够间隙，因此裸片602可以根据现有技术水平制造得尽可能薄，这也相应地降低了叠层的高度。另外，应该理解，通过在裸片602的每一侧上将一部分焊线606连接至基底，降低了基底上的互连密度，从而相应减少了与之相关的拥塞及阻碍问题。MCP 600的组装方法将在下面详细描述。
参考图7，根据第二实施例的MCP 700具有四个裸片702A、702B、702C、702D。MCP 700与图6的MCP 600的不同之处在于，裸片702A、702B、702C、702D以交替取向堆叠，使得具有朝向一个方向的焊盘704的裸片702相邻于具有朝向相反方向的焊盘704的裸片702。MCP 700的顶视图与图6的MCP 600的顶视图相同，具体见图8所示。与图6的实施例类似，裸片702B相对于裸片702A的偏移距离为ΔB=d，裸片702C的偏移距离为ΔC=3d，裸片702D的偏移距离为ΔD=2d。从而，没有裸片702悬盖于下面裸片702的焊盘704之上。这种结构能使焊线机无障碍地立刻接近所有焊盘704，并由此能在所有的裸片702被堆叠在基底708上之后，在一单独的制作步骤中接附上所有焊线706。另外，这种结构不要求裸片702的厚度来提供用于焊线706的足够间隙，因此裸片702可以根据现有技术水平制造得尽可能薄，并相应地降低了叠层的高度。另外，应该理解，通过在裸片702的每一侧上将一部分焊线706连接至基底，降低了基底上的互连密度，从而相应减少了与之相关的拥塞和阻碍问题。在这种结构中，由于在相反取向上的交替裸片702，使具有相同取向的裸片702被隔开，从而在焊线706之间提供了一些额外的空间，与图6的实施例相比较，这降低了对短路的敏感度。然而，这个空间的获得以由每个裸片705的相邻裸片提供给该每个裸片702的机械支撑为代价，因为与图6的实施例相比，每个裸片702延伸经过其上下裸片的边缘的长度都增加了。MCP 700的组装方法将在下面详细描述。
参考图9，根据第三实施例的MCP 900具有六个裸片902A、902B、902C、902D、902E、902F。MCP 900与图6的MCP 600的不同之处在于，在每个取向上增加了一个额外的裸片902。在这种构造中，各个裸片902B、902C、902D、902E、902F相对于裸片902A的横向偏移ΔB如下：
  裸片   横向偏移距离
  902A   0(参考位置)
  902B   d
  902C   2d
  902D   5d
  902E   4d
  902F   3d
可以预期的是，如果所期望的MCP 900的最终高度允许，可以在每个取向上堆叠更多数目的裸片902，并且裸片902在每个取向上的数目无需相同。
参考图10，根据第三实施例的MCP 1000具有六个裸片1002A、1002B、1002C、1002D、1002E、1002F。MCP 1000与图7的MCP 700的不同之处在于，在每个取向上增加了一个额外的裸片1002。在这种构造中，各个裸片1002B、1002C、1002D、1002E、1002F相对于裸片1002A的横向偏移Δ如下：
  裸片   横向偏移距离
  1002A   0(参考位置)
  1002B   d
  1002C   2d
  1002D   5d
  1002E   4d
  1002F   3d
可以预期的是，如果所期望的MCP 1000的最终高度允许，可以在每个取向上堆叠更多数目的裸片1002，并且裸片1002在每个取向上的数目无需相同。
MCP中每个裸片相对于底部裸片的参考位置的合适偏移距离Δ可归纳成对于每个取向上任意数量的等大裸片的单位偏移量d。对于与底部裸片相同取向上的m个裸片中第i个裸片的偏移量Δi和对于与底部裸片相反取向上的n个裸片中第j个裸片的偏移量Δj分别为：
Δi=(i-1)d                        (式子1)
Δj=[m+(n-j)]d                    （式子2)
具体地，从以上式子中应该理解，与底部裸片具有相同取向的最上面（第m个）裸片的偏移量Δm=(m-1)d，在相反取向上的最上面（第n个）裸片的偏移量Δn=md。在这种结构中，每个取向上的最上面裸片具有相对于彼此的偏移量d，并且不会悬盖在其他裸片的焊盘上。还应该理解，每个裸片的偏移量与相同取向的裸片是否被全部连续地堆叠（如图9的MCP 900所示）、或这些相同取向的裸片是否被相反取向的裸片交替间隔（如图10的MCP 1000所示）或任一其他排列无关。
现参考图11，MCP 1100具有交替的结构，其中八个裸片1102被布置为具有四个不同取向的各个焊盘1104。这种结构使焊线1106沿MCP 1100的四个侧边分布，由此可在无需相应增加焊线1106的密度的情况下使用更多数量的裸片1102。在该实施例中，裸片1102A、1102B、1102C、1102D（一起被称为子叠层1114）相对于彼此的布置方式可与图6中的裸片602A、602B、602C、602D相同，或与图7中的裸片702A、702B、702C、702D相同，或按一些其他方式布置，例如裸片1102C作为底部裸片，且裸片1102D作为顶部裸片。裸片1102E、1102F、1102G、1102H（一起被称为子叠层1116）相对于彼此被类似地布置，但取向上与子叠层1114呈直角。可以预期，子叠层1114既可以在子叠层1116的上面，也可以在子叠层1116的下面。还可以预期，如果在每个相应的子叠层中的裸片之间都能保持以上讨论的合适横向偏移，裸片1102A、1102B、1102C、1102D、1102E、1102F、1102G、1102H可以以任一可选的顺序堆叠。还可以预期，每个子叠层1114、1116可在全部两个取向或两个取向中的任一个取向上具有多于两个的具有焊盘1104的裸片1102，例如，如图9和图10所示。
参考图12，MCP 1200具有四个裸片1202A、1202B、1202C、1202D。MCP 1200与图6的MCP 600以及图7的MCP 700的不同之处在于，每个裸片1202在两个相邻侧上具有焊盘1204，其中焊盘1204经焊线1206沿着这两侧被连接至基底1208。裸片1202A和裸片1202B的焊盘1204A、1204B在相同的两个方向上取向，裸片1202C和裸片1202D的焊盘1204C、1204D在两个相反的方向上取向。因此，裸片1202C和裸片1202D可被认为相对于裸片1202A和裸片1202B旋转了180°。裸片1202B、1202C、1202D相对于底部裸片1202A在两个方向上偏移以防悬盖在下面的裸片1202的焊盘1204上。每个方向上的偏移量以与图6的MCP 600和图7的MCP 700相同的方式来确定。根据裸片1202在基底1208上被堆叠的顺序，MCP 1200在X-X方向及Y-Y方向上的截面图可以与图6相同，也可以与图7相同。
参考图13，MCP 1300具有四个裸片1302A、1302B、1302C、1302D，每个裸片在两个相邻侧上具有焊盘1304，其中焊盘1304经焊线1306沿着这两侧被连接至基底1308。MCP 1300与图12的MCP 1200的不同之处在于，裸片1302没有被布置成两个组（每个组具有共同的取向）。在这种结构中，尽管每个裸片1302相对于底部裸片1302A的横向偏移量以与图6的MCP 600或图7的MCP 700相同的方式来确定，但在确定每个裸片1302相对于裸片1302A的x轴偏移量和y轴偏移量时，是彼此独立的。以裸片1302C为例，当从X-X方向观察时，裸片1302C为所具有的焊盘取向与底部裸片1302A的焊盘取向相反的第二最低裸片。该位置对应j＝2，根据式子2得到在该方向上的偏移量为2d。当从Y-Y方向观察时，裸片1302C为所具有的焊盘取向与底部裸片1302A的焊盘取向相反的最下面的裸片。该位置对应j＝1，根据式子2得到在该方向上的偏移量为3d。可以通过相似的方式确定剩余的裸片1302B和1302D的偏移量。取决于裸片1302在基底1308上被堆叠的顺序，以及为每个裸片1302选择的取向，MCP 1300沿X-X线及Y-Y线的截面图可以与图6或图7相同或不同。
现在参考图14，描述多芯片封装的组装方法，从步骤1400开始。
步骤1410，确定在每个取向上将被堆叠的裸片的数量。裸片的总数量可基于以下因素来确定：所期望的最终MCP的存储容量、最终得到的叠层的最大总高度、成本考虑或任何其他合适的标准。使第一取向上的裸片数量m大体等于第二取向上的裸片数量n是有益的，因为这样可以让焊线和至衬底的电连接分布得更均匀。然而，使裸片叠层在一个方向上具有较多裸片而另一方向上具有较少裸片的情况（或者m>n，或者n>m）也是可以理解的。为便于说明，此处将第一取向定义为将被置于基底上的第一裸片的取向。应该理解，这并不限制本方法的一般使用。另外应该理解，如果每个裸片具有在两个相邻的侧边上的焊盘，那么在这两个垂直维度中的每个上的取向被彼此独立地考虑。因此，在每个维度上都独立确定m和n。该过程继续进行到步骤1420。
步骤1420，将第一裸片置于基底上，并通过任一合适的方式与之粘合。该过程继续进行到步骤1430。
步骤1430，相对于第一裸片的取向，确定要被添加至叠层的下一个裸片的取向。如果下一个裸片具有在两个相邻侧上的焊盘，独立地确定在这两个相邻侧的每一侧上相对第一裸片的相应侧的取向，以确定该下一个裸片的焊盘是在第一取向上还是在第二（相反）取向上。如果该下一个裸片在第一取向上，该过程继续进行到步骤1440。如果该下一个裸片在第二取向上，该过程继续进行到步骤1460。如果该下一个裸片具有沿着两个相邻侧的焊盘，该过程可视情况关于这相邻两侧中的一侧继续进行到步骤1440，并关于另一侧继续进行到步骤1460。
步骤1440，确定第一裸片和该下一个裸片之间的偏移距离。可基于对应于第一取向的裸片的式子1来确定。可替代地，也可按任何其他合适的方式来确定，例如使相对于最近堆叠的第一取向的裸片偏移一个单位的偏移量d，由此隐含地符合式子1，或使下一个裸片具有足够的偏移量使其不悬盖在下面任一裸片的焊盘上。还可预期的是，可以事先确定偏移距离并将其存储在存储设备中，例如在多个MCP按照相同规范组装的情况下。该过程继续进行到步骤1450。
步骤1450，按在步骤1440确定的位置将该下一个裸片添加至叠层，并且通过任一合适的方式与之粘合。该过程继续进行到步骤1480。
步骤1460，确定第一裸片和该下一个裸片之间的偏移距离。可基于对应于第二取向上的裸片的式子2来确定。可替代地，也可按任何其他合适的方式来确定该偏移距离，例如使相对于最近堆叠的第二取向的裸片偏移一个单位的偏移量-d，由此隐含地符合式子1，或使下一个裸片具有足够的偏移量使其不悬盖在下面任一裸片的焊盘上。还可预期的是，可以事先确定偏移距离并将其存储在存储设备中，例如在多个MCP按照相同规范组装的情况下。该过程继续进行到步骤1470。
步骤1470，按在步骤1460确定的位置将该下一个裸片添加至叠层，并且通过任一合适的方式与之粘合。该过程继续进行到步骤1480。
步骤1480，如果被添加至叠层中的最近裸片是最后一个要添加的裸片，那么该堆叠的裸片结构已完成，该过程继续进行到步骤1490。如果被添加至叠层中的最近裸片不是最后一个要添加的裸片，该过程返回到步骤1430以增加另一个裸片。
步骤1490，焊线机把焊线连接至已完成的叠层中的所有裸片以提供至基底的电连接。由于在已完成的叠层中的裸片之间的相对偏移使得焊线机可从上方接近叠层中每个裸片的每个焊盘并不被其上的裸片所阻挡，从而可以在一单独的制造步骤中接附上所有的焊线。
在步骤1500，该过程结束，且MCP为下一步处理做准备，其中下一步处理包括把裸片和焊线包封在保护用的塑料成型化合物中或通过一些其他合适的方法密封封装。
对以上描述的本发明的实施例的各种修改和改进对于本领域技术人员来说都是明显的。因此，以上描述是示例性而非限制性的。本发明的范围仅受所附的权利要求的范围限制。

Claims (15)

1.一种半导体器件，包括：
大体平坦的基底；
安装在所述基底上的多个被堆叠的半导体裸片；所述多个裸片中的每个裸片具有相似的尺寸；每个裸片具有沿该裸片的第一焊边布置的第一多个焊盘，所述多个裸片包括：
安装至所述基底的第一组裸片，其中每个裸片的所述第一焊边在第一方向上取向；和
安装至所述基底的第二组裸片，其中每个裸片的所述第一焊边在与所述第一方向相反的第二方向上取向；
所述多个裸片中的每个裸片相对于所述多个裸片中的剩余裸片在所述第二方向上横向偏移一段各自的横向偏移距离，使得在垂直于所述基底的方向上，每个裸片的焊盘不被放置在所述基底与所述剩余裸片的任一部分之间；和
将焊盘连接至所述基底的多个焊线。
2.根据权利要求1所述的半导体器件，其中：
所述多个半导体裸片还包括：
安装至所述基底的第三组裸片，其中每个裸片的所述第一焊边在不同于所述第一方向和所述第二方向的第三方向上取向；和
安装至所述基底的第四组裸片，其中所述第一焊边在与所述第三方向相反的第四方向上取向；
所述第三方向和所述第四方向中的每一个相对于所述第一方向和所述第二方向呈90度取向。
3.根据权利要求1所述的半导体器件，其中所述多个裸片以交替取向被安装在所述基底上，使得每一对相邻裸片包括所述第一组中的一个裸片和所述第二组中的一个裸片。
4.根据权利要求1所述的半导体器件，其中：
每个裸片还包括沿第二焊边布置的第二多个焊盘。
5.根据权利要求4所述的半导体器件，其中：
所述第一方向与所述第二方向相反；
所述第一组裸片中每个裸片的所述第二焊边在不同于所述第一方向和所述第二方向的第三方向上取向；和
所述第二组裸片中每个裸片的所述第二焊边在与所述第三方向相反的第四方向上取向。
6.根据权利要求1所述的半导体器件，其中：
所述第一组裸片包括m个裸片；
所述第二组裸片包括n个裸片；
所述第一组裸片的第一个裸片为最接近所述基底的裸片；
所述第一组裸片的从所述基底起的第i个裸片的横向偏移距离Δi是：Δi=(i-1)d；和
所述第二组裸片的从所述基底起的第j个裸片的横向偏移距离Δj是：Δj=[m+(n-j)]d；
其中d为预定距离。
7.根据权利要求6所述的半导体器件，其中d为每个裸片的所述第一多个焊盘在所述第二方向上的横向宽度。
8.一种制造半导体器件的方法，包括：
提供具有多个电连接的基底；
安装第一组裸片中的第一半导体裸片至所述基底，使得沿该第一裸片的第一焊边布置的第一多个焊盘在第一方向上取向；
安装所述第一组半导体裸片中的剩余裸片至所述基底，使得：
沿所述第一组裸片的每个裸片的第一焊边布置的第一多个焊盘在所述第一方向上取向；且
所述第一组裸片的每个剩余裸片相对于所述第一裸片在与所述第一方向相反的第二方向上横向偏移一段各自的横向偏移距离；
安装第二组半导体裸片至所述基底，使得：
沿所述第二组裸片的每个裸片的第一焊边布置的第一多个焊盘在所述第二方向上取向；且
所述第二组裸片中的每个裸片相对于所述第一裸片在所述第二方向上横向偏移一段各自的横向偏移距离；以及
在将所述第一组半导体裸片和第二组半导体裸片安装至所述基底之后，在所述第一组半导体裸片和第二组半导体裸片的焊盘与所述基底间连接焊线。
9.根据权利要求8所述的方法，其中：
每个半导体裸片的各自的横向偏移距离被选定为使得在垂直于所述基底的方向上，每个裸片的所述焊盘不被放置在所述基底与所述剩余裸片的任一部分之间。
10.根据权利要求9所述的方法，其中：
所述第一组裸片包括m个裸片；
所述第二组裸片包括n个裸片；
安装所述第一组半导体器件的所述剩余裸片，使得所述第一组裸片的从所述基底起的第i个裸片的横向偏移距离Δi是：Δi=(i-1)d；以及
安装所述第二组半导体裸片，使得所述第二组裸片的从所述基底起的第j个裸片的横向偏移距离Δj是：Δj=[m+(n-j)]d；
其中d为预定距离。
11.根据权利要求10所述的半导体器件，其中d为每个裸片的所述第一多个焊盘在所述第二方向上的横向宽度。
12.根据权利要求10所述的方法，其中安装所述第一组半导体裸片和所述第二组半导体裸片至所述基底包括交替地安装所述第一组的裸片和所述第二组的裸片。
13.根据权利要求10所述的方法，其中安装所述第一组半导体裸片和所述第二组半导体裸片至所述基底包括以交替取向安装所述半导体裸片，使得每个裸片仅与具有相反取向的裸片相邻。
14.根据权利要求10所述的方法，还包括：
安装第三组半导体裸片至所述基底，使得：
沿所述第三组裸片的每个裸片的第一焊边布置的第一多个焊盘在不同于所述第一方向和所述第二方向的第三方向上取向；且
除了所述第三组裸片的第一裸片外，所述第三组裸片的每个裸片相对于所述第三组裸片的第一裸片在与所述第三方向相反的第四方向上横向偏移一段各自的横向偏移距离；以及
安装第四组半导体裸片至所述基底，使得：
沿所述第二组裸片的每个裸片的第一焊边布置的第一多个焊盘在所述第四方向上取向；且
所述第四组裸片的每个裸片相对于所述第三组裸片中最接近所述基底的裸片在所述第四方向上横向偏移一段各自的横向偏移距离；
其中，
连接焊线还包括在第三和第四组半导体裸片的焊盘与所述基底间连接焊线；以及
在将所述第三组半导体裸片和所述第四组半导体裸片安装至所述基底之后，执行所述焊线的连接。
15.根据权利要求14所述的方法，其中所述第三方向和所述第四方向相对于所述第一方向和所述第二方向呈90度取向。
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