CN103066942A - Quick-start crystal oscillator circuit with ultra-low power consumption - Google Patents

Quick-start crystal oscillator circuit with ultra-low power consumption Download PDF

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CN103066942A
CN103066942A CN201210559927XA CN201210559927A CN103066942A CN 103066942 A CN103066942 A CN 103066942A CN 201210559927X A CN201210559927X A CN 201210559927XA CN 201210559927 A CN201210559927 A CN 201210559927A CN 103066942 A CN103066942 A CN 103066942A
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ammplifier
resistance
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CN103066942B (en
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肖时茂
潘文光
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WUXI ZHONGKE MICROELECTRONIC INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE Co Ltd
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WUXI ZHONGKE MICROELECTRONIC INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE Co Ltd
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Abstract

The invention discloses a quick-start crystal oscillator circuit with ultra-low power consumption. The crystal oscillator circuit comprises a self-bias class AB amplifier, a signal amplitude detection circuit, a reference current generating circuit, a current mirror circuit, a quartz crystal resonance circuit and a digital logic control circuit. Passive quartz crystals are adopted in the crystal oscillator circuit, and the quick-start crystal oscillator circuit with the ultra-low power consumption is utilized for quickly starting an oscillator to generate square-wave or rectangular-wave clock signals. The output signals of the crystal oscillator circuit can provide accurate reference clocks for a digital circuit or a frequency synthesizer circuit.

Description

A kind of super low-power consumption starts crystal-oscillator circuit fast
Technical field
The present invention relates to a kind of super low-power consumption and start fast crystal-oscillator circuit, be used for the reference clock source of digital circuit or frequency synthesizer circuit, belong to technical field of integrated circuits.
Background technology
Reference clock source is the heart of digital circuit and frequency synthesizer circuit.All logical circuits are all worked under the driving of clock in the digital circuit, and the clock of digital circuit is direct or frequency dividing circuit generation by reference clock.Frequency synthesizer circuit also is clock generation circuit, is input as reference clock source, is output as the adjustable clock signal of frequency.Therefore, reference clock source plays vital effect to digital circuit and frequency synthesizer circuit.
Reference clock source generally produces by crystal-oscillator circuit.Crystal-oscillator circuit utilizes quartz crystal and electric capacity to consist of resonant network, forms negative resistance oscillator by amplifier.Quartz crystal has piezoelectric effect, can convert the electrical signal to the crystal vibration, otherwise the vibration of crystal can be transformed into the signal of telecommunication.The natural mode shape of quartz crystal is resonance frequency, and quartz crystal has stable natural frequency, so the reference frequency of oscillator energy stable output.
Along with the development of technology of Internet of things and sensor network technology, adopt battery powered node to obtain using more and more widely, be subject to the restriction of battery capacity, being used for the most important index of battery powered node chip is exactly power consumption.The size of chip power-consumption has also determined the service time of battery.For sensor node, a node requires a battery can work time several years especially, and the operating time of node chip is very short, generally is the set time once sampling data of being separated by, and the chip most of the time all is operated in standby mode.Under standby mode, the most of circuit of chip all is in closed condition, in order to guarantee chip energy timing wake-up, chip must have timer clock, and namely the internal reference clock source is in running order, therefore, under standby mode, the power consumption of chip internal oscillator has determined the stand-by power consumption of whole chip, and for the sensor node that is in standby mode for the most of the time, the power consumption of internal oscillator has also just determined the service time of battery.In a word, the design of super low-power consumption oscillator has become a main challenge of low-power chip design.Therefore in addition, for radio communication, the data communication time is generally very short, and in order to reduce the holding time of communication channel, the General Requirements chip has short start-up time, requires the oscillator can starting of oscillation work within the extremely short time.
The traditional crystal oscillator circuit as shown in Figure 1, pierce circuit is by inverter INV, quartz crystal Crystal, capacitor C p1, Cp2, resistance R and output buffer form.Quartz crystal and capacitor C p1, Cp2 forms resonant network, and the centre frequency of resonant network is the natural mode shape of quartz crystal, and inverter INV and resonant network consist of negative resistance oscillator, and resistance R is feedback resistance, can prevent the quartz crystal blasting and damages.Output buffer provides enough output carrying load abilities for crystal oscillator.Are determined by inverter INV and resistance R the power consumption of this oscillator and start-up time, the driving force of inverter INV is stronger, and resistance R is larger, and the start-up time of oscillator is short, but power consumption is large.Otherwise resistance is less, and oscillator power consumption is little, but oscillator may failure of oscillation.Therefore, traditional crystal oscillator can not solve simultaneously low-power consumption and start-up time short problem.
Summary of the invention
The present invention seeks to propose a kind of super low-power consumption and start fast crystal-oscillator circuit in order to overcome prior art performance and structural limitation, circuit has been realized quick startup by amplitude detection and Current Control, has simultaneously the characteristics of low-power consumption.The present invention can be used for the reference clock source of digital circuit or frequency synthesizer circuit.
The present invention adopts passive quartz crystal, starts fast oscillator by low-power consumption oscillator circuit, produces square wave or rectangular wave clock signal.The output signal of this crystal-oscillator circuit provides accurate reference clock for digital circuit or frequency synthesizer circuit.
The present invention includes: the class ab ammplifier of automatic biasing, the signal amplitude detection circuit, reference current generating circuit, current mirror circuit, the quartz crystal resonant circuit, the Digital Logic control circuit, the input of described signal amplitude detection circuit connects the class ab ammplifier of automatic biasing, the output of signal amplitude detection circuit connects reference current generating circuit, the output of reference current generating circuit connects current mirror circuit, the output of current mirror circuit connects the class ab ammplifier of automatic biasing again, the two ends of quartz crystal resonant circuit connect input and the output of the class ab ammplifier of automatic biasing, the class ab ammplifier output of automatic biasing connects the input of digital logic control circuit by output buffer, the control logic signal output part of Digital Logic control circuit connects respectively reference current generating circuit, current mirror circuit;
The dc point of the class ab ammplifier of described automatic biasing is by amplifier oneself biasing, and the operating state of amplifier is the AB class, and the gain of amplifier is determined by the electric current by itself;
Described signal amplitude detection circuit is transformed into d. c. voltage signal with the input exchange signal of automatic biasing class ab ammplifier, and its output is transformed into direct current by reference current generating circuit;
Described current mirror circuit, the class ab ammplifier to automatic biasing behind the mirror image of the direct current ratio that reference current generating circuit is produced provides direct current;
Described quartz crystal resonant circuit as frequency-selective network, with the class ab ammplifier composition negative resistance oscillator circuits of automatic biasing, produces the oscillator signal of fixed frequency, and the frequency of oscillation of circuit is determined by the natural frequency of quartz crystal itself;
Described Digital Logic control circuit according to the class ab ammplifier output signal of automatic biasing, produces the control logic signal, realizes the coarse regulation of electric current; When circuit has just started, Digital Logic control circuit control current mirror circuit produces large electric current, the class ab ammplifier of automatic biasing has large voltage gain, negative resistance oscillator circuits can start fast, after negative resistance oscillator circuits starts, the coarse regulation of Digital Logic control circuit close current, the class ab ammplifier of automatic biasing is operated under the little operating current condition, thereby realizes the low-power consumption vibration.
Concrete, the class ab ammplifier structure of described automatic biasing comprises: the drain electrode of the 0th NMOS pipe links to each other with the drain electrode of a PMOS pipe, is the output of the class ab ammplifier of automatic biasing; The grid of the 0th NMOS pipe links to each other with the grid of a PMOS pipe, is the input of the class ab ammplifier of automatic biasing, connects the first resistance between the output of class ab ammplifier and the input, and self-bias voltage is provided; The first electric capacity is ac filter electric capacity, and the first electric capacity negative terminal connects the source electrode of the 0th NMOS pipe, and the first electric capacity anode connects the source electrode of a PMOS pipe, and the 0th NMOS pipe source electrode connects the output of current mirror circuit, and the 0th NMOS manages source ground; The voltage amplification gain of the class ab ammplifier of whole automatic biasing is by the Current Control that flows through PMOS pipe source electrode, the output of the class ab ammplifier of automatic biasing connects output buffer, and output buffer becomes the sine wave signal of the class ab ammplifier output of automatic biasing into square wave or square-wave signal.
Described signal amplitude detection circuit structure comprises: the 7th NMOS pipe is the amplitude detection pipe, the 7th NMOS tube grid connects the input of the class ab ammplifier of automatic biasing by the second electric capacity, the drain electrode of the 7th NMOS pipe connects current source and the 3rd resistance one end, the second resistance is connected between the drain electrode and grid of the 7th NMOS pipe, dc offset voltage is provided for the 7th NMOS pipe, the 3rd resistance other end connects the input of the 3rd capacitance cathode and reference current generating circuit, the 3rd electric capacity minus earth, the 3rd resistance and the 3rd electric capacity consist of low pass filter, the AC signal of filtering the 7th NMOS pipe output; The second electric capacity one end connects the input of the class ab ammplifier of automatic biasing, and the other end connects the grid of the 7th NMOS pipe, plays the AC signal coupling; Current source is connected to power supply, DC power supply is provided for the signal amplitude detection circuit.
Described reference current generating circuit structure comprises: the output of the positive input termination signal amplitude detection circuit of operational amplifier, operational amplifier output terminal connects the 4th NMOS tube grid, negative input termination the 4th NMOS pipe source electrode of operational amplifier, the source electrode of the 4th resistance one termination the 4th NMOS pipe, one end of another termination the 5th resistance, the other end of one termination the 5th resistance of the 6th resistance, the 6th resistance other end ground connection; The drain electrode of the 5th NMOS pipe and source electrode be an end and the other end of connecting resistance R5 respectively, the drain electrode of the 6th NMOS pipe and source electrode connect respectively an end and the other end of the 6th resistance, and the 5th NMOS tube grid and the 6th NMOS tube grid are connected respectively to two signal output parts of Digital Logic control circuit; Operational amplifier and the 4th NMOS pipe consist of negative feedback, the voltage that guarantees the 3rd electric capacity equates with the voltage of the 4th resistance, the voltage of the 3rd electric capacity is reference current divided by total resistance of the 4th resistance, the 5th resistance and the 6th resistance, and reference current is by the drain electrode output of the 4th NMOS pipe.
Described current mirror circuit structure comprises: the 3rd PMOS pipe source electrode connects power supply, and grid and drain electrode link together, and the source electrode of the 2nd PMOS pipe connects power supply, and the second gate pmos utmost point and the 3rd gate pmos utmost point link together, and are the input of current mirror circuit; The 8th PMOS pipe source electrode connects power supply, and the drain electrode of the 8th PMOS pipe is connected with the drain electrode of the 2nd PMOS pipe, is the output of current mirror circuit, and the 8th gate pmos utmost point connects a signal output part of Digital Logic control circuit; The proportional mirror of the electric current of the electric current of the 2nd PMOS pipe and the 3rd PMOS pipe.
Described quartz crystal resonant circuit structure comprises: an end of the 4th electric capacity and the 5th electric capacity connects respectively the two ends of quartz crystal, and the 4th electric capacity and the 5th electric capacity other end be ground connection respectively; Quartz crystal and the 4th electric capacity, the 5th electric capacity consist of resonant network, determine the resonance frequency of pierce circuit; The two ends of quartz crystal are connected to input and the output of the class ab ammplifier of automatic biasing.
Described Digital Logic control circuit adopts digital gate circuit to realize.
Amplitude and the output dc voltage of described signal amplitude detection circuit input ac voltage are inversely proportional to, and the input ac voltage amplitude is larger, and output dc voltage is lower.
Described reference current generating circuit input direct voltage is directly proportional with output DC stream, and input direct voltage is higher, and output DC stream is larger.
The input of described current mirror circuit and output end signal all are direct currents, and output becomes fixed proportion with the input direct current.
Advantage of the present invention is: by the class ab ammplifier of the controllable automatic biasing of electric current and the crystal oscillator of resonant tank formation, have advantages of and satisfy simultaneously quick startup vibration and the rear maintenance of vibration low-power consumption, can be used for requiring quick startup, reference clock source in the low power consumption integrated circuit.
Description of drawings
Fig. 1 is conventional crystal oscillating circuit schematic diagram.
Fig. 2 is circuit structure diagram of the present invention.
Fig. 3 is the output waveform of Digital Logic control circuit.
Embodiment
The present invention proposes a kind of super low-power consumption and start fast crystal-oscillator circuit, to be used for requiring quick startup, reference clock source in the low power consumption integrated circuit, circuit adopt standard CMOS process to realize.
The present invention is described further below in conjunction with specific embodiment.
Super low-power consumption of the present invention starts fast crystal-oscillator circuit and comprises: the class ab ammplifier 21 of automatic biasing, signal amplitude detection circuit 22, reference current generating circuit 23, current mirror circuit 24, quartz crystal resonant circuit 25, Digital Logic control circuit 26, the input of described signal amplitude detection circuit 22 connects the class ab ammplifier 21 of automatic biasing, the output of signal amplitude detection circuit 22 connects reference current generating circuit 23, the output of reference current generating circuit 23 connects current mirror circuit 24, the output of current mirror circuit 24 connects the class ab ammplifier 21 of automatic biasing again, the two ends of quartz crystal resonant circuit 25 connect input and the output of the class ab ammplifier 21 of automatic biasing, class ab ammplifier 21 outputs of automatic biasing connect the input of digital logic control circuit 26 by output buffer, the control logic signal output part of Digital Logic control circuit 26 connects respectively reference current generating circuit 23, current mirror circuit 24.
As shown in Figure 2, class ab ammplifier 21 structures of described automatic biasing comprise: the drain electrode of the 0th NMOS pipe M0 links to each other with the drain electrode of PMOS pipe M1, is the output of the class ab ammplifier 21 of automatic biasing; The grid of the 0th NMOS pipe M0 links to each other with the grid of PMOS pipe M1, is the input of the class ab ammplifier 21 of automatic biasing, and connection the first resistance R 1 provides self-bias voltage between the output of class ab ammplifier 21 and the input; The first capacitor C 1 is ac filter electric capacity, the first capacitor C 1 negative terminal connects the source electrode of the 0th NMOS pipe M0, the first capacitor C 1 anode connects the source electrode of PMOS pipe M1, and the 0th NMOS pipe M0 source electrode connects the output of current mirror circuit 24, the 0th NMOS pipe M0 source ground; The voltage amplification gain of the class ab ammplifier 21 of whole automatic biasing is by the Current Control that flows through PMOS pipe M1 source electrode, the output of the class ab ammplifier 21 of automatic biasing connects output buffer BUF, and output buffer BUF becomes the sine wave signal of class ab ammplifier 21 outputs of automatic biasing into square wave or square-wave signal.
The AB class of automatic biasing is put greatly device 21 and is formed basic pierce circuit with quartz crystal resonant circuit 25, and quartz crystal resonant circuit 25 has frequency-selecting and phase shift effect.Quartz crystal Crystal and capacitor C P1, CP2 consists of resonant network.Quartz crystal Crystal has the value of very high Q, has good frequency selectivity and stability.The natural frequency of quartz crystal oscillator is the frequency of oscillation of oscillator.
The class ab ammplifier 21 of automatic biasing has the voltage amplification function, consist of negative resistance oscillator with quartz crystal resonant circuit 25, the size of negative resistance is determined by the voltage amplification gain of the class ab ammplifier 21 of automatic biasing, the voltage amplification gain is larger, negative resistance is also larger, when negative resistance during greater than the internal loss of quartz crystal resonant circuit 25, the frequency of oscillation of oscillator stable output.The dc point of the class ab ammplifier 21 of automatic biasing is by amplifier oneself biasing, and the operating state of amplifier is the AB class, and the gain of amplifier is determined by the electric current by itself.The drain electrode of NMOS pipe M0 links to each other with the drain electrode of PMOS pipe M1, be the output of the class ab ammplifier 21 of automatic biasing, the grid of NMOS pipe M0 links to each other with the grid of PMOS pipe M1, is the input of the class ab ammplifier 21 of automatic biasing, connect input by resistance R 1 between the output, self-bias voltage is provided.Capacitor C 1 is ac filter electric capacity, and for AC signal, the anode of C1 is equivalent to ground connection.The voltage amplification gain of overall amplifier is by the Current Control that flows through the M1 source electrode.When the electric current that flows through amplifier was large, the start-up time of oscillator was short, and output voltage amplitude is large, and simultaneously, the power consumption of oscillator is large.Otherwise if the electric current of amplifier is little, output voltage amplitude is little, and oscillator power consumption is little, but may the failure of oscillations.Output buffer BUF becomes the sine wave signal of amplifier output into square wave or square-wave signal.
Described signal amplitude detection circuit 22 structures comprise: the 7th NMOS pipe M7 is the amplitude detection pipe, the 7th NMOS pipe M7 grid connects the input of the class ab ammplifier 21 of automatic biasing by the second capacitor C 2, the 7th NMOS pipe M7 drain electrode connects current source IB and the 3rd resistance R 3 one ends, the second resistance R 2 is connected between the drain electrode and grid of the 7th NMOS pipe M7, dc offset voltage is provided for the 7th NMOS pipe M7, the 3rd resistance R 3 other ends connect the input of the 3rd capacitor C 3 positive poles and reference current generating circuit 23, the 3rd capacitor C 3 minus earths, the 3rd resistance R 3 and the 3rd capacitor C 3 consist of low pass filter, the AC signal of filtering the 7th NMOS pipe M7 output; The second capacitor C 2 one ends connect the input of the class ab ammplifier 21 of automatic biasing, and the other end connects the grid of the 7th NMOS pipe M7, plays the AC signal coupling; Current source IB is connected to power supply, DC power supply is provided for signal amplitude detection circuit 22.
Signal amplitude detection circuit 22 is for detection of the amplitude of oscillator, and the input exchange signal of automatic biasing class ab ammplifier 22 is transformed into DC level, the direct current of signal amplitude detection circuit 22 outputs and the inversely proportional relation of oscillation amplitude of oscillator.When the oscillation amplitude of oscillator output was large, the DC level of signal amplitude detection circuit 22 outputs was low, and when the oscillation amplitude of oscillator output is little, the DC level of signal amplitude detection circuit 22 outputs is high.
Reference current generating circuit 23 becomes direct current with the direct voltage of signal amplitude detection circuit 22 outputs by electric resistance changing, described reference current generating circuit 23 structures comprise: the output of the positive input termination signal amplitude detection circuit 22 of operational amplifier OPA, operational amplifier OPA output termination the 4th NMOS pipe M4 grid, negative input termination the 4th NMOS pipe M4 source electrode of operational amplifier OPA, the source electrode of the 4th resistance R 4 one terminations the 4th NMOS pipe M4, one end of another termination the 5th resistance R 5, the other end of one termination the 5th resistance R 5 of the 6th resistance R 6, the 6th resistance R 6 other end ground connection; The drain electrode of the 5th NMOS pipe M5 and source electrode be an end and the other end of connecting resistance R5 respectively, the drain electrode of the 6th NMOS pipe M6 and an end and the other end that source electrode connects respectively the 6th resistance R 6, the 5th NMOS pipe M5 grid and the 6th NMOS pipe M6 grid are connected respectively to B, the C output of Digital Logic control circuit 26; Operational amplifier OPA and the 4th NMOS pipe M4 consist of negative feedback, the voltage that guarantees the 3rd capacitor C 3 equates with the voltage of the 4th resistance R 4, the voltage of the 3rd capacitor C 3 is reference current divided by total resistance of the 4th resistance R 4, the 5th resistance R 5 and the 6th resistance R 6, and reference current is by the drain electrode output of the 4th NMOS pipe M4.
Current mirror circuit 24, the class ab ammplifier 21 to automatic biasing behind the mirror image of the direct current ratio that reference current generating circuit 23 is produced provides direct current.Described current mirror circuit 24 structures comprise: the 3rd PMOS pipe M3 source electrode connects power supply, grid and drain electrode link together, the source electrode of the 2nd PMOS pipe M2 connects power supply, and the 2nd PMOS pipe M2 grid and the 3rd PMOS pipe M3 grid link together, and are the input of current mirror circuit 24; The 8th PMOS pipe M8 source electrode connects power supply, and the 8th PMOS pipe M8 drain electrode is connected with the 2nd PMOS pipe M2 drain electrode, is the output of current mirror circuit 24, and the 8th PMOS pipe M8 grid connects the A output of Digital Logic control circuit 26; The proportional mirror of electric current of the electric current of the 2nd PMOS pipe M2 and the 3rd PMOS pipe M3.
Described quartz crystal resonant circuit 23 structures comprise: the end of the 4th capacitor C P1 and the 5th capacitor C P2 connects respectively the two ends of quartz crystal Crystal, and the 4th capacitor C P1 and the 5th capacitor C P2 other end be ground connection respectively; Quartz crystal Crystal and the 4th capacitor C P1, the 5th capacitor C P2 consist of resonant network, determine the resonance frequency of pierce circuit; The two ends of quartz crystal Crystal are connected to input and the output of the class ab ammplifier 21 of automatic biasing.
Class ab ammplifier 21 output signals of automatic biasing after output buffer BUF becomes square wave or square-wave signal, as the clock signal of Digital Logic control circuit 26, produce control logic, realize the coarse regulation of electric current.
When circuit has just started, oscillator is work not, Digital Logic control circuit 26 does not have clock signal, output terminals A, B, C are low level, PMOS pipe M8 conducting in the current mirror circuit 24, class ab ammplifier 21 circuital currents of automatic biasing are maximum, and amplifier produces large negative resistance value, the quick starting oscillation of oscillator; Behind the circuit starting oscillation, Digital Logic control circuit 26 output C end output high level, PMOS pipe M8 closes in the current mirror circuit 24, and class ab ammplifier 21 circuital currents of automatic biasing are determined by the electric current of NMOS pipe M2 in the current mirror circuit 24.Digital Logic control circuit 26 output B, C end is exported high level successively, NMOS pipe M5 and the M6 conducting of control reference current generating circuit 23, therefore, under same oscillation amplitude condition, reference circuit produces larger reference current, feeds back to the class ab ammplifier 21 of automatic biasing by current mirror circuit 24.On the one hand, the electric current of oscillator output voltage and current mirror circuit 24 feedbacks is inversely prroportional relationship, and its characteristic is that slope is the curve of bearing; On the other hand, class ab ammplifier 21 relations in direct ratio of oscillator output voltage amplitude and automatic biasing, its characteristic are that slope is positive curve, and the intersection point of two curves is the point of safes of oscillator.Can adjust the output voltage amplitude of oscillator by adjusting the reference circuit electric current.After the circuit starting of oscillation, after reference current generating circuit 23NMOS pipe M5 and the M6 conducting, the all-in resistance after resistance R 4, R5, the R6 series connection is R4, and the output voltage amplitude of oscillator point of safes diminishes, and therefore has low power consumption.
In the class ab ammplifier 21 of biasing, M1 and M0 adopt NMOS and PMOS pipe in the standard CMOS process, and C1 adopts mos capacitance or MIM electric capacity.R1 adopts POLY resistance in the CMOS technique.Output buffering BUF adopts cmos circuit Plays digital units to realize.Capacitor C 1 is ac filter electric capacity, and for AC signal, the anode of C1 is equivalent to ground connection.
In the signal amplitude detection circuit 22, M7 is NMOS pipe in the standard CMOS process, and R2 and R3 are POLY resistance, and C2 and C1 adopt mos capacitance.
In the reference current generating circuit 23, operational amplifier OPA adopts the both-end input, and Single-end output, M4, M5, M6 are NMOS pipe in the standard CMOS process, R4, and R5, R6 adopts POLY resistance in the CMOS technique.
Current mirror circuit 24 is by the PMOS pipe M2 that adopts in the standard CMOS process, M3, M8 composition.
Quartz crystal resonant circuit 25 is by the outer quartz crystal Crystal of sheet, capacitor C P1, and CP2 forms, and these three devices can not be integrated in the CMOS integrated circuit, and quartz crystal adopts separately encapsulation, and CP1 and CP2 are ceramic condenser outside the sheet.
Digital Logic control circuit 26 adopts CMOS technique Plays digital units to realize, its input only has a clock signal clk, class ab ammplifier 21 outputs of input termination automatic biasing, and it has three output terminals A, B, C.The grid of M8 in the A output termination reference current generating circuit 23.B end and C end connect respectively the grid of M5 and M6 in the reference current generating circuit 23.The work schedule of Digital Logic control circuit as shown in Figure 3, before the CLK clock arrived, A, B, three outputs of C all be low level, when pierce circuit start vibrate after, A, B, C export high level successively, the operating current of control generator.

Claims (10)

1. a super low-power consumption starts crystal-oscillator circuit fast, it is characterized in that: the class ab ammplifier (21) that comprises automatic biasing, signal amplitude detection circuit (22), reference current generating circuit (23), current mirror circuit (24), quartz crystal resonant circuit (25), Digital Logic control circuit (26), the input of described signal amplitude detection circuit (22) connects the class ab ammplifier (21) of automatic biasing, the output of signal amplitude detection circuit (22) connects reference current generating circuit (23), the output of reference current generating circuit (23) connects current mirror circuit (24), the output of current mirror circuit (24) connects the class ab ammplifier (21) of automatic biasing again, the two ends of quartz crystal resonant circuit (25) connect input and the output of the class ab ammplifier (21) of automatic biasing, the class ab ammplifier of automatic biasing (21) output connects the input of digital logic control circuit (26) by output buffer, the control logic signal output part of Digital Logic control circuit (26) connects respectively reference current generating circuit (23), current mirror circuit (24);
The dc point of the class ab ammplifier of described automatic biasing (21) is by amplifier oneself biasing, and the operating state of amplifier is the AB class, and the gain of amplifier is determined by the electric current by itself;
Described signal amplitude detection circuit (22) is transformed into d. c. voltage signal with the input exchange signal of automatic biasing class ab ammplifier (22), and its output is transformed into direct current by reference current generating circuit (23);
Described current mirror circuit (24), the class ab ammplifier (21) to automatic biasing behind the mirror image of the direct current ratio that reference current generating circuit (23) is produced provides direct current;
Described quartz crystal resonant circuit (25) as frequency-selective network, with class ab ammplifier (21) the composition negative resistance oscillator circuits of automatic biasing, produces the oscillator signal of fixed frequency, and the frequency of oscillation of circuit is determined by the natural frequency of quartz crystal itself;
Described Digital Logic control circuit (26) according to class ab ammplifier (21) output signal of automatic biasing, produces the control logic signal, realizes the coarse regulation of electric current; When circuit has just started, Digital Logic control circuit (26) control current mirror circuit (24) produces large electric current, the class ab ammplifier of automatic biasing (21) has large voltage gain, negative resistance oscillator circuits can start fast, after negative resistance oscillator circuits starts, Digital Logic control circuit (26) close current coarse regulation, the class ab ammplifier of automatic biasing (21) is operated under the little operating current condition, thereby realizes the low-power consumption vibration.
2. described super low-power consumption starts crystal-oscillator circuit fast according to claim 1, it is characterized in that, the class ab ammplifier of described automatic biasing (21) structure comprises: the drain electrode of the 0th NMOS pipe (M0) links to each other with the drain electrode that a PMOS manages (M1), is the output of the class ab ammplifier (21) of automatic biasing; The grid of the 0th NMOS pipe (M0) links to each other with the grid that a PMOS manages (M1), is the input of the class ab ammplifier (21) of automatic biasing, and connection the first resistance (R1) provides self-bias voltage between the output of class ab ammplifier (21) and the input; The first electric capacity (C1) is ac filter electric capacity, the first electric capacity (C1) negative terminal connects the source electrode of the 0th NMOS pipe (M0), the first electric capacity (C1) anode connects the source electrode of PMOS pipe (M1), the 0th NMOS pipe (M0) source electrode connects the output of current mirror circuit (24), and the 0th NMOS manages (M0) source ground; The voltage amplification gain of the class ab ammplifier of whole automatic biasing (21) is by the Current Control that flows through PMOS pipe (M1) source electrode, the output of the class ab ammplifier of automatic biasing (21) connects output buffer (BUF), and output buffer (BUF) becomes the sine wave signal of class ab ammplifier (21) output of automatic biasing into square wave or square-wave signal.
3. super low-power consumption according to claim 1 starts crystal-oscillator circuit fast, it is characterized in that, described signal amplitude detection circuit (22) structure comprises: the 7th NMOS pipe (M7) is the amplitude detection pipe, the 7th NMOS pipe (M7) grid connects the input of the class ab ammplifier (21) of automatic biasing by the second electric capacity (C2), the 7th NMOS pipe (M7) drain electrode connects current source (IB) and the 3rd resistance (R3) end, the second resistance (R2) is connected between the drain electrode and grid of the 7th NMOS pipe (M7), dc offset voltage is provided for the 7th NMOS pipe (M7), the 3rd resistance (R3) other end connects the input of the 3rd electric capacity (C3) positive pole and reference current generating circuit (23), the 3rd electric capacity (C3) minus earth, the 3rd resistance (R3) consists of low pass filter with the 3rd electric capacity (C3), the AC signal of filtering the 7th NMOS pipe (M7) output; The second electric capacity (C2) end connects the input of the class ab ammplifier (21) of automatic biasing, and the other end connects the grid of the 7th NMOS pipe (M7), plays the AC signal coupling; Current source (IB) is connected to power supply, DC power supply is provided for signal amplitude detection circuit (22).
4. super low-power consumption according to claim 3 starts crystal-oscillator circuit fast, it is characterized in that, described reference current generating circuit (23) structure comprises: the output of the positive input termination signal amplitude detection circuit (22) of operational amplifier (OPA), operational amplifier (OPA) output termination the 4th NMOS pipe (M4) grid, negative input termination the 4th NMOS pipe (M4) source electrode of operational amplifier (OPA), the source electrode of the 4th resistance (R4) termination the 4th NMOS pipe (M4), one end of another termination the 5th resistance (R5), the other end of one termination the 5th resistance (R5) of the 6th resistance (R6), the 6th resistance (R6) other end ground connection; The drain electrode of the 5th NMOS pipe (M5) and source electrode be an end and the other end of connecting resistance R5 respectively, the drain electrode of the 6th NMOS pipe (M6) and an end and the other end that source electrode connects respectively the 6th resistance (R6), the 5th NMOS pipe (M5) grid and the 6th NMOS pipe (M6) grid are connected respectively to two signal output parts of Digital Logic control circuit (26); Operational amplifier (OPA) consists of negative feedback with the 4th NMOS pipe (M4), the voltage that guarantees the 3rd electric capacity (C3) equates with the voltage of the 4th resistance (R4), the voltage of the 3rd electric capacity (C3) is reference current divided by total resistance of the 4th resistance (R4), the 5th resistance (R5) and the 6th resistance (R6), and reference current is by the drain electrode output of the 4th NMOS pipe (M4).
5. super low-power consumption according to claim 1 starts crystal-oscillator circuit fast, it is characterized in that, described current mirror circuit (24) structure comprises: the 3rd PMOS pipe (M3) source electrode connects power supply, grid and drain electrode link together, the source electrode of the 2nd PMOS pipe (M2) connects power supply, the 2nd PMOS pipe (M2) grid and the 3rd PMOS pipe (M3) grid link together, and are the input of current mirror circuit (24); The 8th PMOS pipe (M8) source electrode connects power supply, the 8th PMOS pipe (M8) drain electrode is connected with the 2nd PMOS pipe (M2) drain electrode, be the output of current mirror circuit (24), the 8th PMOS pipe (M8) grid connects a signal output part of Digital Logic control circuit (26); The proportional mirror of electric current of the electric current of the 2nd PMOS pipe (M2) and the 3rd PMOS pipe (M3).
6. super low-power consumption according to claim 1 starts crystal-oscillator circuit fast, it is characterized in that, described quartz crystal resonant circuit (23) structure comprises: an end of the 4th electric capacity (CP1) and the 5th electric capacity (CP2) connects respectively the two ends of quartz crystal (Crystal), the 4th electric capacity (CP1) and the 5th electric capacity (CP2) other end difference ground connection; Quartz crystal (Crystal) consists of resonant network with the 4th electric capacity (CP1), the 5th electric capacity (CP2), determines the resonance frequency of pierce circuit; The two ends of quartz crystal (Crystal) are connected to input and the output of the class ab ammplifier (21) of automatic biasing.
7. super low-power consumption according to claim 1 starts crystal-oscillator circuit fast, it is characterized in that, described Digital Logic control circuit (26) adopts digital gate circuit to realize.
8. super low-power consumption according to claim 3 starts crystal-oscillator circuit fast, it is characterized in that, amplitude and the output dc voltage of described signal amplitude detection circuit (22) input ac voltage are inversely proportional to, and the input ac voltage amplitude is larger, and output dc voltage is lower.
9. super low-power consumption according to claim 4 starts crystal-oscillator circuit fast, it is characterized in that, described reference current generating circuit (23) input direct voltage is directly proportional with output DC stream, and input direct voltage is higher, and output DC stream is larger.
10. super low-power consumption according to claim 5 starts crystal-oscillator circuit fast, it is characterized in that, the input of described current mirror circuit (24) and output end signal all are direct currents, and output becomes fixed proportion with the input direct current.
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CN104253587A (en) * 2013-06-27 2014-12-31 上海海尔集成电路有限公司 Crystal oscillator
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