CN105743496B - A kind of digital controlled oscillator being operated under nearly threshold power voltage - Google Patents
A kind of digital controlled oscillator being operated under nearly threshold power voltage Download PDFInfo
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- CN105743496B CN105743496B CN201610060684.3A CN201610060684A CN105743496B CN 105743496 B CN105743496 B CN 105743496B CN 201610060684 A CN201610060684 A CN 201610060684A CN 105743496 B CN105743496 B CN 105743496B
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- 239000003990 capacitor Substances 0.000 claims abstract description 50
- 239000000872 buffer Substances 0.000 claims abstract description 35
- 238000006880 cross-coupling reaction Methods 0.000 claims abstract description 11
- 239000013078 crystal Substances 0.000 claims description 8
- 238000013461 design Methods 0.000 abstract description 9
- 230000008094 contradictory effect Effects 0.000 abstract description 3
- 239000012071 phase Substances 0.000 description 16
- 230000010355 oscillation Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
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- 230000003321 amplification Effects 0.000 description 2
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- 238000003199 nucleic acid amplification method Methods 0.000 description 2
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- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
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- 230000009466 transformation Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
- H03L7/0992—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider
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- Oscillators With Electromechanical Resonators (AREA)
Abstract
The present invention relates to a kind of digital controlled oscillators being operated under nearly threshold power voltage, using the LC cross coupling structure oscillators with high phase place noiseproof feature, and based on the bootstrap type buffer of differential configuration design, utilize the principle of boostrap circuit, by charging transistor to bootstrap capacitor charge and discharge, voltage superposition is carried out on the basis of supply voltage, to which the output signal of DCO oscillating circuits is amplified, output voltage swing is set to reach twice or more of supply voltage value, under the premise of ensureing low-power consumption, improve the phase noise performance of DCO oscillating circuits, solves the contradictory relation between DCO oscillating circuits power consumption and phase noise under nearly threshold power voltage.
Description
Technical field
The present invention relates to a kind of digital controlled oscillators being operated under nearly threshold power voltage, belong to fields of numeric control technique.
Background technology
DCO has a wide range of applications in integrated circuits, is wireless as the output signal generation module of digital phase-locked loop
Receive-transmit system provides local oscillation signal, and provides clock signal for system on chip (System on Chip, SoC).DCO is by number
Control word is tuned the frequency of output signal, compares traditional voltage controlled oscillator (Voltage Controlled
Oscillator, VCO), digital control word is not easily susceptible to the interference of process deviation, supply voltage and temperature change, therefore DCO has
There is better noise immunity characteristic.The noiseproof feature of DCO determines the outer phase noise performance of the band of digital phase-locked loop, and shadow in turn
The performance of whole system is rung, therefore DCO is the key modules in digital phase-locked loop.
In recent years, the rapid proliferation of the communication modes such as bluetooth, WI-FI, GPS has pushed the hair of portable radio communication device
Exhibition and application realize that more low power consumption levels become the target that industry is constantly pursued to extend battery life.As wireless
High power consumption module in system, super low-power consumption phaselocked loop are the key that realize system low-power consumption, and DCO is in digital phase-locked loop
The maximum module of power consumption.In conclusion realizing that the DCO of low-power consumption noise performance is of great significance.
It is the direct and effective approach of one kind for realizing low-power consumption to reduce supply voltage, is realized using nearly threshold power voltage
DCO becomes new research hotspot.Although being greatly reduced for supply voltage can significantly decrease DCO power consumptions, also reduce simultaneously
The output amplitude of oscillator signal.And the noise in circuit is equivalent to reduce the letter of circuit in this way there is no therewith reducing
It makes an uproar and compares, and deteriorate the phase noise performance of DCO in turn.Current most of documents use ring oscillator structure to exist to meet DCO
The normal work of low-voltage, although ring oscillator is suitable for low voltage environment work, its noiseproof feature is unsatisfactory,
And to reach phase noise performance identical with LC structure oscillators, ring oscillator needs the current value of 450 times of consumption.Therefore
Realize that DCO is to exchange the realization of low-power consumption for sacrifice noiseproof feature using ring oscillator.
Another kind realizes that structure is to utilize source transistor based on the LC cross coupled oscillators of transformer coupled technology in piece
The difference of the inductance value of pole and drain electrode, realizes the amplification of output signal.Although this structure may be implemented than ring oscillator more
Good noiseproof feature, but the circuit based on transformer coupled technology the matching of passive device is required it is quite high, between inductance
Mismatch can lead to the unstable of voltage amplitude, and the phase noise for increasing loop is modulated by Amplitude-Phase (AM-PM).In addition,
The structure needs 4 inductance altogether, and this considerably increases the area of chip and costs.
Invention content
Technical problem to be solved by the invention is to provide one kind by digital control word tuning operation frequency, is reducing work(
While consumption, the digital controlled oscillator of high phase place noiseproof feature realization being operated under nearly threshold power voltage can be taken into account.
In order to solve the above-mentioned technical problem the present invention uses following technical scheme：The present invention devises one kind and being operated in nearly threshold
The digital controlled oscillator being worth under supply voltage, including DCO oscillating circuits and bootstrap type buffer, wherein two of DCO oscillating circuits
Input terminal distinguishes external input current and tuning control word OTW；The DCOp differential vibratings signal output end of DCO oscillating circuits with from
The DCOp differential vibrating signal input parts of act type buffer are connected, the DCOn differential vibrating signal output ends of DCO oscillating circuits
It is connected with the DCOn differential vibrating signal input parts of bootstrap type buffer.
As a preferred technical solution of the present invention：The bootstrap type buffer includes the first PMOS transistor Mp1,
Two PMOS transistor MP2, third PMOS transistor MP3, the 4th PMOS transistor MP4, the first NMOS transistor MN1, the 2nd NMOS it is brilliant
Body pipe MN2, third NMOS transistor MN3, the 4th NMOS transistor MN4, the first bootstrap capacitor CP1, the second bootstrap capacitor CP2, third
Bootstrap capacitor CN1With the 4th bootstrap capacitor CN2, wherein：
The DCOp differential vibratings signal input part of bootstrap type buffer meets the second bootstrap capacitor C respectivelyP2Top crown, third
Bootstrap capacitor CN1Top crown, the second PMOS transistor MP2Grid and the second NMOS transistor MN2Grid；Bootstrap type buffers
The DCOn differential vibratings signal input part of device meets the first bootstrap capacitor C respectivelyP1Top crown, third bootstrap capacitor CN1Upper pole
Plate, the 4th PMOS transistor MP4Grid and the 4th NMOS transistor MN4Grid；
First PMOS transistor Mp1Source electrode meet power supply Vdd；First PMOS transistor Mp1Drain electrode and the first bootstrap capacitor
CP1Bottom crown, the second PMOS transistor MP2Source electrode be connected；Second PMOS transistor MP2Drain electrode and the 2nd NMOS crystal
Pipe MN2Drain electrode be connected；Second NMOS transistor MN2Source electrode and third bootstrap capacitor CN1Bottom crown, the first NMOS crystal
Pipe MN1Drain electrode be connected；First NMOS transistor MN1Source electrode ground connection；
Third PMOS transistor MP3Source electrode meet power supply Vdd；Third PMOS transistor MP3Drain electrode and the second bootstrap capacitor
CP2Bottom crown, the 4th PMOS transistor MP4Source electrode be connected；4th PMOS transistor MP4Drain electrode and the 4th NMOS crystal
Pipe MN4Drain electrode be connected；4th NMOS transistor MN4Source electrode and the 4th bootstrap capacitor CN2Bottom crown, the 3rd NMOS crystal
Pipe MN3Drain electrode be connected；Third NMOS transistor MN3Source electrode ground connection；
First PMOS transistor Mp1OUTn differential vibrating signal output end of the grid as bootstrap type buffer, and with
One NMOS transistor MN1Grid, the 4th PMOS transistor MP4Drain electrode, the 4th NMOS transistor MN4 drain electrode be connected；The
Three PMOS transistor MP3OUTp differential vibrating signal output end of the grid as bootstrap type buffer, and with the 3rd NMOS crystal
Pipe MN3Grid, the second PMOS transistor MP2Drain electrode, the second NMOS transistor MN2Drain electrode be connected.
As a preferred technical solution of the present invention：The DCO oscillating circuits are LC cross coupling structure oscillators.
As a preferred technical solution of the present invention：The LC cross coupling structures oscillator includes the 5th NMOS crystal
Pipe MN5, the 6th NMOS transistor MN6, the first inductance LN, the second inductance LP, the first fixed capacity CfixN, the second fixed capacity CfixP
And variable capacitor array, wherein the first inductance LNOne end, the second inductance LPOne end connect power supply Vdd, DCO oscillation electricity jointly
The DCOp differential vibratings signal output end on road and the second inductance LPThe other end, the second fixed capacity CfixPTop crown, can power transformation
Hold one of array output end, the 5th NMOS transistor MN5Grid, the 6th NMOS transistor MN6Drain electrode be connected,
The DCOn differential vibratings signal output end of DCO oscillating circuits and the first inductance LNThe other end, the first fixed capacity CfixNUpper pole
Plate, another output end of variable capacitor array, the 5th NMOS transistor MN5Drain electrode, the 6th NMOS transistor MN6Grid
It is connected, the first fixed capacity CfixNBottom crown and the second fixed capacity CfixPBottom crown be connected to each other, variable capacitance battle array
Input termination tuning the control word OTW, the 5th NMOS transistor M of rowN5Source electrode, the 6th NMOS transistor MN6Source electrode be connected
It connects and is grounded.
As a preferred technical solution of the present invention：The variable capacitor array includes the identical change of at least two groups structure
Hold pipe unit, by composing in parallel each other, wherein each group transfiguration pipe unit respectively includes the 5th PMOS transistor MP5With
Six PMOS transistor MP6；The 5th PMOS transistor M in each group transfiguration pipe unitP5Grid and the 6th PMOS transistor MP6's
After grid is connected, and it is connected with the input terminal of variable capacitor array；6th PMOS transistor M in each group transfiguration pipe unitP6
Source electrode and drain electrode be connected after, and be connected with one of transfiguration pipe unit output end；In each group transfiguration pipe unit
Five PMOS transistor MP5Source electrode and drain electrode be connected after, and be connected with another output end of transfiguration pipe unit.
It is of the present invention it is a kind of based on the digital controlled oscillator being operated under nearly threshold power voltage use above technical scheme
Compared with prior art, it has the following technical effects：It is of the invention designed based on the numerical control being operated under nearly threshold power voltage
Oscillator, using the LC cross coupling structure oscillators with high phase place noiseproof feature, and based on the bootstrapping of differential configuration design
Type buffer, using the principle of boostrap circuit, by charging transistor to bootstrap capacitor charge and discharge, on the basis of supply voltage
Voltage superposition is carried out, to which the output signal of DCO oscillating circuits to be amplified, output voltage swing is made to reach twice or more of electricity
Source voltage value improves the phase noise performance of DCO oscillating circuits under the premise of ensureing low-power consumption, solves nearly threshold value electricity
Contradictory relation under the voltage of source between DCO oscillating circuits power consumption and phase noise.
Description of the drawings
Fig. 1 is the main body circuit block diagram for the digital controlled oscillator being operated in designed by the present invention under nearly threshold power voltage；
Fig. 2 is the electrical block diagram of LC cross coupling structures oscillator designed by the present invention；
Fig. 3 is the electrical block diagram of bootstrap type buffer designed by the present invention；
Fig. 4 is the Transient figure of bootstrap type buffer designed by the present invention；
Fig. 5 is the digital controlled oscillator that is operated in designed by the present invention under nearly threshold power voltage and be free of bootstrap type buffer
Digital controlled oscillator phase noise simulation comparison figure.
Specific implementation mode
Specific embodiments of the present invention will be described in further detail with reference to the accompanying drawings of the specification.
As shown in Figure 1, a kind of digital controlled oscillator being operated under nearly threshold power voltage designed by the present invention, including
DCO oscillating circuits and bootstrap type buffer, wherein two input terminals of DCO oscillating circuits distinguish external input current and tuning
Control word OTW；The DCOp differential vibratings signal output end of DCO oscillating circuits and the DCOp differential vibrating signals of bootstrap type buffer
Input terminal is connected, the DCOn differential vibratings signal output end of DCO oscillating circuits and the DCOn differential vibratings of bootstrap type buffer
Signal input part is connected.
The digital controlled oscillator under nearly threshold power voltage is operated in designed by the present invention in actual application process,
Middle DCO oscillating circuits further design use LC cross coupling structure oscillators, and for LC cross coupling structures oscillator into
Specific design is gone, as shown in Fig. 2, the LC cross coupling structures oscillator includes the 5th NMOS transistor MN5, the 6th NMOS
Transistor MN6, the first inductance LN, the second inductance LP, the first fixed capacity CfixN, the second fixed capacity CfixPWith variable capacitance battle array
Row, wherein each group transfiguration pipe unit respectively includes the 5th PMOS transistor MP5With the 6th PMOS transistor MP6；Each group varactor
The 5th PMOS transistor M in unitP5Grid and the 6th PMOS transistor MP6Grid be connected after, and and variable capacitance
The input terminal of array is connected；6th PMOS transistor M in each group transfiguration pipe unitP6Source electrode and drain electrode be connected after, and with
One of transfiguration pipe unit output end is connected；5th PMOS transistor M in each group transfiguration pipe unitP5Source electrode and drain electrode
After being connected, and it is connected with another output end of transfiguration pipe unit；First inductance LNOne end, the second inductance LPOne end
Common connection power supply Vdd, power supply Vdd supply Iref electric currents, the DCOp differential vibratings signal output end of DCO oscillating circuits and second
Inductance LPThe other end, the second fixed capacity CfixPTop crown, one of variable capacitor array output end, the 5th NMOS
Transistor MN5Grid, the 6th NMOS transistor MN6Drain electrode be connected, the DCOn differential vibrating signals of DCO oscillating circuits are defeated
Outlet and the first inductance LNThe other end, the first fixed capacity CfixNTop crown, variable capacitor array another output end,
5th NMOS transistor MN5Drain electrode, the 6th NMOS transistor MN6Grid be connected, the first fixed capacity CfixNBottom crown
With the second fixed capacity CfixPBottom crown be connected to each other, the input of variable capacitor array termination tuning control word OTW, the 5th
NMOS transistor MN5Source electrode, the 6th NMOS transistor MN6Source electrode be connected and be grounded.
In practical application, the present invention proposes specific design not only for DCO oscillating circuits, and is directed to bootstrap type
Buffer devises specific circuit structure, as shown in figure 3, bootstrap type buffer includes the first PMOS transistor Mp1, second
PMOS transistor MP2, third PMOS transistor MP3, the 4th PMOS transistor MP4, the first NMOS transistor MN1, the 2nd NMOS crystal
Pipe MN2, third NMOS transistor MN3, the 4th NMOS transistor MN4, the first bootstrap capacitor CP1, the second bootstrap capacitor CP2, third from
Lift capacitance CN1With the 4th bootstrap capacitor CN2, wherein the DCOp differential vibrating signal input parts of bootstrap type buffer connect second respectively
Bootstrap capacitor CP2Top crown, third bootstrap capacitor CN1Top crown, the second PMOS transistor MP2Grid and the 2nd NMOS it is brilliant
Body pipe MN2Grid；The DCOn differential vibratings signal input part of bootstrap type buffer meets the first bootstrap capacitor C respectivelyP1Upper pole
Plate, third bootstrap capacitor CN1Top crown, the 4th PMOS transistor MP4Grid and the 4th NMOS transistor MN4Grid；The
One PMOS transistor Mp1Source electrode meet power supply Vdd, power supply Vdd supplies Iref electric currents；First PMOS transistor Mp1Drain electrode and the
One bootstrap capacitor CP1Bottom crown, the second PMOS transistor MP2Source electrode be connected；Second PMOS transistor MP2Drain electrode and the
Bi-NMOS transistor MN2Drain electrode be connected；Second NMOS transistor MN2Source electrode and third bootstrap capacitor CN1Bottom crown,
One NMOS transistor MN1Drain electrode be connected；First NMOS transistor MN1Source electrode ground connection；Third PMOS transistor MP3Source electrode
Power supply Vdd is met, power supply Vdd supplies Iref electric currents；Third PMOS transistor MP3Drain electrode and the second bootstrap capacitor CP2Lower pole
Plate, the 4th PMOS transistor MP4Source electrode be connected；4th PMOS transistor MP4Drain electrode and the 4th NMOS transistor MN4Leakage
Pole is connected；4th NMOS transistor MN4Source electrode and the 4th bootstrap capacitor CN2Bottom crown, third NMOS transistor MN3Leakage
Pole is connected；Third NMOS transistor MN3Source electrode ground connection；First PMOS transistor Mp1Grid as bootstrap type buffer
OUTn differential vibrating signal output ends, and with the first NMOS transistor MN1Grid, the 4th PMOS transistor MP4Drain electrode,
Four NMOS transistor MN4Drain electrode be connected；Third PMOS transistor MP3OUTp difference of the grid as bootstrap type buffer
Oscillator signal output end, and with third NMOS transistor MN3Grid, the second PMOS transistor MP2Drain electrode, the 2nd NMOS it is brilliant
Body pipe MN2Drain electrode be connected.
Present invention is alternatively directed to the designed digital controlled oscillators being operated under nearly threshold power voltage to be emulated, such as Fig. 4 institutes
Show, the single-end output signal amplitude of oscillation of DCO oscillating circuits is 590mV, is amplified by the bootstrap type buffer that the present invention specifically designs
Afterwards, which is promoted to 1.35V, has been more than amplify the front signal amplitude of oscillation twice.Then, by work designed by the present invention
Make the digital controlled oscillator under nearly threshold power voltage with without the digital controlled oscillator of bootstrap type buffer, it is imitative to carry out phase noise
True comparison, as shown in figure 5, at 1MHz frequency deviations, the phase noise of the digital controlled oscillator without bootstrap type buffer is-
106.4dBc/Hz, and use present invention design after the amplification of bootstrap type buffer, the phase noise of output signal drops to-
116.8dBc/Hz, that is to say, that the phase noise performance of DCO oscillating circuits can be optimized 10dBc/Hz by design of the invention.
In conclusion the present invention is designed based on the digital controlled oscillator being operated under nearly threshold power voltage, make an uproar using with high phase place
The LC cross coupling structure oscillators of acoustic performance, and based on the bootstrap type buffer of differential configuration design, utilize boostrap circuit
Principle carries out voltage superposition by charging transistor to bootstrap capacitor charge and discharge on the basis of supply voltage, thus will
The output signal of DCO oscillating circuits is amplified, and output voltage swing is made to reach twice or more of supply voltage value, is ensureing low-power consumption
Under the premise of, the phase noise performance of DCO oscillating circuits is improved, solves DCO oscillating circuit work(under nearly threshold power voltage
Contradictory relation between consumption and phase noise.
Embodiments of the present invention are explained in detail above in conjunction with attached drawing, but the present invention is not limited to above-mentioned implementations
Mode within the knowledge of a person skilled in the art can also be without departing from the purpose of the present invention
It makes a variety of changes.
Claims (4)
1. a kind of digital controlled oscillator being operated under nearly threshold power voltage, it is characterised in that：Including DCO oscillating circuits and bootstrapping
Type buffer, wherein two input terminals of DCO oscillating circuits distinguish external input current and tuning control word OTW；DCO vibrates
The DCOp differential vibratings signal output end of circuit is connected with the DCOp differential vibrating signal input parts of bootstrap type buffer, DCO
The DCOn differential vibratings signal output end of oscillating circuit is connected with the DCOn differential vibrating signal input parts of bootstrap type buffer；
Wherein, bootstrap type buffer includes the first PMOS transistor Mp1, the second PMOS transistor MP2, third PMOS transistor MP3, the 4th
PMOS transistor MP4, the first NMOS transistor MN1, the second NMOS transistor MN2, third NMOS transistor MN3, the 4th NMOS crystal
Pipe MN4, the first bootstrap capacitor CP1, the second bootstrap capacitor CP2, third bootstrap capacitor CN1With the 4th bootstrap capacitor CN2, wherein：
The DCOp differential vibratings signal input part of bootstrap type buffer meets the second bootstrap capacitor C respectivelyP2Top crown, third bootstrapping
Capacitance CN1Top crown, the second PMOS transistor MP2Grid and the second NMOS transistor MN2Grid；Bootstrap type buffer
DCOn differential vibratings signal input part meets the first bootstrap capacitor C respectivelyP1Top crown, third bootstrap capacitor CN1Top crown,
Four PMOS transistor MP4Grid and the 4th NMOS transistor MN4Grid；
First PMOS transistor Mp1Source electrode meet power supply Vdd；First PMOS transistor Mp1Drain electrode and the first bootstrap capacitor CP1's
Bottom crown, the second PMOS transistor MP2Source electrode be connected；Second PMOS transistor MP2Drain electrode and the second NMOS transistor MN2
Drain electrode be connected；Second NMOS transistor MN2Source electrode and third bootstrap capacitor CN1Bottom crown, the first NMOS transistor MN1
Drain electrode be connected；First NMOS transistor MN1Source electrode ground connection；
Third PMOS transistor MP3Source electrode meet power supply Vdd；Third PMOS transistor MP3Drain electrode and the second bootstrap capacitor CP2's
Bottom crown, the 4th PMOS transistor MP4Source electrode be connected；4th PMOS transistor MP4Drain electrode and the 4th NMOS transistor MN4
Drain electrode be connected；4th NMOS transistor MN4Source electrode and the 4th bootstrap capacitor CN2Bottom crown, third NMOS transistor MN3
Drain electrode be connected；Third NMOS transistor MN3Source electrode ground connection；
First PMOS transistor Mp1OUTn differential vibrating signal output end of the grid as bootstrap type buffer, and with first
NMOS transistor MN1Grid, the 4th PMOS transistor MP4Drain electrode, the 4th NMOS transistor MN4 drain electrode be connected；Third
PMOS transistor MP3OUTp differential vibrating signal output end of the grid as bootstrap type buffer, and with third NMOS transistor
MN3Grid, the second PMOS transistor MP2Drain electrode, the second NMOS transistor MN2Drain electrode be connected.
2. a kind of digital controlled oscillator being operated under nearly threshold power voltage according to claim 1, it is characterised in that：It is described
DCO oscillating circuits are LC cross coupling structure oscillators.
3. a kind of digital controlled oscillator being operated under nearly threshold power voltage according to claim 2, it is characterised in that：It is described
LC cross coupling structure oscillators include the 5th NMOS transistor MN5, the 6th NMOS transistor MN6, the first inductance LN, the second inductance
LP, the first fixed capacity CfixN, the second fixed capacity CfixPAnd variable capacitor array, wherein the first inductance LNOne end, second
Inductance LPOne end connect the DCOp differential vibratings signal output end and the second inductance L of power supply Vdd, DCO oscillating circuit jointlyP's
The other end, the second fixed capacity CfixPTop crown, one of variable capacitor array output end, the 5th NMOS transistor MN5
Grid, the 6th NMOS transistor MN6Drain electrode be connected, the DCOn differential vibratings signal output end of DCO oscillating circuits and first
Inductance LNThe other end, the first fixed capacity CfixNTop crown, another output end of variable capacitor array, the 5th NMOS it is brilliant
Body pipe MN5Drain electrode, the 6th NMOS transistor MN6Grid be connected, the first fixed capacity CfixNBottom crown and second fix
Capacitance CfixPBottom crown be connected to each other, the input of variable capacitor array termination tuning control word OTW, the 5th NMOS transistor
MN5Source electrode, the 6th NMOS transistor MN6Source electrode be connected and be grounded.
4. a kind of digital controlled oscillator being operated under nearly threshold power voltage according to claim 3, it is characterised in that：It is described
Variable capacitor array includes the identical transfiguration pipe unit of at least two groups structure, by composing in parallel each other, wherein each group becomes
Hold pipe unit and respectively includes the 5th PMOS transistor MP5With the 6th PMOS transistor MP6；The 5th in each group transfiguration pipe unit
PMOS transistor MP5Grid and the 6th PMOS transistor MP6Grid be connected after, and with the input terminal of variable capacitor array
It is connected；6th PMOS transistor M in each group transfiguration pipe unitP6Source electrode and drain electrode be connected after, and with transfiguration pipe unit
One of output end is connected；5th PMOS transistor M in each group transfiguration pipe unitP5Source electrode and drain electrode be connected after, and
It is connected with another output end of transfiguration pipe unit.
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| CN113507266B (en) * | 2021-07-19 | 2023-08-25 | 东南大学 | Terahertz voltage-controlled oscillator based on multiple oscillation cores |
| CN115996024B (en) * | 2022-11-01 | 2024-04-12 | 北京兆讯恒达技术有限公司 | Digital controlled oscillator, chip and communication terminal with broadband frequency temperature drift compensation |
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| CN101202554A (en) * | 2003-05-05 | 2008-06-18 | 马维尔国际贸易有限公司 | Dual antenna system having one phase lock loop |
| CN102057576A (en) * | 2008-06-10 | 2011-05-11 | 高通股份有限公司 | Digitally-controlled oscillator output in a phase-locked loop |
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| US9160351B2 (en) * | 2013-10-24 | 2015-10-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Phase-locked loop circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101202554A (en) * | 2003-05-05 | 2008-06-18 | 马维尔国际贸易有限公司 | Dual antenna system having one phase lock loop |
| CN102057576A (en) * | 2008-06-10 | 2011-05-11 | 高通股份有限公司 | Digitally-controlled oscillator output in a phase-locked loop |
Non-Patent Citations (1)
| Title |
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| 宽带全数字锁相环中数控振荡器设计;韩晖翔;《中国优秀硕士学位论文全文数据库信息科技辑》;20150315;第49-51页，图5-1，图5-3 * |
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