CN106100633B - Crystal oscillator driving circuit - Google Patents
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- CN106100633B CN106100633B CN201610657864.XA CN201610657864A CN106100633B CN 106100633 B CN106100633 B CN 106100633B CN 201610657864 A CN201610657864 A CN 201610657864A CN 106100633 B CN106100633 B CN 106100633B
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- H—ELECTRICITY
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- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
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Abstract
The embodiment of the invention discloses a crystal oscillator driving circuit, which comprises: a bias current generating unit, a resistance unit, and a current configurable amplifier unit; the bias current generating unit is respectively connected with the resistance unit and the current configurable amplifier unit and is used for providing working current for the resistance unit and the current configurable amplifier unit; the resistor unit is connected with the current configurable amplifier unit and is used for establishing a direct-current working point for the current configurable amplifier unit; the current configurable amplifier unit is respectively connected with the input end and the output end of the crystal oscillator and is used for amplifying working current under the control of a direct current working point so as to drive the crystal oscillator to start vibrating, thereby realizing the purposes of reducing the power consumption of the driving circuit, reducing the occupied area of the driving circuit and improving the application range of the driving circuit.
Description
Technical Field
The embodiment of the invention relates to a circuit technology, in particular to a crystal oscillator driving circuit.
Background
Along with the technological change, electronic products are continuously updated, however, each electronic product is realized without a digital circuit, the digital circuit works without an oscillator, and accurate clock pulses are generated through the oscillator, so that the digital circuits are controlled to work sequentially. Crystal oscillators are widely used in integrated systems on chip, and are commonly used to provide a precise clock source for a real-time clock module. With the popularization of the internet of things and portable mobile devices powered by batteries, the batteries are required to be capable of effectively supplying power for several years or longer, which puts a strict limit on the power consumption of a crystal oscillator driving circuit in a chip, and the working current of the crystal oscillator driving circuit is generally required to be controlled below 1 mu A.
A conventional crystal oscillator driving circuit according to the prior art shown in fig. 1 is composed of an inverting amplifier INV and a feedback resistor RF. The entire crystal oscillator circuit also includes an off-chip quartz crystal and matching capacitors C1, C2. Wherein the inverter INV and the feedback resistor RF form a driving circuit to compensate the inherent loss of the quartz crystal and maintain the oscillation of the system, and for this purpose, the minimum transconductance that the inverter INV must provide is
Wherein R is m Is equivalent series resistance of the crystal oscillator, omega is resonance frequency of the crystal oscillator, C 0 The static capacitance of the crystal oscillator, C1 and C2 are capacitance values of off-chip matching capacitance, and the transconductance of the inverting amplifier is generally required to reach at least 5 times of the minimum transconductance in circuit design so as to ensure that the crystal oscillator can start vibrating under the changes of various process procedures, voltage and temperature. In the inverting amplifier INV, both NMOS and PMOS transistors operate in the saturation region, and the relationship between the transconductance and the operating current is:
wherein V is gs Is the gate-source voltage of the transistor, V th For the threshold voltage of the transistor, I D Is the drain current.
However, such a structural circuit has a disadvantage in that the overdrive voltage of the transistor is relatively large and increases with an increase in the power supply voltage. Resulting in low current utilization efficiency and inverter current changes with power supply voltage, resulting in a circuit having oscillation characteristics that vary greatly with power supply voltage. In order to ensure starting, a large margin must be left in circuit design, and the power consumption of the circuit is large. For example, at a voltage of 3.3V, the typical value of current consumed by such a circuit to drive a crystal oscillator at 32.768kHz is about 6-7 ua. On the other hand, the feedback resistor RF provides a dc operating point for the inverter INV in the starting stage, and generally requires a resistance value of greater than 10mΩ, which occupies a large area in the chip and increases the chip cost.
Disclosure of Invention
The invention provides a crystal oscillator driving circuit, which is used for reducing the power consumption of the driving circuit, reducing the occupied area of the driving circuit and improving the application range of the driving circuit.
The embodiment of the invention provides a crystal oscillator driving circuit, which comprises:
a bias current generating unit, a resistance unit, and a current configurable amplifier unit; wherein,,
the bias current generating unit is respectively connected with the resistance unit and the current configurable amplifier unit and is used for providing working current for the resistance unit and the current configurable amplifier unit;
the resistor unit is connected with the current configurable amplifier unit and is used for establishing a direct-current working point for the current configurable amplifier unit;
and the current configurable amplifier unit is respectively connected with the input end and the output end of the crystal oscillator and is used for amplifying the working current under the control of the direct current working point so as to drive the crystal oscillator to start vibrating.
Preferably, the circuit further comprises: and the signal amplifying and shaping unit is connected with the current configurable amplifier unit and is used for amplifying and shaping the input end signal of the crystal oscillator and outputting a vibration starting sign signal of the crystal oscillator.
Further, the circuit further comprises: the starting unit is respectively connected with the bias current generating unit and the signal amplifying and shaping unit and is used for controlling the starting of the bias current generating unit under the control of the vibration starting sign signal.
Preferably, the bias current generating unit specifically includes:
a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a second NMOS transistor, and a first resistor, wherein:
the first PMOS transistor is connected with the grid electrode of the second PMOS transistor, the source electrode of the first PMOS transistor is connected with the power supply to form a current mirror, and the drain electrode of the first PMOS transistor is connected with the first end of the first resistor and the gate electrode of the first NMOS transistor; the drain electrode of the second PMOS transistor is connected with the grid electrode of the second PMOS transistor and the drain electrode of the second NMOS transistor; the grid electrode of the second NMOS transistor is connected with the drain electrode of the first NMOS transistor and the second end of the first resistor, and the source electrode of the second NMOS transistor and the source electrode of the first NMOS transistor are grounded.
Preferably, the resistor unit specifically includes:
a third PMOS transistor, a third NMOS transistor, a fourth NMOS transistor, and a fifth NMOS transistor formed by three NMOS transistors connected in series,
the grid electrode of the third PMOS transistor is connected with the grid electrode of the second PMOS transistor, the source electrode of the third PMOS transistor is connected with a power supply, and the drain electrode of the third PMOS transistor is connected with the grid electrode of the fifth NMOS transistor and the drain electrode and the grid electrode of the fourth NMOS transistor; the source electrode of the fourth NMOS transistor is connected with the drain electrode and the grid electrode of the third NMOS transistor; the source of the third NMOS transistor is grounded.
Preferably, the current configurable amplifier unit specifically includes:
a fourth PMOS transistor, a fifth PMOS transistor, a sixth PMOS transistor, an eighth PMOS transistor, a ninth PMOS transistor, a sixth NMOS transistor, a seventh NMOS transistor, an eighth NMOS transistor, a tenth NMOS transistor, and an eleventh NMOS transistor, wherein,
the source electrode of the fourth PMOS transistor is connected with a power supply, the grid electrode of the fourth PMOS transistor is connected with the grid electrode of the third PMOS transistor and the grid electrode of the fifth PMOS transistor, and the drain electrode of the fourth PMOS transistor is connected with the drain electrode of the sixth NMOS transistor, the drain electrode of the fifth NMOS transistor and the output end of the crystal oscillator; the grid electrode of the sixth NMOS transistor is connected with the source electrode of the fifth NMOS transistor and the input end of the crystal oscillator, and the source electrode is grounded; the source electrode of the eighth PMOS transistor is connected with a power supply, the grid electrode of the eighth PMOS transistor is connected with a current control signal, and the drain electrode of the eighth PMOS transistor is connected with the source electrode of the fifth PMOS transistor; the drain electrode of the fifth PMOS transistor is connected with the drain electrode of the seventh NMOS transistor and the output end of the crystal oscillator; the source electrode of the seventh NMOS transistor is connected with the drain electrode of the tenth NMOS transistor, and the grid electrode of the seventh NMOS transistor is connected with the grid electrode of the sixth NMOS transistor; the source electrode of the tenth NMOS transistor is grounded, and the grid electrode is connected with a current control signal; the source electrode of the ninth PMOS transistor is connected with a power supply, the grid electrode of the ninth PMOS transistor is connected with a current control signal, and the drain electrode of the ninth PMOS transistor is connected with the source electrode of the sixth PMOS transistor; the grid electrode of the sixth PMOS transistor is connected with the grid electrode of the fifth PMOS transistor, and the drain electrode of the sixth PMOS transistor is connected with the drain electrode of the eighth NMOS transistor and the output end of the crystal oscillator; the grid electrode of the eighth NMOS transistor is connected with the grid electrode of the seventh NMOS transistor, and the source electrode of the eighth NMOS transistor is connected with the drain electrode of the eleventh NMOS transistor; the gate of the eleventh NMOS transistor is connected with the current control signal, and the source is grounded.
Preferably, the signal amplifying and shaping unit specifically includes:
a seventh PMOS transistor, a ninth NMOS transistor, a Schmitt trigger and a counter, wherein the source electrode of the seventh PMOS transistor is connected with a power supply, the grid electrode of the seventh PMOS transistor is connected with the grid electrode of the sixth PMOS transistor, and the drain electrode of the seventh PMOS transistor is connected with the input end of the Schmitt trigger and the drain electrode of the ninth NMOS transistor; the grid electrode of the ninth NMOS transistor is connected with the grid electrode of the eighth NMOS transistor, and the source electrode of the ninth NMOS transistor is grounded; the output end of the Schmitt trigger is connected with the input end of the counter, and the output end of the counter outputs a vibration starting sign signal.
Preferably, the starting unit specifically includes:
a tenth PMOS transistor, a twelfth NMOS transistor, and a thirteenth NMOS transistor, each of which is formed by three PMOS transistors connected in series,
the source electrode of the tenth PMOS transistor is connected with a power supply, the grid electrode of the tenth PMOS transistor is connected with the output end of the counter, and the drain electrode of the tenth PMOS transistor is connected with the grid electrode of the thirteenth NMOS transistor and the drain electrode of the twelfth NMOS transistor; the drain electrode of the thirteenth NMOS transistor is connected with the grid electrode of the first PMOS transistor, and the source electrode of the thirteenth NMOS transistor is grounded; the source electrode of the twelfth NMOS transistor is grounded, and the grid electrode is connected with the grid electrode of the first NMOS transistor.
The crystal oscillator driving circuit provided by the embodiment of the invention comprises: a bias current generating unit, a resistance unit, and a current configurable amplifier unit; the bias current generating unit is respectively connected with the resistance unit and the current configurable amplifier unit and is used for providing working current for the resistance unit and the current configurable amplifier unit; the resistor unit is connected with the current configurable amplifier unit and is used for establishing a direct-current working point for the current configurable amplifier unit; and the current configurable amplifier unit is respectively connected with the input end and the output end of the crystal oscillator and is used for amplifying the working current under the control of the direct current working point so as to drive the crystal oscillator to start vibrating.
Drawings
FIG. 1 is a schematic diagram of a prior art driving circuit of a crystal oscillator;
fig. 2 is a schematic diagram of a driving circuit of a crystal oscillator according to an embodiment of the invention;
fig. 3 is a schematic diagram of a driving circuit of a crystal oscillator according to a second embodiment of the present invention;
fig. 4 is a schematic diagram of a driving circuit of a crystal oscillator according to a second embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
Example 1
Fig. 2 is a schematic diagram of a driving circuit of a crystal oscillator according to an embodiment of the present invention, which is suitable for providing a precise clock for a digital circuit. As shown in fig. 2, a schematic diagram of a driving circuit of a crystal oscillator according to the present embodiment includes: a bias current generating unit 210, a resistance unit 220, and a current configurable amplifier unit 230; wherein,,
a bias current generating unit 210 connected to the resistor unit 220 and the current configurable amplifier unit 230, respectively, for supplying an operating current to the resistor unit 220 and the current configurable amplifier unit 230;
a resistor unit 220 connected to the current-configurable amplifier unit 230 for establishing a dc operating point for the current-configurable amplifier unit 230; preferably, the resistor unit 220 may be formed of a MOS transistor, because the MOS transistor occupies a smaller area than a general resistor device, which can save the area occupied by the entire driving circuit.
The current configurable amplifier unit 230 is connected to the input XIN and the output XOUT of the crystal oscillator, respectively, and is configured to amplify the working current under the control of the dc working point, so as to drive the crystal oscillator to start vibrating.
According to the technical scheme of the embodiment, the bias current generating unit is used for providing working current for the resistor unit and the current configurable amplifier unit; establishing a direct current working point for the current configurable amplifier unit through a resistance unit; the current configurable amplifier unit is used for amplifying working current under the control of a direct current working point so as to drive the crystal oscillator to start vibrating, so that the power consumption of the driving circuit is reduced, the direct current working point is built for the current configurable amplifier unit by adopting the resistor unit, the occupied area of the driving circuit is reduced, and the application range of the driving circuit is improved by setting the current configurable amplifier unit.
Example two
Fig. 3 is a schematic diagram of a driving circuit of a crystal oscillator according to a second embodiment of the present invention, in which a signal amplifying and shaping unit 240 and a starting unit 250 are added based on the above embodiment, and specifically referring to fig. 3, the driving circuit includes:
a bias current generating unit 210, a resistance unit 220, a current configurable amplifier unit 230, a signal amplifying and shaping unit 240, and a starting unit 250; wherein,,
a bias current generating unit 210 connected to the resistor unit 220 and the current configurable amplifier unit 230, respectively, for supplying an operating current to the resistor unit 220 and the current configurable amplifier unit 230;
a resistor unit 220 connected to the current-configurable amplifier unit 230 for establishing a dc operating point for the current-configurable amplifier unit 230;
a current configurable amplifier unit 230 connected to the input XIN and the output XOUT of the crystal oscillator, respectively, for amplifying the working current under the control of the dc working point to drive the crystal oscillator to start vibrating;
a signal amplifying and shaping unit 240 connected to the current configurable amplifier unit 230 for amplifying and shaping the input XIN signal of the crystal oscillator and outputting a crystal oscillator oscillation start flag signal OSC-READY;
and a start-up unit 250 connected to the bias current generating unit 210 and the signal amplifying and shaping unit 240, respectively, for controlling the start-up of the bias current generating unit 210 under the control of the oscillation start flag signal OSC-READY.
Preferably, as an implementation manner of the driving circuit, referring to fig. 4, the starting unit 250 specifically includes:
a tenth PMOS transistor P10, a twelfth NMOS transistor N12, and a thirteenth NMOS transistor N13, each of which is composed of three PMOS transistors connected in series,
the source electrode of the tenth PMOS transistor P10 is connected with the power supply VDD, the grid electrode is connected with the output end of the COUNTER COUNTER, and the drain electrode is connected with the grid electrode of the thirteenth NMOS transistor N13 and the drain electrode of the twelfth NMOS transistor N12; the drain electrode of the thirteenth NMOS transistor N13 is connected with the grid electrode of the first PMOS transistor P1, and the source electrode is grounded; the source of the twelfth NMOS transistor N12 is grounded, and the gate is connected to the gate of the first NMOS transistor N1.
Illustratively, the bias current generating unit 210 may specifically include:
a first PMOS transistor P1, a second PMOS transistor P2, a first NMOS transistor N1, a second NMOS transistor N2, and a first resistor R, wherein:
the first PMOS transistor P1 is connected with the grid electrode of the second PMOS transistor P2, the source electrode is connected with the power supply VDD to form a current mirror, and the drain electrode of the first PMOS transistor P1 is connected with the first end of the first resistor R and the grid electrode of the first NMOS transistor N1; the drain electrode of the second PMOS transistor P2 is connected with the grid electrode of the second PMOS transistor P2 and the drain electrode of the second NMOS transistor N2; the gate of the second NMOS transistor N2 is connected to the drain of the first NMOS transistor N1 and the second end of the first resistor R, and the source of the second NMOS transistor N2 and the source of the first NMOS transistor N1 are both grounded.
Illustratively, the resistive unit 220 may include:
a third PMOS transistor P3, a third NMOS transistor N3, a fourth NMOS transistor N4, and a fifth NMOS transistor N5 formed by three NMOS transistors connected in series, wherein,
the grid electrode of the third PMOS transistor P3 is connected with the grid electrode of the second PMOS transistor P2, the source electrode is connected with a power supply, and the drain electrode is connected with the grid electrode of the fifth NMOS transistor N5 and the drain electrode and the grid electrode of the fourth NMOS transistor N4; the source electrode of the fourth NMOS transistor N4 is connected with the drain electrode and the grid electrode of the third NMOS transistor N3; the source of the third NMOS transistor N3 is grounded.
Illustratively, the current configurable amplifier unit 230 may specifically include:
a fourth PMOS transistor P4, a fifth PMOS transistor P5, a sixth PMOS transistor P6, an eighth PMOS transistor P8, a ninth PMOS transistor P9, a sixth NMOS transistor N6, a seventh NMOS transistor N7, an eighth NMOS transistor N8, a tenth NMOS transistor N10, and an eleventh NMOS transistor N11, wherein,
the source electrode of the fourth PMOS transistor P4 is connected with a power supply, the grid electrode of the fourth PMOS transistor P3 is connected with the grid electrode of the fifth PMOS transistor P5, and the drain electrode of the fourth PMOS transistor P5 is connected with the drain electrode of the sixth NMOS transistor N6, the drain electrode of the fifth NMOS transistor N5 and the output end XOUT of the crystal oscillator; the grid electrode of the sixth NMOS transistor N6 is connected with the source electrode of the fifth NMOS transistor N5 and the input end XIN of the crystal oscillator, and the source electrode is grounded; the source electrode of the eighth PMOS transistor P8 is connected with the power supply VDD, the grid electrode is connected with a current control signal, and the drain electrode is connected with the source electrode of the fifth PMOS transistor P5; the drain electrode of the fifth PMOS transistor P5 is connected with the drain electrode of the seventh NMOS transistor N7 and the output end XOUT of the crystal oscillator; the source of the seventh NMOS transistor N7 is connected with the drain of the tenth NMOS transistor N10, and the gate is connected with the gate of the sixth NMOS transistor N6; the source electrode of the tenth NMOS transistor N10 is grounded, and the grid electrode is connected with a current control signal; the source electrode of the ninth PMOS transistor P9 is connected with the power supply VDD, the grid electrode is connected with a current control signal, and the drain electrode is connected with the source electrode of the sixth PMOS transistor P6; the grid electrode of the sixth PMOS transistor P6 is connected with the grid electrode of the fifth PMOS transistor P5, and the drain electrode of the sixth PMOS transistor P6 is connected with the drain electrode of the eighth NMOS transistor N8 and the output end XOUT of the crystal oscillator; the gate of the eighth NMOS transistor N8 is connected to the gate of the seventh NMOS transistor N7, and the source is connected to the drain of the eleventh NMOS transistor N11; the gate of the eleventh NMOS transistor N11 is connected to the current control signal, and the source is grounded.
Illustratively, the signal amplifying and shaping unit 240 may specifically include:
a seventh PMOS transistor P7, a ninth NMOS transistor N9, a schmitt trigger T, and a COUNTER, wherein the source of the seventh PMOS transistor P7 is connected to the power supply, the gate is connected to the gate of the sixth PMOS transistor P6, and the drain is connected to the input terminal of the schmitt trigger T and the drain of the ninth NMOS transistor N9; the grid electrode of the ninth NMOS transistor N9 is connected with the grid electrode of the eighth NMOS transistor N8, and the source electrode is grounded; the output end of the Schmitt trigger T is connected with the input end of a COUNTER, and the output end of the COUNTER outputs a vibration starting sign signal OSC-READY.
It should be noted that, since the bias current generating unit 210 has a degenerate operating point with zero current, in order for the driving circuit to operate normally at any time, the driving circuit further includes the starting unit 250 to help the bias current generating unit 210 establish a correct dc operating point. The operation procedure of the starting unit 250 is: when the circuit is not started, the gate voltage of the first NMOS transistor N1 is zero, the currents of the first PMOS transistor P1 and the second PMOS transistor P2 are zero, and the crystal oscillator oscillation start flag signal OSC-READY is low, so the twelfth NMOS transistor N12 is turned off, the tenth PMOS transistor P10 is turned on, the gate node of the thirteenth NMOS transistor N13 is charged, the gate voltage of the thirteenth NMOS transistor N13 is raised, the thirteenth NMOS transistor N13 is turned on, the on current causes the gate voltage of the second PMOS transistor P2 to be lowered, so the second PMOS transistor P2 and the first PMOS transistor P1 are gradually turned on, and the gate voltage of the first NMOS transistor N1 is raised. After the circuit is started and stabilized, the gate voltage of the first NMOS transistor N1 makes the twelfth NMOS transistor N12 turned on, and the gate voltage of the thirteenth NMOS transistor N13 drops to be close to zero because the inverted-to-wide ratio transistor selected by the tenth PMOS transistor P10 is turned on less than the twelfth NMOS transistor N12, and the thirteenth NMOS transistor N13 is turned off. At this time, the twelfth NMOS transistor N12 and the tenth PMOS transistor P10 in the start-up unit 250 are both turned on, and this branch consumes a part of current, but when the crystal oscillator is stably started, the start-up flag signal OSC-READY is set to high level, and the tenth PMOS transistor P10 is turned off, so that it is realized that the start-up unit 250 does not consume current when the crystal oscillator is stably operated, thereby further reducing the power consumption of the entire driving circuit.
In the bias current generating unit 210, the first PMOS transistor P1 and the second PMOS transistor P2 are mirror current mirrors, assuming that the ratio of the width to length ratio of the second NMOS transistor N2 to the first NMOS transistor N1 is
Where K represents the ratio of the width to length ratio of the second NMOS transistor N2 to the first NMOS transistor N1, W, L represents the channel width and length of the transistors, respectively, the bias current generated by the bias current generating unit 210 is:
wherein I is B Represents bias current, W, L represents channel width and length of the first NMOS transistor N1, K represents ratio of width to length of the second NMOS transistor N2 and the first NMOS transistor N1, R represents resistance value of the first resistor R, μ n Representing carrier mobility of NMOS transistor, C ox Representing the transistor gate capacitance per unit area. It can be seen that the bias current I B The power consumption of the circuit is further reduced because the operating current of the circuit is not greatly changed along with the change of the power supply voltage VDD and accordingly, a large margin is not left in the circuit design.
The current-configurable amplifier unit 230 is configured to amplify the sixth NMOS transistor N6, the seventh NMOS transistor N7, and the eighth NMOS transistor N8, the fourth PMOS transistor P4, the fifth PMOS transistor P5, and the sixth PMOS transistor P6, and the tenth NMOS transistor N10, the eleventh NMOS transistor N11, and the eighth PMOS transistor P8, and the ninth PMOS transistor P9. The current control signals of the tenth NMOS transistor N10, the eleventh NMOS transistor N11 and the eighth PMOS transistor P8, and the ninth PMOS transistor P9 connected to the gates may be implemented by a programming procedure according to design requirements.
In the whole driving circuit, the third PMOS transistor P3, the fourth PMOS transistor P4, the fifth PMOS transistor P5, the sixth PMOS transistor P6, the first PMOS transistor P1 and the second PMOS transistor P2 form a mirror current source, and bias currents are provided for each part of units. Wherein the fourth PMOS transistor P4, the fifth PMOS transistor P5 and the sixth PMOS transistor P6 constitute a configurable current mirror that supplies current to the amplifier. By controlling the switching transistors tenth NMOS transistor N10, eleventh NMOS transistor N11, and eighth PMOS transistor P8, the turning on and off of ninth PMOS transistor P9 adjusts the current magnitude of the configurable amplifier unit. When the characteristics of the crystal oscillators are different, the sizes of the used off-chip matching capacitors are different, and the required transconductance of the amplifier is also changed when the temperature and the process are changed, so that the power consumption can be flexibly configured under various different conditions by using the current-configurable amplifier unit, and the extremely low power consumption characteristic is achieved. Typically, when the lowest power consumption configuration is used, the fifth PMOS transistor P5 and the sixth PMOS transistor P6 are turned off and the current is zero, and the sixth NMOS transistor N6 is used as an amplifier driving crystal oscillator, and the sixth NMOS transistor N6 is biased in the sub-threshold region by designing the proper transistor size, and the relation between the transconductance and the working current of the amplifier circuit is that
Wherein n is a process-related parameter, typically having a value of 1-2, I D For the operating current, k is the Boltzmann constant, T is absolute temperature, q is the electron charge, and kT/q.apprxeq.26 mV at normal temperature. It can be seen that the transistor amplification circuit operating in the subthreshold region has higher current efficiency (can provide a larger transconductance at a certain current) compared to the conventional transistor inverter amplification circuit at a certain current, so that low power consumption characteristics can be realized. The fifth NMOS transistor N5 operates in the linear region to form a resistor for establishing DC for the sixth NMOS transistor N6At the operating point, the diode-connected transistors formed by the third NMOS transistor N3 and the fourth NMOS transistor N4 provide the bias voltage for the fifth NMOS transistor N5. By designing the third NMOS transistor N3 and the sixth NMOS transistor N6 to match with the same gate voltage, it is assumed that the ratio of the width to length ratio of the fourth NMOS transistor N4 to the fifth NMOS transistor N5 is +.>
The on-resistance of the fifth NMOS transistor N5 is
Wherein W, L represents the channel width and length, K, respectively, of the NMOS transistor r Represents the ratio of the width to length ratio of the fourth NMOS transistor N4 to the fifth NMOS transistor N5, mu n Representing carrier mobility of NMOS transistor, C ox Representing the transistor gate capacitance per unit area, I p3 Representing the operating current of the third PMOS transistor P3; by adjusting the relevant parameters, a suitable resistance value can be obtained. Typically, for a 32.768kHz crystal oscillator, in order not to affect the circuit start-up characteristics, it is generally required that the feedback resistance RF is greater than 10mΩ, and the area occupied by the feedback resistance can be greatly reduced by using the transistor resistance design, so as to reduce the area of the whole driving circuit.
When the driving circuit is operating stably, the input XIN and the input XOUT of the crystal oscillator will generate sinusoidal oscillation signals, but with smaller amplitudes. In the signal amplifying and shaping unit 240, the ninth NMOS transistor N9 amplifies the input XIN signal of the crystal oscillator, and the resultant square wave output signal OSC-OUT is obtained by shaping the schmitt trigger T, and then the COUNTER is set to output the oscillation start flag signal OSC-READY of the crystal oscillator.
According to the technical scheme of the embodiment, the bias current generating unit is used for providing working current for the resistor unit and the current configurable amplifier unit; establishing a direct current working point for the current configurable amplifier unit through a resistance unit; the current configurable amplifier unit is used for amplifying working current under the control of a direct current working point so as to drive the crystal oscillator to start vibrating, so that the power consumption of the driving circuit is reduced, the direct current working point is built for the current configurable amplifier unit by adopting the resistor unit, the occupied area of the driving circuit is reduced, and the application range of the driving circuit is improved by setting the current configurable amplifier unit.
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.
Claims (8)
1. A crystal oscillator drive circuit, comprising: a bias current generating unit, a resistance unit, and a current configurable amplifier unit; wherein,,
the bias current generating unit is respectively connected with the resistance unit and the current configurable amplifier unit and is used for providing working current for the resistance unit and the current configurable amplifier unit;
the resistor unit is connected with the current configurable amplifier unit and is used for establishing a direct-current working point for the current configurable amplifier unit;
the current configurable amplifier unit is respectively connected with the input end and the output end of the crystal oscillator and is used for amplifying working current under the control of a direct current working point so as to drive the crystal oscillator to start vibrating; wherein the current magnitude of the current configurable amplifier cell is adjustable; the current configurable amplifier unit is composed of a transistor functioning as an amplification, a transistor functioning as a current source, and a transistor functioning as a switch; the current control signal connected with the grid electrode of the transistor functioning as a switch is realized through a programming program.
2. The circuit of claim 1, further comprising: and the signal amplifying and shaping unit is connected with the current configurable amplifier unit and is used for amplifying and shaping the input end signal of the crystal oscillator and outputting a vibration starting sign signal of the crystal oscillator.
3. The circuit of claim 2, further comprising: the starting unit is respectively connected with the bias current generating unit and the signal amplifying and shaping unit and is used for controlling the starting of the bias current generating unit under the control of the vibration starting sign signal.
4. A circuit according to claim 3, wherein the bias current generating unit comprises:
a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a second NMOS transistor, and a first resistor, wherein:
the first PMOS transistor is connected with the grid electrode of the second PMOS transistor, the source electrode of the first PMOS transistor is connected with the power supply to form a current mirror, and the drain electrode of the first PMOS transistor is connected with the first end of the first resistor and the gate electrode of the first NMOS transistor; the drain electrode of the second PMOS transistor is connected with the grid electrode of the second PMOS transistor and the drain electrode of the second NMOS transistor; the grid electrode of the second NMOS transistor is connected with the drain electrode of the first NMOS transistor and the second end of the first resistor, and the source electrode of the second NMOS transistor and the source electrode of the first NMOS transistor are grounded.
5. The circuit of claim 4, wherein the resistive element comprises:
a third PMOS transistor, a third NMOS transistor, a fourth NMOS transistor, and a fifth NMOS transistor formed by three NMOS transistors connected in series,
the grid electrode of the third PMOS transistor is connected with the grid electrode of the second PMOS transistor, the source electrode of the third PMOS transistor is connected with a power supply, and the drain electrode of the third PMOS transistor is connected with the grid electrode of the fifth NMOS transistor and the drain electrode and the grid electrode of the fourth NMOS transistor; the source electrode of the fourth NMOS transistor is connected with the drain electrode and the grid electrode of the third NMOS transistor; the source of the third NMOS transistor is grounded.
6. The circuit of claim 5, wherein the current configurable amplifier cell comprises:
a fourth PMOS transistor, a fifth PMOS transistor, a sixth PMOS transistor, an eighth PMOS transistor, a ninth PMOS transistor, a sixth NMOS transistor, a seventh NMOS transistor, an eighth NMOS transistor, a tenth NMOS transistor, and an eleventh NMOS transistor, wherein,
the source electrode of the fourth PMOS transistor is connected with a power supply, the grid electrode of the fourth PMOS transistor is connected with the grid electrode of the third PMOS transistor and the grid electrode of the fifth PMOS transistor, and the drain electrode of the fourth PMOS transistor is connected with the drain electrode of the sixth NMOS transistor, the drain electrode of the fifth NMOS transistor and the output end of the crystal oscillator; the grid electrode of the sixth NMOS transistor is connected with the source electrode of the fifth NMOS transistor and the input end of the crystal oscillator, and the source electrode is grounded; the source electrode of the eighth PMOS transistor is connected with a power supply, the grid electrode of the eighth PMOS transistor is connected with a current control signal, and the drain electrode of the eighth PMOS transistor is connected with the source electrode of the fifth PMOS transistor; the drain electrode of the fifth PMOS transistor is connected with the drain electrode of the seventh NMOS transistor and the output end of the crystal oscillator; the source electrode of the seventh NMOS transistor is connected with the drain electrode of the tenth NMOS transistor, and the grid electrode of the seventh NMOS transistor is connected with the grid electrode of the sixth NMOS transistor; the source electrode of the tenth NMOS transistor is grounded, and the grid electrode is connected with a current control signal; the source electrode of the ninth PMOS transistor is connected with a power supply, the grid electrode of the ninth PMOS transistor is connected with a current control signal, and the drain electrode of the ninth PMOS transistor is connected with the source electrode of the sixth PMOS transistor; the grid electrode of the sixth PMOS transistor is connected with the grid electrode of the fifth PMOS transistor, and the drain electrode of the sixth PMOS transistor is connected with the drain electrode of the eighth NMOS transistor and the output end of the crystal oscillator; the grid electrode of the eighth NMOS transistor is connected with the grid electrode of the seventh NMOS transistor, and the source electrode of the eighth NMOS transistor is connected with the drain electrode of the eleventh NMOS transistor; the gate of the eleventh NMOS transistor is connected with the current control signal, and the source is grounded.
7. The circuit of claim 6, wherein the signal amplifying and shaping unit specifically comprises:
a seventh PMOS transistor, a ninth NMOS transistor, a Schmitt trigger and a counter, wherein the source electrode of the seventh PMOS transistor is connected with a power supply, the grid electrode of the seventh PMOS transistor is connected with the grid electrode of the sixth PMOS transistor, and the drain electrode of the seventh PMOS transistor is connected with the input end of the Schmitt trigger and the drain electrode of the ninth NMOS transistor; the grid electrode of the ninth NMOS transistor is connected with the grid electrode of the eighth NMOS transistor, and the source electrode of the ninth NMOS transistor is grounded; the output end of the Schmitt trigger is connected with the input end of the counter, and the output end of the counter outputs a vibration starting sign signal.
8. The circuit of claim 7, wherein the start-up unit specifically comprises:
a tenth PMOS transistor, a twelfth NMOS transistor, and a thirteenth NMOS transistor, each of which is formed by three PMOS transistors connected in series,
the source electrode of the tenth PMOS transistor is connected with a power supply, the grid electrode of the tenth PMOS transistor is connected with the output end of the counter, and the drain electrode of the tenth PMOS transistor is connected with the grid electrode of the thirteenth NMOS transistor and the drain electrode of the twelfth NMOS transistor; the drain electrode of the thirteenth NMOS transistor is connected with the grid electrode of the first PMOS transistor, and the source electrode of the thirteenth NMOS transistor is grounded; the source electrode of the twelfth NMOS transistor is grounded, and the grid electrode is connected with the grid electrode of the first NMOS transistor.
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| CN110113032B (en) * | 2019-05-17 | 2023-06-02 | 芯翼信息科技(南京)有限公司 | Crystal oscillation control circuit and control method thereof |
| CN111585539A (en) * | 2020-04-26 | 2020-08-25 | 和芯星通（上海）科技有限公司 | Crystal oscillator circuit and control method thereof |
| CN112787661A (en) * | 2020-12-30 | 2021-05-11 | 湖南国科微电子股份有限公司 | Quick-oscillation-starting crystal oscillator driving circuit and integrated circuit |
| CN112600518B (en) * | 2021-01-06 | 2024-02-27 | 北京中科芯蕊科技有限公司 | Automatic amplitude control type crystal oscillator |
| CN115437453B (en) * | 2021-06-03 | 2024-06-28 | 上海艾为电子技术股份有限公司 | Bias circuit and self-biased OSC circuit |
| CN114019342B (en) * | 2022-01-05 | 2022-04-05 | 深圳佑驾创新科技有限公司 | Passive crystal oscillator test circuit |
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