CN101689539A - 半导体装置及其制造方法 - Google Patents
半导体装置及其制造方法 Download PDFInfo
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- CN101689539A CN101689539A CN200880022092A CN200880022092A CN101689539A CN 101689539 A CN101689539 A CN 101689539A CN 200880022092 A CN200880022092 A CN 200880022092A CN 200880022092 A CN200880022092 A CN 200880022092A CN 101689539 A CN101689539 A CN 101689539A
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Abstract
一种半导体装置包括半导体结构,设置有半导体基底和多个用于外部连接的电极(13),设置在半导体基底的下面。下层绝缘膜(1)设置在半导体结构的下面和周围。多个下层布线(22,22A)电连接到半导体结构的用于外部连接的电极,并且设置在下层绝缘膜的下面。绝缘层(31)设置在下层绝缘膜上,位于半导体结构的边缘中。上层绝缘膜(32)设置在半导体结构和绝缘层上。多个上层布线(33,33A)设置在上层绝缘膜上。半导体结构和绝缘层安装在其上的基板(51)被去除。
Description
技术领域
本发明涉及一种半导体装置及其制造方法,特别涉及一种具有内嵌(built-in)半导体结构的半导体装置及其制造方法。
背景技术
作为普通的半导体装置,已知一种芯片尺寸封装(CSP),如日本专利申请KOKAI公开No.2000-223518所公开的。该文献中公开的半导体装置可以通过下面的方式获得:在硅基底的下面提供多个柱状电极用于外部连接,并且在这种状态下密封柱状电极之间的间隙。在这种类型的CSP中,因为获得了与硅基底相同尺寸的半导体封装,使得半导体装置小型化,并且可以增大封装密度。但是,这种类型的普通半导体装置具有(扇入)结构,其中,用于外部连接的电极设置在半导体结构的平坦面积区域中。结果,在用于外部连接的电极的配置数目增大并且配置节距变得小于预定尺寸时,例如大约0.5um,这种类型的半导体装置不能应用。
因此,根据日本专利申请KOKAI公开No.2005-216935的装置采用了扇出(fan-out)结构,其中,称为CSP的半导体结构安装在基板上,该基板的平面尺寸大于相关的半导体结构,并且安装在这个基板上的半导体结构被密封膜覆盖,从而被密封,并且与基板的一个表面相对应的几乎整个区域被用作设置半导体结构的用于外部连接的电极的区域。在这种类型的结构下,可以保证足够大的区域来设置用于外部连接的电极,并且因此,即使当用于外部连接的电极非常大,用于外部连接的每个电极的尺寸和节距可以有效保证。
然而在上述普通半导体装置中,需要基板来安装半导体结构,并且使得整个装置变厚的这个基板带来了严重问题。
发明内容
本发明的目的是提供一种半导体装置,能够在半导体装置中具有小轮廓设计,它的用于外部连接的电极的安装区域大于半导体结构的平面表面尺寸,并提供过一种制造方法。
根据本发明另一个方面,提供一种制造半导体装置的方法,包括:在基板上形成下层绝缘膜;在下层绝缘膜上牢固固定多个半导体结构,其具有半导体基底和多个用于外部连接的电极,设置在半导体基底的下面;在下层绝缘膜上形成绝缘层,位于半导体结构的周围,并且在半导体结构和绝缘层上形成上层绝缘膜。该方法然后去掉基板;在下层绝缘膜的下面形成下层布线,与半导体结构的用于外部连接的电极相连,并且在上层绝缘膜上形成上层布线。之后,通过切割半导体结构之间的下层绝缘膜、绝缘层和上层绝缘膜,获得多个半导体装置。
根据本发明,设置用于外部连接的电极的区域可以制成比半导体结构的平面尺寸更大。另外,因为没有设置基板,半导体装置可以减小轮廓。
附图说明
图1是作为本发明第一实施例的半导体装置的剖视图;
图2是用于制造图1所示半导体装置的方法的一个实例中的初始步骤的剖视图;
图3是图2之后的步骤的剖视图;
图4是图3之后的步骤的剖视图;
图5是图4之后的步骤的剖视图;
图6是图5之后的步骤的剖视图;
图7是图6之后的步骤的剖视图;
图8是图7之后的步骤的剖视图;
图9是图8之后的步骤的剖视图;
图10的剖视图是用于解释图1所示半导体装置的制造方法的另一个实例中预定步骤;
图11是作为本发明第二实施例的半导体装置的剖视图;
图12是用于制造图11所示的半导体装置的方法的一个实例中的初始步骤的剖视图;
图13是图12之后的步骤的剖视图;
图14是图13之后的步骤的剖视图;
图15是图14之后的步骤的剖视图;
图16是图15之后的步骤的剖视图;
图17是图16之后的步骤的剖视图;
图18是图17之后的步骤的剖视图;
图19是作为本发明第三实施例的半导体装置的剖视图;
图20是作为本发明第四实施例的半导体装置的剖视图;
图21是用于制造图20所示半导体装置的方法的一个实例中的初始步骤的剖视图;
图22是作为本发明第五实施例的半导体装置的剖视图;
图23是作为本发明第六实施例的半导体装置的剖视图;
图24是作为本发明第七实施例的半导体装置的剖视图;
图25是作为本发明第八实施例的半导体装置的剖视图;
图26是用于制造图25所示半导体装置的方法的一个实例中初始步骤的剖视图;
图27是作为本发明第九实施例的半导体装置的剖视图;
图28是用于解释图27所示半导体装置的制造方法的剖视图。
具体实施方式
(第一实施例)
图1示出了作为本发明第一实施例的半导体装置的剖视图。该半导体装置包括平面方形的下层绝缘膜1,由环氧树脂、聚酰亚胺树脂、玻璃纤维基底环氧树脂等制成。在下层绝缘膜1的上表面的中间部分,半导体结构(半导体构成体)2通过粘附层3被安装,该层3由环氧树脂等制成。这种情况中,下层绝缘膜1的平面尺寸大于半导体结构2的平面尺寸。
半导体结构2装配有平面方形的硅基底(半导体基底)4。预定功能的集成电路(未示出)被装配在硅基底4的下表面4a上,并且在下表面的周边部分中,铝基金属等制成的多个连接焊盘(pad)5电连接到集成电路。硅氧化物等制成的绝缘膜6设置在连接焊盘5的下表面上,除了连接焊盘5的中间部分,以及在硅基底4的下表面上,并且连接焊盘5的中间部分通过设置在绝缘膜6中的开口7而暴露。
由聚酰亚胺树脂等制成的钝化膜(passivation film,保护膜)8设置在绝缘膜6的下表面上。开口或者通孔9设置在钝化膜8中,位于与绝缘膜6的开口7相对应的部分处。多个布线10设置在钝化膜8的下表面上。每个布线10具有金属底层11和金属上层12的两层结构,底层11由铜制成,设置在钝化膜8的下表面上,上层12由铜制成,设置在金属底层11的下表面上。每个布线10的一端通过绝缘膜6的开口7和钝化膜8的开口9电连接到连接焊盘5。
铜制成的柱状电极(用于外部连接的电极)13被设置在每个布线10的另一端上。在钝化膜8和布线10的下表面上,环氧树脂等制成的密封膜14以下面的方式设置:其下表面与柱状电极13的下表面平齐。通过将柱状电极13和密封膜14的下表面借助于环氧树脂等制成的粘附层3接合到下层绝缘膜1的上表面中间部分,这种类型结构的半导体结构2安装在下层绝缘膜1的上表面中间部分上。
多个开口或者通孔21形成在下层绝缘膜1和粘附层3中,位于与半导体结构2的柱状电极13的下表面中间部分相对应的部分中。多个下层布线22设置在下层绝缘膜1的下表面上。每个下层布线22具有金属底层23和金属上层24的双层结构,底层23由铜制成,设置在绝缘膜1的下表面上,上层24由铜制成,设置在金属底层23的下表面上。每个下层布线22的一个端部通过下层绝缘膜1和粘附层3的开口连接到半导体结构2的柱状电极13。
阻焊剂(solder resist)等制成的下层保护膜(overcoat film,涂覆膜)25设置在下层布线22和下层绝缘膜1的下表面上。多个开口26形成在下层保护膜25中,位于与下层布线22的其它端部或者连接焊盘部分相对应的部分中。通过连接到下层布线22的连接焊盘部分,多个焊球27设置在下层保护膜25的开口26内部和下侧。
绝缘层31设置在下层绝缘膜1的上表面上,在粘附层3和半导体结构2的周边周围。绝缘层31由环氧树脂、聚酰亚胺树脂、玻璃纤维基底环氧树脂等制成。在半导体结构2和绝缘层31的上表面上,设置有上层绝缘膜32,由与下层绝缘膜1相同的材料制成。
多个上层布线33设置在上层绝缘膜32的上表面上。每个上层布线33由两层结构制成:金属底层34,由铜制成,设置在上层绝缘膜32的上表面上,和金属上层35,由铜制成,设置在金属底层34的上表面上。阻焊剂等制成的上层保护膜36设置在上层布线33和上层绝缘膜32的上表面上。多个开口37形成在上层保护膜36中,位于与上层布线33的连接焊盘相对应的部分中。
下层布线22和上层布线33通过柱形竖直传导单元42电连接,该单元42设置在通孔41的内壁表面上,该通孔设置在下层绝缘膜1、绝缘层31和上层绝缘膜32的预定位置处。每个竖直传导单元42具有两层结构:金属底层43,由铜制成,直接设置在通孔41的内壁表面上,和金属上层44,由铜制成,设置在金属底层43的内表面上。阻焊剂等制成的填充材料45填充在竖直传导单元42的中央通孔中。
下面将描述用于制造该半导体装置的方法的一个实例。首先如图2,铜箔制成的基板51被制备,在其上表面上,环氧树脂、聚酰亚胺树脂、玻璃纤维基底环氧树脂等制成的下层绝缘膜1被形成。在这种情况中,制备的基板51的尺寸应当是可以形成多个图1所示完整半导体装置的尺寸。另外,下层绝缘膜1的由环氧树脂等制成的热固性树脂已经被硬化。
另外,半导体结构2被制备。半导体结构2可以通过下列方式获得:在形成处于晶片状态的硅基底4下面的集成电路(未示出)、铝基金属等制成的连接焊盘5、二氧化硅等制成的绝缘膜6、聚酰亚胺树脂等制成的钝化膜8、布线10(铜制成的金属底层11和铜制成的金属上层12)、铜制成的柱状电极13、和环氧树脂等制成的密封膜14等之后,通过切割而单个化(singulation)。
然后,通过利用环氧树脂等制成的粘附层3将半导体结构2的柱状电极13和密封膜14的下表面结合(粘合),每个半导体结构2安装在下层绝缘膜1的上表面上的半导体结构安装区域上。这种情况下,称为NCP(非传导胶)的胶状形式的粘结剂通过使用印刷过程、分配器等提前被供应到下层绝缘膜1的上表面的半导体结构安装区域,或者称为NCF(非传导膜)的片层形式的粘结剂被提前供应到该区域,并且半导体结构2通过热压着(heat-crimping)被牢固固定到下层绝缘膜1。
接下来如图3,格状的绝缘层形成片层31a通过真空抽吸单元等而被抽吸到半导体结构2和粘附层3周围的下层绝缘膜1的上表面,被XY工作台移动,定位和固定。固定是通过下面的方法进行的:利用例如销等穿过绝缘层形成片层31a进入片层31a的边缘处的下层绝缘膜1中。绝缘层形成片层31a通过下面方式形成:将环氧树脂等制成的热固性树脂浸入到玻璃纤维等形成的基底中,通过使得热固性树脂处于半硬化状态而形成片层形式,并且多个方形开口52通过冲孔等形成。片层31a中的每个开口52的尺寸略微大于相对应半导体结构2的尺寸。结果,间隙53形成在绝缘层形成片层31a的每个方形框架部分和半导体结构2之间。
然后,铜箔制成的子基板54设置在绝缘层形成片层31a的上表面上,在其下表面上,已经形成上层绝缘膜形成层32a。上层绝缘膜形成层32a由与下层绝缘膜1相同的材料形成,并且在材料中,环氧树脂等形成的热固性树脂被处于半硬化状态。
接下来如图4,利用一对热压板55和56,绝缘层形成片层31a和上层绝缘膜形成层32a从顶部和底部被热压。通过这个热压,片层31a被挤压,并且片层31a和层32a的热固性树脂被流化,并且填充到图3所示的间隙53中。然后它通过冷却而固化,并且绝缘层31形成在下层绝缘膜1的上表面上,在包括粘附层3的半导体结构2的周围中,并且同时,上层绝缘膜32形成在半导体结构2和绝缘层31的上表面上。
这种情况下,下层绝缘膜1的热固性树脂提前硬化,并且膜1因此几乎不会由于热或者压力而变形。另外,通过子基板54,可以防止构成上层绝缘膜形成层32a的热固性树脂不必要地粘附到上侧上的热压板55的下表面。结果,热压板55实际上可以再次使用。
然后,通过使用蚀刻剂移除基板51和子基板54将下层绝缘膜1的下表面暴露,如图5所示,并且同时,将上层绝缘膜32的上表面暴露。在这种情况下,即使基板51和子基板54被去除,由于下层绝缘膜1、绝缘层31和上层绝缘膜32的存在,可以充分确保强度。
然后如图6,开口21通过激光处理而形成,其在与半导体结构2的柱状电极13的下表面中间部分对应的部分中利用激光束照射下层绝缘膜1和粘附层3。另外,通孔41通过使用机械钻头而形成在下层绝缘膜1、绝缘层31、上层绝缘膜32的预定位置中。
如图7,在通过下层绝缘膜1和粘附层3的开口21露出的半导体结构2的柱状电极13的下表面上,以及下层绝缘膜1的整个下表面,以及在上层绝缘膜32的整个上表面以及通孔41的内壁表面上,金属底层23、34和43通过化学镀铜被形成。金属底层23、34和43是整体的,从而它们电连接。然后,通过执行铜电解电镀,其中金属底层23、34、43用作电镀电流路径,金属上层24、35和44形成在金属底层23、34、43的表面上。
接下来,通过光刻对金属上层或者内层24、35和金属底层或者外层23、34进行布图产生图8所示的状态。也就是,层状金属底层23、24组成的两层结构的下层布线22形成在下层绝缘膜1的下表面上。另外,层状底层34、35形成的两层结构的上层布线33形成在上层绝缘膜32的上表面上。另外,金属底层43和金属上层44形成的两层结构的竖直传导单元42形成在通孔41的内壁表面上。
接下来,如图9,通过丝网印刷方法、旋压覆盖法方法等,阻焊剂等制成的下层保护膜25形成在下层绝缘膜1和下层布线22的下表面上。另外,在上层绝缘膜32和上层布线33的上表面上,阻焊剂等制成的上层保护膜36通过丝网印刷方法、旋压覆盖法方法等形成。在这种状态下,竖直传导单元42的内部被填充材料45填充,该材料由阻焊剂等形成。
接下来,开口26通过激光处理形成在下层保护膜25中,位于与下层布线22的连接焊盘相对应的部分处,激光处理用于利用激光束照射膜。另外,在上层保护膜36上,在与上层布线33的连接焊盘相对应的部分处,开口37通过激光处理而形成,激光处理用于利用激光束照射膜。
接下来,在下层保护膜25的每个开口26的内部和底侧上,焊球(焊料层)27被设置以与下层布线22的连接焊盘相连。然后,在靠近彼此的半导体结构2之间,切割下层保护膜25、下层绝缘膜1、绝缘层31、上层绝缘膜32和上层保护膜36可以产生多个图1所示的半导体装置。
在这样获得的半导体装置中,下层布线22被设置成在下层绝缘膜1的下面与半导体结构2的柱状电极13相连,其设置在半导体结构2的下面和周围。因此,用于设置焊球(用于外部连接的电极)27的区域可以制成比半导体结构2的平面尺寸更大,并且另外,因为没有装配基板51,半导体装置可以薄型化(low-profiled)。注意,基板51可以由铝和其它金属形成。
(第一实施例的变形实施例)
注意,图7所示的步骤中,在形成金属底层23、34、43之后,图10所示的状态可以实现。也就是,在金属底层23的下表面和金属底层34的上表面上,分别通过布图形成电镀抗蚀(plated resist)膜57和58。这种情况下,开口59形成在电镀抗蚀膜57中,位于与包括通孔41的金属上层24形成区域相对应的部分处。另外,开口60形成在电镀抗蚀膜58中,位于与包括通孔41的金属上层35形成区域相对应的部分处。
接下来,通过进行铜电解电镀,其中金属底层23、34和43用作电镀电流路径,金属上层24形成在金属底层23的下表面上,在电镀抗蚀膜57的开口59中,并且金属上层35形成在金属底层34的上表面上,位于电镀抗蚀膜58的开口60内,并且另外,金属上层44形成在金属底层43的下表面上,位于通孔41内。
接下来,电镀抗蚀膜57、58被去除,然后金属底层23、34的不需要的部分被蚀刻和去掉,其中金属上层24、35被用作掩膜。然后如图8,金属底层23仅保持在金属上层24上,金属底层34仅保持在金属上层35的下面。另外,在这种情况,包括金属底层43和金属上层44的两层结构的竖直传导单元42形成在通孔41的内壁表面上。
(第二实施例)
图11是作为本发明第二实施例的半导体装置的剖视图。在这个半导体装置中,与图1所示半导体装置的区别之处在于下层布线22和上层布线33,每个下层布线22形成为三层结构:第一金属底层(下层金属底层)23a,由铜制成;第二金属底层(另一个下层金属底层)23b,由铜制成;和金属上层(下层金属上层)24,由铜制成,每个上层布线33形成为三层结构:第一金属底层(上层金属底层)34a,由铜制成,第二金属底层(另一上层金属底层)34b,由铜制成,和金属上层(上层金属上层)35,由铜制成。这种情况中,开口21形成在第一金属底层23a、下层绝缘膜1和粘附层3中,在与半导体结构2的柱状电极13的下表面中间部分相对应的部分中。
下面描述用于制造这个半导体装置的方法的一个实例。首先如图12,基底或者单元被制备,其中,在铜箔制成的基板51的上表面上,化学镀镍制成的保护金属层(下层保护金属层)61、化学镀铜制成的第一金属底层23a、和环氧树脂、聚酰亚胺树脂、玻璃纤维基底环氧树脂等制成的下层绝缘膜1被形成。
同样在这种情况中,这个制备的基底的平面尺寸可以形成多个图11所示的完成的半导体装置。另外,下层绝缘膜1中环氧树脂等制成的热固性树脂已经被硬化。这种情况中,第一金属底层23a的上表面通过下面方式粗糙化:提前执行表面粗糙化处理,从而增大到下层绝缘膜1的附着,该下层绝缘膜由包括形成在上表面上的树脂的材料制成。这是与上述第一实施例极大不同之处。现在,作为表面粗糙化处理的一个实例,用于将第一金属底层23a的上表面浸入到适合的蚀刻剂中的方法被提到。通过表面粗糙化处理形成的表面粗糙度可以通过蚀刻剂材料来调节。然而,表面粗糙化处理不应当被限制到这个方法,而是可以通过干蚀刻和其它方法来实施。
接下来,通过借助环氧树脂等制成的粘附层3将柱状电极13和半导体结构2的密封膜14的下表面结合,半导体结构2安装在下层绝缘膜1的上表面的半导体结构安装区域上。这种情况中,利用印刷方法、分配器等,称为NCP(非传导胶)的胶状粘结剂,或者称为NCF(非传导膜)的片状粘结剂被提前供应,并且半导体结构2通过热压着牢固固定到下层绝缘膜1。
接下来如图13,利用销等,将格状的绝缘层形成片层31a定位和固定在下层绝缘膜1的上表面,在粘附层3和半导体结构2的周围中。同样在这种情况中,绝缘层形成片层31a通过下面方法形成:将环氧树脂等制成的热固性树脂浸入到玻璃纤维等制成的基底中,使得热固性树脂处于半硬化状态,并且使其形成片状,并且多个方形开口52通过冲孔等形成。绝缘层形成片层31a的开口52的平面尺寸形成为略微大于位于其中的半导体结构2的尺寸。片层31a的厚度被设置为略微厚于半导体结构2。结果,间隙53形成在片层31a中的开口52内侧和半导体结构2之间。
接下来,在绝缘层形成片层31a的上表面上,铜箔制成的子基板54被设置,在其底面上,化学镀镍制成的保护金属层(上层保护金属层)62、化学镀铜形成的第一金属底层34a和上层绝缘膜形成层32a已经形成。同样在这种情况中,上层绝缘膜形成层32a由与下层绝缘膜1相同的材料形成,它的由环氧树脂等制成的热固性树脂被处于半硬化状态。现在,第一金属底层34a的下表面通过提前执行表面粗糙化处理而被粗糙化,从而提高到上层绝缘膜32的粘附,其由包括在相关下表面上形成的树脂的材料制成。这是与第一实施例极大区别之处。
接下来,如图14,使用一对热压板55、56,绝缘层形成片层31a和上层绝缘膜形成层32a从顶部和底部被热压。通过这个热压,绝缘层形成片层31a和上层绝缘膜形成层32a中的热固性树脂被流体化,填充在图13所示的间隙53中和半导体结构2的上表面和膜形成片层32a的下表面之间的间隙中,并且通过随后的冷却而固化。因此,在下层绝缘膜1上,在半导体结构2和粘附层3的周围中,绝缘层31形成,并且同时,在半导体结构2和绝缘层31的上表面上,上层绝缘膜32形成。
接下来,通过使用蚀刻剂持续地移除基板51和保护金属层61,以及子基板54和保护金属层62,将第一金属底层23a的下表面暴露,并且同时,暴露第一金属底层34a的上表面,如图15。这种情况中,当均由铜制成的基板51和子基板54通过铜蚀刻剂被去除时,镍制成的保护金属层61和62用于以相同的方式保护铜制成的第一金属底层23a和34a防止被蚀刻。在去除基板51和子基板54之后,保护金属层61和62通过Ni蚀刻剂去除,但是同样在这种情况中,铜制成的第一金属底层23a和34a没有被蚀刻。这种情况下,密封所述半导体结构2的绝缘层31、上层绝缘膜32和下层绝缘膜1已经被硬化。因此,即使基板51、保护金属层61、子基板54和保护金属层62被去除,可以充分地确保强度。
接下来如图16,开口或孔21通过激光加工形成,激光加工利用激光束照射第一金属底层23a、下层绝缘膜1和粘附层3,在与半导体结构2的柱状电极13的下表面中间部分相对应的部分中。另外,通孔41通过使用机械钻头而形成在第一金属底层23a、下层绝缘膜1、绝缘层31、上层绝缘膜32和第一金属底层34a的预定位置中。
同样如图17,在第一金属底层23a整个的下表面上、在通过开口21暴露的半导体结构2的柱状电极13的下表面上、第一金属底层34a的整个上表面和通孔41的内壁表面上,金属底层23b、34b和43通过化学镀铜整体形成。然后,通过执行铜电解电镀,其中金属底层23b、34b和43用作电镀电流路径,金属上层24、35和44分别形成在金属底层23b、34b和43的表面上。
接下来,通过光刻来对金属上层24和35和第一和第二金属底层23a、34a、23b和34b进行布图,产生了图18所示的状态。也就是,在下层绝缘膜1的下表面上,三层结构的下层布线22形成,每个三层结构包括:第一和第二金属底层23a和23b以及金属上层24。另外,在上层绝缘膜32的上表面上,三层结构的上层布线33被形成,三层结构均包括第一和第二金属底层34a和34b以及金属上层35。另外,在每个通孔41的内壁表面上,两层结构的竖直传导单元42形成,两层结构包括金属底层43和金属上层44。之后,经历与第一实施例中相同的过程,可以产生多个图11所示的半导体装置。
(第三实施例)
图19是本发明第三实施例的半导体装置的剖视图。这个半导体装置与图1所示的半导体装置的区别之处在于:下层布线和上层布线形成为多层(两层)布线结构。也就是,设置在第一下层绝缘膜1A的下表面上的第一下布线22A的一个端部通过第一下层绝缘膜1A和粘附层3中设置的开口21A电连接到半导体结构2的柱状电极13。在包括第一下层布线22A的第一下层绝缘膜1A的下表面上,设置有第二下层绝缘膜1B,由与第一下层绝缘膜1A相同的材料制成。
第二下层绝缘膜1B的下表面上设置的第二下层布线22B的一个端部通过第二下层绝缘膜1B上设置的开口21B连接到第一下层布线22A的连接焊盘。在第二下层绝缘膜1B和第二下层布线22B的下表面上,设置有下层保护膜25。在下层保护膜25的开口26内部和下部中,焊球27设置成与第二下层布线22B的连接焊盘电连接。
多个第一上层布线33A,设置在第一上层绝缘膜32A的上表面上,通过竖直传导单元42电连接到相对应的第一下层布线22A。在上层绝缘膜32A和第一上层布线33A的上表面上,设置第二上层绝缘膜32B,由与第一上层绝缘膜32A相同的材料制成。
第二上层绝缘膜32B的上表面上设置的多个第二上层布线33B的每一个的一个端部通过第二上层绝缘膜32B中设置的开口71连接到第一上层布线33A的连接焊盘。在第二上层绝缘膜32B和第二上层布线33B的上表面上,上层保护膜36被设置。开口37设置在上层保护膜36中,位于与第二上层布线33B的连接焊盘相对应的部分中。注意,每个下层布线和上层布线可具有三层或者更多层布线结构。
(第四实施例)
图20是作为本发明第四实施例的半导体装置的剖视图。这个半导体装置中与图1所示半导体装置的极大区别之处在于:第二下层布线22B设置在下层绝缘膜1的上表面上,位于半导体结构2的周边中,并且第二上层布线33B设置在上层绝缘膜32的下表面上。
下层绝缘膜1的下表面上设置的第一下层布线22A通过下层绝缘膜1中形成的开口72连接到第二下层布线22B的连接焊盘。上层绝缘膜32的上表面上设置的第一上层布线33A通过上层绝缘膜32中形成的开口73连接到第二上层布线33B的连接焊盘。注意,这种情况下,半导体结构2的硅基底4的上表面通过粘附层74接合到上层绝缘膜32的下表面中间部分和第二上层布线33B。
接下来参考图21,描述用于制造图20的这个半导体装置的方法的一个实例中的初始步骤。这种情况中,在形成在基板51的上表面上的下层绝缘膜1的上表面上,每个两层结构的第二下层布线22B形成,两层结构包括化学镀铜形成的金属底层和电镀铜形成的金属上层。在子基板54的下表面上形成的上层绝缘膜32中由环氧树脂等形成的热固性树脂已经被硬化。在上层绝缘膜32的底面上,每个两层结构的第二上层布线33B形成,两层结构包括化学镀铜形成的金属底层和电解铜电镀形成的金属上层。
现在,在初始步骤,首先,通过利用粘附层3来接合半导体结构2的柱状电极13和密封膜14的下表面,半导体结构2安装在下层绝缘膜1的上表面上的半导体结构安装区域上。然后在下层绝缘膜1和第二下层布线22B的上表面上,在半导体结构2和粘附层3的周边中,栅格状的绝缘层形成片层31a被固定。
然后,在半导体结构2的硅基底4的上表面上,利用分配器等,环氧树脂等形成的液体形式的接合材料74a被施加。接下来,在绝缘层形成片层31a的上表面上,子基板54被设置,在其下表面上,上层绝缘膜32和第二上层布线33B已经形成。接下来,利用一对热压板,产生的单元从顶部和底部被热压,并且之后,经历与第一实施例中相同的步骤,并且获得多个图20所示的半导体装置。
在这样获得的半导体装置中,与图19所示的半导体装置相比,即使当下层布线和上层布线被制成两层布线结构时,因为下层绝缘膜和上层绝缘膜被形成单层,半导体装置可以通过那样被薄型化。注意,在利用一对热压板进行热压的过程中,如果绝缘层形成片层31a中流体化的热固性树脂满意的进入半导体结构2的硅基底4的上表面的话,粘附层74可以省略。
(第五实施例)
图22是作为本发明第五实施例的半导体装置的剖视图。这个半导体装置中与图1所示半导体装置的极大区别在于:半导体结构2不具有密封膜14。结果,这种情况中,布线10的下表面,柱状电极13,和半导体结构2的钝化膜8,通过粘附层3直接接合到下层绝缘膜1的上表面中间部分。下层布线22的一个端部通过下层绝缘膜1和粘附层3中的开口21连接到半导体结构2的柱状电极13。
(第六实施例)
图23是作为本发明第六实施例的半导体装置的剖视图。这个半导体装置中与图22所示半导体装置的区别在于:半导体结构2没有装配柱状电极13。结果,这种情况中,钝化膜8的下表面和半导体结构2的布线10通过粘附层3接合到下层绝缘膜1的上表面中间部分。下层布线22的一个端部通过下层绝缘膜1和粘附层3的开口21连接到半导体结构2的布线(用于外部连接的电极)10的连接部。
(第七实施例)
图24是作为本发明第七实施例的半导体装置的剖视图。这个半导体装置中与图23所示的半导体装置的区别在于:在钝化膜8和半导体结构2的布线10的下表面上,设置有由绝缘材料例如聚酰亚胺树脂或者环氧树脂制成的用于静电保护的钝化膜86。结果,这种情况中,半导体结构2的防静电钝化膜86的下表面通过粘附层3接合到下层绝缘膜1的上表面中间部分。下层布线22的一个端部通过下层绝缘膜1、粘附层3和钝化膜86的开口21连接到半导体结构2的布线10的连接焊盘。
注意,在半导体结构2安装在下层绝缘膜1上之前,没有开口21形成在钝化膜86中。不具有开口21的钝化膜86保护在硅基底4下面形成的集成电路防止静电,因为钝化膜本身形成在晶片状态的硅基底4下面,直到半导体结构2安装在下层绝缘膜1上。
(第八实施例)
图25是作为本发明第八实施例的半导体装置的剖视图。这个半导体装置中与图1所示半导体装置的极大不同在于:半导体装置不具有竖直传导单元42。这个实施例中,在半导体结构2周围,方形框架形状和双侧布线结构的电路基板81被设置,并且顶部和底部布线被允许通过在这个电路基底上设置的传导层而传导。
也就是,电路基底81装配有方形框架形状的基底82,该基底由玻璃纤维基底环氧树脂等制成。多个第二下层布线(中间布线)22C,由铜箔制成,设置在基底82的下表面上,多个第二上层布线(中间布线)33C,由铜箔制成,设置在其上表面上。第二下层布线22C和第二上层布线33C通过竖直传导单元83连接,该单元83由设置在基底82内部上的导电胶等制成。
具有中央矩形开口的电路基底81以一定间隔设置在半导体结构2周围,其处于被结合(merge)到绝缘层31的上侧的状态中,并且绝缘层31设置在电路基底81和下层绝缘膜1之间,并且在电路基底81和半导体结构2之间。上层绝缘膜32设置在半导体结构2、电路基底81和绝缘层31的上表面上。
第一下层布线22A,设置到下层绝缘膜1的下表面,通过下层绝缘膜1和绝缘层31中形成的开口84电连接到第二下层布线22C的连接焊盘。第一上层布线33A,设置在上层绝缘膜32的上表面上,通过上层绝缘膜32中形成的开口85连接到第二上层布线33C的连接焊盘。
接下来参考图26,描述用于制造图25的这个半导体装置的方法的一个实例中的初始步骤。首先,通过利用粘附层3接合半导体结构2的柱状电极13和密封膜14的下表面,半导体结构2安装在下层绝缘膜1的上表面的半导体结构安装区域上。然后,栅格状的绝缘层形成片层31a设置在下层绝缘膜1的上表面上,位于粘附层3和半导体结构2的周围。
接下来,格状的电路基底81设置在绝缘层形成片层31a的上表面上。然后,在电路基底81的上表面上,子基板54被设置,在其下表面上,已经形成上层绝缘膜形成层32a。接下来,利用一对热压板,产生的单元从顶部和底部被热压,并且之后,经历与第一实施例相同的处理(然而除了竖直传导单元41形成过程或者电路基底81在切割过程中被切割),可以产生多个图25所示的半导体装置。
(第九实施例)
图27是作为本发明第九实施例的半导体装置的剖视图。这个半导体装置中与图21所示半导体装置的极大区别在于:电路基底81嵌入在绝缘层31的中间部分中,并且整个半导体装置的绝缘层的数目相对于电路基底81的全厚度(through-thickness)的中间部是对称的。
也就是,绝缘层31包括下侧绝缘层31A和上侧绝缘层31B,具有相同厚度,并且电路基底81具有它们的全厚度中间部,允许与下侧绝缘层31A和上侧绝缘层31B之间的边界面重合。另外,半导体结构2的硅基底4的上表面通过粘附层74a接合到上层绝缘膜32。为了获得这种类型的半导体装置,如图28,下侧绝缘层形成片层31a(图28中31A所示的)设置在下层绝缘膜1的上表面上,然后,栅格状的电路基底81设置在下侧绝缘层形成片层31A上。然后,格状的上侧绝缘层形成片层31B设置在电路基底81的上表面上,并且由环氧树脂等制成的液体形式的粘结材料74a通过使用分配器等施加在半导体结构2的硅基底4的上表面上。接下来,在上侧绝缘层形成片层31B的上表面上,铜箔制成的子基板54被设置,在其下表面上,上层绝缘膜32被形成;然后,获得图28的状态。之后,与其它实施例中一样,使用一对热压板55和56,下侧绝缘层形成片层31Aa、上侧绝缘层形成片层31B、和粘附材料74a从产生的单元的顶部和底部被热压。注意,在上述实施例中,是对于两个绝缘层形成片层形成的绝缘层31进行的描述,但是绝缘层31可以不通过两个片层形成,而是可以通过使得多个绝缘层形成片层层叠(laminating)而形成。无论使用多少绝缘层形成片层,适合的是电路基底81设置有全厚度中间部,允许与绝缘层31的全厚度中间部重合。另外,适合的是整个半导体装置不仅相对于电路基底81的全厚度中间部具有相同数目的绝缘层,而且具有相同厚度的每个相对应绝缘层。
(其它变形实例)
第八和第九实施例中所示的电路基底81嵌入绝缘层31中的结构,同样可用于第二到第七实施例。另外,本发明的半导体装置及其制造方法可以进行各种变形并且可根据它们的目的而应用。
另外的优点和变形对于本领域技术人员将是显而易见的。因此,本发明广义上不限于这里所示和所述的具体细节和代表性实施例。因此,在不脱离权利要求和它们等效物限定的大致发明概念的精神和范围的情况下,可以做出各种变化。
Claims (36)
1.一种半导体装置,包括:
半导体结构(2),具有半导体基底(4)和设置在半导体基底下面的多个用于外部连接的电极(13);
下层绝缘膜(1),设置在半导体结构的下面和周围;
多个下层布线(22,22A),电连接到半导体结构的用于外部连接的电极,并且设置在下层绝缘膜的下面;
绝缘层(31),设置在下层绝缘膜上,位于半导体结构的周围;
上层绝缘膜(32),设置在半导体结构和绝缘层上;和
多个上层布线(33,33A),设置在上层绝缘膜上,
其中下层绝缘膜安装在其上的基板(51)被去除。
2.如权利要求1所述的半导体装置,其特征在于,半导体结构通过粘附层(3)结合到下层绝缘膜。
3.如权利要求1所述的半导体装置,其特征在于,竖直传导单元(42)设置在通孔(41)中以与下层布线和上层布线电连接,该通孔形成在下层绝缘膜、绝缘层和上层绝缘膜中。
4.如权利要求1所述的半导体装置,其特征在于,另一个下层布线(22B)设置成与半导体结构周围的下层绝缘膜的上表面上的每个下层布线电连接,并且另一个上层布线(33B)设置成与上层绝缘膜的下表面上的每个上层布线电连接。
5.如权利要求4所述的半导体装置,其特征在于,半导体结构通过粘附层(74)结合到上层绝缘膜的下表面。
6.如权利要求1所述的半导体装置,其特征在于,还包括电路基底(81),该基底设置有另一个下层布线(22C)和另一个上层布线(33C),并且具有竖直传导单元(83),电连接所述另一个下层布线(22C),另一个上层布线(33C)设置在绝缘层(31)的上部上,在半导体结构的周围,其中下层布线(22A)电连接到所述另一个下层布线(22C),并且上层布线(33A)电连接到所述另一个上层布线(33C)。
7.如权利要求6所述的半导体装置,其特征在于,电路基底的上表面与绝缘层(31)的电路基底(81)不设置在其上的上表面部分是齐平的。
8.如权利要求1所述的半导体装置,其特征在于,还包括电路基底(81),该基底设置有另一个下层布线(22C)和另一个上层布线(33C),并且具有竖直传导单元(83),电连接所述另一个下层布线(22C)和另一个上层布线(33C),其设置在绝缘层(31)内,位于半导体结构周围,其中下层布线(22A)电连接到所述另一个下层布线(22C),并且上层布线(33A)电连接到所述另一个上层布线(33C)。
9.如权利要求8所述的半导体装置,其特征在于,绝缘层(31)通过使得多个片层层叠而构成,并且电路基底(81)设置成它的全厚度中间部被允许与绝缘层(31)的全厚度中间部相重合。
10.如权利要求8所述的半导体装置,其特征在于,绝缘层(31)通过下面方式构造:将上侧绝缘层片层(31B)和下侧绝缘层片层(31A)层叠,并且电路基底(81)嵌入到上侧绝缘层片层和下侧绝缘层片层中。
11.如权利要求1所述的半导体装置,其特征在于,还包括下层保护膜(25),具有开口(26),位于与下层布线的连接部相对应的部分中,在包括下层布线的下层绝缘膜的下面。
12.如权利要求11所述的半导体装置,其特征在于,还包括位于下层保护膜的开口内和下面的焊料层(27),该焊料层设置成与下层布线的连接焊盘相连。
13.如权利要求1所述的半导体装置,其特征在于,下层布线(22A)和上层布线(33A)具有多层布线结构。
14.如权利要求13所述的半导体装置,其特征在于,下层绝缘膜(1)具有位于其上表面上的第二下层布线(22B)。
15.如权利要求14所述的半导体装置,其特征在于,下层布线(22A)和第二下层布线(22B)中,仅下层布线(22A)直接连接到竖直传导单元。
16.如权利要求1所述的半导体装置,其特征在于,上层绝缘膜(32)具有位于其下表面上的第二上层布线(33B)。
17.如权利要求1所述的半导体装置,其特征在于,半导体结构具有密封膜(14),设置在半导体基底下面的用于外部连接的电极之间。
18.如权利要求1所述的半导体装置,其特征在于,半导体结构具有粘附层(3),设置在半导体基底下面的用于外部连接的电极之间。
19.一种半导体装置,包括:
半导体结构(2),具有半导体基底(1)和设置在半导体基底下面的多个用于外部连接的电极(13);
下层绝缘膜(1),设置在半导体结构的下面和周围;
下层绝缘层(31A)和上层绝缘层(31B),设置在下层绝缘膜的上侧上,位于半导体结构的周围;
电路基底(81),设置在下层绝缘层和上层绝缘层之间,并具有多个中间布线(22C和33C);
多个下层布线(22A),设置在下层绝缘膜的下面以与半导体结构的用于外部连接的电极以及电路基底的中间布线相连接,并且上层绝缘膜(32)设置在半导体结构和上层绝缘层上;和
多个上层布线(33A),设置在上层绝缘膜上以与电路基底的中间布线相连;
其中,下层绝缘膜安装在其上的基板被去除。
20.如权利要求19所述的半导体装置,其特征在于,电路基底(81)的中间布线(22B和33B)形成在电路基底的上表面和下表面上,电路基底还具有竖直传导单元(83),其连接形成在上表面和下表面上的中间布线。
21.一种用于制造半导体装置的方法,包括下列步骤:
在基板(51)上形成下层绝缘膜(1);
在下层绝缘膜上固定多个半导体结构(2),每个所述半导体结构都具有半导体基底(4)和多个设置在半导体基底(4)下面的用于外部连接的电极(13);
在半导体结构的周围,在下层绝缘膜上形成绝缘层(31a),并且在半导体结构和绝缘层上形成上层绝缘膜(32a);
移除基板(51);
在下层绝缘膜的下面形成下层布线(22和22A),与半导体结构的用于外部连接的电极相连,并且在上层绝缘膜上形成上层布线(33和33A);和
通过切割半导体结构之间的下层绝缘膜、绝缘层和上层绝缘膜,获得多个半导体装置。
22.如权利要求21所述的用于制造半导体装置的方法,其特征在于,将所述多个半导体结构固定在下层绝缘膜上的步骤包括下列子步骤:将液体形式的粘附材料(3)提前供应到下层绝缘膜上,并且将半导体结构热压到下层绝缘膜上。
23.如权利要求21所述的用于制造半导体装置的方法,其特征在于,将所述多个半导体结构固定在下层绝缘膜上的步骤包括下列子步骤:将片层形式的粘附材料(3)提前供应到下层绝缘膜上,并且将半导体结构热压到下层绝缘膜上。
24.如权利要求21所述的用于制造半导体装置的方法,其特征在于,形成下层布线和上层布线的步骤包括下列子步骤:在下层绝缘膜、绝缘层和上层绝缘膜中形成通孔(21),并且在通孔内形成竖直传导单元,以与下层布线和上层布线相连。
25.如权利要求21所述的用于制造半导体装置的方法,其特征在于,还包括下列步骤:在下层绝缘膜上的半导体结构安装区域周围,提前形成另一个下层布线(22B),以及提前在上层绝缘膜的下面形成另一个上层布线(33B),下层布线形成为与所述另一个下层布线相连,并且上层布线形成为与上层绝缘膜上的所述另一个上层布线相连。
26.如权利要求21所述的用于制造半导体装置的方法,其特征在于,形成绝缘层和上层布线的步骤包括下列子步骤:设置电路基底(81),具有另一个下层布线(22C)、另一个上层布线(33C)和竖直传导单元,其在上层布线的下面并且在半导体结构的周围连接绝缘层上的布线,并且下层布线形成为连接到所述另一个下层布线,上层布线形成为连接到上层绝缘膜上的所述另一个上层布线。
27.如权利要求21所述的用于制造半导体装置的方法,其特征在于,上层绝缘膜初始形成在子基板(54)的下面,并且去除基板的步骤包括去除子基板的步骤。
28.如权利要求21所述的用于制造半导体装置的方法,其特征在于,在基板上形成下层绝缘膜的步骤包括下列步骤:在基板上形成下层保护金属层(61)和下层金属底层(23a),并且在下层金属底层(23a)上形成下层绝缘膜。
29.如权利要求28所述的用于制造半导体装置的方法,其特征在于,在半导体结构和绝缘层上形成上层绝缘膜(32a)的步骤包括下列步骤:在子基板(54)的下面形成上层保护金属层(62)和上层金属底层(34a),并且在上层金属底层(34a)的下面形成上层绝缘膜。
30.如权利要求29所述的用于制造半导体装置的方法,其特征在于,去除基板和子基板的步骤包括下列步骤:去除下层保护金属层和上层保护金属层。
31.如权利要求29所述的用于制造半导体装置的方法,其特征在于,在下层金属底层(23a)上形成下层绝缘膜的步骤包括下列步骤:提前给下层金属底层的上表面进行表面粗糙化处理,并且在上层金属底层(34a)的下面形成上层绝缘膜的步骤包括下列步骤:提前给上层金属底层的下表面执行表面粗糙化处理。
32.如权利要求21所述的用于制造半导体装置的方法,其特征在于,形成下层布线(22)的步骤包括下列步骤:通过电镀,在下层绝缘膜(1)的下面顺序形成下层金属底层(23a),另一个下层金属底层(23b),和下层金属上层(24)。
33.如权利要求32所述的用于制造半导体装置的方法,其特征在于,形成上层布线(33)的步骤包括下列步骤:通过电镀,在上层绝缘膜(32)上顺序形成上层金属底层(34a)、另一个上层金属底层(34b)和上层金属上层(35)。
34.如权利要求33所述的用于制造半导体装置的方法,其特征在于,基板、下层金属底层、另一个下层金属底层、下层金属上层、子基板、上层金属底层、另一个上层金属底层和上层金属上层由铜制成,并且下层保护金属层和上层保护金属层由镍制成。
35.一种用于制造半导体装置的方法,包括下列步骤:
在基板(51)上形成下层绝缘膜(1);
在下层绝缘膜上固定多个半导体结构(2),每个半导体结构都具有半导体基底(4)和设置在半导体基底下面的多个用于外部连接的电极(13);
在下层绝缘膜的上侧上形成下侧绝缘层(31A)和上侧绝缘层(31B),位于半导体结构的周围,在下侧绝缘层和上侧绝缘层之间提供电路基底(81),该电路基底具有中间布线(22C和33C),并且在半导体结构和上侧绝缘层上形成上层绝缘膜(32);
从下层绝缘膜(1)移除基板;
在下侧绝缘膜的下面形成下层布线(22A),以连接到半导体结构的用于外部连接的电极和电路基底的中间布线(22C),并且在上层绝缘膜上形成上层布线(33A),将连接到电路基底的中间布线(33C);和
切割半导体结构之间的下层绝缘膜、下层绝缘层、电路基底、上层绝缘层和上层绝缘膜,并且获得多个半导体装置。
36.如权利要求35所述的用于制造半导体装置的方法,其特征在于,电路基底的中间布线形成在电路基底的上表面和下表面上,电路基底具有竖直传导单元(83),其连接形成在上表面和下表面上的中间布线。
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JP2007206067A JP2009043858A (ja) | 2007-08-08 | 2007-08-08 | 半導体装置およびその製造方法 |
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JP250952/2007 | 2007-09-27 | ||
JP2007250952A JP5042762B2 (ja) | 2007-09-27 | 2007-09-27 | 半導体装置 |
PCT/JP2008/064559 WO2009020240A2 (en) | 2007-08-08 | 2008-08-07 | Semiconductor device and method for manufacturing the same |
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EP (1) | EP2176883A2 (zh) |
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CN106024657A (zh) * | 2016-06-24 | 2016-10-12 | 南通富士通微电子股份有限公司 | 一种嵌入式封装结构 |
CN110391194A (zh) * | 2018-04-19 | 2019-10-29 | 奥特斯奥地利科技与***技术有限公司 | 具有内插功能的封装集成电路以及用于制造这种封装集成电路的方法 |
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CN104681520A (zh) * | 2013-09-26 | 2015-06-03 | 通用电气公司 | 嵌入式半导体装置封装及其制造方法 |
CN106024657A (zh) * | 2016-06-24 | 2016-10-12 | 南通富士通微电子股份有限公司 | 一种嵌入式封装结构 |
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KR20100009639A (ko) | 2010-01-28 |
US8268674B2 (en) | 2012-09-18 |
WO2009020240A3 (en) | 2009-05-22 |
US20090039514A1 (en) | 2009-02-12 |
KR101161061B1 (ko) | 2012-07-02 |
TWI384595B (zh) | 2013-02-01 |
US20100317154A1 (en) | 2010-12-16 |
TW200915501A (en) | 2009-04-01 |
WO2009020240A2 (en) | 2009-02-12 |
EP2176883A2 (en) | 2010-04-21 |
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