CN101548375A - Semiconductor device and method for manufacturing the same - Google Patents
Semiconductor device and method for manufacturing the same Download PDFInfo
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- CN101548375A CN101548375A CN200780045004.XA CN200780045004A CN101548375A CN 101548375 A CN101548375 A CN 101548375A CN 200780045004 A CN200780045004 A CN 200780045004A CN 101548375 A CN101548375 A CN 101548375A
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- 238000000034 method Methods 0.000 title claims abstract description 113
- 239000004065 semiconductor Substances 0.000 title claims abstract description 90
- 238000004519 manufacturing process Methods 0.000 title claims description 62
- 239000010949 copper Substances 0.000 claims abstract description 126
- 229910003481 amorphous carbon Inorganic materials 0.000 claims abstract description 110
- 229910052802 copper Inorganic materials 0.000 claims abstract description 70
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 67
- 238000009792 diffusion process Methods 0.000 claims abstract description 56
- 230000004888 barrier function Effects 0.000 claims abstract description 54
- 230000008569 process Effects 0.000 claims abstract description 46
- 239000000758 substrate Substances 0.000 claims abstract description 35
- 239000004215 Carbon black (E152) Substances 0.000 claims abstract description 25
- 229930195733 hydrocarbon Natural products 0.000 claims abstract description 25
- 150000002430 hydrocarbons Chemical class 0.000 claims abstract description 25
- 229910000881 Cu alloy Inorganic materials 0.000 claims abstract description 18
- 239000007789 gas Substances 0.000 claims description 160
- 239000002184 metal Substances 0.000 claims description 68
- 229910052751 metal Inorganic materials 0.000 claims description 68
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 63
- 229910021332 silicide Inorganic materials 0.000 claims description 60
- 238000012545 processing Methods 0.000 claims description 46
- 239000000126 substance Substances 0.000 claims description 14
- 238000003860 storage Methods 0.000 claims description 12
- 229910052710 silicon Inorganic materials 0.000 claims description 11
- KAKZBPTYRLMSJV-UHFFFAOYSA-N Butadiene Chemical compound C=CC=C KAKZBPTYRLMSJV-UHFFFAOYSA-N 0.000 claims description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 10
- 238000005275 alloying Methods 0.000 claims description 10
- 238000009713 electroplating Methods 0.000 claims description 10
- 239000000203 mixture Substances 0.000 claims description 10
- 239000010703 silicon Substances 0.000 claims description 10
- 238000009472 formulation Methods 0.000 claims description 9
- 229910052721 tungsten Inorganic materials 0.000 claims description 8
- 229910052782 aluminium Inorganic materials 0.000 claims description 6
- HSFWRNGVRCDJHI-UHFFFAOYSA-N alpha-acetylene Natural products C#C HSFWRNGVRCDJHI-UHFFFAOYSA-N 0.000 claims description 5
- 125000002534 ethynyl group Chemical group [H]C#C* 0.000 claims description 5
- 229910052739 hydrogen Inorganic materials 0.000 claims description 5
- 239000001257 hydrogen Substances 0.000 claims description 5
- 229910052738 indium Inorganic materials 0.000 claims description 5
- 229910052748 manganese Inorganic materials 0.000 claims description 5
- 229910052759 nickel Inorganic materials 0.000 claims description 5
- 229910052718 tin Inorganic materials 0.000 claims description 5
- 229910052725 zinc Inorganic materials 0.000 claims description 5
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 4
- 238000009489 vacuum treatment Methods 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 90
- 230000015572 biosynthetic process Effects 0.000 description 40
- 238000005229 chemical vapour deposition Methods 0.000 description 32
- 238000000137 annealing Methods 0.000 description 17
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 11
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- 238000005240 physical vapour deposition Methods 0.000 description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 3
- 230000009471 action Effects 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 229910052799 carbon Inorganic materials 0.000 description 3
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- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- 238000004380 ashing Methods 0.000 description 2
- 230000033228 biological regulation Effects 0.000 description 2
- 150000001879 copper Chemical class 0.000 description 2
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- 238000005268 plasma chemical vapour deposition Methods 0.000 description 2
- 238000009832 plasma treatment Methods 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 229910000077 silane Inorganic materials 0.000 description 2
- 229910018565 CuAl Inorganic materials 0.000 description 1
- 229910002535 CuZn Inorganic materials 0.000 description 1
- -1 TMS amine Chemical class 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
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- 238000004458 analytical method Methods 0.000 description 1
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- UBHZUDXTHNMNLD-UHFFFAOYSA-N dimethylsilane Chemical compound C[SiH2]C UBHZUDXTHNMNLD-UHFFFAOYSA-N 0.000 description 1
- PZPGRFITIJYNEJ-UHFFFAOYSA-N disilane Chemical compound [SiH3][SiH3] PZPGRFITIJYNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
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- 239000011261 inert gas Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- UIUXUFNYAYAMOE-UHFFFAOYSA-N methylsilane Chemical compound [SiH3]C UIUXUFNYAYAMOE-UHFFFAOYSA-N 0.000 description 1
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- 238000007747 plating Methods 0.000 description 1
- 238000001556 precipitation Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- CZDYPVPMEAXLPK-UHFFFAOYSA-N tetramethylsilane Chemical compound C[Si](C)(C)C CZDYPVPMEAXLPK-UHFFFAOYSA-N 0.000 description 1
- PQDJYEQOELDLCP-UHFFFAOYSA-N trimethylsilane Chemical compound C[SiH](C)C PQDJYEQOELDLCP-UHFFFAOYSA-N 0.000 description 1
- 229940094989 trimethylsilane Drugs 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02115—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material being carbon, e.g. alpha-C, diamond or hydrogen doped carbon
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76835—Combinations of two or more different dielectric layers having a low dielectric constant
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76867—Barrier, adhesion or liner layers characterized by methods of formation other than PVD, CVD or deposition from a liquids
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76883—Post-treatment or after-treatment of the conductive material
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
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- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
Disclosed is a semiconductor device characterized by comprising a substrate, a wiring layer formed on the substrate and composed of copper or a copper alloy, a copper diffusion barrier film formed on the wiring layer and composed of an amorphous carbon film formed by CVD using a process gas containing a hydrocarbon gas, and a low dielectric constant insulating film formed on the copper diffusion barrier film.
Description
Technical field
The present invention relates on substrate, to have the manufacture method of semiconductor device and this semiconductor device of amorphous carbon film.
Background technology
In recent years, in the manufacturing process of semiconductor device, require the miniaturization of design rule day by day.Thereupon, from the viewpoint of high speed, adopt always low-k organic membrane, be that so-called Low-k film is an interlayer dielectric, and to adopt the lower Cu of resistance to replace Al in the past be wiring layer always.
Establish interlayer dielectric and the Cu wiring layer is formed under the such situation of multilayer at folder, for example for example go up to form the Low-k film that constitutes by polymer as interlayer dielectric at the semiconductor crystal wafer (following is called " wafer ") of the layer that is formed with regulation, resist layer etc. is carried out the through hole etching as mask, form sacrifice layer after having removed resist and polymer, resist layer is carried out the ditch trench etch as mask, remove resist and polymer once more and carry out dry ashing and cleaning, sacrifice layer and backstop layer are removed in etching, form Cu wiring layer and connector (plug).
Afterwards, utilize CMP (Chemical Mechanical Polishing, chemical mechanical polishing) that the Cu wiring layer is ground.Next, utilize plasma treatment or wet processed to remove the Cu oxide-film on surface, afterwards, again on this Cu wiring layer film forming Low-k film as interlayer dielectric.
In this case, because Cu is easy to diffusion, the influence of the intensification when therefore being subjected to film forming Low-k film, Cu is diffused in the Low-k film.This action produces harmful effect to device.Therefore, proposed a kind of after having carried out CMP, utilize plasma CVD (Chemical Vapor Deposition, chemical gaseous phase deposition) film forming SiN, SiO on whole crystal column surface
2, thereby among SiC, SiCO, the SiCN any one prevent this technology (for example, with reference to T.Saitoetal.in proceeding of IITC, 2001 PP15-17) of Cu diffusion for the Cu nonproliferation film.
But above-mentioned material is because dielectric constant higher (for example relative dielectric constant is about 7 in SiN), is that about 2~3 Low-k film is an interlayer dielectric even therefore adopt relative dielectric constant, and this effect that prevents the Cu diffusion also can be weakened.
Summary of the invention
The present invention In view of the foregoing makes, purpose be to provide such semiconductor device that diffusion that can prevent Cu and the dielectric constant that can suppress interlayer uprise with and manufacture method.
In addition, the present invention also aims to provide a kind of storage medium that stores the program that is used to carry out said method.
In the 1st technical scheme of the present invention, a kind of semiconductor device is provided, it is characterized in that, comprising: substrate, wiring layer, copper diffusion barrier film and insulating film with low dielectric constant; Above-mentioned wiring layer is formed on the substrate, is made of copper or copper alloy; Above-mentioned copper diffusion barrier film is formed on the above-mentioned wiring layer, is made of the amorphous carbon film that utilizes the CVD film forming to form, and this CVD has adopted and comprised hydrocarbon gas at interior processing gas; Above-mentioned insulating film with low dielectric constant is formed on the above-mentioned copper diffusion barrier film.
Adopt this feature, utilizing CVD film forming amorphous carbon film on the wiring layer that is made of copper or copper alloy is the copper diffusion barrier film, and this CVD has adopted and comprised hydrocarbon gas at interior processing gas, film forming insulating film with low dielectric constant on this copper diffusion barrier film.The amorphous carbon film that forms of film forming is as preventing that copper is from the barrier structure performance function of wiring layer to the insulating film with low dielectric constant diffusion like this, and relative dielectric constant is 2.6, be that SiC etc. is lower than in the past barrier film materials, therefore the dielectric constant that can suppress between wiring layer uprises.In addition, above-mentioned amorphous carbon film is compared in the past SiC film etc. and can also be improved being adjacent to property with wiring layer.
In the 2nd technical scheme of the present invention, a kind of semiconductor device is provided, it is characterized in that, comprising: substrate, wiring layer, metal film, copper diffusion barrier film and insulating film with low dielectric constant; Above-mentioned wiring layer is formed on the substrate, is made of copper or copper alloy; Above-mentioned metal film is formed on the above-mentioned wiring layer; Above-mentioned copper diffusion barrier film is formed on the above-mentioned metal film, comprises hydrocarbon gas by employing and constitutes at the amorphous carbon film that interior processing gas film forming forms; Above-mentioned insulating film with low dielectric constant is formed on the above-mentioned copper diffusion barrier film.
On wiring layer film forming after the amorphous carbon film, under situation with the Temperature Treatment wafer more than 400 ℃, wiring layer and amorphous carbon film generation catalytic reaction and make the amorphous carbon film attenuation.About this point,,, therefore can suppress the amorphous carbon film attenuation because film forming has metal film between wiring layer and amorphous carbon film according to above-mentioned feature.
In the 2nd viewpoint of the present invention, the thickness of above-mentioned metal film can be 1~5nm in addition, the wiring layer alloying of for example above-mentioned metal film and substrate.In addition, for example above-mentioned metal film contains at least a among Co, Ni, W, Al, In, Sn, Mn, Zn, the Zr.
In the 3rd technical scheme of the present invention, a kind of semiconductor device is provided, it is characterized in that, comprising: substrate, wiring layer, silicide film, copper diffusion barrier film and insulating film with low dielectric constant; Above-mentioned wiring layer is formed on the substrate, is made of copper or copper alloy; Above-mentioned silicide film is formed on the above-mentioned wiring layer; Above-mentioned copper diffusion barrier film is formed on the above-mentioned silicide film, comprises hydrocarbon gas by employing and constitutes at the amorphous carbon film that interior processing gas film forming forms; Above-mentioned insulating film with low dielectric constant is formed on the above-mentioned copper diffusion barrier film.
Adopt this feature, replace metal film, also can suppress the amorphous carbon film attenuation even promptly form silicide film.In addition, silicide compare metal film have film formed selectivity height, can be to wiring layer this advantage of film forming optionally.In addition, can adopt in the environment of low temperature and to supply with this straightforward procedure that contains Si gas to wiring layer and come the film forming silicide film.Therefore, also has this advantage that can keep vacuum state to go up formation silicide film and amorphous carbon film unchangeably in position.
In the 3rd technical scheme of the present invention, by containing Si gas copper and Si in the above-mentioned wiring layer are reacted, thereby can form above-mentioned silicide film to above-mentioned wiring layer supply.In addition, the thickness of preferred above-mentioned silicide film is below 100nm.
In above-mentioned the 1st~the 3rd technical scheme, the thickness of above-mentioned copper diffusion barrier film can be below 5nm.In addition, for example above-mentioned copper diffusion barrier film is that the amorphous carbon film by following film forming constitutes, and this amorphous carbon film comprises acetylene gas by employing and hydrogen forms in interior processing gas film forming.Perhaps, for example above-mentioned copper diffusion barrier film is that the amorphous carbon film by following film forming constitutes, and this amorphous carbon film comprises chemical formulation by employing and becomes C
4H
6Gas form in interior processing gas film forming.In this case, for example chemical formulation becomes C
4H
6Above-mentioned gas be at least a in 2-butine or the butadiene.
In the 4th technical scheme of the present invention, a kind of manufacture method of semiconductor device is provided, it is characterized in that, comprise following operation: on substrate, form the wiring layer that constitutes by copper or copper alloy; Utilize CVD film forming amorphous carbon film to be the copper diffusion barrier film on above-mentioned wiring layer, this CVD has adopted and has comprised hydrocarbon gas at interior processing gas; Film forming insulating film with low dielectric constant on above-mentioned copper diffusion barrier film.
Adopt this feature, utilizing CVD film forming amorphous carbon film on the wiring layer that is made of copper or copper alloy is the copper diffusion barrier film, and this CVD has adopted and comprised hydrocarbon gas at interior processing gas, film forming insulating film with low dielectric constant on this copper diffusion barrier film.The amorphous carbon film that forms of film forming is as preventing that copper is from the barrier structure performance function of wiring layer to the insulating film with low dielectric constant diffusion like this, and relative dielectric constant is 2.6, be that SiC etc. is lower than in the past barrier film materials, therefore the dielectric constant that can suppress between wiring layer uprises.In addition, above-mentioned amorphous carbon film is compared SiC film in the past etc., can also be improved the being adjacent to property with wiring layer.
In addition, in the 5th technical scheme of the present invention, provide a kind of manufacture method of semiconductor device, it is characterized in that, comprise following operation: on substrate, form the wiring layer that constitutes by copper or copper alloy; On above-mentioned wiring layer, form metal film; Utilize CVD film forming amorphous carbon film to be the copper diffusion barrier film on above-mentioned metal film, this CVD has adopted and has comprised hydrocarbon gas at interior processing gas; Film forming insulating film with low dielectric constant on above-mentioned copper diffusion barrier film.
Adopt this feature,, therefore can suppress the amorphous carbon film attenuation because film forming has metal film between wiring layer and amorphous carbon film.
In the 5th technical scheme of the present invention, can with the thickness film forming of above-mentioned metal film 1~5nm.In addition, the wiring layer alloying of for example above-mentioned metal film and substrate.In addition, for example above-mentioned metal film contains at least a among Co, Ni, W, Al, In, Sn, Mn, Zn, the Zr.In addition, above-mentioned metal film can utilize electroplating processes or CVD to handle and form.Utilizing electroplating processes to form under the situation of above-mentioned metal film, for example above-mentioned metal film contains at least a among W, Co, the Ni.Utilizing CVD handle to form under the situation of above-mentioned metal film, for example above-mentioned metal film contains at least a among W, the Al.
In addition, in the 6th technical scheme of the present invention, provide a kind of manufacture method of semiconductor device, it is characterized in that, comprise following operation: on substrate, form the wiring layer that constitutes by copper or copper alloy; On above-mentioned wiring layer, supply with silicon-containing gas and copper and silicon in the above-mentioned wiring layer are reacted, thereby form silicide film; Utilize CVD film forming amorphous carbon film to be the copper diffusion barrier film on above-mentioned silicide film, this CVD has adopted and has comprised hydrocarbon gas at interior processing gas; Film forming insulating film with low dielectric constant on above-mentioned copper diffusion barrier film.
Adopt this feature, replace metal film, also can suppress the amorphous carbon film attenuation even promptly form silicide film.In addition, silicide compare metal film have film formed selectivity height, can be to wiring layer this advantage of film forming optionally.In addition, can adopt in the environment of low temperature and to supply with this straightforward procedure that contains Si gas to wiring layer and come the film forming silicide film.Therefore, also has this advantage that can keep vacuum state to go up formation silicide film and amorphous carbon film unchangeably in position.
In the 6th technical scheme of the present invention, preferably with the thickness film forming of above-mentioned silicide film below 100nm.In addition, preferred above-mentioned silicon-containing gas is from by SiH
4Gas, Si
2H
6Gas, Si (CH
3)
4Gas, SiH (CH
3)
3Gas, SiH
2(CH
3)
2Gas, SiH
3(CH
3) gas, (SiH
3)
3The gas of selecting in the group that N gas constitutes.In addition, preferably utilize vacuum treatment to be used to form the operation of above-mentioned silicide film and to be used for the operation of the above-mentioned amorphous carbon film of film forming respectively, and also keep vacuum state between the two-step.In this case, can in same chamber, be used to form the operation and the operation that is used for the above-mentioned amorphous carbon film of film forming of above-mentioned silicide film.
In above-mentioned the 4th~the 6th technical scheme, preferably also comprise the operation of the oxide-film of removing above-mentioned wiring layer surface.
Adopt this feature, promptly, make this surface cleaningization, can make the characteristic of semiconductor device better by the natural oxide film of after forming wiring layer, removing this wiring layer surface.
In the 7th technical scheme of the present invention, a kind of manufacture method of semiconductor device is provided, it is characterized in that, comprise following operation: on substrate, form the wiring layer that constitutes by copper or copper alloy; Remove the oxide-film on above-mentioned wiring layer surface; On above-mentioned wiring layer, supply with silicon-containing gas and copper and silicon in the above-mentioned wiring layer are reacted, thereby form silicide film; Utilize CVD film forming amorphous carbon film to be the copper diffusion barrier film on above-mentioned silicide film, this CVD has adopted and has comprised hydrocarbon gas at interior processing gas; Above-mentioned operation is all undertaken by vacuum treatment, and also keeps vacuum state between the above-mentioned operation.
Adopt this feature, can not be subjected to the influence ground of oxygen and moisture to make semiconductor device very effectively.
In the 7th technical scheme of the present invention, can in same chamber, be used to remove the oxide-film on above-mentioned wiring layer surface operation, be used to form the operation of above-mentioned silicide film and be used for the operation of the above-mentioned amorphous carbon film of film forming.
In above-mentioned the 4th~the 7th technical scheme, the thickness that can make the copper diffusion barrier film below 5nm the above-mentioned amorphous carbon film of film forming.In addition, above-mentioned processing gas for example comprises acetylene gas and hydrogen.It is C that perhaps above-mentioned processing gas for example comprises chemical formulation
4H
6Gas.In this case, chemical formulation is C
4H
6Above-mentioned gas for example be at least a in 2-butine or the butadiene.
In the 8th technical scheme of the present invention, a kind of storage medium is provided, it stores and moves on computers and control the program of the manufacturing system of semiconductor device, it is characterized in that, when carrying out said procedure, the manufacturing system that makes the above-mentioned semiconductor device of computer control is to carry out the manufacture method of any described semiconductor device in the technical scheme 13~32.
Description of drawings
The F of A~Fig. 1 of Fig. 1 is the process chart of manufacture method that is used to illustrate the semiconductor device of the 1st execution mode of the present invention.
Fig. 2 is the figure of the schematic configuration of the used semiconductor device manufacturing system of the manufacture method of semiconductor device of expression the 1st execution mode of the present invention.
Fig. 3 is the cutaway view of an example of the film formation device of the used amorphous carbon film of the semiconductor device manufacturing system of presentation graphs 2.
Fig. 4 is the cutaway view of the experiment of the related experiment of the amorphous carbon film attenuation that taken place when being used to carry out on the Cu wiring layer direct film forming amorphous carbon film of expression with the structure of wafer.
Fig. 5 is illustrated in the figure that the experiment of Fig. 4 is carried out the SIMS profile of the depth direction before the annealing in process with wafer.
Fig. 6 is illustrated in the figure that the experiment of Fig. 4 has been carried out the SIMS profile after the annealing in process with wafer with 350 ℃ temperature.
Fig. 7 is illustrated in the figure that the experiment of Fig. 4 has been carried out the SIMS profile after the annealing in process with wafer with 400 ℃ temperature.
The G of A~Fig. 8 of Fig. 8 is the process chart of manufacture method that is used to illustrate the semiconductor device of the 2nd execution mode of the present invention.
Fig. 9 is the figure of the schematic configuration of the used semiconductor device manufacturing system of the manufacture method of semiconductor device of expression the 2nd execution mode of the present invention.
The G of A~Figure 10 of Figure 10 is the process chart of manufacture method that is used to illustrate the semiconductor device of the 3rd execution mode of the present invention.
Figure 11 is the figure of the schematic configuration of the used semiconductor device manufacturing system of the manufacture method of semiconductor device of expression the 3rd execution mode of the present invention.
Figure 12 is the figure of another routine schematic configuration of the used semiconductor device manufacturing system of the manufacture method of semiconductor device of expression the 3rd execution mode of the present invention.
The C of A~Figure 13 of Figure 13 is the process chart that the preferable example of natural oxide film, formation silicide film, film forming amorphous membrance is removed in expression.
Figure 14 is expression can be removed the device of natural oxide film, formation silicide film, film forming amorphous carbon film in same chamber a skeleton diagram.
Embodiment
Below, with reference to the description of drawings embodiments of the present invention of adding.
The F of A~Fig. 1 of Fig. 1 is the process chart of manufacture method that is used to illustrate the semiconductor device of the 1st execution mode of the present invention.
In the present embodiment, at first, shown in the A of Fig. 1, the insulating film with low dielectric constant that film forming for example is made of polymer on lower-layer wiring 1 (Low-k film) 2 is interlayer dielectric.The film forming of this moment both can be undertaken by spin coated, also can pass through CVD (Chemical Vapor Deposition, chemical gaseous phase deposition) and carry out.
Next, shown in the B of Fig. 1, resist layer (not shown) etc. is carried out the through hole etching as mask.Then, after having removed resist and polymer, form sacrifice layer (not shown).Next, resist layer is carried out the ditch trench etch as mask.Then, remove resist and polymer once more, carry out dry ashing and cleaning, further sacrifice layer and backstop layer (not shown) are removed in etching.Thereby, form via 3, groove 4.
Afterwards, shown in the C of Fig. 1, in the inboard film forming barrier metal film 5 of via 3 and groove 4.
Next, shown in the D of Fig. 1, wait landfill via 3 and groove 4, form Cu wiring layer 6 by electroplating Cu.Utilize CMP that formed Cu wiring layer 6 is ground.At this,, preferably remove the natural oxide film on Cu wiring layer 6 surfaces from this viewpoint of the characteristic that improves the semiconductor device obtained.Removing natural oxide film can or adopt the wet clean process of diluted hydrofluoric acid to carry out by plasma treatment, but especially preferably adopts H
2Reducing gass such as gas carry out.Except H
2Outside the gas, can adopt NH
3(ammonia) etc. is reducing gas.
Next, shown in the E of Fig. 1, utilize to have adopted to comprise hydrocarbon gas and come film forming amorphous carbon film 7 at the CVD of interior processing gas.About this amorphous carbon film of film forming, see aftermentioned for details.
Afterwards, shown in the F of Fig. 1, utilize spin coated or CVD film forming Low-k film 8 on amorphous carbon film 7.Then, implement subsequent processing according to usual way (operation).Thus, obtain the semiconductor device of expectation.
In structure in the past, adopting SiN, SiC, SiCN etc. is Cu diffusion barrier member.But, the dielectric constant of above-mentioned material higher (for example SiN is about 7, SiC is about 3.6, SiCN be about 3.0).Thereby, be that about 2~3 Low-k film is an interlayer dielectric even adopt dielectric constant, this problem that also exists blocking effect to be weakened.
To this, utilize to have adopted to comprise hydrocarbon gas at the CVD of interior processing gas and the amorphous carbon film 7 that film forming obtains has sufficient barrier functionality, and dielectric constant is about 2.6 that the barrier film materials that will be starkly lower than in the past is SiC etc.Consider from this point, play and suppress this effect that the dielectric constant between wiring layer increases.
In addition, utilize to have adopted to comprise hydrocarbon gas at the CVD of interior processing gas and the amorphous carbon film 7 that film forming obtains is fine and close integral body (bulk) films, therefore compare the SiC film of porous in the past etc., can also improve being adjacent to property with wiring layer.
Next, the example of the system of the method that is used to realize the 1st execution mode is described.Fig. 2 is the figure of the schematic configuration of the used semiconductor device manufacturing system of the manufacture method of semiconductor device of expression the 1st execution mode of the present invention.
This semiconductor device manufacturing system has handling part 100, and this handling part 100 comprises amorphous carbon film film formation device 101, Cu film film formation device 102 and Low-k film film formation device 103.And this semiconductor device manufacturing system has master control part 110, and this master control part 110 comprises process controller 111, user interface 112 and storage part 113.In addition, as the method for carrying wafer W between each device of handling part 100, adopt the method for carrying that undertaken by the operator and the method for carrying that undertaken by not shown Handling device etc.
Each device of handling part 100 forms the structure that is connected with the process controller 111 with CPU and is controlled by this process controller 111.The user interface 112 that is made of keyboard, display etc. is connected with process controller 111.The keyboard person that is process management usefulness such as input operation of instructing for example for each device of management processing portion 100.For example display is to make the operational situation of each device of handling part 100 show usefulness visually.In addition, storage part 113 is connected with process controller 111.Contain processing procedure program (recipe) in storage part 113, this processing procedure program records the control that is used for by process controller 111 and realizes control program, treatment conditions data of the various processing that handling part 100 is performed etc.
As required, based on accessing processing procedure program arbitrarily from storage part 113 from the indication of user interface 112 etc., utilize process controller 111 to carry out.Thus, in the various processing of in handling part 100, expecting under the control of process controller 11.In addition, above-mentioned processing procedure program also can be stored in the storage medium in the storage part 113.Storage medium can be hard disk, semiconductor memory, also can be placed on the assigned position of storage part 113 under the state in being contained in portabillity storage mediums such as CD-ROM, DVD.In addition, also can be at any time from the device of outside via dedicated wires transmission for example as the processing procedure program of object and online utilization.
In addition, both can utilize master control part 110 to carry out all controls, and also can utilize master control part 110 to carry out the control of globality, and on each device or each device specifies group, the control part of subordinate had been set and utilize this control part to carry out the control of subordinate.
In addition, amorphous carbon film film formation device 101 is to utilize to have adopted to comprise hydrocarbon gas forms amorphous carbon film on wafer W in the CVD method of interior processing gas device as the back describes in detail.
In addition, Cu film film formation device 102 is the devices that are used for imbedding at wiring groove etc. Cu, for example is electroplanting device.It perhaps also can be the device that utilizes PVD (Physical VaporDeposition, physical vapor precipitation) buried wiring groove.In this case, can adopt the Cu alloy is wiring material.
In addition, Low-k film film formation device 103 is the devices that have been used in film forming as film forming Low-k film after the amorphous carbon film of copper diffusion barrier film.Can adopt SOD device or CVD device is Low-k film film formation device 103, and this SOD device adopts the method for SOD (Spin On Dielectric) to utilize spin coated film forming Low-k film.
Next, describe the amorphous carbon film film formation device 101 that plays an important role in the present embodiment in detail.Fig. 3 is the cutaway view of an example of the film formation device of the used amorphous carbon film of expression semiconductor device manufacturing system.This amorphous carbon film film formation device 101 has chamber 21 roughly cylindraceous.
21 internal configurations has pedestal (susceptor) 22 in the chamber, and this pedestal 22 is used for the wafer W of horizontal supporting as handled object, is arranged on supporting member cylindraceous 23 supportings of the central lower of pedestal.Be provided with the guide ring 24 that is used to guide wafer W in the outer edge of pedestal 22.In addition, in pedestal 22, imbed having heaters 25.By powering to this heater 25, will be heated to set point of temperature as the wafer W of processed substrate from heater power source 26.In addition, in pedestal 22, be embedded with thermocouple 27.Based on the detection signal of thermocouple 27, to controlling to the output of heater 25 from heater power source 26.Near surface at pedestal 22 is embedded with electrode 28, and this electrode 28 is a ground connection.And, can be in pedestal 22 with respect to the outstanding 3 wafer fulcrum posts (not shown) that are used to support wafer W and carry out lifting that are provided with in the surface of pedestal 22 with submerging.
On the roof 21a in chamber 21, be provided with shower nozzle 30 across insulating component 29.This shower nozzle 30 forms inside and has the cylindric of gaseous diffusion space 39.And this shower nozzle 30 has the gas introduction port 31 that imports processing gas at upper surface, has many gas discharge outlets 32 at lower surface.The gas supply mechanism 34 that supply is used to form the processing gas of amorphous carbon film is connected with the gas introduction port 31 of shower nozzle 30 by gas pipe arrangement 33.
In addition, high frequency electric source 36 is connected with shower nozzle 30 by adaptation 35.Thus, from high frequency electric source 36 to shower nozzle supply high frequency electric power.Pass through like this from high frequency electric source 36 supply high frequency electric power, can be with the gas plasmaization that supplies to by shower nozzle 30 in the chamber 21.
Each formation portion, for example heater power source 26, gas supply mechanism 34, high frequency electric source 36 and the exhaust apparatus 38 etc. of amorphous carbon film film formation device 101 are connected with Setup Controller 42.Setup Controller 42 is connected with said process controller 111.Utilize this structure, based on the instruction of process controller 111, each formation portion of 42 pairs of amorphous carbon film film formation devices 101 of Setup Controller controls.
Next, the film forming action of the amorphous carbon film that has adopted above-mentioned such amorphous carbon film film formation device 101 that constitutes is described.
The wafer W that will have the structure shown in the D of Fig. 1 moves in the chamber 21, is positioned on the pedestal 22.Then, flow via gas pipe arrangement 33 and shower nozzle 30 from gas supply mechanism 34 and for example have that Ar gas is that plasma generates gas.Meanwhile, utilize in 38 pairs of chambeies 21 of exhaust apparatus and carry out exhaust, will be held in the decompression state of regulation in the chamber 21.In addition, utilize heater 25 pedestal 22 to be heated to 100~200 ℃ set point of temperature.Then, apply High frequency power, between shower nozzle 30 and electrode 28, produce high-frequency electric field, thereby plasma is generated gas plasmaization by 36 pairs of shower nozzles 30 of high frequency electric source.
Under this state, will comprise the hydrocarbon gas that is used for the film forming amorphous carbon film interior processing gas from gas supply mechanism 34 via gas pipe arrangement 33 and shower nozzle 30 introduction chambers 21 in.
Thus, this processing gas is formed on the plasma excitation in the chamber 21, is heated on wafer W and decomposes.Thereby shown in the E of Fig. 1, film forming has the thin amorphous carbon film 7 of specific thickness.In this case, the thickness of preferred amorphous carbon film 7 is preferably 1~5nm especially below 5nm.
As the processing gas that contains hydrocarbon gas, particularly, the gas that can adopt mixing acetylene and hydrogen to form.Perhaps in addition, can adopt chemical formulation is the gas of C4H6.In this case, as concrete compound, can adopt 2-butine or butadiene.In addition, handle inert gases such as also can comprising Ar gas in the gas.
In addition, the pressure in the chamber during preferred film forming amorphous carbon film is below 2.7Pa (20mTorr).
In addition, the wafer temperature (film-forming temperature) during preferred film forming amorphous carbon film is below 200 ℃, more preferably 100~200 ℃.
According to the reactivity of necessity, can suitably set the frequency and the power of the High frequency power that shower nozzle 30 is applied.By applying above-mentioned High frequency power, in chamber 21, form high-frequency electric field, thereby can will handle gas plasmaization.Thus, can realize utilizing plasma CVD film forming amorphous carbon film.Since by plasma gas reactive high, therefore can further be lowered into film temperature.In addition, as plasma source, be not limited to the plasma source of the capacitive coupling type of High frequency power as described above, also can be the plasma source of inductance coupling high type, can also be with in the microwave introduction chamber 21 and form the plasma source of this type of plasma by waveguide and antenna.In addition, it not is necessary that plasma generates, and under the sufficient situation of reactivity, can utilize hot CVD to carry out film forming yet.
The amorphous carbon film of above-mentioned such film forming is the CHx film (0.8<x<1.2) that is made of carbon and hydrogen, and is higher with the being adjacent to property of metals such as existing Low-k interlayer dielectric and Cu.In addition, used in the past SiN, SiC, SiCN film etc. can reduce dielectric constant by the ratio that increases a plurality of holes of being contained in the film, but in this case, with respect to the block decline of Cu diffusion.At this problem, the amorphous carbon film of film forming does not contain a plurality of holes but fine and close integral membrane in film in the present embodiment, so dielectric constant is lower and block is high, even thickness also can be brought into play barrier functionality below 5nm.
Next, the 2nd execution mode of the present invention is described.
In the manufacturing process of semiconductor device, with prevent each layer (film) take place rotten, size changes etc. is purpose or for the requirement on the operation, how to carry out heat treated such as annealing in process after having formed film.
But, distinguish as follows:,, can make the amorphous carbon film attenuation if more than set point of temperature, carry out heat treated such as annealing in process on the surface of Cu wiring layer directly under the situation of film forming amorphous carbon film.
The experiment that is used to confirm the problems referred to above and carries out is described.
Fig. 4 represents the structure of the used experiment of the heat run of amorphous carbon film with wafer.As shown in Figure 4, in substrate, adopt Si substrate 51, film forming P-SiN film 52, Cu film 53, amorphous carbon film 54 successively on this Si substrate, thus produce experiment wafer TW.Utilize SIMS (2 secondary ion quality analysis) to before carrying out annealing in process, carried out after the annealing in process, measured with wafer TW with 400 ℃ of these experiments of having carried out after the annealing in process with 350 ℃.Fig. 5 represents to carry out annealing in process measurement result before, and Fig. 6 represents to have carried out annealing in process measurement result afterwards with 350 ℃, and Fig. 7 represents to have carried out annealing in process measurement result afterwards with 400 ℃.
Comparison diagram 5 and Fig. 6 have relatively carried out annealing in process result afterwards and have carried out annealing in process result before with 350 ℃, and the profile of the thickness direction of Cu and carbon does not almost become.Consider from this point, can think under 350 ℃ annealing in process, the thickness of Cu film 53 and amorphous carbon film 54 almost and do not become.
Relative therewith, comparison diagram 5 and Fig. 7 have relatively carried out annealing in process result afterwards and have carried out annealing in process result before with 400 ℃, do not become though the profile of the thickness direction of Cu, and variation has taken place the profile of the thickness direction of carbon.Particularly, the 2 secondary ion intensity that are equivalent to the part of amorphous carbon film obviously reduce.Consider from this point, can think the thickness attenuation of amorphous carbon film 54.Promptly, can confirm carrying out under the situation of annealing in process, though can utilize amorphous carbon film to prevent the diffusion of Cu, amorphous carbon film attenuation with 400 degree.
In the 2nd execution mode of the present invention, considered to prevent the method for above-mentioned film attenuation.
The G of A~Fig. 8 of Fig. 8 is the process chart of manufacture method that is used to illustrate the semiconductor device of the 2nd execution mode of the present invention.In the present embodiment, shown in the G of A~Fig. 8 of Fig. 8, after the D with A~Fig. 1 of Fig. 1 has formed Cu wiring layer 6 identically, shown in the E of Fig. 8, film forming metal film 9 optionally on the surface of Cu wiring layer 6.Afterwards, with the situation of the 1st execution mode film forming amorphous carbon film 7 (F of Fig. 8) similarly, film forming Low-k film 8 also, thus form the structure shown in the G of Fig. 8.
When as present embodiment, between Cu wiring layer 6 and amorphous carbon film 7, being folded with metal film 9,, also can prevent amorphous carbon film 7 attenuation even under the situation of carrying out the heat treated more than 400 ℃.
Have an optionally metal as used when forming metal film 9, can adopt at least a among Co, Ni, W, Al, In, Sn, Mn, Zn, the Zr.Under the situation of the method film forming metal film 9 that utilizes selective electroplating, in above-mentioned metal, can adopt Co, Ni, W.In electroplating processes is under the situation of chemical plating, contains B, P etc. as the reducing agent composition sometimes in above-mentioned metal.On the other hand, utilizing the method for selecting CVD to form under the situation of metal film 9, can adopt Al or W.
About alloying, particularly, be can illustration CuAl under the situation of metal adopting Al
2Being the alloy example, is can illustration CuIn under the situation of metal adopting In
2Being the alloy example, is can illustration Cu under the situation of metal adopting Sn
3Sn is the alloy example, is can illustration CuMn under the situation of metal adopting Mn
2Being the alloy example, is can illustration CuZn be the alloy example under the situation of metal adopting Zn, is can illustration CuZr under the situation of metal adopting Zr
2Be the alloy example.
Next, the example of the system of the method that is used to realize the 2nd execution mode is described.Fig. 9 is the figure of the schematic configuration of the used semiconductor device manufacturing system of the manufacture method of semiconductor device of expression the 2nd execution mode of the present invention.In this semiconductor device manufacturing system, handling part 100 also comprises metal film forming device 104 except comprising amorphous carbon film film formation device 101, Cu film film formation device 102, Low-k film film formation device 103.The treatment system of Fig. 9 has only this point different with the treatment system of Fig. 2, and other structure all treatment system with Fig. 2 is identical.
Metal film forming device 104 is the devices that are used for optionally forming metal film on the Cu wiring layer.As this metal film forming device 104, can adopt and utilize the electroplanting device of electroplating the film forming metal film or the CVD device that utilizes CVD film forming metal film.Under situation, adopt the additional PVD device that is useful on the film forming metal film, apply the heat treatment apparatus of the heat that is used to carry out alloying and remove the device that the removal devices such as Wet-type etching device of the part of alloying not form metal film and Cu wiring layer alloying.
Next, the 3rd execution mode of the present invention is described.
In the present embodiment, for the purpose that prevents the film attenuation, form the metal film 9 that silicide film 10 replaces above-mentioned the 2nd execution mode.The G of A~Figure 10 of Figure 10 is the process chart of manufacture method that is used to illustrate the semiconductor device of the 3rd execution mode of the present invention.In the present embodiment, the D of the A~Fig. 8 of the Fig. 8 in the D of A~Figure 10 of Figure 10 and the 2nd execution mode is identical, forms Cu wiring layer 6.Afterwards, shown in the E of Figure 10, on the surface of Cu wiring layer 6, optionally be formed with silicide film (Cu
5Si) 10.
When forming silicide film 10, contain Si gas by supplying with to the surface of Cu wiring layer 6, Si is spread on the surface of Cu wiring layer 6.Thus, Cu and Si react, thereby form by Cu
5The silicide film that Si constitutes.As containing Si gas, be fit to use the gas of from following gas, selecting: SiH
4(silane) gas, Si
2H
6(disilane) gas, Si (CH
3)
4(tetramethylsilane) gas, SiH (CH
3)
3(trimethyl silane) gas, SiH
2(CH
3)
2(dimethylsilane) gas, SiH
3(CH
3) (monomethyl silane) gas, (SiH
3)
3N (TMS amine) gas.Particularly, (SiH
3)
3N gas has good reactivity, and is therefore preferred.
The formation operation of above-mentioned silicide film 10 for example can be located at substrate temperature in 150~200 ℃ the scope and carry out.The thickness of preferred silicide film 10 as long as can bring into play desired effects, is got over Bao Yuehao below 100nm.More preferably the thickness of silicide film is 5~20nm, more preferably 5~10nm.
Thereby, compare the metal film 9 that adopts the 2nd execution mode, it is more favourable forming silicide film 10 as present embodiment on Cu wiring layer 6.
Next, the example of the system of the method that is used to realize the 3rd execution mode is described.Figure 11 is the figure of the schematic configuration of the used semiconductor device manufacturing system of the manufacture method of semiconductor device of expression the 3rd execution mode of the present invention.The handling part 100 of this semiconductor device manufacturing system comprises that also silicide forms device 105 except comprising amorphous carbon film film formation device 101, Cu film film formation device 102, Low-k film film formation device 103.The treatment system of Figure 11 has only this point different with the treatment system of Fig. 2, and other structure all treatment system with Fig. 2 is identical.
Silicide forms device 105 as mentioned above, is wafer to be heated to preferred about 150~200 ℃ on one side to supply with the device that contains Si gas to the surface of Cu wiring layer 6 on one side.Silane (SiH
4) gas etc. contain the reactive high of Si gas, therefore when being heated to 150~200 ℃ as described above, auxiliary even without plasma etc. only also can form silicide film 10 by supply gas.
Silicide forms 105 in device and contains Si gas and just can form silicide by above-mentioned the importing like that.Therefore, except the mode that is provided with as independent device, as shown in figure 12, also can make amorphous carbon film film formation device 101 have the Si of containing gas import feature and constitute silicide formation-amorphous carbon film film formation device 106.In this case, same below 200 ℃ when being located at treatment temperature with the film forming amorphous carbon film when forming silicide film, only supply with and contain Si gas and get final product.Promptly, if can in the chamber, supply with SiH in advance
4Gas etc. contain Si gas and C
4H
6Such amorphous carbon film film forming gas then can keep vacuum state to carry out silicide unchangeably in position and form operation and amorphous carbon film film formation process.
In this case, using H
2When the such reducing gas of gas carries out the removal processing of natural oxide film, shown in the C of A~Figure 13 of Figure 13, can only carry out the removal processing of (A) natural oxide film, the formation of (B) silicide film 10, the formation of (C) amorphous carbon film 7 by changing gaseous species.In addition, each operation all can be carried out in the temperature below 200 ℃.
Particularly, when making silicide formation-amorphous carbon film film formation device 106 have the reducing gas functions of physical supply, can keep vacuum state to carry out above-mentioned all operations in position unchangeably, thereby very preferably.
Figure 14 is the figure with silicide formation-amorphous carbon film film formation device 106 of reducing gas functions of physical supply.The essential structure of this device is identical with amorphous carbon film film formation device shown in Figure 3.Identical construction is partly marked identical Reference numeral, omit explanation.
Silicide formation-amorphous carbon film the film formation device 106 of Figure 14 has gas supply mechanism 60, and the film forming that contains Si gas supply source 62 and supply with the gas that is used to form amorphous carbon film as described above that this gas supply mechanism 60 comprises the reducing gas supply source 61 of supplying with above-mentioned reducing gas, supply with the Si of containing gas as described above is with gas supply source 63.Then, with H
2The such reducing gas autoreduction gas supply source 61 of gas supplies in the chamber 21 via gas pipe arrangement 33 and shower nozzle 30, thereby removes the natural oxide film that is present in the Cu wiring layer on the crystal column surface.Next, with SiH
4Self-contained Si gas such as gas supply source 62 supplies in the chamber via gas pipe arrangement 33 and shower nozzle 30, thereby forms silicide film on the surface of the Cu of cleaning wiring layer.Afterwards, will comprise the hydrocarbon gas that is used for the film forming amorphous carbon film and import in the chamber 21 via gas pipe arrangement 33 and shower nozzle 30 with gas supply source 63 at interior processing gas self film, thus on silicide film the film forming amorphous carbon film.
By adopting said apparatus, can in same chamber, remove natural oxide film, form silicide film, each such operation of film forming amorphous carbon film.
But, even under the situation that hope keeps vacuum state (can not destroy vacuum) unchangeably handling in position, also may not in a chamber, carry out each and handle, also can adopt to have the multi-cavity type device that is used for carrying out respectively each a plurality of process chamber of handling.
Be not used at silicide formation-amorphous carbon film film formation device 106 under the situation of the function of supplying with reducing gas, utilizing after suitable natural oxide film removal device removed natural oxide film on the Cu wiring layer 6, utilize silicide formation-amorphous carbon film film formation device 106 can carry out the film formation process that amorphous carbon film forms operation and amorphous carbon film continuously.
In addition, the present invention is not limited to the respective embodiments described above, can carry out various distortion.For example, in each above-mentioned execution mode, when forming metallic film, adopt selective electroplating, CVD method, but, be not limited to said method, also can adopt other method as long as form metallic film.In addition, as processed substrate illustration semiconductor crystal wafer, but the present invention is not limited thereto, the flat-panel monitor (FPD) that also is applicable to liquid crystal indicator (LCD) representative is with other substrates such as glass substrates.
Claims (33)
1. a semiconductor device is characterized in that,
This semiconductor device comprises:
Substrate;
Wiring layer, it is formed on the substrate, is made of copper or copper alloy;
The copper diffusion barrier film, it is formed on the above-mentioned wiring layer, is made of the amorphous carbon film that utilizes the CVD film forming to form, and this CVD has adopted and has comprised hydrocarbon gas at interior processing gas;
Insulating film with low dielectric constant, it is formed on the above-mentioned copper diffusion barrier film.
2. a semiconductor device is characterized in that,
This semiconductor device comprises:
Substrate;
Wiring layer, it is formed on the substrate, is made of copper or copper alloy;
Metal film, it is formed on the above-mentioned wiring layer;
The copper diffusion barrier film, it is formed on the above-mentioned metal film, comprises hydrocarbon gas by employing and constitutes at the amorphous carbon film that interior processing gas film forming forms;
Insulating film with low dielectric constant, it is formed on the above-mentioned copper diffusion barrier film.
3. semiconductor device according to claim 2 is characterized in that,
The thickness of above-mentioned metal film is 1~5nm.
4. according to claim 2 or 3 described semiconductor devices, it is characterized in that,
The wiring layer alloying of above-mentioned metal film and substrate.
5. according to any described semiconductor device in the claim 2~4, it is characterized in that,
Above-mentioned metal film contains at least a among Co, Ni, W, Al, In, Sn, Mn, Zn, the Zr.
6. a semiconductor device is characterized in that,
This semiconductor device comprises:
Substrate;
Wiring layer, it is formed on the substrate, is made of copper or copper alloy;
Silicide film, it is formed on the above-mentioned wiring layer;
The copper diffusion barrier film, it is formed on the above-mentioned silicide film, comprises hydrocarbon gas by employing and constitutes at the amorphous carbon film that interior processing gas film forming forms;
Insulating film with low dielectric constant, it is formed on the above-mentioned copper diffusion barrier film.
7. semiconductor device according to claim 6 is characterized in that,
Contain Si gas by supplying with, copper and Si in the above-mentioned wiring layer are reacted, thereby form above-mentioned silicide film to above-mentioned wiring layer.
8. according to claim 6 or 7 described semiconductor devices, it is characterized in that,
The thickness of above-mentioned silicide film is below 100nm.
9. according to any described semiconductor device in the claim 1~8, it is characterized in that,
The thickness of above-mentioned copper diffusion barrier film is below 5nm.
10. according to any described semiconductor device in the claim 1~9, it is characterized in that,
Above-mentioned copper diffusion barrier film comprises acetylene gas by employing and hydrogen constitutes at the amorphous carbon film that interior processing gas film forming forms.
11. according to any described semiconductor device in the claim 1~9, it is characterized in that,
It is C that above-mentioned copper diffusion barrier film comprises chemical formulation by employing
4H
6The amorphous carbon film that forms in interior processing gas film forming of gas constitute.
12. semiconductor device according to claim 11 is characterized in that,
Chemical formulation is C
4H
6Above-mentioned gas be at least a in 2-butine or the butadiene.
13. the manufacture method of a semiconductor device is characterized in that,
This method comprises following operation:
On substrate, form the wiring layer that constitutes by copper or copper alloy;
Utilize CVD film forming amorphous carbon film to be the copper diffusion barrier film on above-mentioned wiring layer, this CVD has adopted and has comprised hydrocarbon gas at interior processing gas;
Film forming insulating film with low dielectric constant on above-mentioned copper diffusion barrier film.
14. the manufacture method of a semiconductor device is characterized in that,
This method comprises following operation:
On substrate, form the wiring layer that constitutes by copper or copper alloy;
On above-mentioned wiring layer, form metal film;
Utilize CVD film forming amorphous carbon film to be the copper diffusion barrier film on above-mentioned metal film, this CVD has adopted and has comprised hydrocarbon gas at interior processing gas;
Film forming insulating film with low dielectric constant on above-mentioned copper diffusion barrier film.
15. the manufacture method of semiconductor device according to claim 14 is characterized in that,
With the thickness film forming of above-mentioned metal film is 1~5nm.
16. the manufacture method according to claim 14 or 15 described semiconductor devices is characterized in that,
The wiring layer alloying of above-mentioned metal film and substrate.
17. the manufacture method according to any described semiconductor device in the claim 14~16 is characterized in that,
Above-mentioned metal film contains at least a among Co, Ni, W, Al, In, Sn, Mn, Zn, the Zr.
18. the manufacture method according to any described semiconductor device in the claim 14~16 is characterized in that,
Utilize electroplating processes or CVD to handle and form above-mentioned metal film.
19. the manufacture method of semiconductor device according to claim 18 is characterized in that,
Above-mentioned metal film forms by electroplating processes, and comprises at least a among W, Co, the Ni.
20. the manufacture method of semiconductor device according to claim 18 is characterized in that,
Above-mentioned metal film is handled by CVD and is formed, and comprises at least a among W, the Al.
21. the manufacture method of a semiconductor device is characterized in that,
This method comprises following operation:
On substrate, form the wiring layer that constitutes by copper or copper alloy;
On above-mentioned wiring layer, supply with silicon-containing gas and copper and silicon in the above-mentioned wiring layer are reacted, thereby form silicide film;
Utilize CVD film forming amorphous carbon film to be the copper diffusion barrier film on above-mentioned silicide film, this CVD has adopted and has comprised hydrocarbon gas at interior processing gas;
Film forming insulating film with low dielectric constant on above-mentioned copper diffusion barrier film.
22. the manufacture method of semiconductor device according to claim 21 is characterized in that,
With the thickness film forming of above-mentioned silicide film below 100nm.
23. the manufacture method according to claim 21 or 22 described semiconductor devices is characterized in that,
Above-mentioned silicon-containing gas is from by SiH
4Gas, Si
2H
6Gas, Si (CH
3)
4Gas, SiH (CH
3)
3Gas, SiH
2(CH
3)
2Gas, SiH
3(CH
3) gas, (SiH
3)
3The gas of selecting in the group that N gas constitutes.
24. the manufacture method according to any described semiconductor device in the claim 21~23 is characterized in that,
Be used to form the operation of above-mentioned silicide film by vacuum treatment respectively and be used for the operation of the above-mentioned amorphous carbon film of film forming;
And also keep vacuum state between the two-step.
25. the manufacture method of semiconductor device according to claim 24 is characterized in that,
In same chamber, be used to form the operation of above-mentioned silicide film and be used for the operation of the above-mentioned amorphous carbon film of film forming.
26. the manufacture method according to any described semiconductor device in the claim 13~25 is characterized in that,
This method also comprises the operation of the oxide-film of removing above-mentioned wiring layer surface.
27. the manufacture method of a semiconductor device is characterized in that,
This method comprises following operation:
On substrate, form the wiring layer that constitutes by copper or copper alloy;
Remove the oxide-film on above-mentioned wiring layer surface;
On above-mentioned wiring layer, supply with silicon-containing gas and copper and silicon in the above-mentioned wiring layer are reacted, thereby form silicide film;
Utilize CVD film forming amorphous carbon film to be the copper diffusion barrier film on above-mentioned silicide film, this CVD has adopted and has comprised hydrocarbon gas at interior processing gas;
Above-mentioned operation is all undertaken by vacuum treatment, and also keeps vacuum state between the above-mentioned operation.
28. the manufacture method of semiconductor device according to claim 27 is characterized in that,
In same chamber, be used to remove the oxide-film on above-mentioned wiring layer surface operation, be used to form the operation of above-mentioned silicide film and be used for the operation of the above-mentioned amorphous carbon film of film forming.
29. the manufacture method according to any described semiconductor device in the claim 13~28 is characterized in that,
The thickness that makes the copper diffusion barrier film below 5nm the above-mentioned amorphous carbon film of film forming.
30. the manufacture method according to any described semiconductor device in the claim 13~29 is characterized in that,
Above-mentioned processing gas comprises acetylene gas and hydrogen.
31. the manufacture method according to any described semiconductor device in the claim 13~29 is characterized in that,
Above-mentioned processing gas comprises that chemical formulation becomes C
4H
6Gas.
32. the manufacture method of semiconductor device according to claim 31 is characterized in that,
Chemical formulation becomes C
4H
6Above-mentioned gas be at least a in 2-butine or the butadiene.
33. a storage medium, it stores and is used for moving on computers and controls the program of the manufacturing system of semiconductor device, it is characterized in that,
When carrying out said procedure, make the manufacture method of the manufacturing system of the above-mentioned semiconductor device of computer control with any described semiconductor device in carry out claim 13~32.
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
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CN102891080A (en) * | 2011-07-18 | 2013-01-23 | 中芯国际集成电路制造(上海)有限公司 | Forming method of dielectric layer |
WO2013123679A1 (en) * | 2012-02-24 | 2013-08-29 | 中国科学院微电子研究所 | Diffusion blocking layer, metal interconnected structure and manufacturing process therefor |
CN106662259A (en) * | 2014-07-09 | 2017-05-10 | Nok株式会社 | Valve for rubber layered sealing |
CN108352370A (en) * | 2016-09-06 | 2018-07-31 | 古德***有限公司 | Heat sink for high-power components |
CN108511389A (en) * | 2017-02-28 | 2018-09-07 | 东京毅力科创株式会社 | Semiconductor making method and plasma processing apparatus |
CN112913001A (en) * | 2018-10-04 | 2021-06-04 | Rnr实验室公司 | Semiconductor device manufacturing method |
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2007
- 2007-12-26 CN CN200780045004.XA patent/CN101548375A/en active Pending
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102891080A (en) * | 2011-07-18 | 2013-01-23 | 中芯国际集成电路制造(上海)有限公司 | Forming method of dielectric layer |
WO2013123679A1 (en) * | 2012-02-24 | 2013-08-29 | 中国科学院微电子研究所 | Diffusion blocking layer, metal interconnected structure and manufacturing process therefor |
CN103296006A (en) * | 2012-02-24 | 2013-09-11 | 中国科学院微电子研究所 | Diffusion blocking layer and metal interconnection structure and manufacturing method thereof |
CN106662259A (en) * | 2014-07-09 | 2017-05-10 | Nok株式会社 | Valve for rubber layered sealing |
CN108352370A (en) * | 2016-09-06 | 2018-07-31 | 古德***有限公司 | Heat sink for high-power components |
CN108511389A (en) * | 2017-02-28 | 2018-09-07 | 东京毅力科创株式会社 | Semiconductor making method and plasma processing apparatus |
CN108511389B (en) * | 2017-02-28 | 2022-07-12 | 东京毅力科创株式会社 | Semiconductor manufacturing method and plasma processing apparatus |
CN112913001A (en) * | 2018-10-04 | 2021-06-04 | Rnr实验室公司 | Semiconductor device manufacturing method |
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