CN101388358B - 半导体器件的制造方法 - Google Patents

半导体器件的制造方法 Download PDF

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CN101388358B
CN101388358B CN2008101490074A CN200810149007A CN101388358B CN 101388358 B CN101388358 B CN 101388358B CN 2008101490074 A CN2008101490074 A CN 2008101490074A CN 200810149007 A CN200810149007 A CN 200810149007A CN 101388358 B CN101388358 B CN 101388358B
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interlayer dielectric
diffusion barrier
film
hydrogen diffusion
semiconductor device
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和泉宇俊
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Fujitsu Semiconductor Memory Solution Ltd
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Abstract

本发明提供一种具有以氢扩散阻挡膜覆盖的层间绝缘膜的半导体器件的制造方法。在半导体衬底上形成由绝缘材料制成的层间绝缘膜。在层间绝缘膜上形成氢扩散阻挡膜，该氢扩散阻挡膜由氢扩散阻挡能力高于层间绝缘膜材料的材料制成。对形成有层间绝缘膜和氢扩散阻挡膜的半导体衬底进行热处理。在形成层间绝缘膜的过程中，在水分含量等于或小于5×10-3g/cm3的条件下形成层间绝缘膜。即使在形成氢扩散阻挡膜之后进行退火处理，也难以在下面的层间绝缘膜中形成裂缝。

Description

半导体器件的制造方法
本申请是申请号为200510107113.2、申请日为2005年9月28日、发明名称为“半导体器件及其制造方法”的发明专利申请的分案申请。
相关申请的交叉参考
本申请基于并要求2005年6月9日提交的日本专利申请No.2005-169371的优先权，在此通过参考援引其全部内容。
技术领域
本发明涉及一种半导体器件及其制造方法，更特别地，涉及一种具有以氢扩散阻挡膜覆盖的层间绝缘膜的半导体器件及其制造方法，以及一种具有低水分含量的二氧化硅膜的半导体器件的制造方法。
背景技术
图6A是公布号WO/2004/095578的公开文本中公开的铁电存储器的横截面视图。在硅衬底100的表面层中形成元件隔离绝缘膜101。在元件隔离绝缘膜101限定的有源区中形成MOS晶体管102。在硅衬底100上形成覆盖MOS晶体管102的层间绝缘膜103。
在层间绝缘膜103上形成铁电电容器105。铁电电容器105具有由依次堆叠的下电极105A、电容器铁电膜105B和上电极105C构成的叠层结构。在层间绝缘膜103上形成覆盖铁电电容器105且由二氧化硅制成的第二层层间绝缘膜106。
通过使用四乙基原硅酸盐(TEOS)和臭氧(O3)进行大气压化学气相沉积(大气压CVD)或等离子体增强CVD来形成层间绝缘膜106。在层间绝缘膜106上形成由氧化铝制成的氢扩散阻挡膜107。氢扩散阻挡膜107防止氢渗透到铁电电容器105。
在形成用于防止氢扩散的氧化铝膜107之后并且在形成多层布线结构之前，进行退火来修复铁电电容器105特性的退化。在退火期间的某些情况下会形成层间裂缝。
图6B是依据具有裂缝的样本的电子显微照片所绘的示意图。层间绝缘膜106覆盖铁电电容器105。可以看出，在层间绝缘膜106内及其下面形成裂缝110。如果未形成氢扩散阻挡膜107，则层间绝缘膜106内所含的水分在退火期间被解吸。裂缝110的形成可归因于由于氢扩散阻挡膜107抑制了水分的扩散导致层间绝缘膜106内所含水分的体积膨胀。
发明内容
本发明的目的是提供一种半导体器件，即使在形成氢扩散阻挡膜之后进行退火，该半导体器件也能够抑制氢扩散阻挡膜下面的层间绝缘膜中产生裂缝；并且提供这种半导体器件的制造方法。
按照本发明的一个方案，提供一种半导体器件，包括：半导体衬底，其上形成有半导体元件；层间绝缘膜，其形成在该半导体衬底上方，并且由水分含量等于或低于5×10-3g/cm3的绝缘材料制成；以及氢扩散阻挡膜，其形成在该层间绝缘膜上方，并且由氢扩散阻挡能力高于该层间绝缘膜材料的材料制成。
按照本发明的另一方案，提供一种半导体器件的制造方法，包括如下步骤：(a)在半导体衬底上方形成由绝缘材料制成的层间绝缘膜；(b)在该层间绝缘膜上方形成氢扩散阻挡膜，该氢扩散阻挡膜由氢扩散阻挡能力高于该层间绝缘膜材料的材料制成；以及(c)对形成有该层间绝缘膜和该氢扩散阻挡膜的半导体衬底进行热处理，其中在步骤(a)中，在水分含量等于或低于5×10-3g/cm3的条件下形成该层间绝缘膜。
按照本发明的又一方案，提供一种半导体器件的制造方法，包括如下步骤：(a)在半导体衬底上方形成由绝缘材料制成的层间绝缘膜；(b)在该层间绝缘膜上方形成氢扩散阻挡膜，该氢扩散阻挡膜由氢扩散阻挡能力高于该层间绝缘膜材料的材料制成；以及(c)对形成有该层间绝缘膜和该氢扩散阻挡膜的半导体衬底进行热处理，其中在步骤(a)中，在室压等于或高于930Pa的条件下、通过使用氧气或臭氧以及TEOS作为源材料进行等离子体增强CVD形成该层间绝缘膜。
按照本发明的再一方案，提供一种半导体器件的制造方法，包括如下步骤：(a)确定二氧化硅绝缘膜内所含的水分含量的容许上限值；(b)制备多个评估样本，每个评估样本在衬底上方具有二氧化硅绝缘膜，所述评估样本的绝缘膜通过在不同的气压条件下、使用氧气或臭氧以及TEOS作为源材料进行等离子体增强CVD来形成；(c)测量每个评估样本的绝缘膜中的水分含量；(d)确定能将所述评估样本的绝缘膜中的水分含量设定为等于或低于该容许上限值的气压条件；以及(e)在步骤(d)确定的气压条件下，通过使用氧气或臭氧以及TEOS作为源材料进行等离子体增强CVD，在半导体衬底上方形成二氧化硅绝缘膜。
按照本发明的再一方案，提供一种半导体器件的制造方法，包括如下步骤：(a)确定二氧化硅绝缘膜内所含的水分含量的容许上限值；(b)制备多个评估样本，每个评估样本在衬底上方具有二氧化硅绝缘膜，所述评估样本的绝缘膜通过在氧气或臭氧的流速与引入室内的气体的总流速的流速比不同的条件下、使用氧气或臭氧以及TEOS作为源材料进行等离子体增强CVD来形成；(c)测量每个评估样本的绝缘膜中的水分含量；(d)确定能将所述评估样本的绝缘膜中的水分含量设定为等于或低于该容许上限值的流速比条件；以及(e)在步骤(d)确定的流速比条件下，通过使用氧气或臭氧以及TEOS作为源材料进行等离子体增强CVD，在半导体衬底上方形成二氧化硅绝缘膜。
由于层间绝缘膜中的水分含量减少，因此即使在形成氢扩散阻挡膜之后对层间绝缘膜进行热处理，也不可能产生裂缝。由于在等于或高于930Pa的室压下、通过使用氧气或臭氧以及TEOS进行等离子增强CVD来形成二氧化硅膜，所以可形成具有足够低的水分含量而不会断裂的层间绝缘膜。
附图说明
图1A至1F为在中间制造过程中半导体器件的横截面视图，其示出按照一实施例的半导体器件制造方法；
图2是该实施例的半导体器件制造方法采用的CVD***的示意图；
图3是示出按照一实施例的绝缘膜形成方法与一比较实例的膜形成条件、膜厚均匀度以及生长速率的表格；
图4是示出图3所示的三个样本通过提升温度解吸法解吸的水分含量测量结果的曲线图，该测量是利用四极质谱仪进行的；
图5是示出在不同的氧气流速下形成的两个样本通过提升温度解吸法解吸的水分含量测量结果的曲线图，该测量是利用四极质谱仪进行的；
图6A是通过传统方法制造的半导体器件的横截面视图；以及
图6B是依据具有裂缝的半导体器件的电子显微照片所绘的示意图。
具体实施方式
参照图1A至1F，下面将描述按照一实施例的半导体器件制造方法。
如图1A所示，在由硅制成的半导体衬底1的表面层中形成必要的阱。通过浅沟槽隔离(STI)等形成元件隔离绝缘膜2以限定有源区。在有源区中形成MOS晶体管9。MOS晶体管9由栅极绝缘膜5、栅电极6、源极和漏极扩散层3、以及侧壁间隔物8构成。在源极和漏极扩散层3的表面上形成硅化钴(CoSi2)膜4。在栅电极6的上表面上形成硅化钴的覆盖膜7。可通过公知的膜形成技术、光刻技术、离子注入技术、硅化技术等形成MOS晶体管9。
通过CVD在衬底上形成覆盖MOS晶体管9的氧氮化硅膜10。通过CVD在氧氮化硅膜10上形成二氧化硅层间绝缘膜11。氧氮化硅膜10防止在形成层间绝缘膜11的同时水分渗透到栅极绝缘膜5等中。通过化学机械抛光(CMP)将层间绝缘膜11的表面平坦化。在此抛光处理期间，在栅电极6上方沉积的氧氮化硅膜10起到抛光停止层(stopper)的作用。
形成穿过层间绝缘膜11和氧氮化硅膜10的通孔12。通孔12到达MOS晶体管9的源极/漏极扩散层3上的硅化物膜4。利用TiN等的阻挡金属膜覆盖通孔12的内壁，并且钨(W)等制成的塞13填充通孔12。可通过公知的TiN膜形成工艺、W膜形成工艺和CMP工艺来形成阻挡金属膜和塞13。
如图1B所示，通过CVD在层间绝缘膜11上形成100nm厚的氧氮化硅膜20。通过使用O2和TEOS的CVD，在氧氮化硅膜20上形成130nm厚的二氧化硅膜21。在二氧化硅膜21上形成20nm厚的氧化铝膜22。可通过溅射、金属有机物化学气相沉积(MOCVD)等工艺形成氧化铝膜22。可通过下述化学式表示的水解反应形成氧化铝膜22：
2AlCl3+3H2O→Al2O3+6HCl↑
通过溅射在氧化铝膜22上形成150nm厚的铂(Pt)膜23a。在Pt膜23a上形成150nm厚、由Pb(Zr，Ti)O3(PZT)制成的铁电膜24a。可通过MOCVD、溅射等工艺形成铁电膜24a。代替PZT，铁电膜24a可由其它铁电氧化物比如(Pb，La)(Zr，Ti)O3(PLZT)和SrBi2Ta2O9(SBT)制成。
在铁电膜24a上形成250nm厚的氧化铱膜25a。可通过使用氧气和氩气的混合气体的等离子体溅射金属Ir靶(target)来形成氧化铱膜25a。例如，可通过在以下条件下：压强为0.8Pa、氧气流速为100sccm、氩气流速为100sccm、衬底温度为室温和RF功率为1kW，将氧化铱膜沉积到50nm厚，随后通过将RF功率提高到2kW将氧化铱膜沉积到200nm厚来形成氧化铱膜25a。因此，可将氧化铱膜25a的上层区域中的氧浓度设置为低于下层区域中的氧浓度。
如图1C所示，通过用抗蚀图案覆盖氧化铱膜25a的部分表面区域，干蚀刻氧化铱膜25a和铁电膜24a以形成氧化铱的上电极25和PZT的电容器铁电膜24。在去除抗蚀图案之后，形成20nm厚的氧化铝膜28，用以覆盖由电容器铁电膜24与上电极25构成的的叠层结构的表面以及Pt膜23a的表面。
如图1D所示，通过用抗蚀图案覆盖氧化铝膜28的部分表面区域，干蚀刻氧化铝膜28、Pt膜23a和下面的氧化铝膜22以形成Pt的下电极23。下电极23、电容器铁电膜24和上电极25构成铁电电容器29。
在下电极23下面留下氧化铝膜22。这次干蚀刻也蚀刻了位于氧化铝膜22下方、未被抗蚀图案覆盖的上层区域中的二氧化硅膜21。例如，使得未被抗蚀图案覆盖的二氧化硅膜21变薄到40nm厚。在下电极23的上表面、电容器铁电膜24的侧面、以及上电极25的上表面上留下氧化铝膜28。
如图1E所示，利用20nm厚的氧化铝膜30覆盖整个露出的表面。通过使用O2和TEOS的CVD，在氧化铝膜30上形成二氧化硅的层间绝缘膜31。稍后将详细描述形成层间绝缘膜31的条件。通过CMP将层间绝缘膜31的表面平坦化。利用这次平坦化处理，层间绝缘膜31在未设置铁电电容器29的区域中的厚度被设置为例如980nm。
在将层间绝缘膜31的表面平坦化之前或之后，将层间绝缘膜31暴露于N2或N2O等离子体中。这次等离子体处理减少了层间绝缘膜中的水分并且改善了它的膜质量。在等离子体处理期间优选将衬底温度设置为200℃至450℃。
在被平坦化的层间绝缘膜31上形成20nm厚、由氧化铝制成的氢扩散阻挡膜32。在氢扩散阻挡膜32上形成300nm厚、由二氧化硅制成的下层膜33。通过与层间绝缘膜31相同的方法来形成下层膜33。
如图1F所示，形成通孔41、42和43。通孔41延伸穿过下层膜33、氢扩散阻挡膜32、层间绝缘膜31、下部氧化铝膜30、二氧化硅膜21和氧氮化硅膜20，并到达塞13的上表面。通孔42到达上电极25的上表面。其它通孔43经过上电极25和电容器铁电膜24，并到达下电极23的上表面。
利用TiN等的阻挡金属膜覆盖通孔41至43的内表面，并且由钨等制成的塞46、47和48填充通孔41至43。
在氧气氛、氮气氛或氧与氮的混合气氛中、在400℃至600℃的温度下进行热处理。这次热处理能够修复由先前的处理导致的铁电电容器29特性的退化。
在下层膜33上形成铝(Al)、Al-Cu合金等的布线51和52。布线51连接塞46和47，从而使MOS晶体管9连接到铁电电容器29的上电极25。其它布线52经塞48连接到铁电电容器29的下电极23。下层膜33防止布线51和52直接接触氢扩散阻挡膜32。
布线和氢扩散阻挡膜32取决于布线材料与氢扩散阻挡膜32的材料的组合而相互影响。在这种情况下，优选地使用由与氢扩散阻挡膜32的材料不同的绝缘材料制成的下层膜33。
在布线51和52上方形成多层布线结构55，所述多层布线结构55包含交替且反复层叠的层间绝缘膜和上布线层。
通过覆盖铁电电容器29的底部、侧面和上表面的氧化铝膜22、28和30，以及通过在层间绝缘膜31上形成的氢扩散阻挡膜32，防止氢渗透到电容器铁电膜24。在铁电电容器29的侧面上沉积了部分氧化铝膜28和30。在所述侧面上沉积的氧化铝膜的膜质量比在平坦化表面上沉积的氧化铝膜的膜质量差。这些氧化铝膜在某些情况下不足以防止氢的渗透。
由于在平坦化的表面上沉积氢扩散阻挡膜32，从而能够容易地在整个区域保持较高的膜质量。因此能够获得充分的氢扩散阻挡能力，从而能够避免铁电电容器29的特性退化。氢扩散阻挡膜32可由氢扩散阻挡能力高于层间绝缘膜31材料的材料制成。这层氢扩散阻挡膜的材料可以是氮化铝、氧化钽、氮化钽、氧化钛、氧化锆等。
图2是用于形成层间绝缘膜31的CVD膜形成***的示意图。在室60内设置用于支撑衬底的平台61，并且在平台61上方设置平面形状的反向电极62。射频电源65在平台61和反向电极62之间供应等离子体生成的高频功率。在平台61中设置加热器，以将平台61上支撑的衬底加热到预定温度。
反向电极62也起到气体入口的作用。流经气体流路63的气体从反向电极62的反向面上形成的孔流入室60内。经气体流路63向室60内供应O2和TEOS。使用He气作为TEOS的携带气体。通过气体流量计控制O2的供应量，并且通过液体流量计控制TEOS的供应量。
使用真空泵64经传导阀(conductance valve)67抽取室60内的空气。使用气压计66测量室60内的气压。通过利用传导阀67改变流动阻力，将室60内的气压控制为所需的值。
图3是表示在不同的膜形成条件下形成的、图1E所示的层间绝缘膜31的三个样本的膜形成条件、膜厚均匀度和生长速率的表格。每个样本具有对应于层间绝缘膜31的二氧化硅膜，但是不具有对应于上部氢扩散阻挡膜32的膜。由(Tmax-Tmin)/(Tmax+Tmin)来定义膜厚均匀度，其中Tmax是层间绝缘膜31具有最大厚度的位置处的厚度，Tmin是层间绝缘膜31具有最小厚度的位置处的厚度。
图4是表示图3所示的三个样本#1、#2和#3通过提升温度解吸法解吸的水分含量测量结果的曲线图，该测量是利用四极质谱仪进行的。横坐标以“℃”为单位表示温度，而纵坐标以对数标度表示对应于检测的水分子含量的密度。最下方的实线BG表示背景水平。将样本#1、#2和#3的膜形成条件相互比较，仅仅气压是不同的，而其它膜形成条件都相同。从曲线图中可以看出，随着气压从665Pa上升到1197Pa时，检测到的层间绝缘膜中所含的水分子量变低。
图5是表示在不同的氧气流速下形成的两个样本通过提升温度解吸法解吸的水分含量测量结果的曲线图，该测量是利用四极质谱仪进行的。横坐标以“℃”为单位表示温度，而纵坐标以对数标度表示对应于检测的水分子含量的密度。最下方的实线BG表示背景水平。一个样本在2100sccm的氧气流速下形成，而另一个样本在2980sccm的氧气流速下形成。这两个样本的其它膜形成条件是相同的，即，气压是1197Pa，供应的功率是700W，并且TEOS流速是690mg/min。从曲线图中可以看出，随着氧气流速增大，检测到的层间绝缘膜中所含的水分子量变低。
如果在如图1E所示的半导体器件的层间绝缘膜31中所含的水分含量较低，则在用氢扩散阻挡膜32覆盖层间绝缘膜31之后进行的热处理期间可抑制由水分的体积膨胀所引起的裂缝的产生。为了防止产生裂缝，优选地将层间绝缘膜31中的水分含量设定为等于或低于5×10-3g/cm3。通过调节形成层间绝缘膜31时的气压和氧气流速，可以将层间绝缘膜31中的水分含量设定为等于或低于上述容许上限值。
例如可以通过利用质谱仪分析由提升温度解吸法所解吸的气体，评估层间绝缘膜中的水分含量。更具体地，在超高真空中加热形成有层间绝缘膜的硅衬底以提升其温度，并且利用质谱仪分析所解吸的气体。
从图3所示的表格中的样本#1、#2和#3之间的比较可以得出存在这样的趋势：随着气压的升高，膜厚均匀度降低并且生长速率降低。在未设置氢扩散阻挡膜32的结构中，从膜厚均匀度和生长速率的观点来看，在约665Pa的气压下形成了层间绝缘膜31。然而，如果设置氢扩散阻挡膜32并且在665Pa的气压条件下形成层间绝缘膜31，则在随后的热处理中会产生裂缝。为了防止裂缝的产生，优选地在形成层间绝缘膜31期间将气压设定为930Pa。如果气压设定的太高，则等离子体稳定性降低。优选地将室内的气压设定为等于或低于能够充分保持等离子体稳定性的气压。例如，将气压优选地设定为1330Pa或以下。
从图5所示的两个样本之间的比较可以得出：随着氧气流速增大，膜厚均匀度降低并且膜生长速率降低。对于未设置氢扩散阻挡膜32的结构，从膜厚均匀度和生长速率的观点来看，氧气流速优选设定为约2100sccm。然而，对于设置有氢扩散阻挡膜32的结构，从防止产生裂缝的观点来看，氧气流速优选增大为约2980sccm。
在上述实施例中，尽管使用O2和TEOS作为层间绝缘膜31的源材料，但是也可使用O3来代替O2。
同时在上述实施例中，尽管层间绝缘膜31由二氧化硅制成，但是也可使用其它绝缘材料。并且在这种情况下，将水分含量优选设定为等于或低于上述容许上限值。
接下来，将描述形成水分含量等于或低于容许上限值的二氧化硅绝缘膜的方法。首先确定二氧化硅绝缘膜中所含水分含量的容许上限值。然后在不同的气压条件下、通过使用氧气或臭氧以及TEOS作为源材料进行等离子体增强CVD，在晶片上形成二氧化硅绝缘膜，从而制备多个评估样本。
测量多个评估样本中每一个评估样本的绝缘膜内的水分含量。确定能将绝缘膜内的水分含量设定为等于或低于容许上限值的气压条件。在所确定的气压条件下、通过使用氧气或臭氧以及TEOS作为源材料进行等离子体增强CVD，在衬底上形成二氧化硅绝缘膜。除了气压条件之外的条件与形成评估样本时所用的那些条件相同。
可制备具有二氧化硅绝缘膜的多个评估样本，这些绝缘膜在氧气或臭氧的流速与引入室内的气体的总流速的流速比不同的条件下、使用氧气或臭氧以及TEOS作为源材料进行等离子体增强CVD来形成。在这种情况下，可以确定能将绝缘膜内的水分含量设定为等于或低于容许上限值的流速比条件。在所确定的流速比条件下形成绝缘膜时，可将水分含量设定为等于或低于容许上限值。在这种情况下，除了流速比条件之外的条件与形成评估样本时所用的那些条件相同。
已经结合优选实施例描述了本发明。本发明并不仅限于上述实施例。对于本领域技术人员来说，很明显可对本发明进行其它各种改型、改进、组合等。

Claims (6)

1.一种半导体器件的制造方法，包括如下步骤：
(a)在半导体衬底上方形成由绝缘材料制成的层间绝缘膜；
(b)在该层间绝缘膜上方形成氢扩散阻挡膜，该氢扩散阻挡膜由氢扩散阻挡能力高于该层间绝缘膜材料的材料制成；以及
(c)对形成有该层间绝缘膜和该氢扩散阻挡膜的半导体衬底进行热处理，
其中在步骤(a)中，在室压等于或高于930Pa的条件下，通过使用氧气或臭氧以及TEOS作为源材料进行等离子体增强CVD形成该层间绝缘膜。
2.如权利要求1所述的半导体器件的制造方法，其中步骤(a)包括将该层间绝缘膜的表面平坦化的步骤。
3.如权利要求1所述的半导体器件的制造方法，其中步骤(a)还包括通过将该层间绝缘膜暴露于N2等离子体或氧化氮等离子体来进行脱水处理的步骤。
4.如权利要求3所述的半导体器件的制造方法，其中在进行脱水处理的步骤中，将衬底温度设定为200℃到450℃的范围。
5.如权利要求1所述的半导体器件的制造方法，在步骤(c)之后还包括如下步骤：
(d)在该氢扩散阻挡膜上方形成下层膜，该下层膜由与该氢扩散阻挡膜的材料不同的材料制成；
(e)在该下层膜上形成布线；以及
(f)在所述布线上方形成多层布线结构。
6.如权利要求1所述的半导体器件的制造方法，其中步骤(a)还包括在该半导体衬底上方形成铁电电容器，以及形成覆盖该铁电电容器的层间绝缘膜的步骤。
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