CN101339446A - Double channel synchronous DDS device capable of modulating phase and amplitude - Google Patents

Abstract

The present invention discloses a dual-channel phase and amplitude modulation synchronous DDS device, which comprises two channels on the basis of the prior art, wherein, an adder is added between a phase accumulator and a sinusoidal look-up table unit in the sine wave output channel of the first channel, to add the phase value from the phase accumulator with the phase control word of the first channel and output a shifted phase value, so as to shift the phase of the output waveform. In addition, a divider is added between the sinusoidal look-up table unit and a D/A converter in the sine wave output channel of the first channel, to divide the amplitude from the sinusoidal look-up table unit of the first channel by the amplitude ratio coefficient of the divider of the first channel, so as to accomplish amplitude modulation for the output waveform. In that way, phase difference and amplitude ratio functions are implemented, in relation to the second channel. The output from the phase accumulator is connected to both channel, and the synchronization control for the phase accumulator and the two channels is implemented by means of the same system clock signal; therefore, the two channels of signals are completely synchronous.

Description

But a kind of synchronous DDS device of binary channels phase-modulation and amplitude-modulation

Technical field

The present invention relates to the synthetic field of Direct Digital frequency (Direct Digital Synthesis is abbreviated as DDS), specifically, but relate to a kind of synchronous DDS device of binary channels phase-modulation and amplitude-modulation.

Background technology

In March, 1971 American scholar J.Tierncy, C.M.Rader and B.Gold have proposed direct digital frequency synthesis technology first.This is a kind of new digital frequency synthesis technique from the directly synthetic needed waveform of phase place notion.Compare with traditional frequency synthesis technique, the frequency conversion speed that the DDS technology has high frequency resolution, is exceedingly fast, the frequency conversion phase place is continuous, phase noise is low, being easy to function expansion and total digitalization is convenient to integrated, realize advantages such as multiple modulation easily to output signal, satisfy many requirements of contemporary electronic systems, therefore obtained development rapidly.

As shown in Figure 1, a DDS device comprises phase accumulator 1, sine lookup table 2, digital to analog converter 3 and low-pass filter 4, phase accumulator 1 and sine lookup table 2 constitute digital controlled oscillator (Numerically Controlled Oscillators abbreviates NCO as).DDS device essence is with system clock f _s(reference frequency source) carries out equally spaced sampling to phase place, and in each clock period, the frequency control word FTW of N position adds up in the phase accumulator 1 of N position, obtains a phase value; 2 of sine lookup table are got the sinusoidal wave amplitude of this phase value correspondence, finish the phase-width of cloth and change, deliver to digital to analog converter 3, convert thereof into by digital to analog converter 3 again and be the ladder analog waveform, at last by low-pass filter 4 with its smoothly be continuous sinusoidal waveform as output, its output frequency f is:

$f=\frac{\left(\mathrm{FTW}\right)\×\mathrm{fs}}{2^N}$ 0≤FTW≤2 wherein ^N-1... ... ... ... ... ... .. is 1.

Therefore, just can change output frequency f by changing frequency control word FTW.

Existing DDS device is the path that above-mentioned four parts of a route are formed, and can not realize the adjusting of phase differential and amplitude ratio and synchronously.

Summary of the invention

The objective of the invention is to overcome the deficiencies in the prior art, but a kind of synchronous DDS device of binary channels phase-modulation and amplitude-modulation is provided.

For achieving the above object, but the synchronous DDS device of binary channels phase-modulation and amplitude-modulation of the present invention is included in the phase accumulator of the N position that each clock period adds up the frequency control word of N position, and it is output as the phase value of the high n position of the back intercepting that adds up, it is characterized in that, also comprise:

The first passage totalizer, an one input end is connected to the output terminal of phase accumulator, and another input termination first passage phase control words is used for phase value and the addition of first passage phase control words, the output first passage is offset phase value, finishes the phase adjusted of output waveform;

First passage sine lookup table, input end are connected to the output of first passage totalizer, are used for the first passage of input is offset phase value as the address of tabling look-up, and are stored in the interior range value of table according to this address extraction, finish phase-width of cloth conversion;

The first passage divider, an one input termination first passage sine lookup table amplitude output, another input termination first passage amplitude control word, be used for the range value of first passage sine lookup table output is compared coefficient divided by the amplitude of first passage divider, and export, finish the amplitude adjusted of output waveform;

The first passage digital to analog converter connects the amplitude output of first passage divider, and the range value that is used to receive the output of first passage divider converts the ladder analog waveform to;

The first passage low-pass filter connects the output of first passage digital to analog converter, is used for the ladder analog waveform smoothly is continuous sinusoidal waveform output;

The second channel sine lookup table identical with the first passage sine lookup table, input end is connected to the output terminal of phase accumulator, and the phase value that is used for importing is stored in the interior range value of table as the address of tabling look-up according to this address extraction, finishes phase-width of cloth conversion;

The second channel digital to analog converter connects the amplitude output of second channel sine lookup table, and converts thereof into the ladder analog waveform;

The second channel low-pass filter by, connect the output of second channel digital to analog converter, smoothly be the output of continuous sinusoidal waveform with the ladder analog waveform;

Adopt the same system clock signal to provide synchro control to phase accumulator and two passages.

The object of the present invention is achieved like this, on the prior art basis, be divided into two passages, increased by a totalizer between phase accumulator in the sinewave output path of first passage and the sine lookup table, make the phase value and the addition of first passage phase control words of phase accumulator output, output first passage skew phase value makes the phase place of output waveform produce skew, finishes the phase adjusted of output waveform.Simultaneously, between the sine lookup table and digital to analog converter in the sinewave output path of first passage, increased by a divider, with the range value of first passage sine lookup table output divided by the amplitude of first passage divider than coefficient, finish the amplitude adjusted of output waveform.Like this,, carried out phase differential and amplitude, but promptly realized binary channels phase-modulation and amplitude-modulation DDS device than function with respect to second channel.The output of phase accumulator is to receive simultaneously on two passages, and provides synchro control by same clock signal of system to phase accumulator and two paths, so two paths of signals is fully synchronous.

Description of drawings

Fig. 1 is the DDS principle of device block diagram of prior art;

But Fig. 2 is a kind of embodiment theory diagram of synchronous DDS device of binary channels phase-modulation and amplitude-modulation of the present invention.

Embodiment

Below in conjunction with accompanying drawing, the preferred embodiments of the present invention is described.What need point out is that although similar parts appear in the different accompanying drawings, they are endowed similar reference numerals.In the following description, when perhaps the detailed description of existing prior art can desalinate subject content of the present invention, these were described in here and will be left in the basket.

Fig. 1 is the DDS principle of device block diagram of prior art.Be described and describe in the DDS device background technology in front of prior art, do not repeat them here.

But Fig. 2 is a kind of embodiment theory diagram of synchronous DDS device of binary channels phase-modulation and amplitude-modulation of the present invention.

In the present embodiment, phase accumulator 1 is according to being stored in the N bit frequency control word FTW that the user imported in the frequency control register, carries out once phase-accumulatedly in each clock period (clock frequency fs), being output as the phase value of the high n position of the back intercepting that adds up.Like this, determined the output frequency f of DDS device of the present invention, promptly

$f=\frac{\left(\mathrm{FTW}\right)\×\mathrm{fs}}{2^N}$ 0≤FTW≤2 wherein ^N-1... ... ... ... ... ... .. is 1.

Therefore, just can change output frequency f, finish the Direct Digital frequency synthesis by changing frequency control word FTW.

In the present embodiment, the output of phase accumulator 1 is connected respectively to first passage totalizer 51 input ends 1 and second channel totalizer 52 input ends 1 simultaneously.First passage totalizer 51 input ends 2 and second channel totalizer 52 input ends 2 all insert phase control words separately, i.e. first passage phase control words POW1 and second channel phase control words POW2.The phase control words POW1 of the phase value of input end 1 and input end 2, POW2, i.e. phase increment addition promptly obtains having the new phase value p of phase deviation.

First passage totalizer 52 input ends 2 insert and are stored in the n position first passage phase control words POW1 that the user imported in the phase control register, according to formula:

0≤POW≤2 wherein ^N-1... ... ... ... ... ... ... 2.

Can obtain the skew phase value p1 of first passage output frequency.

In like manner, can obtain the phase place p2 of second channel output frequency, two phase differences between channels are:

Can realize the phase deviation of two passages by phase control words POW1, POW2, promptly finish the function of binary channels phase differential.

In concrete enforcement, second channel totalizer 52 input ends 2 can insert fixing value 0, and 2. can be offset phase value by formula is 0.At this moment, two phase differences between channels are:

Skew phase value p1, the p2 of totalizer 51,52 outputs of two passages sends into sine lookup table 21,22 separately respectively, with skew phase value p1, p2 respectively as the address of searching of sine lookup table 21,22, be stored in the interior range value of table according to this address extraction, finish phase-width of cloth conversion.According to the different value of storage in the sine lookup table 21,22, finish the output of different respective amplitude respectively.

The input end 1 of first passage divider 61, second channel divider 62 is received in the output of the sine lookup table 21,22 of two passages respectively, divider 61,62 input ends 2 all insert m position amplitude control word ACR1, ACR2 separately, divided by amplitude proportional coefficient A1, the A2 of divider 61,62, amplitude proportional coefficient A1, A2 are respectively the range value X of input end 1 respectively:

$A1=\frac{\left(\mathrm{ACR}1\right)}{2^m},$ $\mathrm{<figure-callout\; id="2"\; label="A"\; filenames="A20081004559100111.png"\; state="\{\{state\}\}">A</figure-callout>}2=\frac{\left(\mathrm{ACR}2\right)}{2^m}$ ...............................................③

Output amplitude is respectively:

$\frac{\mathrm{<figure-callout\; id="1"\; label="X\; A"\; filenames="A20081004559100111.png"\; state="\{\{state\}\}">X</figure-callout>}}{A},$ $\frac{\mathrm{<figure-callout\; id="2"\; label="X\; A"\; filenames="A20081004559100111.png"\; state="\{\{state\}\}">X</figure-callout>}}{A},$

Binary channels output amplitude ratio is:

$\frac{X}{A1}/\frac{\mathrm{<figure-callout\; id="2"\; label="X\; A"\; filenames="A20081004559100111.png"\; state="\{\{state\}\}">X</figure-callout>}}{A}=\frac{A2}{A1}=\frac{\mathrm{ACR}2}{\mathrm{ACR}1}$

In concrete enforcement, second channel divider 62 input ends 2 can insert fixing value 2 ^m, 3. can learn the amplitude proportional coefficient A2=1 of this passage by formula, promptly amplitude is constant.Binary channels output amplitude ratio is like this:

$\frac{X}{A1}/\frac{\mathrm{<figure-callout\; id="2"\; label="X\; A"\; filenames="A20081004559100111.png"\; state="\{\{state\}\}">X</figure-callout>}}{A}=\frac{A2}{A1}=\frac{\mathrm{ACR}2}{\mathrm{ACR}1}=\frac{2^m}{\mathrm{ACR}1}$

So connect, can realize that first passage changes with respect to the amplitude ratio of second channel, finishes the function of binary channels output amplitude ratio.

Digital to analog converter 31,32 is separately received in the amplitude output of divider 61,62, and the range value that divider 61,62 is exported converts the ladder analog waveform to.

The ladder analog waveform of digital to analog converter 31,32 is received low-pass filter 41,42 separately, smoothly is continuous sinusoidal waveform output with the ladder analog waveform.

The frequency of Shu Chu two passage waveforms is at last:

$f=\frac{\left(\mathrm{FTW}\right)\&times;\mathrm{fs}}{2^N}$ 0≤FTW≤2 wherein ^N-1

Phase differential is:

The amplitude ratio is:

$\frac{\mathrm{ACR}2}{\mathrm{ACR}1}$

Simultaneously, because the output of phase accumulator 1 is to receive simultaneously on two passages, and by same clock signal f _sProvide synchro control to phase accumulator 1 and two passages, therefore, two passage output signals are fully synchronous.

In the present embodiment, can realize the Direct Digital frequency synthesis by the control word FTW that adjusts frequency, and by changing the phase differential that phase control words POW1, POW2 can adjust two passages, by changing the amplitude ratio that amplitude control word ACR1, ACR2 can adjust two passages.Simultaneously, owing to adopt same system clock signal f _s, the signal of output also is fully synchronous.

Example

Example: clock signal is that 60MHz, frequency control word bit number are 32, the phase control word bit number be 14 and amplitude control word figure place be under 10 the situation, the realization frequency is that 10MHz, phase differential are that 90 °, amplitude ratio are 5: 8 binary channels synchronous frequency signal.

1, frequency control word

By:

$f=\frac{\left(\mathrm{FTW}\right)\&times;\mathrm{fs}}{2^N}$ 0≤FTW≤2 wherein ^N-1

:

$\mathrm{FTW}=\frac{f\&times;2^N}{\mathrm{fs}}=\frac{10\&times;2^{32}}{60}$

Then frequency control word FTW is 00101010101010101010101010101010, and this binary numeric input then can be realized that output frequency f is the setting of 10MHz by phase accumulator 1 in the frequency control word register.

2, phase control words

If second channel phase control words POW2 is 0, by:

:

By

Then phase control words POW1 is 01000000000000, and this binary numeric input then can be realized that phase differential is 90 ° signal output by first passage totalizer 51 in the phase control word register of first passage.

3, amplitude control word

By:

$\frac{\mathrm{<figure-callout\; id="2"\; label="ACR"\; filenames="A20081004559100111.png"\; state="\{\{state\}\}">ACR</figure-callout>}2}{\mathrm{<figure-callout\; id="1"\; label="ACR"\; filenames="A20081004559100111.png"\; state="\{\{state\}\}">ACR</figure-callout>}1}=\frac{5}{8}$

If ACR1 is 0000001000, ACR2 is 0000000101, and this binary numeric input to separately amplitude control word register, is then realized that by divider 61,62 first passages and second channel amplitude were than 5: 8.

Phase accumulator among the present invention and frequency control word bit number N, totalizer and phase control word bit number n, divider and amplitude control word figure place m are variable, and the look-up table content also can be changed, can also carry out suitable improvement and optimization to DDS according to the digitizing means in addition, convenient adapt to new requirement and news, and these functions to be chip-scale DDS be difficult to realize

In the present embodiment, but the DDS device of binary channels phase-modulation and amplitude-modulation of the present invention realize based on FPGA, use the VerilogHDL language compilation.

Although above the illustrative embodiment of the present invention is described; but should be understood that; the invention is not restricted to the scope of embodiment; to those skilled in the art; as long as various variations appended claim limit and the spirit and scope of the present invention determined in; these variations are conspicuous, and all utilize innovation and creation that the present invention conceives all at the row of protection.

Claims (2)

1. But 1, a kind of synchronous DDS device of binary channels phase-modulation and amplitude-modulation is included in the phase accumulator of the N position that each clock period adds up the frequency control word of N position, and the phase value that it is output as the high n position of the back intercepting that adds up is characterized in that, also comprises:

   The first passage totalizer, an one input end is connected to the output terminal of phase accumulator, and another input termination first passage phase control words is used for phase value and the addition of first passage phase control words, the output first passage is offset phase value, finishes the phase adjusted of output waveform;

   First passage sine lookup table, input end are connected to the output of first passage totalizer, are used for the first passage of input is offset phase value as the address of tabling look-up, and are stored in the interior range value of table according to this address extraction, finish phase-width of cloth conversion;

   The first passage divider, an one input termination first passage sine lookup table amplitude output, another input termination first passage amplitude control word, be used for the range value of first passage sine lookup table output is compared coefficient divided by the amplitude of first passage divider, and export, finish the amplitude adjusted of output waveform;

   The first passage digital to analog converter connects the amplitude output of first passage divider, and the range value that is used to receive the output of first passage divider converts the ladder analog waveform to;

   The first passage low-pass filter connects the output of first passage digital to analog converter, is used for the ladder analog waveform smoothly is continuous sinusoidal waveform output;

   The second channel sine lookup table identical with the first passage sine lookup table, input end is connected to the output terminal of phase accumulator, and the phase value that is used for importing is stored in the interior range value of table as the address of tabling look-up according to this address extraction, finishes phase-width of cloth conversion;

   The second channel digital to analog converter connects the amplitude output of second channel sine lookup table, and converts thereof into the ladder analog waveform;

   The second channel low-pass filter by, connect the output of second channel digital to analog converter, smoothly be the output of continuous sinusoidal waveform with the ladder analog waveform;

   Adopt the same system clock signal to provide synchro control to phase accumulator and two passages.
2. 2, but the synchronous DDS device of binary channels phase-modulation and amplitude-modulation according to claim 1 is characterized in that, described synchronous DDS device also comprises:

   The second channel totalizer, join on the connecting path between phase accumulator and the second channel sine lookup table, an one input end is connected to the output terminal of phase accumulator, another input termination second channel phase control words, be used for phase value and the addition of second channel phase control words, the output second channel is offset phase value, finishes the phase adjusted of second channel output waveform;

   The second channel divider, join on the connecting path between second channel sine lookup table and the second channel digital to analog converter, an one input termination second channel sine lookup table amplitude output, another input termination second channel amplitude control word, be used for the range value of first passage sine lookup table output is compared coefficient divided by the second channel amplitude, and export, finish the amplitude adjusted of second channel output waveform.

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