CN101336483B - 高迁移率功率金属氧化物半导体场效应晶体管 - Google Patents

高迁移率功率金属氧化物半导体场效应晶体管 Download PDF

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CN101336483B
CN101336483B CN200680052188.8A CN200680052188A CN101336483B CN 101336483 B CN101336483 B CN 101336483B CN 200680052188 A CN200680052188 A CN 200680052188A CN 101336483 B CN101336483 B CN 101336483B
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CN101336483A (zh
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德瓦·帕塔纳亚克
K-I·陈
T-T·朝
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Abstract

高迁移率的P-沟道功率金属氧化物半导体场效应晶体管。根据本发明的一种实施例，功率MOSFET被制作成使空穴在沿着(110)晶面或其等价面的反转/累积沟道中流动，当相对于源极施加负电压到栅极时，电流沿[110]方向或其等价方向。增强的空穴沟道迁移率导致导通电阻的沟道部分减小，因此，有利地减少了装置的全“导通”电阻。

Description

高迁移率功率金属氧化物半导体场效应晶体管
相关申请的交叉引用 
本申请要求2005年12月22日提交的序列号为60/753,550，卷号(Attorneydocket)为VISH-8756.PRO，标题为“高迁移率的P-沟道沟槽(channel trench)功率金属氧化物半导体场效应晶体管(High Mobility P-Channel Trench PowerMetal-Oxide Semiconductor Field Effect Transistors)”，发明人是Pattanayak等的美国临时申请的优先权，该美国专利申请通过引用结合于此。 
技术领域
本发明的实施例涉及半导体的设计和制作。更具体地，本发明的实施例涉及高迁移率功率金属氧化物半导体场效应晶体管的***和方法。 
背景技术
MOSFET(金属氧化物半导体场效应晶体管)装置的导通状态(或“导通”)电阻是重要的性能指数，尤其是对于功率装置。例如，当这样的装置导通或导电时，***功率的一部分由于装置里的电阻热而损耗。这将导致效率有害地降低。这种电阻热也会导致热损耗问题，进而可导致***过热和/或可靠度降低。因此，特别需要低导通电阻的装置。 
MOSFET(金属氧化物半导体场效应晶体管)装置的导通电阻主要包括沟道电阻、漂移层(drift layer)电阻和衬底部件电阻。对于低压MOSFET，沟道电阻分量提供主要作用。沟道电阻与沟道中的载流子的迁移率成反比。在硅里，沟道中的载流子迁移率依赖于晶面和电流方向，对于不同类型的载流子，例如电子相对于空穴，这种依赖性不同。 
MOSFET可以用晶体硅来制作。与晶格有关的几何结构通常根据密勒指数(Miller index)来描述，密勒指数依据晶体的晶轴，例如，a，b和c。当晶体是周期性的，存在等效方向和等效平面族。在这里，平面，例如从晶体锭切开的晶片的表面，用被圆括号括到里面的例如(abc)来描述。这种表示方法描述了(abc)平面和等效平面。相对于晶格的方向用被方括号括到里 面的例如[abc]来描述。这种表示方法描述了[abc]方向和等效方向。 
已知，在硅中电子的迁移率在(100)晶面达到最大，同时对电流的方向的依赖性小。相反，晶面的方向和电流的方向对空穴的迁移率都有很强的作用。空穴的迁移率在(110)晶面和[110]方向达到最大。 
很久以前就知道，(110)晶面里的空穴的迁移率依赖于电流方向，在[110]方向达到最大(D.Colman等，Journal of Applied Physics(应用物理杂志)，pp.1923-1931，1968)。他们的实验结果显示在图1的曲线图里(传统技术)。从图1的曲线图里，比起常规的(100)方向，很明显取决于栅极偏压，在(110)晶面里的空穴的迁移率增加到多于两倍。 
Plummer等(1980IEDM，PP.104-106)也已经报道了制作在沟槽侧壁平行于(110)晶面的晶片上的沟槽功率MOSFET比沟槽壁平行于(110)平面但是其电流方向也在[100]方向的相应沟槽MOSFET在较高栅极电压展示了较高的空穴迁移率。 
更近地，多名作者已经重申空穴迁移率在(110)平面里和[110]方向上是最高的(H.Irie等，IEDM，pp.225-228，2004和其参考文献)。沟槽侧向装置的专利已经被授予Wendell P.Noble等(2003年6月17日公布的美国专利号6,580,154)。 
然而，传统的P-沟道沟槽MOSFET装置被制作成使得空穴在沿着(100)晶面的反转沟道中运动，且电流方向在[100]方向。 
因此，存在对导通电阻降低的功率MOSFET装置的需求。另外地存在对用于空穴被限制在(110)平面以及在[110]方向运动的P-沟槽功率MOSFET的***和方法的需求。进一步存在对用于与半导体设计和制造的现有***和方法兼容互补的功率MOSFET的***和方法的需求。本发明的实施例提供了这些优点。 
发明内容
公开了高迁移率P-沟道功率金属氧化物半导体场效应晶体管。根据本发明的实施例，功率MOSFET被制作成使空穴在反转/累积沟道中流动，该反转/累积沟道沿着(110)晶面，当相对于源极施加负电压到栅极时，电流沿[110]方向。增强的空穴沟道迁移率导致导通状态电阻的沟道部分减小，因此，有利地减少了装置的全“导通”电阻。 
根据本发明的另一实施例，功率MOSFET结构包括栅极和源极。功率MOSFET还包括反转/累积沟道，其中空穴在所述反转/累积沟道中流动。沟槽沿(110)晶面对齐，当相对于源极施加负电压到所述栅极时电流沿[110]方向。 
附图说明
以下方面由本申请支持。 
本发明第一方面：一种竖直沟槽MOSFET，其中空穴电流被限制在一平面中流动，且沿一组方向及其等价方向流动。 
本发明第二方面中：如第一方面所述的竖直沟槽MOSFET在晶片中制作。 
本发明第三方面：如第二方面所述的竖直沟槽MOSFET，其中所述空穴电流对相对于所述MOSFET的源极施加负电压到所述MOSFET装置的栅极产生响应。 
本发明的第四方面：一种平面DMOSFET的沟道结构，包括：P沟道；表面方向沿一方向的硅晶片；在一平面中的电流；和沿一组方向及其等价方向的电流。 
本发明的第五方面：一种功率MOSFET结构，包括：栅极；源极；反转/累积沟道，其中空穴在所述反转/累积沟道中流动，其中所述沟道沿一晶面对准，且其中当相对于所述源极施加负电压到所述栅极时，所述流动沿一组方向及其等价方向。 
本发明的第六方面：一种制作沟槽MOSFET的方法，所述方法包括：使用表面方向沿一组方向及其等价方向的硅晶片；和在一平面或其等价平面中蚀刻沟槽。 
本发明的第七方面：如第六方面所述的方法，其中当在具有相对于所述MOSFET装置的源极施加到其栅极的负电压的情况下运转时，所述沟槽MOSFET包括反转沟道中的在一平面或其等价平面中且沿一方向的电流。 
结合于此形成本说明书的一部分的附图示出了本发明的实施例，并且与描述一起用来解释本发明的原理。除非另有说明，附图未按照比例绘制。 
图1示出了基于晶面方向的空穴迁移率的实验测量结果。 
具体实施方式
图2示出了用于制作传统的P沟道沟槽功率MOSFET的传统晶片。 
图3、4、5、6和7示出了在多种不同的沟槽旋转(trench rotation)的沟槽的结构。 
图8A、8B、8C、8D示出了根据本发明实施例的带有各种平坦部(flat)的(110)晶片。 
图9示出了根据本发明实施例的垂直于晶片平坦部的蚀刻沟槽。 
图10示出了根据本发明实施例的平行和垂直于晶片平坦部的蚀刻沟槽。 
图11示出了根据本发明实施例的沟槽MOSFET结构的示意图。 
图12示出了根据本发明实施例的平面耗尽模MOSFET(DMOSFET)P-沟道结构的示意图。 
图13示出了根据本发明实施例的高迁移率的P-沟道沟槽MOSFET装置的示意图。 
现在将详细参照本发明的各种实施例，在附带的图纸里示出了本发明的各种实施例的实例。尽管结合这些实施例描述本发明，应理解这不是为了将本发明局限于这些实施例。而是相反，本发明旨在覆盖由附属附带权利要求限定的包括在本发明的实质和范围内的可选、更改和等价形式。另外，在本发明下面详细的描述中，大量特殊细节被阐述以提供对本发明的全面理解。但是，本领域普通技术人员应理解，可以实践本发明而不需要这些特定细节。另一方面，众所周知的方法，程序，部件，流程(电路)没有详细描述，以免不必要地混淆本发明的各个方面。 
图2示出了用于制作传统的P-沟道沟槽功率MOSFET的传统晶片200。晶片200被描述为带(001)平坦部的(001)晶片。晶片200也被描述为在<010>方向有平坦部。晶片200的顶面是(100)平面。应理解沟槽MOSFET中的电流方向，其中电流是从例如晶片200等的晶片的顶面到底面，将一直沿[100]方向，例如，如图2所示，进入图纸平面。 
图3、4、5、6和7示出了在多种不同的沟槽旋转中沟槽的结构。图3示出了封闭单元沟槽结构300。竖直沟槽310和水平沟槽320沟槽都在(100)等价面上。 
图4示出了旋转45°形成的封闭单元沟槽结构400。旋转的沟槽410和420都在(110)等价面上。 
图5示出了条带单元沟槽结构500。竖直沟槽510在(100)等价面上。 
图6示出了旋转45°形成的条带单元沟槽结构600。旋转的沟槽610在(110)等价面上。 
图7示出了旋转-45°形成的条带单元沟槽结构700。旋转的沟槽710在(110)等价面上。 
包括图5的条带单元沟槽结构500的芯片(die)和包括图6的旋转45°形成的芯片的沟槽结构600的实验实例已经被制作出来。初步分析显示例如当电流在(110)平面时，旋转45°形成的旋转沟槽结构600的全电阻比沟槽在(100)平面的传统技术装置低。 
但是，应该理解，尽管电流可以和晶片200的(110)平面对准，但是沟槽电流在[100]方向，如前所述。 
图8A、8B、8C和8D示出了根据发明实施例的带多种平坦部的(110)晶片。应理解其它的平坦部很好地适用于本发明实施例。图8A的晶片800被描述为带(110)平坦部的(110)晶片。示出了各种晶向，包括[001]、[111]和[110]。例如，如图8A所示，晶片800顶面是(110)平面。 
图8B中晶片810被描述为带(111)平坦部的(110)晶片。示出了(111)晶向。例如，如图8B所示，晶片810顶面是(110)平面。图8C中晶片820被描述为带(001)平坦部的(110)晶片。示出了[001]和[110]晶向。例如，如图8C所示，晶片820顶面是(110)平面。 
图8D中晶片830被描述为带(112)平坦部的(110)晶片。示出了[112]晶向。例如，如图8D所示，晶片830顶面是(110)平面。 
根据本发明的实施例，在晶片800(图8A)里形成的沟槽MOSFET在(110)平面和[110]方向可有空穴电流。例如，从顶面到底面的电流可在[110]方向，例如，图纸平面向里，如图8A所示。 
根据本发明的其它实施例，在晶片810(图8B)里形成的沟槽MOSFET可在(110)平面和[111]方向有空穴电流。 
根据本发明的可选实施例，在晶片820(图8C)里形成的沟槽MOSFET可在(110)平面和[001]方向有空穴电流。 
根据本发明的其它实施例，在晶片830(图8D)里形成的沟槽MOSFET可在(110)平面和[112]方向有空穴电流。 
图9示出了根据本发明实施例的垂直于晶片800(图8A)的平坦部的蚀 刻沟槽900。应该理解沟槽900在(110)或其等价面里。由于晶面是(110)平面，因此空穴电流方向也在[110]方向。应该理解本发明的实施例很好地适用于垂直于其它平坦部方向形成的沟槽，例如，如图8B，8C，和/或8D所示。 
图10示出了根据本发明实施例的平行和垂直于晶片800(图8A)的平坦部的蚀刻沟槽1000。应理解沟槽1000在(110)或其等价面里。由于晶面是(110)平面，因此空穴电流方向也在[110]方向。应理解本发明的实施例很适合相对于其它平坦部方向形成的沟槽，例如，如图8B，8C，和/或8D所示。 
图11示出了根据本发明实施例的沟槽MOSFET结构1100的示意图。沟槽MOSFET结构1100包括P+源极1110、N本体(body)1130和P+漏极1120。沟槽MOSFET结构1100可以形成在晶片800(图8A)中和晶片800上，用来提供对于电子和空穴运动电流均适合的方向。沟槽MOSFET结构1100的晶面方向在图11中已示出。应理解沟槽MOSFET结构1100的源极1110和漏极1120之间的电流在[110](或等价)方向。应理解本发明的实施例很适合垂直于其它平坦部方向形成的沟槽，例如，如图8B，8C，和/或8D所示。 
图12示出了根据本发明实施例的平面耗尽模MOSFET(DMOSFET)P沟道结构1200示意图。平面耗尽模MOSFET P沟道结构1200包括P+源极1210、N本体1230和P+漏极1220。平面耗尽模MOSFET P沟道结构1200可形成在晶片800(图纸8)中或晶片800上，用来提供对于电子和空穴运动电流均适合的方向。平面耗尽模MOSFET P沟道结构1200的晶面方向在图12中已示出。应理解，平面耗尽模MOSFET P沟道结构1200的源极1210和漏极1220之间的电流在[110](或等价)方向。应理解本发明的实施例很适合垂直于其它平坦部方向的沟槽排列，例如，如图8B，8C，和/或8D所示。 
应理解在不同的晶面里氧化物生长速度不同。例如，氧化物一般在[110]方向比在[100]方向增长的更快。在(110)平面的表面电荷是在(100)平面的大约2倍。当设计高迁移率MOSFET的临界电压时，需要考虑这些特性。 
图13示出了根据本发明实施例的高迁移率P沟道累积沟槽MOSFET1300的示意图。沟槽MOSFET 1300包括源极金属1310，绝缘体1320，P+ 源极区1330和N本体1340。沟槽MOSFET 1300还包括多晶硅栅极1350，栅极氧化物1390和P-漂移区1360。沟槽MOSFET 1300另外还包括衬底1370和漏极镀金属1380。 
如图13所示，应理解沟槽MOSFET 1300是沿[110]方向制作。根据本发明实施例，沟槽MOSFET 1300可以垂直于(110)平坦部形成。应理解本发明的实施例很适合垂直于其它平坦部方向形成的沟槽，例如，如图8B，8C，和/或8D所示。 
在电流传导中，沟槽MOSFET 1300使沟道(N本体1340)反转并且在轻微掺杂(slightly doped)累积区(P-漂移区1360)累积电荷，在栅极1350附近形成P+累积层。因此，电流在N本体1340里的反转层和紧接栅极1350形成的累积层之中流动。 
击穿电压在延伸到漂移区中的PN结处被承受。但是，不像传统的沟槽MOSFET，漂移电阻由两个平行部分组成：一个是累积区电阻，且另一个是漂移区电阻。累积区电阻部分小于流动区电阻部分。根据本发明实施例，由于电流在(110)平面和[110]方向流动，漂移区全电阻将比传统的累积型功率MOSFET装置的相应值大大减少。 
在这个新颖的MOSFET设计中，通过将MOSFET的累积层平面制作为(110)，将累积层方向制作为[110]，累积层电阻将被大大减小，例如减小到大约1/2。 
根据本发明的实施例提供了低导通电阻的功率MOSFET的***和方法。根据本发明的实施例也提供了P-沟道沟槽功率MOSFET的***和方法，其中空穴被限制在(110)平面并在[110]方向流动。另外，根据本发明的实施例提供了用于功率MOSFET的***和方法，该功率MOSFET与现有半导体设计和制造的***和方法兼容互补。 
描述了本发明的各种实施例，高迁移率P-沟道功率金属氧化物半导体场效应晶体管。尽管本发明在特定实施例中描述，应理解本发明不应解释为限于这样的实施例，而是按照下面的权利要求解释。 

Claims (5)

1.一种竖直沟槽MOSFET，包括：沿着(110)平面的沟道，其中空穴电流被限制在(110)平面的沟道中流动，且沿选自[111]、[112]、[001]及其等价方向的方向流动，以及
在(110)平面形成的并且在芯片上旋转45°形成的沟槽。
2.如权利要求1所述的竖直沟槽MOSFET在(110)晶片中制作。
3.如权利要求2所述的竖直沟槽MOSFET，其中所述空穴电流对相对于所述MOSFET的源极施加负电压到所述MOSFET装置的栅极产生响应。
4.一种功率MOSFET结构，包括：
栅极，包括在(110)晶面上形成并且在芯片上旋转45°形成的沟槽；
源极；
反转／累积沟道，其沿着(110)所述晶面，
其中空穴在所述反转／累积沟道中流动，
其中所述沟道沿所述(110)晶面对准，且
其中当相对于所述源极施加负电压到所述栅极时，所述流动沿选自[111]、[112]、[001]及其等价方向的方向。
5.一种制作沟槽MOSFET的方法，所述方法包括：
使用表面方向沿选自[111]、[112]、[001]及其等价方向的方向的硅晶片；和
在(110)平面或其等价平面中蚀刻沟槽以形成沿着(110)平面的沟道，并且沟槽在芯片上旋转45°形成，其中空穴电流被限制在所述(110)平面的沟道中流动。
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WO2007076063A2 (en) 2007-07-05
CN101336483A (zh) 2008-12-31
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