CN100490073C - 等离子体处理装置和等离子体处理方法 - Google Patents
等离子体处理装置和等离子体处理方法 Download PDFInfo
- Publication number
- CN100490073C CN100490073C CNB2003801038082A CN200380103808A CN100490073C CN 100490073 C CN100490073 C CN 100490073C CN B2003801038082 A CNB2003801038082 A CN B2003801038082A CN 200380103808 A CN200380103808 A CN 200380103808A CN 100490073 C CN100490073 C CN 100490073C
- Authority
- CN
- China
- Prior art keywords
- plasma
- peristome
- dividing plate
- substrate
- plasma processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000003672 processing method Methods 0.000 title description 2
- 239000000758 substrate Substances 0.000 claims abstract description 65
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 56
- 239000010703 silicon Substances 0.000 claims abstract description 56
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 44
- 239000007789 gas Substances 0.000 claims description 29
- 229910052757 nitrogen Inorganic materials 0.000 claims description 22
- 238000000034 method Methods 0.000 claims description 21
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 18
- 230000003647 oxidation Effects 0.000 claims description 13
- 238000007254 oxidation reaction Methods 0.000 claims description 13
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 12
- 239000010453 quartz Substances 0.000 claims description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 55
- 150000004767 nitrides Chemical class 0.000 abstract description 17
- 230000006866 deterioration Effects 0.000 abstract description 6
- 238000005192 partition Methods 0.000 abstract 1
- 239000001301 oxygen Substances 0.000 description 13
- 229910052760 oxygen Inorganic materials 0.000 description 13
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 12
- 229910052814 silicon oxide Inorganic materials 0.000 description 12
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 10
- 150000002500 ions Chemical class 0.000 description 9
- 229910052581 Si3N4 Inorganic materials 0.000 description 7
- 150000003254 radicals Chemical class 0.000 description 7
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 7
- 229910052786 argon Inorganic materials 0.000 description 5
- 230000008676 import Effects 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000005755 formation reaction Methods 0.000 description 4
- 239000002826 coolant Substances 0.000 description 3
- 238000005121 nitriding Methods 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 239000004411 aluminium Substances 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000005284 excitation Effects 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000003595 mist Substances 0.000 description 2
- 150000002831 nitrogen free-radicals Chemical class 0.000 description 2
- 238000009832 plasma treatment Methods 0.000 description 2
- 230000009466 transformation Effects 0.000 description 2
- 229910017083 AlN Inorganic materials 0.000 description 1
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- ZZUFCTLCJUWOSV-UHFFFAOYSA-N furosemide Chemical compound C1=C(Cl)C(S(=O)(=O)N)=CC(C(O)=O)=C1NCC1=CC=CO1 ZZUFCTLCJUWOSV-UHFFFAOYSA-N 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 229910052743 krypton Inorganic materials 0.000 description 1
- DNNSSWSSYDEUBZ-UHFFFAOYSA-N krypton atom Chemical compound [Kr] DNNSSWSSYDEUBZ-UHFFFAOYSA-N 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- -1 oxygen radical Chemical class 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 230000003313 weakening effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32623—Mechanical discharge control means
- H01J37/32633—Baffles
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C8/00—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals
- C23C8/06—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using gases
- C23C8/36—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using gases using ionised gases, e.g. ionitriding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32192—Microwave generated discharge
- H01J37/32211—Means for coupling power to the plasma
- H01J37/3222—Antennas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32458—Vessel
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
- H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02247—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by nitridation, e.g. nitridation of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
- H01L21/02329—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen
- H01L21/02332—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen into an oxide layer, e.g. changing SiO to SiON
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
- H01L21/0234—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/3143—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
- H01L21/3144—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers on silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/3165—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
- H01L21/31654—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
- H01L21/31658—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe
- H01L21/31662—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe of silicon in uncombined form
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/318—Inorganic layers composed of nitrides
- H01L21/3185—Inorganic layers composed of nitrides of siliconnitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3211—Nitridation of silicon-containing layers
Abstract
根据本发明,当氮化处理硅基板表面时,在等离子体产生部和硅基板之间配置具有开口部的隔板,控制为硅基板表面的电子密度是le+7(个·cm-3)~le+9(个·cm-3)。根据本发明,有效地抑制了硅基板和氮化膜的劣化。
Description
技术领域
本发明涉及使用等离子体氮化处理或者氧化处理硅基板的等离子体处理装置和等离子体处理方法。
背景技术
在使用了等离子体的硅基板的氮化处理时,例如,向微波激励后的氩气或氪气等的稀有气体等离子体中导入氮气或氮气和氢气、或NH3气体等的包含氮元素的气体。由此,产生N自由基(radical)或NH自由基,而将硅氧化膜表面转换为氮化膜。另外,还存在通过微波等离子体来直接氮化硅基板表面的方法。
若根据现有的装置和方法,则因入射到硅氧化模(硅基板)上的离子,有基底膜(Si、SiO2)或成膜的膜(SiN)受到损害的问题。因膜的损害,存在产生了基板劣化、漏电流增大、因界面特性的劣化造成的晶体管特性的劣化等问题的情况。
另外,作为其他问题,有因向硅氧化膜和硅氮化膜的界面的氧元素的扩散,硅氮化膜的膜厚增加到必要以上的问题。
发明内容
本发明鉴于上述情况而作出,第一目的是提供一种可以有效抑制硅基板(硅氧化膜)和氮化膜的劣化的等离子体处理装置和等离子体处理方法。
第二目的是提供一种可以有效抑制硅氮化膜的膜厚增大的等离子体处理装置和等离子体处理方法。
为了实现上述目的,本发明的第一方式的等离子体处理装置在等离子体产生部和硅基板之间配置具有开口部的隔板。
这样,通过在处理容器内配置隔板,缓和了到达硅基板上的离子能量,可以有效抑制对硅基板和氮化膜自身的损害。另外,透过隔板的开口部而到达硅基板的气体在基板上的流速增加,硅基板表面的氧元素分压降低,从氮化膜向硅基板的表面侧跑的氧元素数量增加。结果,可以有效抑制氮化膜的厚度增大。
作为隔板,优选使用在对应于硅基板的形状的区域内配置的具有多个开口部的隔板。这时,各开口部的开口面积优选是例如13mm2~450mm2,优选,隔板的厚度优选是3mm~7mm,隔板的位置优选位于距所述硅基板的表面20~40mm的上方。
对于开口部的大小,可以是各开口部全部是相同大小,也可以设定为所述隔板的中央部的开口部的直径比位于该中央部的外侧的开口部的直径小。由此,相比于其外侧可以进一步抑制硅基板的中央部的氮化膜的厚度增加。例如,中央部的开口部的直径可以是9.5mm,位于该中央部的外侧的开口部的直径可以是10mm。在设定为所述隔板的中央部的开口部的直径比位于该中央部的外侧的开口部的直径大的情况下,相比于其外侧可以促进硅基板的中央部的氮化膜的厚度增加。
本发明还可以适用于使用等离子体进行氧化处理的装置。即,可以提出在对在处理容器内配置的硅基板,使用等离子体进行氧化处理的等离子体处理装置中,在等离子体产生部和所述硅基板之间配置了具有开口部的隔板的装置。该情况下,也可设定为隔板的中央部的开口部的直径比位于该中央部的外侧的开口部的直径小。例如,中央部的开口部的直径可以是2mm,位于该中央部的外侧的开口部的直径可以是2.5mm。进一步相反,也可设定为隔板的中央部的开口部的直径比位于该中央部的外侧的开口部的直径大。
本发明的另一方式的等离子体处理方法中,将所述硅基板表面的电子密度控制为1e+7(个·cm-3)~1e+9(个·cm-3)。如上所述,通过减弱硅基板上的离子能量和离子密度,可以有效抑制对硅基板和氮化膜的损害。
本发明的另一方式的等离子体处理方法中,将所述硅基板表面的气体流速控制为1e-2(m·sec-1)~1e+1(m·sec-1)。如上所述,若硅基板上的气体流速增加,则硅基板表面的氧元素分压降低,从氮化膜向硅基板的表面侧跑的氧元素的量增加。结果,可以有效抑制氮化膜的厚度增大。
附图说明
图1是表示本发明的实施例的等离子体处理装置的结构的示意图;
图2是实施例所用的等离子体缓冲(baffle)板的平面图;
图3(A)~(C)是表示实施例的等离子体处理工序的一部分的示意图;
图4是表示伴随着氮化处理的时间经过的膜中氮元素含有比例的变化曲线;
图5是表示伴随处理压力的变化的电子密度的变化曲线;
图6是表示伴随处理压力的变化的电子温度的变化曲线;
图7是开口部的大小在中央部及其***不同的等离子体缓冲板的平面图。
具体实施方式
图1表示本发明的实施例的等离子体处理装置10的示意结构。等离子体处理装置10具有形成了保持作为被处理基板的硅晶片W的基板保持台12的处理容器11,处理容器11内的空气(气体)经排气孔11A、11B进行排气。另外,基板保持台12具有加热硅晶片W的加热器功能。
在处理容器11的上方对应于基板保持台12上的硅晶片W形成开口部。该开口部通过由石英和Al2O3构成的电介质板13来塞住。在电介质板13上(外侧)配置作用为天线的槽板14。该槽板14由具有导电性的材质、例如铜的薄圆板构成,形成多个长孔14a。这些长孔14a作为整体按同心圆状,或大致螺旋状排列。
在槽板14上(外侧)配置了由石英、氧化铝、氮化铝等构成的电介质板15。该电介质板15称作滞波板或波长缩短板。在电介质板15上(外侧)配置冷却板16。在冷却板16的内部设置流过冷却介质的冷却介质路径16a。另外,在处理容器11的上端中央设置了导入由微波供给装置17产生的例如2.45GHz的微波的同轴导波管18。
在处理容器11内的硅晶片W的上方配置由石英、氧化铝或金属构成的作为隔板的等离子体缓冲板20。等离子体缓冲板20通过在处理容器11的内壁设置的石英制的衬套21来保持。后面描述等离子体缓冲板20的细节。在基板保持台12的周围配置由铝构成的气体缓冲板26。在气体缓冲板26的下面设置石英覆盖板28。
在处理容器11的内壁设置了导入气体用的气体喷嘴22。通过质量流量(mass flow)控制器23来控制从气体喷嘴供给的气体的流量。在处理容器11的内壁的内侧形成冷却介质流路24,使其包围容器整体。
图2表示等离子体缓冲板20的构造。等离子体缓冲板20通过在厚度为3mm~7mm(例如,约5mm)的圆盘状的板的中央附近形成多个开口部20a构成。另外,模式表示了图中的开口部20a的大小、配置等,当然有时与实际使用的情况不同。
等离子体缓冲板20例如可以由石英、铝、氧化铝、硅、金属等形成。等离子体缓冲板20的位置为距硅晶片W的表面高H2(20mm~50mm,例如30mm),距浇淋板14的下面为距离H1(40mm~110mm,例如80mm)。若等离子体缓冲板20过于接近硅晶片W表面,则妨碍了均匀的氧化、氮化处理。另一方面,若等离子体缓冲板20离硅晶片W的表面过远,则等离子体密度降低,很难进行氧化·氮化。
在处理直径约200mm的硅晶片W的情况下,等离子体缓冲板20的直径D1可以为360mm、配置了开口部20a的区域的直径D2可以为250mm。在处理直径约300mm的硅晶片W的情况下,可以根据晶片的大小,来适当改变D1、D2的大小。另外,为了实现硅晶片W表面的均匀处理,优选根据距等离子体缓冲板20的硅晶片W的距离H2来设定D2的值,例如,优选是150mm以上。
作为在等离子体缓冲板20上形成的开口部20a的直径,可以设定为2.5mm~10mm。例如,在开口部20a的直径为2.5mm的情况下,其数目可以为1000~3000左右。另外,在开口部20a的直径为5.0mm或10.0mm的情况下,其数目可以为300~700左右。开口部20a的成形可以采用激光加工法。另外,开口部20a的形状并不限于圆形,也可以是窄缝状。这时,各开口部20a的开口面积优选为3mm2~450mm2。若开口部20a的开口面积过大,则离子密度提高,不能减少损害。另一方面,若开口面积过小,则等离子体密度降低,很难进行氧化·氮化。另外,开口部20a的开口面积优选考虑等离子体缓冲板20的厚度来设定。
在使用如上所述结构的等离子体处理装置10来进行等离子体处理时,首先,经排气孔11A、11B进行处理容器11内部的排气,将处理容器11设定为预定的处理压力。之后,从气体喷嘴22中导入氩气、Kr等的惰性气体和氧化气体或氮化气体。
另外,将通过同轴导波管18供给的频率为几GHz、例如2.45GHz的微波经电介质板15、槽板14、电介质板13导入处理容器11中。通过处理容器11内的高密度微波等离子体激励形成的自由基(radical)经等离子体缓冲板20到达硅晶片W的表面。到达了硅晶片W的自由基(气体)沿晶片表面向径向(放射方向)流动,进行快速排气。由此,抑制了自由基的重新结合,一样的基板处理在低温中也可高效地进行。
图3(A)~(C)表示使用了图1的等离子体处理装置10的本实施例的基板处理工序。
将硅基板31(对应于硅晶片W)导入到处理容器11中,而从气体喷嘴22中导入Kr和氧气的混合气体。通过由微波等离子体来激励该气体,来形成原子状氧(氧自由基)O*。这样,如图3(A)所示,该原子状氧O*经等离子体缓冲板20到达硅基板31的表面。
通过由原子状氧来处理硅基板31的表面,如图3(B)所示,在硅基板31的表面上形成了厚度为1.6nm的硅氧化膜32。这样形成的硅氧化膜32,尽管是在400℃左右的非常低的基板温度上形成的硅氧化膜,具有与在1000℃以上的高温下形成的热氧化膜匹敌的漏电流特性。
接着,在图3(C)所示的工序中,向处理容器11中供给氩气和氮气的混合气体,将基板温度设定在400℃后通过供给微波来激励等离子体。
在图3(C)的工序中,将处理容器11的内压设定为0.7Pa,例如在1000SCCM的流量下供给氩气,在例如40SCCM的流量下供给氮气。结果,硅氧化膜32的表面转换为硅氮化膜32A。另外,硅氧化膜32也可以是热氧化膜。
将图3(C)的工序持续20秒以上,例如40秒,结果,硅氮化膜32A生长,若超过拐点,则硅氮化膜32A下的硅氧化膜32中的氧元素开始侵入硅基板31中。
本实施例中,由于在处理容器11内配置了等离子体缓冲板20,所以到达硅晶片W上的离子能量和等离子体密度减少。具体的,将硅晶片W表面的电子密度控制为1e+7(个·cm-3)~1e+9(个·cm-3)。由此,认为对硅氧化膜32和氮化膜32A的造成了损害的离子密度减少,而缓和了对硅氧化膜32和氮化膜32A的损害。
在控制硅晶片W的表面的电子密度的情况下,可以通过例如,(a)减小等离子体缓冲板20的直径,(b)增大等离子体缓冲板20和晶片W表面的间隔,(c)增大等离子体缓冲板20的厚度,来降低电子密度。
另外,通过等离子体缓冲板20的开口部20a到达硅晶片W的气体在晶片W上的流速增加。具体的,将硅晶片W表面的气体流速控制为1e-2(m·sec-1)~1e+1(m·sec-1)。结果,硅晶片W表面的氧元素分压降低,从氮化膜32A向硅晶片W的表面侧跑的氧元素的量增加,所以缓和了氮化膜32A的膜厚增大。这种气体流速的控制通过开口部20a的大小的调整来进行,越小,流速越增加。
另外,等离子体处理装置10由于使用槽板14来产生由微波产生的等离子体,所以可在低功率下产生高密度的等离子体,从这点来看也可实施对基板的损害极小的处理。
接着,图4~图6表示使用等离子体装置10,对硅基板实际进行氮化处理的结果。为了明白本发明的效果,所以还兼表示了与不具有等离子体缓冲板20的现有的等离子体处理装置的比较。处理的条件如下。
即,基板温度是400℃,微波的功率是1500W,处理容器内的压力是50~2000mTorr,氮气的流量是40~150sccm,氩气的流量是1000~2000sccm。
图4表示处理时间一膜中氮元素的比例,在不具有等离子体缓冲板的现有装置中,看到10秒期间增加了约30%的氮元素的比例,但是如本发明那样,根据具有等离子体缓冲板的装置,随着时间的经过膜中氮元素的比例增加变缓。因此,本发明的方法容易控制氮化速率。
图5表示处理压力变化时的电子密度的变化,可以确认如本发明那样,具有等离子体缓冲板的装置在所有的压力值下,与现有技术相比电子密度低。因此,根据本发明,可以确认抑制了对氮化膜的损害。
图6是表示处理压力变化时的电子温度的变化,可以确认如本发明那样,具有等离子体缓冲板的装置在所有压力值下,与现有技术相比电子温度低。因此,根据本发明,与现有技术相比可以抑制因充电而产生的对基板的损害。
在所述的实施例中使用的等离子体缓冲板20虽然使用开口部20a的大小完全相同的板,但是如图7所示,也可设定为由直径D3所示的圆形的中央部区域的开口部20b的大小比由直径D2所示的其外侧区域的开口部20b小。例如,在开口部20a的直径为10mm的情况下,中央部的开口部20b的直径比其小,可设定为例如9.5mm。
这样,通过使中央部的开口部20b的大小比位于其外侧的区域的开口部20a小,可以减小通过该中央部的氮自由基的量,由此,可以抑制基板中央部的氮化。因此,在有具有例如中央部的膜厚增大的倾向的装置特性、处理特性的情况下,通过使用图7所示的中央部的开口部20b的直径小的等离子体缓冲板20,抑制了中央部的膜厚的生长,结果,作为基板整体进行了均匀的氮化处理,可以实现均匀的膜厚。
相反,若中央部的开口部20b的大小比位于其外侧的开口部20a大,则通过该中央部的氮自由基量比其他增加,而可以促进基板中央部的氮化。因此,在有具有例如中央部的膜厚比其他小的倾向的装置特性、处理特性的情况下,这样,通过使用中央部的开口部20b的大小比位于其外侧的区域的开口部20a大的等离子体缓冲板20,可以实现均匀的膜厚。
另外,通过变化等离子体缓冲板20本身的厚度,可以进行氮化率的控制。即,若增大等离子体缓冲板20的厚度,则可以更加抑制氮化率。
进一步,所述实施方式的等离子体处理装置虽然作为进行氮化处理的装置构成,但是装置结构本身可以原样作为氧化处理基板的装置使用。
与已经说明的氮化处理的情况相同,通过采用等离子体缓冲板,可以减少离子能量和离子密度,可以缓和对硅氧化膜的损害。
产业上的可用性
本发明对半导体设备的制造工序中的氮化膜、氧化膜的形成非常有效。
Claims (10)
1、一种等离子体处理装置,对配置在处理容器内的基板,使用等离子体进行氮化处理、氧化处理,其特征在于:
在等离子体产生部和所述基板之间配置具有开口部的隔板,
所述隔板的位置位于距所述基板的表面20~40mm的上方。
2、根据权利要求1所述的等离子体处理装置,其特征在于:
所述隔板的各开口部的直径完全相同。
3、根据权利要求1所述的等离子体处理装置,其特征在于:
所述隔板的中央部的开口部的直径比位于该中央部的外侧的开口部的直径小。
4、根据权利要求1所述的等离子体处理装置,其特征在于:
所述隔板的中央部的开口部的直径比位于该中央部的外侧的开口部的直径大。
5、根据权利要求1~4之一所述的等离子体处理装置,其特征在于:
所述隔板具有在对应于所述基板的形状的区域内配置的多个开口部;
各开口部的开口面积是13mm2~450mm2。
6、根据权利要求1~4之一所述的等离子体处理装置,其特征在于:
所述隔板的厚度是3mm~7mm。
7、一种等离子体处理方法,对配置在处理容器内的基板,隔着设置在距所述基板的表面20~40mm的上方的具有开口部的隔板,使用等离子体进行氮化处理或者氧化处理,其特征在于:
将所述基板表面的所述等离子体的电子密度控制为1e+7(个·cm-3)~1e+9(个·cm-3)。
8、一种等离子体处理方法,对配置在处理容器内的基板,隔着设置在距所述基板的表面20~40mm的上方的具有开口部的隔板,使用等离子体进行氮化处理或者氧化处理,其特征在于:
将所述基板表面的气体流速控制为1e-2(m·sec-1)~1e+1(m·sec-1)。
9、一种等离子体处理装置,对配置在处理容器内的基板,使用等离子体进行氮化处理或者氧化处理,其特征在于:
在等离子体产生部和所述基板之间配置了具有开口部的隔板,
所述隔板由石英、氧化铝或者硅形成,
所述隔板的位置位于距所述基板的表面20~40mm的上方。
10、一种等离子体处理装置,对配置在处理容器内的基板,使用等离子体进行氮化处理或者氧化处理,其特征在于,该装置包括:
在等离子体产生部和所述基板之间配置的、具有开口部的隔板;和
形成多个孔作为天线发挥作用的槽板,
所述等离子体通过微波的供给而生成,
所述隔板的位置位于距所述基板的表面20~40mm的上方。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002335893 | 2002-11-20 | ||
JP335893/2002 | 2002-11-20 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNA2008102139812A Division CN101414560A (zh) | 2002-11-20 | 2003-11-20 | 等离子体处理装置和等离子体处理方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1714430A CN1714430A (zh) | 2005-12-28 |
CN100490073C true CN100490073C (zh) | 2009-05-20 |
Family
ID=32321786
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2003801038082A Expired - Fee Related CN100490073C (zh) | 2002-11-20 | 2003-11-20 | 等离子体处理装置和等离子体处理方法 |
CNA2008102139812A Pending CN101414560A (zh) | 2002-11-20 | 2003-11-20 | 等离子体处理装置和等离子体处理方法 |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNA2008102139812A Pending CN101414560A (zh) | 2002-11-20 | 2003-11-20 | 等离子体处理装置和等离子体处理方法 |
Country Status (7)
Country | Link |
---|---|
US (1) | US20050205013A1 (zh) |
JP (1) | JP4673063B2 (zh) |
KR (3) | KR100883697B1 (zh) |
CN (2) | CN100490073C (zh) |
AU (1) | AU2003284598A1 (zh) |
TW (1) | TWI252517B (zh) |
WO (1) | WO2004047157A1 (zh) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006310736A (ja) * | 2005-03-30 | 2006-11-09 | Tokyo Electron Ltd | ゲート絶縁膜の製造方法および半導体装置の製造方法 |
US7820557B2 (en) | 2005-03-31 | 2010-10-26 | Tokyo Electron Limited | Method for nitriding substrate and method for forming insulating film |
CN101189708A (zh) * | 2005-05-31 | 2008-05-28 | 东京毅力科创株式会社 | 等离子体处理装置和等离子体处理方法 |
JP2007042951A (ja) * | 2005-08-04 | 2007-02-15 | Tokyo Electron Ltd | プラズマ処理装置 |
JP2007149788A (ja) * | 2005-11-24 | 2007-06-14 | Aqua Science Kk | リモートプラズマ装置 |
JP4943047B2 (ja) * | 2006-04-07 | 2012-05-30 | 東京エレクトロン株式会社 | 処理装置及び処理方法 |
JP5425361B2 (ja) | 2006-07-28 | 2014-02-26 | 東京エレクトロン株式会社 | プラズマ表面処理方法、プラズマ処理方法およびプラズマ処理装置 |
KR101123538B1 (ko) * | 2006-07-28 | 2012-03-15 | 도쿄엘렉트론가부시키가이샤 | 석영제부재 |
US7972973B2 (en) * | 2006-09-29 | 2011-07-05 | Tokyo Electron Limited | Method for forming silicon oxide film, plasma processing apparatus and storage medium |
KR101253785B1 (ko) * | 2006-12-28 | 2013-04-12 | 주식회사 케이씨텍 | 기판 표면처리장치 |
US20080236490A1 (en) * | 2007-03-29 | 2008-10-02 | Alexander Paterson | Plasma reactor with an overhead inductive antenna and an overhead gas distribution showerhead |
JP4838197B2 (ja) * | 2007-06-05 | 2011-12-14 | 東京エレクトロン株式会社 | プラズマ処理装置,電極温度調整装置,電極温度調整方法 |
US8512509B2 (en) * | 2007-12-19 | 2013-08-20 | Applied Materials, Inc. | Plasma reactor gas distribution plate with radially distributed path splitting manifold |
JP2009177088A (ja) * | 2008-01-28 | 2009-08-06 | Tokyo Electron Ltd | 基板処理装置 |
US20110226280A1 (en) * | 2008-11-21 | 2011-09-22 | Axcelis Technologies, Inc. | Plasma mediated ashing processes |
US20100130017A1 (en) * | 2008-11-21 | 2010-05-27 | Axcelis Technologies, Inc. | Front end of line plasma mediated ashing processes and apparatus |
WO2011042949A1 (ja) * | 2009-10-05 | 2011-04-14 | 株式会社島津製作所 | 表面波プラズマcvd装置および成膜方法 |
US9105705B2 (en) * | 2011-03-14 | 2015-08-11 | Plasma-Therm Llc | Method and apparatus for plasma dicing a semi-conductor wafer |
US9048190B2 (en) * | 2012-10-09 | 2015-06-02 | Applied Materials, Inc. | Methods and apparatus for processing substrates using an ion shield |
US9245761B2 (en) | 2013-04-05 | 2016-01-26 | Lam Research Corporation | Internal plasma grid for semiconductor fabrication |
US9230819B2 (en) * | 2013-04-05 | 2016-01-05 | Lam Research Corporation | Internal plasma grid applications for semiconductor fabrication in context of ion-ion plasma processing |
US9147581B2 (en) | 2013-07-11 | 2015-09-29 | Lam Research Corporation | Dual chamber plasma etcher with ion accelerator |
CN104342632B (zh) * | 2013-08-07 | 2017-06-06 | 北京北方微电子基地设备工艺研究中心有限责任公司 | 预清洗腔室及等离子体加工设备 |
JP2017157778A (ja) * | 2016-03-04 | 2017-09-07 | 東京エレクトロン株式会社 | 基板処理装置 |
US11424107B2 (en) * | 2018-06-29 | 2022-08-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Temperature-controlled plasma generation system |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2892070B2 (ja) * | 1989-01-26 | 1999-05-17 | キヤノン株式会社 | 堆積膜形成装置 |
FR2653633B1 (fr) * | 1989-10-19 | 1991-12-20 | Commissariat Energie Atomique | Dispositif de traitement chimique assiste par un plasma de diffusion. |
JP2989063B2 (ja) * | 1991-12-12 | 1999-12-13 | キヤノン株式会社 | 薄膜形成装置および薄膜形成方法 |
JP3288490B2 (ja) * | 1993-07-09 | 2002-06-04 | 富士通株式会社 | 半導体装置の製造方法及び半導体装置の製造装置 |
JP2611732B2 (ja) * | 1993-12-13 | 1997-05-21 | 日本電気株式会社 | プラズマ処理装置 |
US5783100A (en) * | 1994-03-16 | 1998-07-21 | Micron Display Technology, Inc. | Method of high density plasma etching for semiconductor manufacture |
US5900103A (en) * | 1994-04-20 | 1999-05-04 | Tokyo Electron Limited | Plasma treatment method and apparatus |
JP3353514B2 (ja) * | 1994-12-09 | 2002-12-03 | ソニー株式会社 | プラズマ処理装置、プラズマ処理方法及び半導体装置の作製方法 |
JP3317209B2 (ja) * | 1997-08-12 | 2002-08-26 | 東京エレクトロンエイ・ティー株式会社 | プラズマ処理装置及びプラズマ処理方法 |
JP3364675B2 (ja) * | 1997-09-30 | 2003-01-08 | 東京エレクトロンエイ・ティー株式会社 | プラズマ処理装置 |
US6238527B1 (en) * | 1997-10-08 | 2001-05-29 | Canon Kabushiki Kaisha | Thin film forming apparatus and method of forming thin film of compound by using the same |
US6203657B1 (en) * | 1998-03-31 | 2001-03-20 | Lam Research Corporation | Inductively coupled plasma downstream strip module |
US6335293B1 (en) * | 1998-07-13 | 2002-01-01 | Mattson Technology, Inc. | Systems and methods for two-sided etch of a semiconductor substrate |
JP2000100790A (ja) * | 1998-09-22 | 2000-04-07 | Canon Inc | プラズマ処理装置及びそれを用いた処理方法 |
US7091605B2 (en) * | 2001-09-21 | 2006-08-15 | Eastman Kodak Company | Highly moisture-sensitive electronic device element and method for fabrication |
JP3514186B2 (ja) * | 1999-09-16 | 2004-03-31 | 日新電機株式会社 | 薄膜形成方法及び装置 |
JP4504511B2 (ja) * | 2000-05-26 | 2010-07-14 | 忠弘 大見 | プラズマ処理装置 |
JP4371543B2 (ja) | 2000-06-29 | 2009-11-25 | 日本電気株式会社 | リモートプラズマcvd装置及び膜形成方法 |
JP4382265B2 (ja) * | 2000-07-12 | 2009-12-09 | 日本電気株式会社 | 酸化シリコン膜の形成方法及びその形成装置 |
JP4366856B2 (ja) * | 2000-10-23 | 2009-11-18 | 東京エレクトロン株式会社 | プラズマ処理装置 |
JP2002170820A (ja) * | 2000-11-30 | 2002-06-14 | Sharp Corp | 薄膜トランジスタの製造方法およびそれに用いられるプラズマ処理装置 |
JP2003092291A (ja) * | 2001-09-19 | 2003-03-28 | Hitachi Kokusai Electric Inc | 基板処理装置 |
JP2004047580A (ja) * | 2002-07-09 | 2004-02-12 | Arieesu Gijutsu Kenkyu Kk | 成膜装置 |
-
2003
- 2003-11-20 AU AU2003284598A patent/AU2003284598A1/en not_active Abandoned
- 2003-11-20 TW TW092132594A patent/TWI252517B/zh not_active IP Right Cessation
- 2003-11-20 KR KR1020077024630A patent/KR100883697B1/ko not_active IP Right Cessation
- 2003-11-20 JP JP2004553212A patent/JP4673063B2/ja not_active Expired - Fee Related
- 2003-11-20 KR KR1020057009094A patent/KR100810794B1/ko not_active IP Right Cessation
- 2003-11-20 CN CNB2003801038082A patent/CN100490073C/zh not_active Expired - Fee Related
- 2003-11-20 WO PCT/JP2003/014797 patent/WO2004047157A1/ja active Application Filing
- 2003-11-20 CN CNA2008102139812A patent/CN101414560A/zh active Pending
- 2003-11-20 KR KR1020077024629A patent/KR100900589B1/ko not_active IP Right Cessation
-
2005
- 2005-05-18 US US11/131,215 patent/US20050205013A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
KR20070110942A (ko) | 2007-11-20 |
TW200419649A (en) | 2004-10-01 |
AU2003284598A1 (en) | 2004-06-15 |
KR20070110943A (ko) | 2007-11-20 |
JP4673063B2 (ja) | 2011-04-20 |
KR100883697B1 (ko) | 2009-02-13 |
KR20050075442A (ko) | 2005-07-20 |
KR100900589B1 (ko) | 2009-06-02 |
WO2004047157A1 (ja) | 2004-06-03 |
TWI252517B (en) | 2006-04-01 |
CN1714430A (zh) | 2005-12-28 |
KR100810794B1 (ko) | 2008-03-07 |
US20050205013A1 (en) | 2005-09-22 |
CN101414560A (zh) | 2009-04-22 |
JPWO2004047157A1 (ja) | 2006-04-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN100490073C (zh) | 等离子体处理装置和等离子体处理方法 | |
JP6440716B2 (ja) | 周期的エッチング工程を用いたエッチング停止層のエッチング方法 | |
TWI605503B (zh) | 利用主要蝕刻及循環蝕刻製程之組合在材料層中形成特徵之方法 | |
TWI492297B (zh) | 電漿蝕刻方法、半導體裝置之製造方法、及電漿蝕刻裝置 | |
US6392350B1 (en) | Plasma processing method | |
KR100914542B1 (ko) | 반도체 장치의 제조 방법, 플라즈마 산화 처리 방법, 플라즈마 처리 장치 및 이 플라즈마 처리 장치를 제어하는 컴퓨터 판독 가능한 기억 매체 | |
US20050136610A1 (en) | Process for forming oxide film, apparatus for forming oxide film and material for electronic device | |
US20070218687A1 (en) | Process for producing materials for electronic device | |
CN101156234B (zh) | 基板的氮化处理方法和绝缘膜的形成方法 | |
KR100966927B1 (ko) | 절연막의 제조 방법 및 반도체 장치의 제조 방법 | |
JP5055114B2 (ja) | プラズマドーピング方法 | |
WO2015030968A1 (en) | Low temperature plasma anneal process for sublimative etch processes | |
US7981785B2 (en) | Method for manufacturing semiconductor device and plasma oxidation method | |
JPWO2004073073A1 (ja) | 半導体装置の製造方法および半導体製造装置 | |
TW200308003A (en) | Methods used in fabricating gates in integrated circuit device structures | |
US6506687B1 (en) | Dry etching device and method of producing semiconductor devices | |
JPH06196410A (ja) | プラズマ処理装置 | |
KR100883696B1 (ko) | 플라즈마 처리 장치 | |
CN102549756B (zh) | 半导体器件、其制造方法及其制造装置 | |
JP2008091667A (ja) | 基板処理方法 | |
JPH06291087A (ja) | 半導体集積回路装置の製造方法および製造装置 | |
JPH02236283A (ja) | 薄膜形成装置および薄膜形成方法 | |
JP2008306019A (ja) | プラズマ処理装置 | |
KR20060115915A (ko) | 반도체 장치의 제조 방법 및 플라즈마 산화 처리 방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090520 Termination date: 20151120 |
|
CF01 | Termination of patent right due to non-payment of annual fee |