CN100477177C - 半导体器件及其制造方法 - Google Patents
半导体器件及其制造方法 Download PDFInfo
- Publication number
- CN100477177C CN100477177C CN200710136626.5A CN200710136626A CN100477177C CN 100477177 C CN100477177 C CN 100477177C CN 200710136626 A CN200710136626 A CN 200710136626A CN 100477177 C CN100477177 C CN 100477177C
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- moisture
- protective ring
- chip
- internal circuit
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 33
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 238000000034 method Methods 0.000 claims description 33
- 239000010410 layer Substances 0.000 description 61
- 238000010586 diagram Methods 0.000 description 14
- 238000005516 engineering process Methods 0.000 description 12
- 238000005520 cutting process Methods 0.000 description 10
- 239000004020 conductor Substances 0.000 description 8
- 239000011229 interlayer Substances 0.000 description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 230000004888 barrier function Effects 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 238000001259 photo etching Methods 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 238000000151 deposition Methods 0.000 description 3
- 230000009977 dual effect Effects 0.000 description 3
- 230000009545 invasion Effects 0.000 description 3
- 238000002955 isolation Methods 0.000 description 3
- 229910020177 SiOF Inorganic materials 0.000 description 2
- 239000004411 aluminium Substances 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000001764 infiltration Methods 0.000 description 1
- 230000008595 infiltration Effects 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/564—Details not otherwise provided for, e.g. protection against moisture
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
Description
Claims (8)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006195054 | 2006-07-18 | ||
JP2006195054A JP5061520B2 (ja) | 2006-07-18 | 2006-07-18 | 半導体装置及び半導体ウェーハ |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101110395A CN101110395A (zh) | 2008-01-23 |
CN100477177C true CN100477177C (zh) | 2009-04-08 |
Family
ID=38970657
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN200710136626.5A Active CN100477177C (zh) | 2006-07-18 | 2007-07-18 | 半导体器件及其制造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7728418B2 (zh) |
JP (1) | JP5061520B2 (zh) |
CN (1) | CN100477177C (zh) |
TW (1) | TWI345270B (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110957279A (zh) * | 2018-09-27 | 2020-04-03 | 台湾积体电路制造股份有限公司 | 半导体器件及其形成方法 |
US11990428B2 (en) | 2018-09-27 | 2024-05-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bonding structures in semiconductor packaged device and method of forming same |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007059449A (ja) * | 2005-08-22 | 2007-03-08 | Fujitsu Ltd | 半導体装置 |
KR100995558B1 (ko) * | 2007-03-22 | 2010-11-22 | 후지쯔 세미컨덕터 가부시키가이샤 | 반도체 장치 및 반도체 장치의 제조 방법 |
US20100002115A1 (en) * | 2008-07-03 | 2010-01-07 | Xinqiao Liu | Method for Fabricating Large Photo-Diode Arrays |
JP5407422B2 (ja) | 2009-02-27 | 2014-02-05 | 富士通セミコンダクター株式会社 | 半導体装置及びその製造方法 |
JP5439901B2 (ja) * | 2009-03-31 | 2014-03-12 | 富士通セミコンダクター株式会社 | 半導体装置及びその製造方法 |
JP5527648B2 (ja) * | 2009-08-05 | 2014-06-18 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP5849478B2 (ja) | 2011-07-11 | 2016-01-27 | 富士通セミコンダクター株式会社 | 半導体装置および試験方法 |
US9048019B2 (en) * | 2011-09-27 | 2015-06-02 | Infineon Technologies Ag | Semiconductor structure including guard ring |
US8994148B2 (en) * | 2013-02-19 | 2015-03-31 | Infineon Technologies Ag | Device bond pads over process control monitor structures in a semiconductor die |
US9547034B2 (en) * | 2013-07-03 | 2017-01-17 | Xilinx, Inc. | Monolithic integrated circuit die having modular die regions stitched together |
JP2016058532A (ja) * | 2014-09-09 | 2016-04-21 | ソニー株式会社 | 固体撮像素子、並びに、電子機器 |
KR102276546B1 (ko) * | 2014-12-16 | 2021-07-13 | 삼성전자주식회사 | 수분 방지 구조물 및/또는 가드 링, 이를 포함하는 반도체 장치 및 그 제조 방법 |
KR102376504B1 (ko) * | 2015-07-02 | 2022-03-18 | 삼성전자주식회사 | 반도체 소자 |
US9837366B1 (en) * | 2016-11-28 | 2017-12-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semicondcutor structure and semiconductor manufacturing process thereof |
JP7218678B2 (ja) * | 2019-06-18 | 2023-02-07 | 株式会社Jvcケンウッド | 半導体ウエハ、及び、半導体チップの製造方法 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2886622B2 (ja) * | 1989-06-15 | 1999-04-26 | 富士通株式会社 | ウェハスケール半導体集積回路及びその製造方法 |
JP2002134506A (ja) * | 2000-10-19 | 2002-05-10 | Mitsubishi Electric Corp | 半導体装置 |
JP4091838B2 (ja) * | 2001-03-30 | 2008-05-28 | 富士通株式会社 | 半導体装置 |
JP2003273231A (ja) * | 2002-03-19 | 2003-09-26 | Fujitsu Ltd | 半導体集積回路のシールド構造 |
KR100476694B1 (ko) * | 2002-11-07 | 2005-03-17 | 삼성전자주식회사 | 반도체 장치의 퓨즈 구조물 및 그 제조 방법 |
JP3778445B2 (ja) | 2003-03-27 | 2006-05-24 | 富士通株式会社 | 半導体装置 |
JP4619705B2 (ja) * | 2004-01-15 | 2011-01-26 | 株式会社東芝 | 半導体装置 |
EP2282338B1 (en) * | 2004-04-19 | 2014-08-06 | STMicroelectronics Srl | Structures for indexing dice |
CN1926686B (zh) * | 2004-05-28 | 2010-08-18 | 富士通微电子株式会社 | 半导体装置及其制造方法 |
JP4636839B2 (ja) * | 2004-09-24 | 2011-02-23 | パナソニック株式会社 | 電子デバイス |
JP4972278B2 (ja) * | 2004-11-29 | 2012-07-11 | 富士通セミコンダクター株式会社 | レチクル及び半導体装置の製造方法 |
-
2006
- 2006-07-18 JP JP2006195054A patent/JP5061520B2/ja not_active Expired - Fee Related
-
2007
- 2007-06-23 TW TW096122731A patent/TWI345270B/zh active
- 2007-07-13 US US11/777,669 patent/US7728418B2/en active Active
- 2007-07-18 CN CN200710136626.5A patent/CN100477177C/zh active Active
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110957279A (zh) * | 2018-09-27 | 2020-04-03 | 台湾积体电路制造股份有限公司 | 半导体器件及其形成方法 |
CN110957279B (zh) * | 2018-09-27 | 2021-09-14 | 台湾积体电路制造股份有限公司 | 半导体器件及其形成方法 |
US11393771B2 (en) | 2018-09-27 | 2022-07-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bonding structures in semiconductor packaged device and method of forming same |
US11990428B2 (en) | 2018-09-27 | 2024-05-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bonding structures in semiconductor packaged device and method of forming same |
Also Published As
Publication number | Publication date |
---|---|
JP5061520B2 (ja) | 2012-10-31 |
US7728418B2 (en) | 2010-06-01 |
TWI345270B (en) | 2011-07-11 |
JP2008027934A (ja) | 2008-02-07 |
TW200809974A (en) | 2008-02-16 |
CN101110395A (zh) | 2008-01-23 |
US20080017965A1 (en) | 2008-01-24 |
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SE01 | Entry into force of request for substantive examination | ||
ASS | Succession or assignment of patent right |
Owner name: FUJITSU MICROELECTRONICS CO., LTD. Free format text: FORMER OWNER: FUJITSU LIMITED Effective date: 20081107 |
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Effective date of registration: 20081107 Address after: Tokyo, Japan Applicant after: FUJITSU MICROELECTRONICS Ltd. Address before: Kawasaki, Kanagawa, Japan Applicant before: Fujitsu Ltd. |
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GR01 | Patent grant | ||
C56 | Change in the name or address of the patentee |
Owner name: FUJITSU SEMICONDUCTOR CO., LTD. Free format text: FORMER NAME: FUJITSU MICROELECTRON CO., LTD. |
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CP01 | Change in the name or title of a patent holder |
Address after: Japan's Kanagawa Prefecture Yokohama Patentee after: FUJITSU MICROELECTRONICS Ltd. Address before: Japan's Kanagawa Prefecture Yokohama Patentee before: Fujitsu Microelectronics Ltd. |
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CP02 | Change in the address of a patent holder |
Address after: Japan's Kanagawa Prefecture Yokohama Patentee after: FUJITSU MICROELECTRONICS Ltd. Address before: Tokyo, Japan Patentee before: Fujitsu Microelectronics Ltd. |
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TR01 | Transfer of patent right | ||
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Effective date of registration: 20200730 Address after: Kanagawa Prefecture, Japan Patentee after: FUJITSU MICROELECTRONICS Ltd. Address before: Japan's Kanagawa Prefecture Yokohama Patentee before: FUJITSU MICROELECTRONICS Ltd. |
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Effective date of registration: 20230629 Address after: Kanagawa Patentee after: FUJITSU Ltd. Address before: Kanagawa Patentee before: FUJITSU MICROELECTRONICS Ltd. |