CA1091361A - Semiconductor device having an amorphous silicon active region - Google Patents

Semiconductor device having an amorphous silicon active region

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Publication number
CA1091361A
CA1091361A CA256,565A CA256565A CA1091361A CA 1091361 A CA1091361 A CA 1091361A CA 256565 A CA256565 A CA 256565A CA 1091361 A CA1091361 A CA 1091361A
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Prior art keywords
doped layer
layer
semiconductor device
amorphous silicon
active region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA256,565A
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French (fr)
Inventor
David E. Carlson
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RCA Corp
Original Assignee
RCA Corp
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Application filed by RCA Corp filed Critical RCA Corp
Priority claimed from KR7601783A external-priority patent/KR810001312B1/en
Priority claimed from KR1019800002296A external-priority patent/KR810001314B1/en
Application granted granted Critical
Publication of CA1091361A publication Critical patent/CA1091361A/en
Expired legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/202Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic System
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02425Conductive materials, e.g. metallic silicides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02441Group 14 semiconducting materials
    • H01L21/0245Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/068Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/07Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the Schottky type
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/548Amorphous silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

A SEMICONDUCTOR DEVICE HAVING AN
AMORPHOUS SILICON ACTIVE REGION

ABSTRACT

A semiconductor device including a body of amorphous silicon fabricated by a glow discharge in silane and a metallic region on a surface of the body of amorphous silicon providing a surface barrier junction at the interface of the region and the body which is capable of generating a space charge region in the body of amorphous silicon.

Description

~(`A 6~,4()4A

.

I

The present invention relates to semiconductor devices and more particularly to photovoltaic devices and current rectifying devices whose active region is of an amorphous silicon fabricated by a glow discharge in silane.
Photovoltaic devices such as solar cells and photodetectors are capable of converting solar radiation into usable electrical energy. A problem ``! encountered in the field of solar cells is that the cost , !
of producing electrical energy from solar cells is often not competitive with other means of electrical energy generation. One of the largest expenses involved in solar cell manufacture is the cost of the semiconductor material of the solar cell's active region. Often a solar cell will require a thick, single crystal, active layer, i.e. about ~0 microns or more, to ensure sufficient absorption of solar radiation. Naturally, the more semi-conductor material needed the higher the cost of a solar cell. The lowering of the amount of semiconductor material needed for photodetector devices would also lower ~¦ the~r cost. If this same semiconductor material ~ -demonstrates current rectification properties in the dark, it could also be utilized as the active region of semi-conductor devices such as diodes. Thus, it would be most desirable in the semiconductor field to have a material of a semiconductor device's active region which demonstrates 3 either photovoltaic or current rectification properties,
-2-I

~GA 69,404A

1 and reduces the cost of solar cell, photodetector and current rectification devices.
:'.'' " A semiconductor device havin~ a semiconductor junction and an active region Q~ amorphous silicon fabricated by glow discharge in silane.
. .

FIGURE l is a cross-sectional view of a first embodiment of the semiconductor device of the present , 10 invention.
FIGURE 2 is a graph comparing the absorption -~ coefficient of single crystal silicon to glow discharge amorphous silicon in the visible light range.
FIGURE 3 is a schematic view of an apparatus . 15 for carrying out the fabrication of amorphous silicon . by a glow discharge in silane.
,:, FIGURE 4 is a cross-sectional view of a second embodiment of the semiconductor device of the present invention.
FIGURE 5 is a cross-sectional view of a third embodiment of the semiconductor device of the present invention.

Referring to FIGURE l, a first embodiment of a seniconductor device of the present invention is designated as lO. For the purpose of describing the present invention the first embodiment of the semiconductor device lO is a photovoltaic devicej specifically a ~chottky barrier solar cell. The photovoltaic device lO includes - 30 a substrate 12 of a material having both good electrical ~ A ~'3,404A

I conductivity properties and the ability of making an ohmic contact with amorphous silicon deposited from a glow discharge. Typically, the substrate 12 will be of a metal such as aluminum, antimony, stainless steel or highly doped N-type single crystalline or polycrystalline silicon. On a surface of the substrate 12 is an active . region 14 of amorphous silicon. By active region it is ~ meant that portion of the device in which electron-hole - pairs can be generated for collection as current from a photovoltaic device.
An amorphous material is one which has no long range order in the periodicity of the matrix. Amorphous silicon fabricated by a glow discharge in silane, SiH4, possesses a short range order of no more than 20A. The amorphous silicon of the active region 14 is formed by a glow discharge in silane, SiH4, and has the kinetic characteristics of a carrier lifetime greater than about 10 7 seconds and an average density of localized states in the energy gap on the order of 1017/cm3 or less, and a mobility for electrons and holes greater than 10 3cm2/V-sec. The active layer 14 is about 1 to 3 microns in thickness or less.
; ~n a surface of the active region 14 opposite the substrate 12 is a metallic region 16, with an inter-face 18 therebetween. The metallic region 16 is semi-transparent to solar radiation and is of a metallic material with good electrical conductivity, such as gold, platinum, palladium, or chromium. The metallic region 16 may be a single layer of a metal or it may be mul~i-layered. If the metallic region 16 is multi-layered a first layer could .. . . . .

~CA 69,404A

. .
I be of platinum on the active region 14 to assure a large . .
Schottky barrier height and a second layer on the first platinum layer could be gold or silver, for good electrical conductivity. Since the metallic region 16 i-- 5 is a metal such as gold, platinum,palladium or chromium, it should only be about lOOA in thickness in order to be `- semi-transparent to solar radiation.
~ n a surface of the metallic layer 16 opposite the interface 18 is a grid electrode 24. Typically, the ,.~
grid electrode 24 is of a metal having good electrical conductivity. The grid electrode for purposes of dis-.; closing the present invention has two sets of grid lines, .-:
with the grid lines of each set substantially parallel .~ . .
. to each other and the grid lines of each set are inter-' 15 secting those of the other set. For purposes of discussion, the grid lines are intersecting perpendicularly. The grid electrode 24 occupies only a small area on the surface of the metallic layer 16 since solar radiation impinging the grid electrode 24 may be reflected away from the active region 14. The function of the grid ', electrode 24 is for the uniform collection of current from the metallic layer 16. The grid electrode 24 also assures a low series resistance from the device 10 when . .
in operation as part of a circuit. However, it is anticipated that only a ~ingle set of grid lines may be necessary for uniform current collection.
An antireflection layer 20 is on the grid electrode 24 and on the surface of the metallic layer 16 opposite the interface 18 not occupied by the grid electrode 24. The antireflection layer 20 has an incident "

RCA 69,404A
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109~361 .

I surface 22 on which impinges solar radiation 26. As is well known in the art, there is an increase in the solar radiation 26 traversing the metallic layer 16 and entering the active region 14, by having the antireflection layer 20 of a thickness approximately equal to A/4n, where ~ is the wavelength of the radiation impinging the incident surface 22, and n is the index of refraction of the antireflection layer 20 having an appropriate value to increase the amount of solar radiation 26 impinging the metallic layer 16. In essence - the antireflection layer 20 reduces the amount of light that would be reflected from the device 10. Usually, -;
the antireflection layer 20 will be of a dielectric ~ material such as zinc sulfide.
In the field of semiconductor devices it is - well known that a surface barrier junction, generally known as a Schottky barrier, is formed as a result of the contacting of certain metals to certain semiconductor materials. In the present invention a Schottky barrier ~ 20 is ~ormed at the interface 18 by contacting the metallic ; region 16 to the active region 14. A Schottky barrier generates a space charge field in the semiconductor material which penetrates into the active region 14 from the interface 18 and is referred to as the depletion region. It is preferable in the photovoltaic device 10 of the present invention that the depletion region extend the entire width of active region 14 between the interface 18 and the substrate 12. With the depletion region extending the entire width of the active region 14, carriers created anywhere in the active region 14, as a . ' . ' :

.

RCA 69,4û4A
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109~361 , I result of the absorption of solar radiation 26, are swept by the electric field in the depletion region to either the substrate 12 or the metallic region 16. The substrate 12 functions as one of the electrodes to the ` 5 active region 14. If the depletion region did not extend into a portion of the active region 14, any carriers ~, generated in this non-depleted portion of the active region 14 would not be swept to an electrode by means of an electric field. Carriers generated in a non-depleted portion of the active region 14 must rely on diffusion to either an electrode or the depleted region in order to be collected. Also, any non-depleted region would contribute to the series resistance when drawing current from the device, and this series resistance would lower device efficiency.
The amorphous silicon of the active region 14, fabricated by a glow discharge in silane, possesses characteristics ideally suited for the active region of a photovoltaic device. Carrier lifetime in amorphous silicon fabricated by a glow discharge in silane is greater than about 10 7 seconds, while carrier lifetime in amorphous silicon formed by sputtering or evaporation is in the order of 10 11 seconds. Since the mobility of electrons and holes in glow discharge amorphous silicon is greater than 10 3cm2/~-sec., large current collection efficiencies can be obtained.
The optical absorption of glow discharge amorphous silicon is superior to that of single crystalline silicon over the visible light range, i.e., 4,000A to 7,000A. Referring to FIGURE 2, it is shown that the RCA 69,4r~4A
_ 109136:1 l amorphous silicon has a larger absorption coefficient over the visible range than single crystalline silicon.
This means that an active region 14 of glow discharge ` amorphous silicon can be a factor of 10 thinner than single crystal silicon and provide comparable light absorption in the visible range. This is the reason for the active region 14 being as thin or thinner than one micron, and provide good device efficiency.
Furthermore, the average density of localized states in the energy gap of glow discharge amorphous silicon is on the order of 1017/cm3 or less. The average density of localized states of glow discharge amorphous silicon decreases with increasing deposition temperatures and increasing purity of the silane in the fabrication of the amorphous silicon. This average density of localized states of the glow discharge amorphous -I silicon is much lower than that of amorphous silicon fabricated by other means, i.e., for sputtered or evaporated amorphous silicon the average density of localized states is 1019/cm3eV or greater. Significant about the average density of localized states in the energy gap is that it is inversely proportional to the square of the width of the depletion region. Since glow discharge amorphous silicon's density of states is relatively low a depletion width on the order of one micron can be obtained. Also, significant about the average density of localized ; states is the fact that carrier lifetime is inversely proportional to the average density of states. This point reaffirms that the carrier lifetime of glow dis-charge amorphous silicon is larger than that of amorphous ~ RCA 69,404A
, ' ;: 1 silicon fabricatcd by the other processes mentioned.
Referring to FIGURE 3, a glow discharge apparatus suitable for carrying out the fabrication of the photovoltaic device 10 of the present invention is generally designated as 30. The glow discharge apparatus - 30 includes a vacuum chamber 32 defined by a vacuum bell 34, typically of a glass material. In the vacuum . chamber 32 is an anode 36, and a heating plate 38 , spaced from and opposite the anode 36. The anode 36, is of a metallic material having good electrical ~ conductivity such as platinum and is in the form of a :~ screen or coil. The heating plate 38 is a ceramic frame which encloses heating coils which are energized from a current source 40, external to the vacuum chamber 32.
A first outlet 44 into the vacuum chamber 32 is connected to a diffusion pump, a second outlet 46 is connected to a mechanical pump, and a third outlet 48 is connected to a gas bleed in system which is the source of the various gases utilized in the glow discharge process. While the second outlet 46 is described as being connected to a diffusion pump, it is anticipated that a diffusion pump mav not be necessary for evacuatin~
: the system.
~ In the fabrication of the photovoltaic device -~ 25 10, the substrate 12, e.g., aluminum, is placed on the heating plate 38 and is connected to the negative terminal of a power source 42. Anode 36 is connected to the positive termlnal of the power source 42. The power source 42 may be DC or AC. Thus, there will-g .

.

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` 1091361 l be a voltage potential between the anode 36 and the substrate 12, which is essentially functioning as a . .
cathode for DC operation, when the power source 42 is energized.
The vacuum chamber 32 is then evacuated to a pressure of about 0.5 to 1.0 x 10 6 torr, and the substrate 12 is heated to a temperature in the range of 150 to 400C. by energizing the heating coil of the heating plate 38.
Next, silane, SiH4, is bled into the vacuum chamber 32 to a pressure of 0.1 to 3.0 torr and as a result, the substrate temperature is raised to a value in the range of 200C. to 500C. To assure an ohmic contact between the substrate 12 and active region 14, the active region 14 should be deposited on substrate 12 at a temperature greater than 350C. so as to assure the forming of a eutectic between the aluminum substrate 12 and amorphous silicon active region 14.
To initiate the glow discharge between the anode 20 36 and the substrate 12, resulting in the deposition of --`~ the amorphous silicon of active region 14 onto a surface of the substrate 12, the power source 42 is energized.
For deposition of the active region 14 the voltage potential between the anode 36 and substrate 12 should be ~-in the range of 0.3 to 3.0 ma/cm2 at the surface of the substrate 12. The deposition rate of the amorphous silicon increases with the vapor pressure of the silane and the current density. Under the conditions described deposition of one micron of amorphous silicon occurs in less than 5 minutes.

.

` RC~ 69,404A

., . ~

``` 1091361 . `

I Once the glow discharge is initiated electrons from the substrate 12 are emitted from the substrate and strike silane molecules, SiH4, both ionizing and disassociating the molecules. The silicon ions and silicon hydrides, such as SiH , are of a positive charge , and are thus attracted to the substrate 12, which is the ~`` cathode, and silicon is thereby deposited on the substrate ..
12. The substrate temperature is greater than 350C.
;.
and promotes pyrolytic decomposition of deposited silicon : lO hydrides.
After deposition of the amorphous silicon, the wafer of substrate 12 and active region 14 is placed in ~ a state of the art evaporation system and the metallic - region 16 is evaporated onto the active region 14. Like-15 wise, the grid electrode 24 and antireflection layer 20 ~-are deposited on the metallic region 16 by state of the ~` art evaporation and masking techniques. The entire processing may be accomplished in a single system accommodat-ing both glow discharge and evaporation.
Fabrication of the photovoltaic device 10 is completed by the connecting of wire electrodes (not shown) to the substrate 12 and grid electrode 24 for connection to external circuitry.
Referring to FIGURE 4, a second embodiment of the semiconductor device of the present invention is designated as 110. For the purpose of describing the ' present invention, the semiconductor device 110 is a photovoltaic device and more particularly a PIN solar cell.
The photovoltaic device 110 includes an active region 114 of amorphous silicon fabricated by a glow discharge in ':

P~A 69,404A

`` 1091361 ;

1 silane, SiH4. Active layer 114 includes a first doped layer 113~ a second doped layer 115 spaced from and opposite the first doped layer 113, and an intrinsic layer 117 in contact with and between the first and second doped layers 113 and 115. The intrinsic layer 117 is undoped. The first and second doped layers 113 and 115 are of opposite conductivity type. For purposes of discussion the second doped layer 115 is of N-type conductivity while the first doped layer 113 is of P-type conductivity. Both the first and second layers 113 and 115 are of a high doping concentration, i.e., greater than lnl9/cm3 of electrically active dopants. Typically the N-type second doped layer 115 is doped with phosphorous - and the P-type first doped layer 113 is doped with boron.
A solar radiation transmissive electrode 128 is on a surface of the first doped layer 113 opposite the second doped layer 115. The transmissive electrode 128 has an incident surface 129 opposite the first doped layer 113. The function of transmissive electrode 128 is to be either transparent or semi-transparent to solar radia~ion and be able to collect current generated in the active region 114. Solar radiation 126 enters the device ~ -110 at the incident surface 129. The solar radiation transmissive electrode 128 may be a single layer of a material such as indium tin oxide or tin oxide which are both transparent to solar radiation and have good electrical - conductivity. Also the transmissive electrode 128 can be a thin film metal, i.e., about lO~A in thickness, such as gold, antimony, or platinum, which will be semi-transparent to solar radiation. If the transmissive electrode 128 is of : , .

~CA 69,404A
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~ 1091361 :~"
` ,. .
~- l a thin film metal it is preferable that an antireflection ;~ layer as described in the first embodiment, be on the ` incident surface 129 of the electrode 128 to decrease reflection of the solar radiation 126. Furthermore, - 5 the electrode 128 may be multi-layered such as a layer of indium tin oxide commercially available on a layer of a glass material. In such an instance the indium - tin oxide is in intimate contact with the first doped layer 113.
If the surface resistivity of the electrode 128 at the first doped layer 113 is on the order of 'r` about lOQ/~ or more it is preferable to also have a grid ;',.'.
contact like that of the first embodiment of the present invention on the first doped layer 115 for collection -~ 15 of the current generated in the active region 114.
An electrical contact 127 is on a surface l of the second doped layer 115 opposite the tranmissive :,. j ~ electrode 128. The electrical contact 127 is of a .
material having reasonable electrical conductivity, such ~;';; 20 as aluminum, chromium, or antimony.
As previously recited in the discussion of ~`~ the first embodiment of the present invention, the ; absorption coefficient of glow discharge amorphous silicon - is better than that of single crystal silicon in the ~ l 25 visible range. For this reason only a thin layer of ., I
amorphous silicon is needed for sufficient solar radiation absorption. Typically, the intrinsic region of amorphous silicon is about one to three microns or less in thickness, while the first and second doped layers 113 and 115 are each a few hundred angstroms in thickness.

:-R~A 69,404A

` 1091361 I Well known to those in the PIN solar cell art is that as a result of the equalization in Fermi levels between layers 113, 115 and 117 there is a negative space charge in the irst doped layer 113 and a positive space charge in the second doped layer115, and the formation of a depletion region in the intrinsic layer 117. How far the electric field of the depletion region extends into the intrinsic layer 117 is a function of the average density of localized 10 states in the energy gap, as explained in the discussion --of the first embodiment of the present invention. Also, from the earlier discussion of semiconductor device 10, it is forseen that the depletion region will extend across the entire thickness of the intrinsic layer 117, i.e., about one to three microns or less in thickness.
Therefore, any carriers generated into the intrinsic layer 117 by the absorption of solar radiation, will be swept up in the electric field of the depletion region and be collected as an electrical current.
In the fabrication of the photovoltaic device - 110 the transmissive electrode 128 is assumed to be a layer of indium tin oxide commercially available on a layer of glass material. The electrode 128 is placed on the heating plate 38 of the apparatus 30 shown in FIGURE 3. The glass layer of electrode 128 is in intimate ~-contact with the heating plate 38.
The apparatus 30 is then prepared for deposition of the first doped layer 113, of P-type conductivity - onto the indium tin oxide layer of electrode 128. The vacuum chamber 32 is evacuated to a pressure of about . , ' ' .

P~CA 69,404A
-` I 10 6 torrs and then silane with about one-half to five percent diborane, i.e., the diborane constitutes one-half to five percent of the silane-diborane atmosphere, at a pressure of 0.1 to 1.0 torrs is bled into the vacuum chamber 32, while the electrode 128 is brought to a temperature in the range of 200 to 500C.
A glow discharge is initiated in the vacuum chamber 32 for about one to two seconds with a current density of about 0.5 ma/cm2 at the electrode 128 for deposition of the first doped layer 113, on the order of a few hundred angstroms in thickness.
The atmosphere in the vacuum chamber 32 is then pumped out by the mechanical pump 46.
With the vacuum chamber 32 at a pressure of ,~ 15 10 6 torrs, silane is bled into the vacuum chamber 32 at a pressure of 0.1 to 3 torrs. Again a glow discharge is initiated for 1 to 5 minutes with a current density of from 0.3 ma/cm2 to 3.0 ma/cm2 at the first doped layer 113 for the deposition of the intrinsic layer 117 of about one micron in thickness.
Next, about 0.1 to 1.0 percent phosphine, as the doping gas, is bled into the vacuum chamber 32, so that the phosphine constitutes 0.1 to 1.0 percent of the silane-phosphine atmosphere. A glow discharge is initiated with a current density of from 0.3 ma/cm2 to 3.0 ma/cm2 at the intrinsic layer 117 and the N-type second doped layer 115 on the order of a few hundred angstroms thick is deposited on a surface of the intrinsic layer 117.
While phosphine and diborane were mentioned as the doping gases for the first and second doped layers RCA 69J4n4A
.

1 113 and 115, it is anticipated that other appropriate dop-- ing gases well known in the art can also be used. ~-The electrical contact 127 is then deposited on a surface of the second doped layer 115 by state of the art evaporation techniques. Final fabrication of the photovoltaic device 110 includes connecting contacting wires (not shown) : to the contact 127 and electrode 128 for electrical connec-` tion to external circuitry.
Referring to FIGURE 5, a third embodiment of the -` lO semiconductor device of the present invention is designated ~-- as 210. Again the semiconductor device 210 is a photovoltaic device and more particularly a P-N iunction solar cell. The photovoltaic device 210 includes a body 211 of amorphous silicon fabricated by a glow discharge in silane, SiH4, , 15 with the appropriate doping gases. The body 211 comprises ;l a first doped layer 252 of one conductivity type in contact with a second doped layer 254 of an opposite conductivity type with a P-N junction 256 therebetween. For purposes of discussion it is assumed the first doped layer 252 is of P-type conductivity and the second doped layer 254 is of N-type conductivity. Both the first and second doped layers 252 and 254 are the active region 214 of the photo-voltaic device 210. The body 211 includes a third doped layer 258 on a surface of the second doped layer 254 opposite the P-N junction 256. The third doped layer 258 is of the - same conductivity type as the second doped layer 254 but has a higher doping concentration than the second doped layer ~; 254. Thus, the third doped layer 258 is of N+ type conductivity. The third doped layer 258 assists in making ohmic contact to the active region 214.

.
.. .

. .

RCA 69,404A

I ~n a surface of the third doped layer 258 ;` opposite the P-N junction 256 there is an electrical contact 227 the same as the electrical contact 127 of the second embodiment of the present invention. A solar radiation transmissive electrode 228 having a solar - radiati~n incident surface 229 is on a surface of the first doped layer 252 opposite the P-N junction 256.
Solar radiation 226 enters the device 210 at the incident surface 229. The solar radiation transmissive electrode 228 is the same as the solar radiation transmissive l electrode 128 of the second embodiment of the present .. ,' lnvention.
In the operation of the photovoltaic device 210 solar radiation 226 enters the device 210 at the incident surface 229 and some of the solar radiation ; 226 is absorbed in the active region 214 forming electron-hole pairs. These carriers then di~use to the R-N
junction 256 and i~ the~ arr~ve at t~e space charge f~eld of the P-N junction 256 before recombining they are collected and contribute to the current of the device 210.
In the fabrication of the device 210, as in device 110, the transmissive electrode 228 is assumed as being a layer of indium tin oxide on a layer of glass material. The electrode 228 is placed on the heating plate 38 of apparatus 30 so that the glass layer is in intimate contact with the heating plate 38.
Next, the apparatus is prepared for the deposition of the first doped layer 252 onto the indium ' ~ A 6~,404A

`' 1 tin oxide layer of the transmissive electrode 228.
` The vacuum chamber is evacuated to a pressure of about 10 6 torrs and then silane with about 1 to 5 percent diborane at a pressure of 0.1 to 1.0 torrs is bled into chamber 32, while the electrode 228 is brought to a temperature in the range of 200C. to 500C.
A glow discharge is initiated in the vacuum .. ~ - .
- chamber 32 for about one to two seconds with a current density of about 0.5 ma/cm2 at the surface of electrode ' 10 228 for deposition of the first doped layer 252 on the order of a few hundred angstroms in thickness.
The atmosphere in the vacuum chamber 32 is ;~ then pumped out by the mechanical pump 46. The chamber 32 is brought to a pressure of about 10 6 torrs and silane with about 0.01 percent phosphine is then bled into the chamber 32 at a pressure of 0.1 to 3 torrs. The glow discharge is initiated for about 1 to 30 minutes with a current density of from 0.3 ma/cm2 to 3.0 ma/cm2 at the surface of the first doped layer 252, thus the second doped layer 254 is deposited of a thickness in the range of 1 to 20 microns.
Next, phosphine is bled into the vacuum chamber 32 so that there is a 0.5 percent mixture of - phosphine with the silane. Again a glow discharge is - 25 initated with a current density of from 0.3 ma/cm to
3.0 ma/cm2 at the second doped layer 254 for the deposition of the third doped layer 258 a thickness of a few hundred angstroms.
` The electrical contact 227 is deposited on the third doped layer 258 by state of the art evaporation ' ~`

R(`A 69,404A

` ~09136~
:,.
l techniques. The fabrication of device 210 is completed : by connecting contacting wires (not shown) to contact 227 and electrode 228.
In the photovoltaic operation of the first, second and third embodiments of the present invention, the substrate 12 and electrical contacts 127 and 227 may reflect unabsorbed solar radiation back into the active regions 14, 114 and 214 respectively, thereby improving the possibility for solar radiation absorption.
It should be mentioned tha~ in the first embodiment of the present invention, the substrate 12 was described as a support for the device while in the second and third embodiments the light transmissive electrodes 128 and 228 are supports for their respective device Although the three embodiments of the semi-conductor device of the present invention have been described as solar cells, it is anticipated by the present invention that these three embodiments can also be utilized as high frequency photodetectors, i.e. devices ; which respond to radiant energy. It has been discovered that these photodetectors having an active region of amorphous silicon prepared by a glow dishcarge in silane have a high frequency response, on the order of ln megahertz or more. In utilizing the first three embodiments of the present invention as a photodetector it is known by those in the semiconductor art that the amount of radiant energy entering the active region may not be as critical as if the three embodiments were utilized as solar cells. Therefore, modifications well known to ~ I - 19-~ A 69,404A

:. :
1 those in the art can be made to the first three embodiments , of the present invention if they are used as photodetectors, e.g. removal of antireflection layers and grid electrodes.
The second embodiment of the present invention, semiconductor device 110, is a PIN structure, and if ~; utilized as a photodetector its spectral response can be ~ -tailored to the relative sensitivity of the human eye.
Tailoring the spectral response of semiconductor device 110 is accomplished through the thickness and dopant ~, 10 concentration of the layer which is of P type conductivity, i.e. either first doped layer 113 or second doped layer 115, and by the thickness of the intrinsic layer 117.
As an example, the spectral response of device 110 approximates that of the human eye if the P type layer has an acceptor dopant concentration on the order of 5 .: O
atomic percent boron and is of a thickness of about 500A, while the intrinsic region is approximately 0.3 micro-meters in thickness.
The utilization of glow discharge amorphous -silicon in the active region of photovoltaic and photodetector devices provides a device with a thinner active region than devices of the same basic structure but of single cr~stalline silicon. Also devices utilizing glow discharge amorphous silicon are capable of solar radiation absorption comparable to that of single crystal silicon photovoltaic and photodetector devices having active regions of a factor of 10 times thicker. Thus, the specific advantage of the present invention as a , - photovoltaic or photodetector device is the cost reduction realized by the utilization of a thinner active region.

RC~ ~9,404A

109136~

~`.
`` 1 Moreover, the present invention as a photovoltaic device also provides a cost reduction in generation of electrical ; power from solar radiation because there is less energy expended in making devices of the present invention since fabrication is at temperatures lower than single crystal device fabrication; and larger area solar cells can be fabricated as compared to single crystalline solar cell fabrication.
It has also been discovered that the semi-conductor device of the present invention having an active region of amorphous silicon fabricated by a glow dis-charge in silane, is capable of current rectification in - the dark. As an example the Schottky barrier semiconductor - device 10 of FIGURE 1, with a substrate 12 of N type single crystalline silicon, a metallic region 16 of gold and without the grid electrode 24 and antireflection : layer 20, demonstrates current rectification at +.4 volts, i.e. forward biased, on the order of 104 times greater . .
than the current at -.4 volts, i.e. reverse biased. While the three embodiments of the present invention are described as solar cells they can function as described as current rectifiers but it would bé obvious to those skilled in the semiconductor art that their utility as rectifiers would be more desirable with some minor modification, such as the removal of grid electrodes and antireflection layers. The semiconductor devices of the present invention possess a potential barrier as a result of having a semiconductor junction, i.e., either a P-N junction, a PIN junction or a Schottky barrier junction-.
RCA 69,404A

..

1 In the semiconductor device of the present invention, the active region is of amorphous silicon ' fabricated by a glow discharge in silane and these devices function either as solar cells, photodetectors or current rectifiers.
:

: ~
' ~

,, .

` . . ~ . :

Claims (10)

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:
1. A semiconductor device comprising:
a body of amorphous silicon with a semiconductor junction in said body.
2. The semiconductor device in accordance with claim 1 wherein the amorphous silicon has an average density of localized states in the energy gap of about 1017/Cm3 or less.
3. The semiconductor device in accordance with claim 1 wherein the amorphous silicon has a mobility for electrons of about 10-3cm2/V.sec. or greater.
4. The semiconductor device in accordance with claim 1 wherein the amorphous silicon has a carrier lifetime of about 10-7sec. or greater.
5. The semiconductor device in accordance with claim 1 wherein the amorphous silicon is fabricated by a glow discharge in silane.
6. The semiconductor device of claim 1 wherein said body comprises a first doped layer of one conductivity type spaced from a second doped layer of an opposite conductivity type with an "intrinsic" layer between and in contact with the first and second doped layers, such that there is a capability of a space charge region being provided in the "intrinsic" layer.
7. The semiconductor device of claim 6 wherein the intrinsic layer is on the order of one micron or less in thickness from said first doped layer to said second doped layer.
8. The semiconductor device of claim 6 further comprising:
an electrically conductive substrate on a surface of said second doped layer opposite the intrinsic layer; and a solar radiation transmissive electrode of good electrical conductivity on a surface of said first doped layer opposite the intrinsic layer.
9. The semiconductor device of claim 1 wherein said body comprises a first doped layer of one conductivity type in contact with a second doped layer of an opposite conductivity type having a P-N junction therebetween.
10. The semiconductor device of claim 9 comprising:
a third doped layer on a surface of said second doped layer opposite said P-N junction, the third doped layer of the same conductivity type and higher doping concentration as said second doped layer;
a solar radiation transmissive electrode of good electrical conductivity on a surface of said first doped layer opposite said P-N junction; and an electrically conductive substrate on a surface of said third doped layer opposite said P-N junction.
CA256,565A 1975-07-28 1976-07-08 Semiconductor device having an amorphous silicon active region Expired CA1091361A (en)

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US59958875A 1975-07-28 1975-07-28
US599,588 1975-07-28
US65926876A 1976-02-19 1976-02-19
US659,268 1976-02-19
KR7601783A KR810001312B1 (en) 1975-07-28 1976-07-22 Semiconductor device having a body of amorphous silicon
KR1019800002296A KR810001314B1 (en) 1975-07-28 1980-06-11 Semiconductor device having a body of amorphous silicon

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JPS5216990A (en) 1977-02-08
AU503228B2 (en) 1979-08-30
NL7607571A (en) 1977-02-01
FR2304180B1 (en) 1982-07-30
NL185884C (en) 1996-01-23
AU1555876A (en) 1978-01-12
IT1062510B (en) 1984-10-20
SE407870B (en) 1979-04-23
DE2632987C2 (en) 1987-02-12
HK49683A (en) 1983-11-11
NL185884B (en) 1990-03-01
DE2632987C3 (en) 1993-12-02
DE2632987A1 (en) 1977-02-10

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