CA1030608A - Bistable logic circuit with in-service test capability - Google Patents

Bistable logic circuit with in-service test capability

Info

Publication number
CA1030608A
CA1030608A CA218,237A CA218237A CA1030608A CA 1030608 A CA1030608 A CA 1030608A CA 218237 A CA218237 A CA 218237A CA 1030608 A CA1030608 A CA 1030608A
Authority
CA
Canada
Prior art keywords
logic circuit
service test
test capability
bistable logic
bistable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA218,237A
Other languages
English (en)
French (fr)
Inventor
Antonio Banfi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ITALIANA ELETTRONICA SpA Soc
Original Assignee
ITALIANA ELETTRONICA SpA Soc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ITALIANA ELETTRONICA SpA Soc filed Critical ITALIANA ELETTRONICA SpA Soc
Application granted granted Critical
Publication of CA1030608A publication Critical patent/CA1030608A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318522Test of Sequential circuits
    • G01R31/318525Test of flip-flops or latches
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30Marginal testing, e.g. by varying supply voltage
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26Functional testing
    • G06F11/267Reconfiguring circuits for testing, e.g. LSSD, partitioning
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01Details
    • H03K3/013Modifications of generator to prevent operation by noise or interference
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037Bistable circuits
    • H03K3/0375Bistable circuits provided with means for increasing reliability; for protection; for ensuring a predetermined initial state when the supply voltage has been applied; for storing the actual state when the supply voltage fails

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Logic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
CA218,237A 1974-03-15 1975-01-20 Bistable logic circuit with in-service test capability Expired CA1030608A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT49300/74A IT1004381B (it) 1974-03-15 1974-03-15 Dispositivo elettronico bistabile verificabile durante il servizio

Publications (1)

Publication Number Publication Date
CA1030608A true CA1030608A (en) 1978-05-02

Family

ID=11270262

Family Applications (1)

Application Number Title Priority Date Filing Date
CA218,237A Expired CA1030608A (en) 1974-03-15 1975-01-20 Bistable logic circuit with in-service test capability

Country Status (10)

Country Link
US (1) US3970873A (it)
BE (1) BE825909A (it)
CA (1) CA1030608A (it)
CH (1) CH586976A5 (it)
DE (1) DE2506351C3 (it)
ES (1) ES435128A1 (it)
FR (1) FR2264427B1 (it)
GB (1) GB1497745A (it)
IT (1) IT1004381B (it)
NL (1) NL177961C (it)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4742247A (en) * 1985-04-26 1988-05-03 Advanced Micro Devices, Inc. CMOS address transition detector with temperature compensation
US5541882A (en) * 1995-01-09 1996-07-30 Texas Instruments Incorporated Method of performing a column decode in a memory device and apparatus thereof
US20090067616A1 (en) * 2007-09-07 2009-03-12 Kerby William Suhre CAN echo cancellation level shifter
TR201917294A2 (tr) 2019-11-07 2021-05-21 Univ Istanbul Teknik Tersi̇ni̇r ve korunumlu kapilardan yararlanilarak cmos devrelerde oluşan eş zamanli hatalarin tamami̇yle tespi̇ti̇

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3870953A (en) * 1972-08-01 1975-03-11 Roger Boatman & Associates Inc In circuit electronic component tester
US3833853A (en) * 1973-04-13 1974-09-03 Honeywell Inf Systems Method and apparatus for testing printed wiring boards having integrated circuits

Also Published As

Publication number Publication date
FR2264427A1 (it) 1975-10-10
BE825909A (fr) 1975-06-16
IT1004381B (it) 1976-07-10
NL177961B (nl) 1985-07-16
NL7501108A (nl) 1975-09-17
NL177961C (nl) 1985-12-16
DE2506351B2 (de) 1981-06-11
DE2506351A1 (de) 1975-09-18
ES435128A1 (es) 1977-02-01
US3970873A (en) 1976-07-20
DE2506351C3 (de) 1982-05-27
FR2264427B1 (it) 1980-01-11
GB1497745A (en) 1978-01-12
CH586976A5 (it) 1977-04-15

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