ATE355569T1 - Verfahren und vorrichtung für anti-aliasing durch überabtastung - Google Patents

Verfahren und vorrichtung für anti-aliasing durch überabtastung

Info

Publication number
ATE355569T1
ATE355569T1 AT01973598T AT01973598T ATE355569T1 AT E355569 T1 ATE355569 T1 AT E355569T1 AT 01973598 T AT01973598 T AT 01973598T AT 01973598 T AT01973598 T AT 01973598T AT E355569 T1 ATE355569 T1 AT E355569T1
Authority
AT
Austria
Prior art keywords
graphics
overscanning
aliasing
computer system
data
Prior art date
Application number
AT01973598T
Other languages
English (en)
Inventor
Hsin-Chu Tsai
Subramania Maiyuran
Chung-Chi Wang
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of ATE355569T1 publication Critical patent/ATE355569T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00General purpose image data processing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T15/003D [Three Dimensional] image rendering
    • G06T15/005General purpose rendering architectures

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Graphics (AREA)
  • Image Generation (AREA)
  • Measuring Or Testing Involving Enzymes Or Micro-Organisms (AREA)
  • Other Investigation Or Analysis Of Materials By Electrical Means (AREA)
  • Measurement Of Velocity Or Position Using Acoustic Or Ultrasonic Waves (AREA)
AT01973598T 2000-09-28 2001-09-26 Verfahren und vorrichtung für anti-aliasing durch überabtastung ATE355569T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/675,096 US6885378B1 (en) 2000-09-28 2000-09-28 Method and apparatus for the implementation of full-scene anti-aliasing supersampling

Publications (1)

Publication Number Publication Date
ATE355569T1 true ATE355569T1 (de) 2006-03-15

Family

ID=24709035

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01973598T ATE355569T1 (de) 2000-09-28 2001-09-26 Verfahren und vorrichtung für anti-aliasing durch überabtastung

Country Status (12)

Country Link
US (1) US6885378B1 (de)
EP (1) EP1323131B1 (de)
JP (1) JP2004510270A (de)
KR (1) KR100547258B1 (de)
CN (1) CN1251155C (de)
AT (1) ATE355569T1 (de)
AU (1) AU2001293158A1 (de)
CA (1) CA2423497C (de)
DE (1) DE60126967T2 (de)
HK (1) HK1054110B (de)
TW (1) TW591547B (de)
WO (1) WO2002027661A2 (de)

Families Citing this family (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3543942B2 (ja) * 2000-03-02 2004-07-21 株式会社ソニー・コンピュータエンタテインメント 画像生成装置
US20030210267A1 (en) * 2002-05-13 2003-11-13 Kylberg Robert Lee Systems and methods for providing asynchronous client rendering in a graphical user interface (GUI) environment
TW569097B (en) * 2002-09-11 2004-01-01 Via Tech Inc Personal computer system and core logic chip applied to same
JP2004164618A (ja) * 2002-10-14 2004-06-10 Oce Technol Bv 携帯端末における選択メカニズム
US7307667B1 (en) * 2003-06-27 2007-12-11 Zoran Corporation Method and apparatus for an integrated high definition television controller
US9098943B1 (en) * 2003-12-31 2015-08-04 Ziilabs Inc., Ltd. Multiple simultaneous bin sizes
US7460175B2 (en) * 2004-04-02 2008-12-02 Nvidia Corporation Supersampling of digital video output for multiple analog display formats
JP4656862B2 (ja) * 2004-05-28 2011-03-23 ルネサスエレクトロニクス株式会社 半導体装置
CN101849227A (zh) * 2005-01-25 2010-09-29 透明信息技术有限公司 在单片构造的硅芯片上采用多个图形核心的图形处理和显示***
US8089486B2 (en) * 2005-03-21 2012-01-03 Qualcomm Incorporated Tiled prefetched and cached depth buffer
US7348988B2 (en) * 2005-05-06 2008-03-25 Via Technologies, Inc. Texture cache control using an adaptive missing data table in a multiple cache computer graphics environment
KR101177125B1 (ko) * 2005-06-11 2012-08-24 엘지전자 주식회사 멀티-코어 프로세서의 합성모드 구현 방법 및 장치
US7737988B1 (en) * 2005-11-14 2010-06-15 Nvidia Corporation Using font filtering engines for texture blitting
KR100762811B1 (ko) * 2006-07-20 2007-10-02 삼성전자주식회사 하프 플레인 에지 함수를 이용한 타일 비닝 방법 및 시스템
US8009172B2 (en) * 2006-08-03 2011-08-30 Qualcomm Incorporated Graphics processing unit with shared arithmetic logic unit
JP2008090673A (ja) * 2006-10-03 2008-04-17 Mitsubishi Electric Corp キャッシュメモリ制御装置
CN101252687B (zh) * 2008-03-20 2010-06-02 上海交通大学 实现多通道联合的感兴趣区域视频编码及传输的方法
EP2422316B1 (de) * 2009-04-20 2018-07-04 Barco, Inc. Verwendung einer gpu zur netzwerkpaketerstellung
US9349156B2 (en) 2009-09-25 2016-05-24 Arm Limited Adaptive frame buffer compression
US8988443B2 (en) 2009-09-25 2015-03-24 Arm Limited Methods of and apparatus for controlling the reading of arrays of data from memory
JP5835879B2 (ja) * 2009-09-25 2015-12-24 アーム・リミテッド メモリからのデータの配列の読み込みを制御する方法および装置
US9406155B2 (en) 2009-09-25 2016-08-02 Arm Limited Graphics processing systems
GB0916924D0 (en) 2009-09-25 2009-11-11 Advanced Risc Mach Ltd Graphics processing systems
KR101609266B1 (ko) * 2009-10-20 2016-04-21 삼성전자주식회사 타일 기반의 랜더링 장치 및 방법
KR101683556B1 (ko) * 2010-01-06 2016-12-08 삼성전자주식회사 타일 기반의 렌더링 장치 및 렌더링 방법
GB201105716D0 (en) 2011-04-04 2011-05-18 Advanced Risc Mach Ltd Method of and apparatus for displaying windows on a display
US8884963B2 (en) * 2011-05-04 2014-11-11 Qualcomm Incorporated Low resolution buffer based pixel culling
CN102208112B (zh) * 2011-05-25 2015-08-05 威盛电子股份有限公司 景深消隐方法、三维图形处理方法及其装置
US9098938B2 (en) * 2011-11-10 2015-08-04 The Directv Group, Inc. System and method for drawing anti-aliased lines in any direction
CN103164838B (zh) * 2011-12-12 2015-11-04 扬智科技股份有限公司 图形数据处理方法
US9734548B2 (en) * 2012-10-26 2017-08-15 Nvidia Corporation Caching of adaptively sized cache tiles in a unified L2 cache with surface compression
US9720858B2 (en) 2012-12-19 2017-08-01 Nvidia Corporation Technique for performing memory access operations via texture hardware
US9697006B2 (en) 2012-12-19 2017-07-04 Nvidia Corporation Technique for performing memory access operations via texture hardware
US9195426B2 (en) 2013-09-20 2015-11-24 Arm Limited Method and apparatus for generating an output surface from one or more input surfaces in data processing systems
US9595075B2 (en) * 2013-09-26 2017-03-14 Nvidia Corporation Load/store operations in texture hardware
GB2524467B (en) 2014-02-07 2020-05-27 Advanced Risc Mach Ltd Method of and apparatus for generating an overdrive frame for a display
GB2528265B (en) 2014-07-15 2021-03-10 Advanced Risc Mach Ltd Method of and apparatus for generating an output frame
US10163180B2 (en) * 2015-04-29 2018-12-25 Qualcomm Incorporated Adaptive memory address scanning based on surface format for graphics processing
GB2540562B (en) 2015-07-21 2019-09-04 Advanced Risc Mach Ltd Method of and apparatus for generating a signature representative of the content of an array of data
US10262456B2 (en) * 2015-12-19 2019-04-16 Intel Corporation Method and apparatus for extracting and using path shading coherence in a ray tracing architecture
US10262393B2 (en) * 2016-12-29 2019-04-16 Intel Corporation Multi-sample anti-aliasing (MSAA) memory bandwidth reduction for sparse sample per pixel utilization
US10235811B2 (en) 2016-12-29 2019-03-19 Intel Corporation Replicating primitives across multiple viewports
US10510133B2 (en) * 2017-06-20 2019-12-17 Think Silicon Sa Asymmetric multi-core heterogeneous parallel processing system
US10628910B2 (en) 2018-09-24 2020-04-21 Intel Corporation Vertex shader with primitive replication
US10902265B2 (en) * 2019-03-27 2021-01-26 Lenovo (Singapore) Pte. Ltd. Imaging effect based on object depth information

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0430501B1 (de) * 1989-11-17 1999-02-03 Digital Equipment Corporation System und Verfahren zum unverfälschten Polygonenzeichnen
US5307451A (en) 1992-05-12 1994-04-26 Apple Computer, Inc. Method and apparatus for generating and manipulating graphical data for display on a computer output device
US5388206A (en) * 1992-11-13 1995-02-07 The University Of North Carolina Architecture and apparatus for image generation
KR100277803B1 (ko) * 1995-03-10 2001-01-15 가나이 쓰도무 3차원 그래픽 표시장치
US5651104A (en) * 1995-04-25 1997-07-22 Evans & Sutherland Computer Corporation Computer graphics system and process for adaptive supersampling
US5682522A (en) * 1995-07-18 1997-10-28 Silicon Integrated Systems Corp. Shared memory architecture of graphics frame buffer and hard disk cache
US5977977A (en) 1995-08-04 1999-11-02 Microsoft Corporation Method and system for multi-pass rendering
US6111584A (en) 1995-12-18 2000-08-29 3Dlabs Inc. Ltd. Rendering system with mini-patch retrieval from local texture storage
US5960213A (en) 1995-12-18 1999-09-28 3D Labs Inc. Ltd Dynamically reconfigurable multi-function PCI adapter device
JPH09245179A (ja) * 1996-03-08 1997-09-19 Mitsubishi Electric Corp コンピュータグラフィックス装置
EP0821324A3 (de) 1996-07-26 1999-05-06 International Business Machines Corporation Cachespeicher für Z-Puffer
US5828382A (en) * 1996-08-02 1998-10-27 Cirrus Logic, Inc. Apparatus for dynamic XY tiled texture caching
US6104417A (en) * 1996-09-13 2000-08-15 Silicon Graphics, Inc. Unified memory computer architecture with dynamic graphics memory allocation
US5860060A (en) * 1997-05-02 1999-01-12 Texas Instruments Incorporated Method for left/right channel self-alignment
US6094203A (en) * 1997-09-17 2000-07-25 Hewlett-Packard Company Architecture for a graphics processing unit using main memory
US5986677A (en) * 1997-09-30 1999-11-16 Compaq Computer Corporation Accelerated graphics port read transaction merging
US6496187B1 (en) * 1998-02-17 2002-12-17 Sun Microsystems, Inc. Graphics system configured to perform parallel sample to pixel calculation
JP3497988B2 (ja) * 1998-04-15 2004-02-16 株式会社ルネサステクノロジ 図形処理装置及び図形処理方法
US6483516B1 (en) * 1998-10-09 2002-11-19 National Semiconductor Corporation Hierarchical texture cache
US6448968B1 (en) * 1999-01-29 2002-09-10 Mitsubishi Electric Research Laboratories, Inc. Method for rendering graphical objects represented as surface elements
GB9915012D0 (en) * 1999-06-29 1999-08-25 Koninkl Philips Electronics Nv Z-buffering graphics system

Also Published As

Publication number Publication date
WO2002027661A3 (en) 2002-06-13
EP1323131B1 (de) 2007-02-28
CA2423497C (en) 2009-07-28
HK1054110A1 (en) 2003-11-14
US6885378B1 (en) 2005-04-26
DE60126967T2 (de) 2007-10-31
KR20030046474A (ko) 2003-06-12
WO2002027661A2 (en) 2002-04-04
AU2001293158A1 (en) 2002-04-08
DE60126967D1 (de) 2007-04-12
CA2423497A1 (en) 2002-04-04
KR100547258B1 (ko) 2006-01-26
JP2004510270A (ja) 2004-04-02
HK1054110B (zh) 2007-08-31
CN1251155C (zh) 2006-04-12
TW591547B (en) 2004-06-11
CN1466738A (zh) 2004-01-07
EP1323131A2 (de) 2003-07-02

Similar Documents

Publication Publication Date Title
ATE355569T1 (de) Verfahren und vorrichtung für anti-aliasing durch überabtastung
DE69624757D1 (de) Vorrichtung zur Koordinatenermittlung, Verfahren hierzu und Steuervorrichtung für den Rechner
DE69940955D1 (de) Verfahren und vorrichtung für neue gerätetreiberinstallation durch einen betriebssystem
DE60109631D1 (de) Verfahren und Vorrichtung zur effizientes Verringerung von graphischen Anzeigedaten für ihre Übertragung mittels eines Übertragungsprotokolls für niedrige Bandbreiten
MXPA02002883A (es) Metodo y sistema para la instruccion de una computadora.
ATE450778T1 (de) Verfahren zur identifikation einer unbekannten oder unmarkierten slave-vorrichtung, wie zum beispiel in einem elektronischen sprengsystem
EP1248211A3 (de) Datenverarbeitungssytem und Entwurfssystem
ATE355556T1 (de) Verfahren, vorrichtung und computerprogramm zum verarbeiten einer warteschlange von nachrichten
DE69938517D1 (de) Vorrichtung und Verfahren zur Geschwindigkeits- und Abstandsregelung eines Fahrzeugs, mit entsprechendem Rechnerprogramm
DE602004017972D1 (de) On-bord-diagnose (obd)
ATE521928T1 (de) Verfahren zum unsichtbaren einbetten der lizenzidentifikation der erzeugenden lizensierten software in ein textdokument
ATE278987T1 (de) Verfahren und system für die ausfuhr von datenverbänden zu zweidimensionalen oder dreidimensionalen geometrischen entitäten
DE3851207D1 (de) Verfahren zur Bedienung eines Rechnergraphiksystems.
EP0950967A3 (de) Verfahren und Gerät zum Erzeugen von ausführbaren Programmen für Cosimulation und Produktion aus einer einzelnen quelle
EP1445736A3 (de) Verfahren und System zur Bereitstellung einer Volumendarstellung eines dreidimensionalen Objektes
ATE385325T1 (de) Verfahren und einrichtung zur konfiguration eines steuerungssystems
AU2003214510A1 (en) Hybrid and dynamic representation of data structures
SE0103360D0 (sv) Object oriented data processing
DE60131949D1 (de) Verfahren und Vorrichtung für Grauwertänderungen
ATE450003T1 (de) Komputergesteuerte verfahren und system zum implementieren von verteilten anwendungen
ATE524794T1 (de) Verfahren zum begradigen einer neuformatierung zur navigation und quantifikation
DE3873128D1 (de) Verfahren zur herstelung eines elektrischen uebertragungslinie.
DE60006045D1 (de) Vorrichtung, Verfahren und Computerprogramm zur Bilderzeugung
DE69911208D1 (de) System zur simulation eines geschäftsprozesses
ATE354915T1 (de) Verfahren für ein wasserzeichen eines digitalen bildes

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties