WO2022127060A1 - 一种功率器件封装结构及电力电子设备 - Google Patents

一种功率器件封装结构及电力电子设备 Download PDF

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Publication number
WO2022127060A1
WO2022127060A1 PCT/CN2021/101671 CN2021101671W WO2022127060A1 WO 2022127060 A1 WO2022127060 A1 WO 2022127060A1 CN 2021101671 W CN2021101671 W CN 2021101671W WO 2022127060 A1 WO2022127060 A1 WO 2022127060A1
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Prior art keywords
power
electrode
chip
chips
power device
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PCT/CN2021/101671
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English (en)
French (fr)
Inventor
曹周
黄源炜
郑明祥
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杰群电子科技（东莞）有限公司
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Publication of WO2022127060A1 publication Critical patent/WO2022127060A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492—Bases or plates or solder therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N

Definitions

  • the present application relates to the field of semiconductor technology, and in particular, to a power device packaging structure and power electronic equipment.
  • the semiconductor packaging structure in the related art plays the role of placing, fixing, sealing and protecting the chip by encapsulating the chip; through the packaging technology, the isolation of the chip from the outside world is realized to prevent impurities in the air from affecting the chip circuit. Corrosion causes a decrease in electrical performance.
  • the electrode contacts on the chip are generally connected to the pins of the package shell with wires, and these pins are connected with other devices through the wires on the circuit board.
  • the packaging structure is very important.
  • One objective of the embodiments of the present application is to provide a power device packaging structure, which shortens the conduction path, increases the conduction channel, improves the heat dissipation performance of the product, and improves the reliability of the product.
  • Another object of the embodiments of the present application is to provide a power electronic device with better performance and higher reliability.
  • a power device packaging structure comprising:
  • a lead frame which includes a base island, and a first pin electrically connected to the base island;
  • the power chip has a first electrode and a second electrode on two opposite sides respectively; the first electrode is bonded to the front side of the metal sheet through a conductive bonding layer; the second electrode is bonded to the base through a conductive bonding layer island;
  • a package body which encapsulates the power chip, a part of the lead frame and a part of the metal sheet; the back side of the metal sheet exposes the package body, and a part of the first pin exposes the package body .
  • At least one of the power chips is a triode chip; a source electrode and a gate electrode are provided on the first surface of the triode chip, and a drain electrode is provided on the second surface opposite to the first surface;
  • the source is the first electrode, and the drain is the second electrode; or, the drain is the first electrode, and the source is the second electrode.
  • the lead frame further includes a second pin insulated from the base island, and the gate is electrically connected to the second pin through an electrical connector;
  • the power device packaging structure further includes a conductive sheet, the gate is bonded to the front surface of the conductive sheet through a conductive bonding layer, and the package body is exposed from the back surface of the conductive sheet.
  • the number of the power chips is two;
  • One of the power chips is a triode chip, and the other power chip is a diode chip; or, both the power chips are triode chips.
  • the number of the power chips is two; both of the power chips are diode chips;
  • the first electrode is an anode and the second electrode is a cathode; or, the first electrode is a cathode and the second electrode is an anode.
  • a side of the base island away from the power chip is exposed to the package body.
  • the base islands are all encapsulated inside the package body.
  • the power chips are included, and the number of the metal sheets is the same as that of the power chips; the first electrodes of each power chip are combined with one of the metal sheets.
  • each group of the device groups includes two power chips and a metal sheet; in the device group, the first electrodes of the two power chips are connected to the metal sheet. piece combination.
  • a power electronic device includes the power device packaging structure of the above solution, and further includes a circuit board, the back of the metal sheet is welded to the circuit board, and the pins are welded to the circuit board.
  • the beneficial effects of the present application are as follows: in the power device packaging structure, by arranging a metal sheet on the first electrode on one side of the power chip and exposing the metal sheet, the external lead of the first electrode and heat dissipation are realized; the The package structure shortens the electric and heat conduction path, increases the electric and heat conduction channel, improves the heat dissipation performance, and improves the reliability of the product; the power electronic equipment adopts the above-mentioned power device package structure, which has better performance and higher reliability.
  • FIG. 1 is a longitudinal cross-sectional view of a power device packaging structure according to an embodiment of the present application
  • FIG. 2 is a plan view of the internal structure of the power device packaging structure according to the embodiment of the application;
  • FIG. 3 is a bottom schematic diagram of a power device packaging structure according to an embodiment of the present application.
  • FIG. 4 is a top schematic diagram of a power device packaging structure according to an embodiment of the present application.
  • FIG. 5 is a longitudinal cross-sectional view of a power device packaging structure according to an embodiment of the present application.
  • FIG. 6 is a top schematic view of a power device packaging structure according to still another embodiment of the present application.
  • FIG. 7 is an application schematic diagram of the power device packaging structure according to the embodiment of the present application.
  • FIG. 8 is a longitudinal cross-sectional view of a power device packaging structure according to an embodiment of the present application.
  • FIG. 9 is a plan view of the internal structure of the power device packaging structure according to the embodiment of the application.
  • FIG. 10 is a bottom schematic diagram of a power device packaging structure according to an embodiment of the present application.
  • FIG. 11 is a longitudinal cross-sectional view of a power device packaging structure according to an embodiment of the application.
  • FIG. 12 is a longitudinal cross-sectional view of a power device packaging structure according to an embodiment of the present application.
  • FIG. 13 is a plan view of the internal structure of the power device packaging structure according to the embodiment of the application.
  • FIG. 14 is a bottom schematic diagram of a power device packaging structure according to an embodiment of the present application.
  • FIG. 15 is a longitudinal cross-sectional view of a power device packaging structure according to an embodiment of the present application.
  • 16 is a longitudinal cross-sectional view of a power device packaging structure according to an embodiment of the present application.
  • 17 is a plan view of the internal structure of the power device packaging structure according to the embodiment of the application.
  • FIG. 18 is a bottom schematic diagram of a power device packaging structure according to an embodiment of the present application.
  • 19 is a longitudinal cross-sectional view of a power device packaging structure according to an embodiment of the application.
  • 20 is a longitudinal cross-sectional view of a power device packaging structure according to an embodiment of the present application.
  • 21 is a plan view of the internal structure of the power device packaging structure according to the embodiment of the application.
  • 22 is a bottom schematic diagram of a power device packaging structure according to an embodiment of the present application.
  • FIG. 23 is a longitudinal cross-sectional view of a power device packaging structure according to an embodiment of the application.
  • 24 is a longitudinal cross-sectional view of a power device packaging structure according to an embodiment of the application.
  • FIG. 25 is a plan view of the internal structure of the power device packaging structure according to the embodiment of the application.
  • 26 is a bottom schematic diagram of a power device packaging structure according to an embodiment of the present application.
  • FIG. 27 is a longitudinal cross-sectional view of a power device packaging structure according to an embodiment of the application.
  • FIG. 28 is a longitudinal cross-sectional view of a power device packaging structure according to an embodiment of the application.
  • 29 is a plan view of the internal structure of the power device packaging structure according to the embodiment of the application.
  • FIG. 30 is a bottom schematic diagram of a power device packaging structure according to an embodiment of the present application.
  • 31 is a longitudinal cross-sectional view of a power device packaging structure according to an embodiment of the application.
  • power chip 11, triode chip; 111, source electrode; 112, gate electrode; 12, diode chip; 20, lead frame; 21, base island; 22, first pin; 23, second tube feet; 30, metal sheet; 40, electrical connector; 50, conductive bonding layer; 60, package body; 80, circuit board; 90, heat sink.
  • connection and “fixed” should be understood in a broad sense, for example, it may be a fixed connection, a detachable connection or an integral body; it may be a mechanical connection , it can also be an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be the internal connection of the two elements or the interaction relationship between the two elements.
  • connection and “fixed” should be understood in a broad sense, for example, it may be a fixed connection, a detachable connection or an integral body; it may be a mechanical connection , it can also be an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be the internal connection of the two elements or the interaction relationship between the two elements.
  • a first feature "on” or “under” a second feature may include direct contact between the first and second features, or may include the first and second features Not directly but through additional features between them.
  • the first feature being “above”, “over” and “above” the second feature includes the first feature being directly above and obliquely above the second feature, or simply means that the first feature is level higher than the second feature.
  • the first feature is “below”, “below” and “below” the second feature includes the first feature is directly below and diagonally below the second feature, or simply means that the first feature has a lower level than the second feature.
  • the present application proposes a power device packaging structure, which improves the heat dissipation performance of the product and improves the reliability of the product.
  • the packaging structure includes:
  • the lead frame 20 includes a base island 21 and a first pin 22 electrically connected to the base island 21;
  • the power chip 10 is provided with a first electrode and a second electrode on opposite sides, the first electrode is bonded to the front surface of the metal sheet 30 through the conductive bonding layer 50, and the second electrode is bonded to the base island 21 through the conductive bonding layer 50;
  • the package body 60 which is formed by curing the packaging material, encapsulates the power chip 10, encapsulates a part of the lead frame 20 and a part of the metal sheet 30; the back side of the metal sheet 30 is not encapsulated by the package body 60, and the back side of the metal sheet 30
  • the package body 60 is exposed; a part of the first pin 22 is not encapsulated by the package body 60 , and a part of the first pin 22 is exposed to the package body 60 .
  • the base island 21 is used as the carrier of the power chip 10
  • the first pin 22 is used to connect the second electrode with the external circuit
  • the exposed part of the metal sheet 30 is used not only to connect the first electrode to the external circuit, but also to directly connect the second electrode to the external circuit. Conducts heat to the external medium of the package structure.
  • first pin 22 is exposed to the package body 60, either one end of the first pin 22 protrudes from the package body 60, or a surface of the first pin 22 is exposed to the package body 60; the metal sheet 30 In addition to exposing the back, other parts can also be exposed.
  • the backside of the metal sheet 30 can be welded to the circuit board 80 , and the first pin 22 can be welded to the circuit board 80 , so as to realize the first electrode and the circuit board 80 .
  • the first electrode needs to be connected to the pins of the lead frame 20 through metal wires or metal bridges, so as to be externally led out through the pins.
  • the method of disposing the metal sheet 30 in the area of the first electrode is adopted, which can realize the external lead of the first electrode to the external circuit carrier through the metal sheet 30.
  • the electrical conduction path can be shortened to reduce resistance and heat dissipation; and, the heat generated by the power chip 10 can be directly and quickly dissipated through the exposed part of the metal sheet 30 without the need for Guided by the pins, the heat conduction path can be shortened, the heat conduction efficiency is improved, and the heat dissipation efficiency is high; in addition, the metal sheet 30 has a large area, the area of the metal sheet 30 is equal to that of the first electrode, and the contact area between the metal sheet 30 and the first electrode Large, it can increase the conduction area of heat and electricity, and increase the conduction channel, thereby greatly reducing the resistance, reducing the heat consumption, and improving the heat dissipation efficiency, thereby improving the heat dissipation performance.
  • the heat dissipation performance is at least affected by resistance and heat dissipation efficiency.
  • the power device packaging structure of the present application improves heat dissipation performance and reliability; and can reduce the number of metal wires and pins and save materials.
  • the front surface of the metal sheet 30 covers 70% to 100% of the electrode area of the first electrode.
  • the metal sheet 30 may be, but not limited to, a copper sheet.
  • the conductive bonding layer 50 is formed by curing a conductive bonding material, the first electrode or the metal sheet 30 is covered with the conductive bonding material, and the first electrode and the metal sheet 30 are bonded by welding or bonding.
  • the bonding material may be one or more of lead-tin-silver alloy, gold-silicon alloy, and silver paste, or other bonding materials, and the composition of the bonding material is not a limitation of the present invention.
  • the power device package structure includes one or two or more power chips 10 .
  • the number of power chips 10 is one or two.
  • the number of power chips 10 in the package structure may also be multiple, such as four, six, etc.
  • multiple power chips 10 may be included in the package structure of an intelligent power module.
  • the power chip 10 can use a triode chip 11.
  • the first side of the triode chip 11 is provided with a source electrode 111 and a gate electrode 112
  • the second side is provided with a drain electrode
  • the first side and the second side are provided with a source electrode 111 and a gate electrode 112. for the opposite sides.
  • the package structure uses the source electrode 111 as the first electrode, sets the metal sheet 30 on the source electrode 111, and uses the drain electrode as the second electrode; or, the package structure uses the drain electrode as the first electrode, and sets the metal sheet 30 on the drain electrode,
  • the source electrode 111 is used as the second electrode.
  • the power chip 10 can also use a diode chip 12.
  • the package structure includes the diode chip 12
  • the first surface of the diode chip 12 is provided with an anode
  • the second surface is provided with a cathode
  • the first surface and the second surface are opposite sides.
  • the package structure uses the anode as the first electrode, sets the metal sheet 30 on the anode, and uses the cathode as the second electrode; or the package structure uses the cathode as the first electrode, sets the metal sheet 30 on the cathode, and uses the anode as the second electrode.
  • Embodiment 1 The power device packaging structure includes a power chip 10 , and the power chip 10 is a triode chip 11 .
  • the first side of the triode chip 11 faces the front side of the metal sheet 30
  • the source electrode 111 serves as the first electrode
  • the source electrode 111 is bonded to the front side of the metal sheet 30 through the conductive bonding layer 50 .
  • Embodiment 2 The power device package structure includes two power chips 10 , both of which are triode chips 11 .
  • the first surfaces of the two triode chips 11 are both facing the front side of the metal sheet 30 , and the source electrodes 111 are used as the first electrodes, and the source electrodes 111 are combined with the metal sheet 30 .
  • triode chip 11 may also use the source electrode 111 as the first electrode, and the other triode chip 11 may use the drain electrode as the first electrode.
  • Embodiment 3 The power device package structure includes two power chips 10 , one of which is a triode chip 11 and the other power chip 10 is a diode chip 12 .
  • the diode chip 12 When the power device packaging structure is applied to power electronic equipment, the diode chip 12 has the functions of forward conduction and reverse cut-off. The cooperation of the triode chip 11 and the diode chip 12, when the gate 112 is closed, due to inductance and the like The reverse current generated by the reason can be cut off by the diode chip 12, so that the power device package structure can meet the working requirements of higher power.
  • the first surface of the triode chip 11 faces the metal sheet 30 , the source electrode 111 serves as the first electrode, and the source electrode 111 is combined with the metal sheet 30 .
  • Embodiment 4 The power device package structure includes two power chips 10 , both of which are diode chips 12 .
  • the source electrode 111 is preferably used as the first electrode for the triode chip 11, the source electrode 111 is welded to the metal sheet 30 downward, and the drain electrode is upwardly welded to the base island 21 of the lead frame 20.
  • the drain is soldered down to the metal sheet 30, and the source 111 is soldered to the base island 21
  • the power chip 10 is provided with the source 111
  • the drain can be directly combined with the base island 21 by means of conductive bonding materials such as spot soldering, which makes the packaging more convenient.
  • the triode chip 11 described in this application may be, but is not limited to, a MOSFET chip; the triode chip 11 is a switching device.
  • the power device packaging structure of the present application can achieve heat dissipation in at least the following two ways:
  • the power device package structure is a double-sided heat dissipation structure, and the side of the base island 21 away from the power chip 10 is exposed outside the package body 60 ; in this way, a part of the heat
  • the exposed part of the metal sheet 30 at the bottom of the package structure can be dissipated to the outside, and a part of the heat can be dissipated to the outside through the exposed part of the base island 21 at the top of the package structure.
  • the power device packaging structure is a single-sided heat dissipation structure, and the base island 21 is completely enclosed inside the package body 60 .
  • the single-side heat dissipation power device packaging structure is adopted, the packaging cost is relatively low, and the heat dissipation performance has been improved compared with the traditional packaging structure.
  • the lead frame 20 further includes a second pin 23 electrically insulated from the base island 21 , the gate 112 is electrically connected to the second pin 23 through the electrical connector 40 , and the gate 112 is led out through the second pin 23 , to realize the connection between the gate 112 and the external circuit.
  • the electrical connector 40 may be, but not limited to, conductive metal wires or conductive metal bridges, such as copper wires, copper bridges, and the like.
  • the package structure further includes a metal conductive sheet
  • the gate 112 is bonded to the front surface of the conductive sheet through the conductive bonding layer 50
  • the back of the conductive sheet exposes the package body 60
  • the gate 112 is directly pulled out through the conductive sheet to realize the gate 112 Connection to external circuits.
  • the conductive sheet can be, but not limited to, a copper sheet. Both the conductive sheet and the metal sheet 30 are exposed from the bottom of the package body 60 .
  • the number of the metal sheets 30 is the same as the number of the power chips 10; the first electrodes of each power chip 10 are connected to a The metal sheets 30 are combined.
  • the power device packaging structure includes two power chips 10 and two metal sheets 30; the two metal sheets 30 are respectively a first metal sheet and a second metal sheet; One electrode is bonded to the first metal sheet through the conductive bonding layer 50 , and the first electrode of the other power chip 10 is bonded to the second metal sheet through the conductive bonding layer 50 .
  • two independent metal sheets 30 may be used to respectively implement the external lead of the two first electrodes.
  • each device group includes two power chips 10 and a metal sheet 30 ; in each device group, the first electrodes of the two power chips 10 are connected to the metal Sheet 30 combined.
  • the power device packaging structure includes two power chips 10 ; the two first electrodes are bonded to the same metal sheet 30 through a conductive bonding layer 50 .
  • the same metal sheet 30 is directly used for external lead, which can satisfy the external heat dissipation of the two power chips 10, and there is no need to specially use metal wires or metal
  • the bridge connects the two first electrodes, and the packaging process is simple.
  • the single-chip structure includes a power chip 10, and the power chip 10 is a triode chip 11; it is a double-sided heat dissipation structure.
  • the single-chip structure includes a power chip 10, and the power chip 10 is a triode chip 11; it is a single-sided heat dissipation structure.
  • the dual-chip structure includes two power chips 10, both of which are triode chips 11; it is a double-sided heat dissipation structure, including two metal sheets 30 .
  • the dual-chip structure includes two power chips 10, both of which are triode chips 11; it is a single-sided heat dissipation structure, including two metal sheets 30 .
  • the dual-chip structure includes two power chips 10, both of which are triode chips 11; it is a double-sided heat dissipation structure, and the two power chips 10 share the same A sheet of metal 30.
  • the dual-chip structure includes two power chips 10, both of which are triode chips 11; it is a single-sided heat dissipation structure, and the two power chips 10 share the same A sheet of metal 30.
  • the two-chip structure includes two power chips 10, one of which is a triode chip 11, and the other power chip 10 is a diode chip 12; it is double-sided
  • the heat dissipation structure includes two metal sheets 30 .
  • the dual-chip structure includes two power chips 10, one of which is a triode chip 11, and the other power chip 10 is a diode chip 12; it is a single-sided
  • the heat dissipation structure includes two metal sheets 30 .
  • the two-chip structure includes two power chips 10, one power chip 10 is a triode chip 11, and the other power chip 10 is a diode chip 12; it is double-sided In the heat dissipation structure, the two power chips 10 share one metal sheet 30 .
  • the dual-chip structure includes two power chips 10, one of which is a triode chip 11, and the other power chip 10 is a diode chip 12; it is a single-sided In the heat dissipation structure, the two power chips 10 share one metal sheet 30 .
  • the dual-chip structure includes two power chips 10, both of which are diode chips 12; it is a double-sided heat dissipation structure, including two metal chips slice 30.
  • the dual-chip structure includes two power chips 10, both of which are diode chips 12; it is a single-sided heat dissipation structure, including two metal chips slice 30.
  • the dual-chip structure includes two power chips 10, and the two power chips 10 are both diode chips 12; it is a double-sided heat dissipation structure, and the two power chips 10 share a piece of metal 30 .
  • the two-chip structure includes two power chips 10, and the two power chips 10 are both diode chips 12; it is a double-sided heat dissipation structure, and the two power chips 10 share a piece of metal 30 .
  • the present application also proposes a power electronic device, which has better heat dissipation performance, working performance and higher reliability.
  • the power electronic device includes the power device packaging structure in the above embodiment, and further includes a circuit board 80 , the back of the metal sheet 30 is welded to the circuit board 80 , and the pins are welded to the circuit board 80 .
  • the power electronic device may be, but not limited to, a driver, a frequency converter, an inverter power supply, an air conditioner, and the like.

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  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
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Abstract

本申请提供一种功率器件封装结构及电力电子设备，该功率器件封装结构包括：引线框架，其包括基岛，以及与基岛电连接的第一管脚；金属片；功率芯片，其相对的两面分别设有第一电极和第二电极；第一电极通过导电结合层结合于金属片的正面；第二电极通过导电结合层结合于基岛；封装体，其包封功率芯片、引线框架的一部分和金属片的一部分；金属片的背面露出封装体，第一管脚的一部分露出封装体。该电力电子设备包括上述功率器件封装结构。该功率器件封装结构，通过在功率芯片一面的电极上设置金属片并将金属片外露，缩短了电热传导路径，增大了电热传导通道，提升了散热性能，提高了产品可靠性；该电力电子设备性能更优。

Description

一种功率器件封装结构及电力电子设备 技术领域
本申请涉及半导体技术领域，尤其涉及一种功率器件封装结构及电力电子设备。
背景技术
相关技术中的半导体封装结构，通过对芯片进行封装，以对芯片起到安放、固定、密封、保护的作用；经过封装技术，实现芯片与外界的隔离，以防止空气中的杂质对芯片电路的腐蚀造成电气性能的下降。一般的封装结构，一般将芯片上的电极接点用导线连接到封装外壳的管脚上，这些管脚又通过电路板上的导线与其他器件建立连接。对于很多电力电子设备产品而言，封装结构至关重要。
功率器件在工作时，会产生热量；大功率的半导体器件需要处理更大的电流，发热量更大。对于功率器件的封装结构而言，若无法及时高效地向外部媒质散热，将极大影响半导体器件的工作性能，甚至会导致失效。相关技术中的功率器件封装结构，通过在外部增加散热器来加快散热，但是此种散热方式仍然难以满足散热需求。
发明内容
本申请实施例的一个目的在于：提供一种功率器件封装结构，其缩短了传导路径，增大了传导通道，提升了产品的散热性能，提高了产品的可靠性。
本申请实施例的另一个目的在于：提供一种电力电子设备，其性能更优，可靠性更高。
为达上述目的，本申请采用以下技术方案：
一种功率器件封装结构，包括：
引线框架，其包括基岛，以及与所述基岛电连接的第一管脚；
金属片；
功率芯片，其相对的两面分别设有第一电极和第二电极；所述第一电极通过导电结合层结合于所述金属片的正面；所述第二电极通过导电结合层结合于所述基岛；
封装体，其包封所述功率芯片、所述引线框架的一部分和所述金属片的一部分；所述金属片的背面露出所述封装体，所述第一管脚的一部分露出所述封装体。
作为优选，至少一个所述功率芯片为三极管芯片；所述三极管芯片的第一面设有源极和栅极，在与所述第一面相对的第二面设有漏极；
所述源极为第一电极，所述漏极为第二电极；或，所述漏极为所述第一电极，所述源极为所述第二电极。
作为优选，所述引线框架还包括与所述基岛绝缘的第二管脚，所述栅极通过电连接件与所述第二管脚电连接；
或，所述功率器件封装结构还包括导电片，所述栅极通过导电结合层结合于所述导电片的正面，所述导电片的背面露出所述封装体。
作为优选，所述功率芯片的数量为两个；
其一所述功率芯片为三极管芯片，另一所述功率芯片为二极管芯片；或，两个所述功率芯片均为三极管芯片。
作为优选，所述功率芯片的数量为两个；两个所述功率芯片均为二极管芯片；
所述第一电极为阳极，所述第二电极为阴极；或，所述第一电极为阴极，所述第二电极为阳极。
作为优选，所述基岛远离所述功率芯片的一面露出所述封装体。
作为优选，所述基岛被全部包封于所述封装体的内部。
作为优选，包括两个或多个所述功率芯片,以及数量与所述功率芯片的数量相同的所述金属片；每一功率芯片的所述第一电极均与一所述金属片结合。
作为优选，包括至少一组器件组；每一组所述器件组包括两个功率芯片和一个金属片；所述器件组中，两个所述功率芯片的所述第一电极均与所述金属片结合。
一种电力电子设备，包括上述方案的功率器件封装结构，还包括电路板，所述金属片的背面焊接于所述电路板，所述管脚焊接于所述电路板。
本申请的有益效果为：该功率器件封装结构，通过在功率芯片的其中一面的第一电极上设置金属片并将金属片外露，既实现了第一电极的外引，又实现了散热；该封装结构缩短了电热传导路径，增大了电热传导通道，提升了散热性能，提高了产品可靠性；该电力电子设备，采用了上述的功率器件封装结构，性能更优，可靠性更高。
附图说明
下面根据附图和实施例对本申请作进一步详细说明。
图1为本申请实施例所述功率器件封装结构的纵剖图；
图2为本申请实施例所述功率器件封装结构的内部结构平面视图；
图3为本申请实施例所述功率器件封装结构的底部示意图；
图4为本申请其一实施例所述功率器件封装结构的顶部示意图；
图5为本申请实施例所述功率器件封装结构的纵剖图；
图6为本申请又一实施例所述功率器件封装结构的顶部示意图；
图7为本申请实施例所述功率器件封装结构的应用示意图；
图8为本申请实施例所述功率器件封装结构的纵剖图；
图9为本申请实施例所述功率器件封装结构的内部结构平面示图；
图10为本申请实施例所述功率器件封装结构的底部示意图；
图11为本申请实施例所述功率器件封装结构的纵剖图；
图12为本申请实施例所述功率器件封装结构的纵剖图；
图13为本申请实施例所述功率器件封装结构的内部结构平面示图；
图14为本申请实施例所述功率器件封装结构的底部示意图；
图15为本申请实施例所述功率器件封装结构的纵剖图；
图16为本申请实施例所述功率器件封装结构的纵剖图；
图17为本申请实施例所述功率器件封装结构的内部结构平面示图；
图18为本申请实施例所述功率器件封装结构的底部示意图；
图19为本申请实施例所述功率器件封装结构的纵剖图；
图20为本申请实施例所述功率器件封装结构的纵剖图；
图21为本申请实施例所述功率器件封装结构的内部结构平面示图；
图22为本申请实施例所述功率器件封装结构的底部示意图；
图23为本申请实施例所述功率器件封装结构的纵剖图；
图24为本申请实施例所述功率器件封装结构的纵剖图；
图25为本申请实施例所述功率器件封装结构的内部结构平面示图；
图26为本申请实施例所述功率器件封装结构的底部示意图；
图27为本申请实施例所述功率器件封装结构的纵剖图；
图28为本申请实施例所述功率器件封装结构的纵剖图；
图29为本申请实施例所述功率器件封装结构的内部结构平面示图；
图30为本申请实施例所述功率器件封装结构的底部示意图；
图31为本申请实施例所述功率器件封装结构的纵剖图；
图中：10、功率芯片；11、三极管芯片；111、源极；112、栅极；12、二极管芯片；20、引线框架；21、基岛；22、第一管脚；23、第二管脚；30、金属片；40、电连接件；50、导电结合层；60、封装体；80、电路板；90、散热器。
具体实施方式
为使本申请解决的技术问题、采用的技术方案和达到的技术效果更加清楚，下面将结合附图对本申请实施例的技术方案作进一步的详细描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
在本申请的描述中，除非另有明确的规定和限定，术语“相连”、“固定”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接或成一体；可以是机械连接，也可以是电连接；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本申请中的具体含义。
在本申请中，除非另有明确的规定和限定，第一特征在第二特征之“上”或之“下”可以包括第一和第二特征直接接触，也可以包括第一和第二特征不是直接接触而是通过它们之间的另外的特征接触。而且，第一特征在第二特征“之上”、“上方”和“上面”包括第一特征在第二特征正上方和斜上方，或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”包括第一特征在第二特征正下方和斜下方，或仅仅表示第一特征水平高度小于第二特征。
本申请提出一种功率器件封装结构，其提升了产品的散热性能，提高了产品的可靠性。
如图1-31所示，在本申请的功率器件封装结构的一实施例中，该封装结构包括：
引线框架20，其包括基岛21，以及与基岛21电性连接的第一管脚22；
功率芯片10，其相对的两面分别设有第一电极和第二电极，第一电极通过导电结合层50结合于金属片30的正面，第二电极通过导电结合层50结合与基岛21；
封装体60，其由封装材料固化形成，其包封功率芯片10、包封引线框架20的一部分和金属片30的一部分；金属片30的背面未被封装体60包封，金属片30的背面露出封装体60；第一管脚22的一部分未被封装体60包封，第一管脚22的一部分露出封装体60。
其中，基岛21作为功率芯片10的载体，第一管脚22用于将第二电极与外部电路连接；金属片30外露的部分既用于将第一电极与外部电路连接，也用于直接向封装结构的外部媒质传导热量。
需要说明的是，第一管脚22的一部分露出封装体60，可以是第一管脚22的一端伸出封装体60，也可以是第一管脚22的一表面露出封装体60；金属片30除了露出背面，也可以露出其他部位。
如图7所示，该功率器件封装结构在应用时，可以将金属片30的背面焊接于电路板80，将第一管脚22焊接于电路板80，以实现第一电极与电路板80上的电路、第二电极与电路板80上的电路之间的导通；如此，功率芯片10产生的热量，通过金属片30传导至电路板80，无需通过管脚传导。需要说明的是，此种应用方式不应作为本申请的限制。
相关技术中的功率器件封装结构，第一电极需要通过金属线或金属桥连接至引线框架20的管脚，以通过管脚外引。
而本申请的功率器件封装结构，为了解决发热、散热的问题，采用了在第一电极的区域设置金属片30的方式，既可通过金属片30实现第一电极的外引至外部的电路载体(如电路板80)上，因此，可缩短电传导路径，以降低电阻，降低热耗；并且，功率芯片10产生的热量，可通过金属片30外露的部分直接快速地向外散出，无需通过管脚引导，可缩短热传导路径，提高热传导效率，散热效率高；再者，金属片30面积大，金属片30的面积与第一电 极的面积相当，金属片30与第一电极的接触面积大，可增大热和电的传导面积，增大传导通道，从而大幅降低电阻，降低热耗，且提高散热效率，从而提升散热性能。
需要说明的是，本实施例中，散热性能至少受电阻和散热效率的影响。
本申请的功率器件封装结构，提升了散热性能，提高了可靠性；并且可减少金属线和管脚的数量，节省材料。
在一实施例中，为了保证散热效率最高，金属片30的正面覆盖第一电极的电极区域的70％至100％的面积。
其中，金属片30可以采用但不限于铜片。
本申请中，导电结合层50由导电结合材料固化形成，在第一电极或金属片30上覆导电结合材料，通过焊接或粘合的方式，将第一电极与金属片30结合。其中，结合材料可以为铅锡银合金、金硅合金、银浆中的一种或多种，也可以为其他结合材料，结合材料的成分不作为对本实用新型的限制。
该功率器件封装结构，包括一个或两个或多个功率芯片10。本申请实施例中，功率芯片10的数量为一个或两个。
在其他实施例中，封装结构中的功率芯片10的数量也可以为多个，如四个、六个等，例如在智能功率模块封装结构中，可以包括多个功率芯片10。
功率芯片10可采用三极管芯片11，当封装结构包括三极管芯片11时，三极管芯片11的第一面设有源极111和栅极112，第二面设有漏极，第一面与第二面为相对的两面。
封装结构将源极111作为第一电极，在源极111上设置金属片30，将漏极作为第二电极；或者，封装结构将漏极作为第一电极，在漏极上设置金属片30，将源极111作为第二电极。
功率芯片10还可采用二极管芯片12，当封装结构包括二极管芯片12时，二极管芯片12的第一面设有阳极，第二面设有阴极，第一面与第二面为相对的两面。
封装结构将阳极作为第一电极，在阳极上设置金属片30，将阴极作为第二电极；或者，封装结构将阴极作为第一电极，在阴极上设置金属片30，将阳极作为第二电极。
本申请的功率器件封装结构，至少可以通过如下几种具体的实施方式实施：
实施方式一：功率器件封装结构包括一个功率芯片10，功率芯片10为三极管芯片11。
在一实施例中，三极管芯片11的第一面朝向金属片30的正面，源极111作为第一电极，源极111通过导电结合层50与金属片30的正面结合。
实施方式二：功率器件封装结构包括两个功率芯片10，两个功率芯片10均为三极管芯片11。
在一实施例中，两个三极管芯片11的第一面均朝向金属片30的正面，均采用源极111作为第一电极，源极111与金属片30结合。
当然，也可以其一三极管芯片11采用源极111作为第一电极，另一三极管芯片11采用漏极作为第一电极。
实施方式三：功率器件封装结构包括两个功率芯片10，其一功率芯片10为三极管芯片11，另一功率芯片10为二极管芯片12。
在该功率器件封装结构应用于电力电子设备时，二极管芯片12具有正向导通、反向截止的功能，将三极管芯片11与二极管芯片12的配合，在栅极112关闭的情况下，由于电感等原因产生的反向电流可被二极管芯片12截止，从而使该功率器件封装结构满足更高功率的工作需求。
在一实施例中，三极管芯片11的第一面朝向金属片30，源极111作为第一电极，源极111与金属片30结合。
实施方式四：功率器件封装结构包括两个功率芯片10，两个功率芯片10均为二极管芯片12。
实施方式一至实施方式三中，三极管芯片11均优选采用源极111作为第一电极，源极 111朝下焊接至金属片30上，漏极朝上与引线框架20的基岛21焊接，相对于“漏极作为第一电极，漏极朝下焊接至金属片30，源极111朝上焊接至基岛21”的倒装方案而言，在封装过程中，功率芯片10设有源极111的一面仅具有一个电极，漏极可直接通过点焊锡等导电结合材料方式与基岛21结合，封装更加方便。
本申请中所述的三极管芯片11，可以为但不限于MOSFET芯片；三极管芯片11为开关器件。
本申请的功率器件封装结构，至少可以采用如下两种方式实现散热：
第一，如图1、8、12、16、20、24、28所示，功率器件封装结构为双面散热结构，基岛21远离功率芯片10的一面露出封装体60外；如此，一部分热量可以通过封装结构底部金属片30外露的部分向外散出，一部分热量可以通过封装结构顶部基岛21外露的部分向外散出。
在一实施例中，双面散热的功率器件封装结构，在应用时，如图7所示，可在基岛21外露的表面上加装散热器90，如加装齿形散热器90，实现更高散热性能以及工作性能。
第二，如图5、11、15、19、23、27、31所示，功率器件封装结构为单面散热结构，基岛21被全部包封于封装体60的内部。采用单面散热的功率器件封装结构，封装成本相对低，且相对传统封装结构，已提升了散热性能。
对于包括三极管芯片11的功率器件封装结构，至少可以采用如下两种方式实现栅极112外引：
第一，引线框架20还包括与基岛21电绝缘的第二管脚23，栅极112通过电连接件40与第二管脚23电连接，通过第二管脚23将栅极112外引，实现栅极112与外部电路的连接。其中，电连接件40可以为但不限于导电金属线或导电金属桥，如铜线、铜桥等。
第二，封装结构还包括金属导电片，栅极112通过导电结合层50结合于导电片的正面，导电片的背面露出封装体60，通过导电片将栅极112直接外引，实现栅极112与外部电路的连接。导电片可以为但不限于铜片。导电片和金属片30均由封装体60底部向外露出。
对于至少包括两个功率芯片10的功率器件封装结构，至少可以采用如下两种方式实现金属片30的设置：
第一，当包括两个或多个所述功率芯片10时,设置数量与所述功率芯片10的数量相同的所述金属片30；每一功率芯片10的所述第一电极均与一所述金属片30结合。
本申请提供一种实施例为：功率器件封装结构包括两个功率芯片10和两个金属片30；两个金属片30分别为第一金属片和第二金属片；其一功率芯片10的第一电极通过导电结合层50结合于第一金属片，另一功率芯片10的第一电极通过导电结合层50结合于第二金属片。
对于两个功率芯片10的两个第一电极无需进行电连接的封装结构，可采用两个独立的金属片30分别实现两个第一电极的外引。
第二，包括一组、两组或多组器件组；每一组器件组包括两个功率芯片10和一个金属片30；每一器件组中，两个功率芯片10的第一电极均与金属片30结合。
本申请提供一种实施例为：功率器件封装结构包括两个功率芯片10；两个第一电极通过导电结合层50结合于同一金属片30。对于两个功率芯片10的两个第一电极需要进行电连接的封装结构，直接采用同一个金属片30外引，即可满足两个功率芯片10向外散热，也无需专门采用金属线或金属桥将两个第一电极连接，封装制程简单。
本申请提供如下十四种功率器件封装结构，需要说明的是，但是如下十四种结构不应作为本申请的限制，还可采用其他类型的结构：
结构一：如图1-4所示，单芯片结构，包括一个功率芯片10，功率芯片10为三极管芯片11；其为双面散热结构。
结构二：如图5、2、3、6所示，单芯片结构，包括一个功率芯片10，功率芯片10为三极管芯片11；其为单面散热结构。
结构三：如图8、9、10、4所示，双芯片结构，包括两个功率芯片10，两个功率芯片10 均为三极管芯片11；其为双面散热结构，包括两个金属片30。
结构四：如图11、9、10、6所示，双芯片结构，包括两个功率芯片10，两个功率芯片10均为三极管芯片11；其为单面散热结构，包括两个金属片30。
结构五：如图12、13、14、4所示，双芯片结构，包括两个功率芯片10，两个功率芯片10均为三极管芯片11；其为双面散热结构，两个功率芯片10共用一个金属片30。
结构六：如图15、13、14、6所示，双芯片结构，包括两个功率芯片10，两个功率芯片10均为三极管芯片11；其为单面散热结构，两个功率芯片10共用一个金属片30。
结构七：如图16、17、18、4所示，双芯片结构，包括两个功率芯片10，其一功率芯片10为三极管芯片11，另一功率芯片10为二极管芯片12；其为双面散热结构，包括两个金属片30。
结构八：如图19、17、18、6所示，双芯片结构，包括两个功率芯片10，其一功率芯片10为三极管芯片11，另一功率芯片10为二极管芯片12；其为单面散热结构，包括两个金属片30。
结构九：如图20、21、22、4所示，双芯片结构，包括两个功率芯片10，其一功率芯片10为三极管芯片11，另一功率芯片10为二极管芯片12；其为双面散热结构，两个功率芯片10共用一个金属片30。
结构十：如图23、21、22、6所示，双芯片结构，包括两个功率芯片10，其一功率芯片10为三极管芯片11，另一功率芯片10为二极管芯片12；其为单面散热结构，两个功率芯片10共用一个金属片30。
结构十一：如图24、25、26、4所示，双芯片结构，包括两个功率芯片10，其两个功率芯片10均为二极管芯片12；其为双面散热结构，包括两个金属片30。
结构十二：如图27、25、26、6所示，双芯片结构，包括两个功率芯片10，其两个功率芯片10均为二极管芯片12；其为单面散热结构，包括两个金属片30。
结构十三：如图28、29、30、4所示，双芯片结构，包括两个功率芯片10，其两个功率芯片10均为二极管芯片12；其为双面散热结构，两个功率芯片10共用一个金属片30。
结构十四：如图31、29、30、6所示，双芯片结构，包括两个功率芯片10，其两个功率芯片10均为二极管芯片12；其为双面散热结构，两个功率芯片10共用一个金属片30。
本申请还提出一种电力电子设备，其具有更优的散热性能、工作性能，可靠性更高。
该电力电子设备，包括上述实施例中的功率器件封装结构，还包括电路板80，所述金属片30的背面焊接于所述电路板80，所述管脚焊接于所述电路板80。
该电力电子设备可以为但不限于驱动器、变频器、逆变电源、空调器等。
于本文的描述中，需要理解的是，术语“上”、“下”、“左、”“右”等方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述和简化操作，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。此外，术语“第一”、“第二”，仅仅用于在描述上加以区分，并没有特殊的含义。
在本说明书的描述中，参考术语“一实施例”、“示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特点包含于本申请的至少一个实施例或示例中。在本说明书中，对上述术语的示意性表述不一定指的是相同的实施例或示例。
此外，应当理解，虽然本说明书按照实施方式加以描述，但并非每个实施方式仅包含一个独立的技术方案，说明书的这种叙述方式仅仅是为清楚起见，本领域技术人员应当将说明书作为一个整体，各实施例中的技术方案也可以适当组合，形成本领域技术人员可以理解的其他实施方式。
以上结合具体实施例描述了本申请的技术原理。这些描述只是为了解释本申请的原理，而不能以任何方式解释为对本申请保护范围的限制。基于此处的解释，本领域的技术人员不需要付出创造性的劳动即可联想到本申请的其它具体实施方式，这些方式都将落入本申请的 保护范围之内。

Claims (10)

  1. 一种功率器件封装结构，其中，包括：
    引线框架，其包括基岛，以及与所述基岛电连接的第一管脚；
    金属片；
    功率芯片，其相对的两面分别设有第一电极和第二电极；所述第一电极通过导电结合层结合于所述金属片的正面；所述第二电极通过导电结合层结合于所述基岛；
    封装体，其包封所述功率芯片、所述引线框架的一部分和所述金属片的一部分；所述金属片的背面露出所述封装体，所述第一管脚的一部分露出所述封装体。
  2. 根据权利要求1所述的功率器件封装结构，其中，至少一个所述功率芯片为三极管芯片；所述三极管芯片的第一面设有源极和栅极，在与所述第一面相对的第二面设有漏极；
    所述源极为第一电极，所述漏极为第二电极；或，所述漏极为所述第一电极，所述源极为所述第二电极。
  3. 根据权利要求2所述的功率器件封装结构，其中，所述引线框架还包括与所述基岛绝缘的第二管脚，所述栅极通过电连接件与所述第二管脚电连接；
    或，所述功率器件封装结构还包括导电片，所述栅极通过导电结合层结合于所述导电片的正面，所述导电片的背面露出所述封装体。
  4. 根据权利要求1所述的功率器件封装结构，其中，所述功率芯片的数量为两个；
    其一所述功率芯片为三极管芯片，另一所述功率芯片为二极管芯片；或，两个所述功率芯片均为三极管芯片。
  5. 根据权利要求1所述的功率器件封装结构，其中，所述功率芯片的数量为两个；两个所述功率芯片均为二极管芯片；
    所述第一电极为阳极，所述第二电极为阴极；或，所述第一电极为阴极，所述第二电极为阳极。
  6. 根据权利要求1所述的功率器件封装结构，其中，所述基岛远离所述功率芯片的一面露出所述封装体。
  7. 根据权利要求1所述的功率器件封装结构，其中，所述基岛被全部包封于所述封装体的内部。
  8. 根据权利要求1所述的功率器件封装结构，其中，包括两个或多个所述功率芯片,以及数量与所述功率芯片的数量相同的所述金属片；每一功率芯片的所述第一电极均与一所述金属片结合。
  9. 根据权利要求1所述的功率器件封装结构，其中，包括至少一组器件组；每一组所述器件组包括两个功率芯片和一个金属片；所述器件组中，两个所述功率芯片的所述第一电极均与所述金属片结合。
  10. 一种电力电子设备，其中，包括权利要求1所述的功率器件封装结构，还包括电路板，所述金属片的背面焊接于所述电路板，所述管脚焊接于所述电路板。
PCT/CN2021/101671 2020-12-15 2021-06-22 一种功率器件封装结构及电力电子设备 WO2022127060A1 (zh)

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