WO2022049671A1 - 電子部品装置を製造する方法、及び電子部品装置 - Google Patents

電子部品装置を製造する方法、及び電子部品装置 Download PDF

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Publication number
WO2022049671A1
WO2022049671A1 PCT/JP2020/033259 JP2020033259W WO2022049671A1 WO 2022049671 A1 WO2022049671 A1 WO 2022049671A1 JP 2020033259 W JP2020033259 W JP 2020033259W WO 2022049671 A1 WO2022049671 A1 WO 2022049671A1
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WIPO (PCT)
Prior art keywords
wiring structure
wiring
conductor pin
electronic component
connection portion
Prior art date
Application number
PCT/JP2020/033259
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English (en)
French (fr)
Inventor
智章 柴田
直也 鈴木
Original Assignee
昭和電工マテリアルズ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 昭和電工マテリアルズ株式会社 filed Critical 昭和電工マテリアルズ株式会社
Priority to PCT/JP2020/033259 priority Critical patent/WO2022049671A1/ja
Priority to JP2022546330A priority patent/JPWO2022050256A1/ja
Priority to PCT/JP2021/031877 priority patent/WO2022050256A1/ja
Priority to US18/043,582 priority patent/US20230268195A1/en
Publication of WO2022049671A1 publication Critical patent/WO2022049671A1/ja

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    • H—ELECTRICITY
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    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
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Definitions

  • the present invention relates to a method for manufacturing an electronic component device and an electronic component device.
  • conductive vias may be provided that penetrate the sealing layer that seals the semiconductor chip (for example, Patent Document 1).
  • Conventional methods of forming conductive vias that penetrate the encapsulation layer generally include the step of electroplating.
  • One aspect of the present invention provides a method that enables an electronic component having a conductive via penetrating a sealing layer for encapsulating the electronic component to be manufactured in a simpler process.
  • One aspect of the present invention is to prepare a wiring structure including a wiring portion including a metal wiring and an insulating layer and having two facing main surfaces and a connection portion provided on one main surface of the wiring portion.
  • a method for manufacturing an electronic component device which comprises forming a sealing layer for sealing a conductor pin on the wiring structure.
  • Another aspect of the present invention is a wiring structure including a wiring portion including a metal wiring and an insulating layer and having two facing main surfaces and a connection portion provided on one main surface of the wiring portion.
  • One or more electronic components mounted on the wiring structure, a sealing layer formed on the wiring structure for sealing the electronic components, and the sealing while standing with respect to the connection portion.
  • an electronic component device comprising a conductor pin penetrating a stop layer.
  • an electronic component device having a conductive via penetrating a sealing layer can be efficiently and easily manufactured in a small number of steps.
  • the method according to one aspect of the present invention is also advantageous in that a conductive via having a narrow width and a certain height can be easily formed.
  • FIG. 1, FIG. 2, FIG. 3 and FIG. 4 are process diagrams showing an embodiment of a method for manufacturing an electronic component device.
  • the methods shown in FIGS. 1 to 4 include a metal wiring 61 and an insulating layer 62, and a plurality of wiring portions 6 having two main surfaces 6S1 and 6S2 facing each other and a plurality of wiring portions 6 provided on one main surface 6S1 of the wiring portion 6.
  • a wiring structure 60 is provided with a chip component 2 as an electronic component and a chip-type passive component 3 mounted on the wiring structure, and a sealing layer 7 for sealing the electronic component (chip component 2 and the passive component 3) and the conductor pin 5. Includes forming on.
  • the wiring structure 60 exemplified in FIG. 1A is prepared in a state of being fixed on the carrier base material 1.
  • the carrier base material 1 is a laminate having a support 11 and a temporary fixing material layer 12 provided on the support 11, and a wiring structure 60 is provided on the temporary fixing material layer 12.
  • the support 11 may have sufficient strength and rigidity to support electronic components, and its material is not particularly limited.
  • the support 11 may be a silicon wafer, a glass plate, or a stainless steel plate.
  • the thickness of the support 11 is not particularly limited, but may be, for example, 200 to 2000 ⁇ m.
  • the temporary fixing material layer 12 can hold the wiring structure 60 during the mounting of the electronic component and the formation of the sealing layer 7, and has a peelability to the extent that it can be finally peeled off from the wiring structure 60.
  • the thickness of the temporary fixing material layer 12 may be, for example, 1 to 100 ⁇ m.
  • the material forming the temporary fixing material layer 12 can be selected from the materials used for the purpose of temporary fixing or temporary bonding in the manufacture of the electronic component device (see, for example, International Publication No. 2017/0573555).
  • the wiring portion 6 of the wiring structure 60 has a metal wiring 61 and an insulating layer 62 provided between the metal wirings 61.
  • the metal wiring 61 includes a multilayer wiring layer 61a extending in a direction parallel to the main surfaces 6S1 and 6S2 of the wiring portion 6 and a connecting portion 61b extending in a direction perpendicular to the main surfaces 6S1 and 6S2 of the wiring portion 6. including.
  • the metal wiring 61 constituting the wiring portion 6 according to the present embodiment includes rewiring connected to the chip component 2 and the passive component 3.
  • the thickness of each wiring layer 61a is not particularly limited, but may be, for example, 1 to 30 ⁇ m.
  • the thickness of the entire wiring portion 6 may be, for example, 2 to 1000 ⁇ m.
  • the wiring portion 6 can be formed by a usual method known to those skilled in the art. For a method of forming a wiring portion including a metal wiring, for example, Japanese Patent No. 5494766 can be referred to.
  • the plurality of connection portions provided in the wiring structure 60 include a connection portion 65 connected to the chip component 2, a connection portion 66 connected to the passive component 3, and a connection portion 67 connected to the conductor pin 5. , Each of which is connected to the metal wiring 61.
  • the connecting portions 65, 66, 67 may be made of the same metal as the metal wiring 61.
  • the connecting portions 65, 66, 67 may include solder bumps.
  • the width of the connecting portions 65, 66, 67 may be, for example, 10 to 500 ⁇ m.
  • the height of the connecting portions 65, 66, 67 may be, for example, 1 to 25 ⁇ m.
  • connection portion 65 in which a plurality of connection portions 67 connected to the conductor pin 5 are connected to electronic components (chip component 2 and passive component 3) mounted on the wiring structure 60 along the outer periphery of the wiring portion 6. It is arranged on one main surface 6S1 of the wiring portion 6 so as to surround 66.
  • the plurality of conductor pins 5 provided on the connection portion 67 arranged in this way can function as an electromagnetic wave shield together with the shield film 8.
  • the prepared wiring structure 60 may be inspected.
  • the inspection includes, for example, checking for abnormalities due to disconnection or short circuit of the metal wiring 61 and the connection portions 65, 66, 67.
  • defective products of the wiring structure 60 can be eliminated before the wiring structure 60 is connected to the electronic components.
  • the conductor pin 5 is fixed on the wiring structure 60 while standing with respect to the connection portion 67.
  • the columnar conductor pins 5 are fixed on the connecting portion 67 in a direction in which the longitudinal direction of the conductor pins 5 is substantially perpendicular to the main surface 6S1 of the wiring portion 6.
  • the conductor pin 5 is fixed on the wiring structure 60 while standing with respect to the connection portion 67 means that the conductor pin 5 has a wiring structure on the surface side of the connection portion 67 opposite to the wiring portion 6. It means that the angle between the longitudinal direction of the conductor pin 5 fixed to the body 60 and the main surface 6S1 of the wiring portion 6 is a right angle or close to a right angle.
  • the angle between the longitudinal direction of the fixed conductor pin 5 and the main surface 6S1 of the wiring portion 6 may be, for example, 85 to 95 °.
  • One end of the conductor pin 5 is joined to the connecting portion 67 via the solder film 50, whereby the conductor pin 5 is electrically connected to the connecting portion 67.
  • FIGS. 5 and 6 are process diagrams showing an embodiment of a method of fixing the conductor pin 5 on the wiring structure 60.
  • a mask 41 having an opening 41A provided at a position corresponding to the connecting portion 67 is arranged on the main surface 6S1 side where the connecting portion 67 of the wiring portion 6 is provided, and the opening is opened.
  • the flux agent 52 is introduced on the connecting portion 67 located inside the 41A, and the opening 42A provided at the position corresponding to the connecting portion 67 on the main surface 6S1 side where the connecting portion 67 of the wiring portion 6 is provided.
  • the solder-coated pin 55 having the solder film 50 covering the conductor pin 5 and the surface of the conductor pin 5 is inserted from the opening 42A, whereby the solder-coated pin 55 stands with respect to the connection portion 67.
  • the conductor pin 5 is fixed so as to be electrically connected to the connection portion 67 via the solder film 50 by arranging the conductor pin 5 on the connection portion 67 in a state of being in the state of being in the state of being in the state of being in the state of being in the state of being. Includes removing 52.
  • a surface insulating layer 4 such as a solder resist may be arranged on the insulating layer 62.
  • the flux agent 52 By using the flux agent 52, it is easy to obtain a good connection with the solder film 50.
  • the flux agent 52 is not particularly limited and can be arbitrarily selected by those skilled in the art.
  • the flux agent 52 is introduced onto the connection portion 67 by, for example, a printing method.
  • the conductor pin 5 constituting the solder-coated pin 55 may be a columnar metal molded body containing at least one metal selected from copper, gold, aluminum, silver and the like.
  • the maximum width of the conductor pin 5 (the maximum width of the cross section perpendicular to the longitudinal direction) may be, for example, 10 to 500 ⁇ m or 50 to 200 ⁇ m.
  • the length of the conductor pin 5 may be, for example, 50 to 1000 ⁇ m or 100 to 500 ⁇ m.
  • the ratio of the length of the conductor pin 5 to the maximum width of the conductor pin 5 may be 2 to 10.
  • the solder film 50 covers the entire or part of the outer surface of the conductor pin 5.
  • the thickness of the solder film 50 may be, for example, 0.1 to 10 ⁇ m.
  • a method comprising sprinkling a large number of solder-coated pins 55 (or conductor pins 5) on the mask 42 and vibrating the wiring structure 60 and the mask 42 in excess of the number of openings 42A, the solder-coated pins 55 (or conductors).
  • the pin 5) can be inserted through the opening 42A.
  • the minimum width of the opening 42A is usually larger than the maximum width of the solder coated pin 55 (or conductor pin 5).
  • the solder film 50 When the solder film 50 is melted by heating the solder coating pin 55 arranged on the connection portion 67 while standing with respect to the connection portion 67, the solder film 50 flows and moves on the connection portion 57.
  • the conductor pin 5 is fixed on the wiring structure 60 by the solder film 50 on the connection portion 67, and is electrically connected to the connection portion 67.
  • the heating temperature for melting the solder film 50 may be equal to or higher than the melting point of the solder film 50. For example, when the solder film 50 is a Sn—Ag—Cu-based lead-free solder film, the temperature is 250 to 300 ° C. You may.
  • circuit component 2 and passive component 3 are mounted on the wiring structure 60 as shown in FIG. 2 (a).
  • the order in which the chip component 2 and the passive component 3 are mounted is arbitrary. After mounting the chip component 2 and the passive component 3 on the wiring structure 60, the conductor pin 5 may be introduced.
  • the chip component 2 is electrically connected to the connection portion 65.
  • the chip component 2 has an IC chip 21 and a plurality of connection portions 22 provided on the IC chip 21.
  • the connecting portion 22 may have a columnar portion 22A containing metal and a bump 22B provided on the columnar portion 22A.
  • the maximum width of the chip component 2 in the direction parallel to the main surface 6S1 may be, for example, 0.1 to 50 mm.
  • the passive component 3 is electrically connected to the connection portion 66.
  • the passive component 3 is selected according to the design of the electronic component device, but may be, for example, a resistor, a capacitor, or a combination thereof.
  • the passive component 3 is electrically connected to the connection portion 66 via, for example, the bump 32.
  • the maximum width of the passive component 3 in the direction parallel to the main surface 6S1 may be 0.05 to 2 mm, 1 to 2 mm, 0.5 to 1 mm, or 0.1 to 0.5 mm.
  • the sealing layer 7 for sealing them is made of a sealing resin material. It is formed.
  • the sealing layer 7 is formed so as to embed the entire conductor pin 5 and the electronic component (chip component 2 and passive component 3). When there is a gap between the electronic component and the wiring structure, a part or all of the gap may be filled by the sealing layer 7.
  • the sealing layer 7 can be formed in a mold by, for example, a compression or transfer type molding machine.
  • the sealing layer 7 may be formed by using a film-shaped sealing resin material (see, for example, International Publication No. 2015/186744). In that case, from the viewpoint of preventing the entrainment of air bubbles, the film-shaped sealing resin material may be laminated under reduced pressure.
  • the tip of the conductor pin 5 is exposed as shown in FIG. 3A. Grinding of the sealing layer 7 can be performed using a normal grinding device.
  • a conductive shield film 8 covering the surface of the sealing layer 7 opposite to the wiring structure 60 is formed.
  • the shield film 8 is connected to the tip of the conductor pin 5.
  • the shield film 8 is provided mainly for the purpose of electromagnetic wave shielding.
  • the thickness of the shield film 8 may be, for example, 0.1 to 100 ⁇ m.
  • the shield film 8 can be a single-layer or multi-layer metal thin film, which can be formed by methods such as sputtering or vapor deposition, for example.
  • the carrier base material 1 is peeled off from the wiring structure 60.
  • the carrier base material 1 having the temporary fixing material layer 12 can be peeled off from the wiring portion 6 by, for example, heating, light irradiation, or mechanical peeling.
  • the solder ball 9 connected to the metal wiring 61 is placed on the main surface 6S2 on the side opposite to the sealing layer 7 of the wiring portion 6. May be provided.
  • the solder ball 9 is used as a connection terminal for secondary mounting. Reflow is performed if necessary.
  • the electronic component device 100 can be obtained by the method exemplified above.
  • the electronic component device 100 includes a wiring structure 60, a plurality of electronic components (chip component 2 and passive component 3) mounted on the wiring structure 60, and a sealing layer 7 for sealing the electronic component and the conductor pin 5. It is mainly composed of a conductor pin 5 that penetrates the sealing layer 7 while standing with respect to the connecting portion 67.
  • the method for manufacturing the electronic component device is not limited to the example described above, and can be changed as necessary.
  • a wiring structure corresponding to a plurality of electronic component devices may be formed on one carrier base material having a large area.
  • the following is an example of a test in which the conductor pin is fixed on the wiring structure while standing with respect to the connection portion.
  • a test wiring structure having a connection portion having a circular cross section with a diameter of 200 ⁇ m arranged on the insulating layer was prepared.
  • the wiring structure was provided on the insulating layer and had a surface insulating layer having a circular opening surrounding the connection portion.
  • a metal mask 41 having a thickness of 30 ⁇ m and having a circular opening 41A having a diameter of 190 ⁇ m provided at a position corresponding to the connection portion 67 is placed on the wiring structure and water-soluble.
  • a sex flux agent (“WF-6457” manufactured by Senju Metal Industry Co., Ltd.) was printed, and the flux agent 52 was introduced on the connection portion 67.
  • a metal mask having a thickness of 145 ⁇ m (including a rib height of 45 ⁇ m) having a circular opening 42A having a diameter of 92 ⁇ m provided at a position corresponding to the connection portion 67. 42 is installed on the wiring structure 60, and using a conductor pin mounting machine (“SBP662” manufactured by Shibuya Kogyo Co., Ltd.), a solder coated pin 55 (diameter 76 ⁇ m, having a conductor pin 5 (copper pin) and a solder film 50) has a conductor pin 5 (copper pin) and a solder film 50.
  • SBP662 conductor pin mounting machine
  • a length of 180 ⁇ m (manufactured by Finecs Co., Ltd.) was inserted through the opening 42A of the metal mask 42, so that the metal mask 42 was placed on the connecting portion 67 in a standing position with respect to the connecting portion 67.
  • the solder film 50 is melted by reflow under the condition of a maximum temperature of 265 ° C. in a nitrogen atmosphere, and the conductor pin 5 and the connecting portion 57 are connected to the solder film 50.
  • the conductor pin 5 was fixed so as to be electrically connected via the wire.
  • FIG. 7 is a photomicrograph of the wiring structure and the conductor pins fixed on the wiring structure produced by the above method. As shown in the photograph of FIG. 7, it was confirmed that the conductor pin 5 can be fixed on the wiring structure while standing with respect to the connection portion 67.

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Abstract

金属配線及び絶縁層を含み対向する２つの主面を有する配線部と配線部の一方の主面上に設けられた接続部とを有する配線構造体を準備することと、導体ピンを、接続部に対して立った状態で配線基板上に固定することと、配線構造体上に１個以上の電子部品を搭載することと、電子部品及び導体ピンを封止する封止層を配線構造体上に形成することとを含む、電子部品装置を製造する方法が開示される。

Description

電子部品装置を製造する方法、及び電子部品装置
　本発明は、電子部品装置を製造する方法、及び電子部品装置に関する。
　各種の半導体パッケージにおいて、半導体チップを封止する封止層を貫通する導電性ビアが設けられることがある（例えば、特許文献１）。封止層を貫通する導電性ビアを形成する従来の方法は、一般に、電解めっきの工程を含む。
米国特許出願公開第２０１４／２５２６４６号明細書
　本発明の一側面は、電子部品を封止する封止層を貫通する導電ビアを有する電子部品を、より簡易な工程で製造することを可能にする方法を提供する。
　本発明の一側面は、金属配線及び絶縁層を含み対向する２つの主面を有する配線部と前記配線部の一方の主面上に設けられた接続部とを有する配線構造体を準備することと、導体ピンを、前記接続部に対して立った状態で前記配線構造体上に固定することと、前記配線構造体上に１個以上の電子部品を搭載することと、前記電子部品及び前記導体ピンを封止する封止層を前記配線構造体上に形成することとを含む、電子部品装置を製造する方法を提供する。
　本発明の別の一側面は、金属配線及び絶縁層を含み対向する２つの主面を有する配線部と前記配線部の一方の主面上に設けられた接続部とを有する配線構造体と、前記配線構造体に搭載された１個以上の電子部品と、前記電子部品を封止する、前記配線構造体上に形成された封止層と、前記接続部に対して立った状態で前記封止層を貫通する導体ピンと、を備える電子部品装置を提供する。
　本発明の一側面によれば、封止層を貫通する導電性ビアを有する電子部品装置を、少ない工程で効率的且つ容易に製造することができる。本発明の一側面に係る方法は、幅が狭く、且つある程度の高さを有する導電性ビアを容易に形成できる点でも有利である。
電子部品装置を製造する方法の一実施形態を示す工程図である。 電子部品装置を製造する方法の一実施形態を示す工程図である。 電子部品装置を製造する方法の一実施形態を示す工程図である。 電子部品装置を製造する方法の一実施形態を示す工程図である。 導体ピンを配線構造体上に固定する方法の一実施形態を示す工程図である。 導体ピンを配線構造体上に固定する方法の一実施形態を示す工程図である。 配線構造体及び配線構造体上に固定された導体ピンの顕微鏡写真である。
　以下、本発明のいくつかの実施形態について詳細に説明する。ただし、本発明は以下の実施形態に限定されるものではない。
　図１、図２、図３及び図４は、電子部品装置を製造する方法の一実施形態を示す工程図である。図１～４に示される方法は、金属配線６１及び絶縁層６２を含み対向する２つの主面６Ｓ１，６Ｓ２を有する配線部６と配線部６の一方の主面６Ｓ１上に設けられた複数の接続部６５，６６，６７とを有する配線構造体６０を準備することと、導体ピン５を、接続部６７に対して立った状態で配線構造体６０上に固定することと、配線構造体６０上に電子部品としてのチップ部品２及びチップ型の受動部品３を搭載することと、電子部品（チップ部品２及び受動部品３）及び導体ピン５を封止する封止層７を配線構造体６０上に形成することとを含む。
　図１の（ａ）に例示される配線構造体６０は、キャリア基材１上に固定された状態で準備される。キャリア基材１は、支持体１１、及び支持体１１上に設けられた仮固定材層１２を有する積層体であり、仮固定材層１２上に配線構造体６０が設けられる。支持体１１は、電子部品を支持可能な程度の強度及び剛性を有していればよく、その材質は特に限定されない。例えば、支持体１１が、シリコンウェハ、ガラス板、又はステンレス鋼板であってもよい。支持体１１の厚さは、特に制限されないが、例えば２００～２０００μｍであってもよい。仮固定材層１２は、電子部品の搭載及び封止層７の形成の間、配線構造体６０を保持できるとともに、最終的に配線構造体６０から剥離できる程度の剥離性を有する。仮固定材層１２の厚さは、例えば１～１００μｍであってもよい。仮固定材層１２を形成する材料は、電子部品装置の製造において、仮固定又は仮接着の目的で用いられている材料から選択することができる（例えば、国際公開第２０１７／０５７３５５号参照）。
　配線構造体６０の配線部６は、金属配線６１と、金属配線６１の間に設けられた絶縁層６２とを有する。金属配線６１は、配線部６の主面６Ｓ１，６Ｓ２に平行な方向に延在する多層の配線層６１ａと、配線部６の主面６Ｓ１，６Ｓ２に垂直な方向に延在する連結部６１ｂとを含む。本実施形態に係る配線部６を構成する金属配線６１は、チップ部品２及び受動部品３に接続される再配線を含む。それぞれの配線層６１ａの厚さは、特に制限されないが、例えば１～３０μｍであってもよい。配線部６全体の厚さは、例えば２～１０００μｍであってもよい。配線部６は、当業者に知られる通常の方法によって形成することができる。金属配線を含む配線部を形成する方法に関しては、例えば、特許第５４９４７６６号公報を参照することができる。
　配線構造体６０に設けられる複数の接続部は、チップ部品２に接続される接続部６５と、受動部品３に接続される接続部６６と、導体ピン５に接続される接続部６７とを含み、それぞれ金属配線６１に接続されている。接続部６５，６６，６７は、金属配線６１と同様の金属によって形成されていてもよい。接続部６５，６６，６７が、半田バンプを含んでいてもよい。接続部６５，６６，６７の幅は例えば１０～５００μｍであってもよい。接続部６５，６６，６７の高さは例えば１～２５μｍであってもよい。導体ピン５に接続される複数の接続部６７が、配線部６の外周に沿って、配線構造体６０に搭載される電子部品（チップ部品２及び受動部品３）に接続される接続部６５、６６を囲むように配線部６の一方の主面６Ｓ１上に配置される。このように配置された接続部６７上に設けられる複数の導体ピン５は、シールド膜８とともに電磁波シールドとして機能することができる。
　準備された配線構造体６０を検査してもよい。検査は、例えば金属配線６１及び接続部６５，６６，６７の断線又は短絡による異常の有無を確認することを含む。この検査により、配線構造体６０に電子部品と接続される前に、配線構造体６０の不良品を排除することができる。その結果、封止層内に封止された電子部品上に配線構造体を形成する場合と比較して、正常な電子部品が配線構造体の形成における不具合のために排除される可能性を低くすることができる。
　図１の（ｂ）に示されるように、導体ピン５が、接続部６７に対して立った状態で配線構造体６０上に固定される。言い換えると、柱状の導体ピン５が、導体ピン５の長手方向が配線部６の主面６Ｓ１に略垂直な方向に沿う向きで接続部６７上に固定される。「導体ピン５が、接続部６７に対して立った状態で配線構造体６０上に固定される」とは、導体ピン５が、接続部６７の配線部６とは反対の面側において配線構造体６０に対して固定され、固定された導体ピン５の長手方向と、配線部６の主面６Ｓ１との角度が、直角又は直角に近いことを意味する。固定された導体ピン５の長手方向と、配線部６の主面６Ｓ１との角度が、例えば８５～９５°であってもよい。導体ピン５の一端が、半田膜５０を介して接続部６７に接合され、それにより導体ピン５が接続部６７と電気的に接続される。
　図５及び図６は、導体ピン５を配線構造体６０上に固定する方法の一実施形態を示す工程図である。図５及び図６に示される方法は、配線部６の接続部６７が設けられた主面６Ｓ１側に、接続部６７に対応する位置に設けられた開口４１Ａを有するマスク４１を配置し、開口４１Ａの内側に位置する接続部６７上にフラックス剤５２を導入することと、配線部６の接続部６７が設けられた主面６Ｓ１側に、接続部６７に対応する位置に設けられた開口４２Ａを有するマスク４２を配置し、開口４２Ａから、導体ピン５及び導体ピン５の表面を覆う半田膜５０を有する半田被覆ピン５５を挿入し、それにより半田被覆ピン５５を接続部６７に対して立った状態で接続部６７上に配置することと、半田膜５０を溶融させることによって、導体ピン５を半田膜５０を介して接続部６７と電気的に接続するように固定することと、フラックス剤５２を除去することとを含む。絶縁層６２上にソルダーレジストなどの表面絶縁層４を配置してもよい。
　フラックス剤５２を用いることにより、半田膜５０による良好な接続が得られ易い。フラックス剤５２は、特に制限されず、当業者が任意に選択することができる。フラックス剤５２は、例えば印刷法によって接続部６７上に導入される。
　半田被覆ピン５５を構成する導体ピン５は、銅、金、アルミニウム、及び銀等から選ばれる少なくとも１種の金属を含む柱状の金属成形体であってもよい。導体ピン５の最大幅（長手方向に垂直な断面の最大幅）は、例えば１０～５００μｍ、又は５０～２００μｍであってもよい。導体ピン５の長さは、例えば５０～１０００μｍ、又は１００～５００μｍであってもよい。導体ピン５の最大幅に対する導体ピン５の長さの比が２～１０であってもよい。半田膜５０は、導体ピン５の外表面の全体又は一部を覆っている。半田膜５０の厚さは、例えば０．１～１０μｍであってもよい。
　例えば、開口４２Ａの数を超える多数の半田被覆ピン５５（又は導体ピン５）をマスク４２上に撒き、配線構造体６０及びマスク４２を振動させることを含む方法によって、半田被覆ピン５５（又は導体ピン５）を開口４２Ａから挿入することができる。開口４２Ａの最小幅は、通常、半田被覆ピン５５（又は導体ピン５）の最大幅よりも大きい。
　接続部６７に対して立った状態で接続部６７上に配置された半田被覆ピン５５を加熱することによって半田膜５０を溶融させると、半田膜５０が流動して接続部５７上に移動する。接続部６７上の半田膜５０によって、導体ピン５が配線構造体６０上に固定されるとともに、接続部６７と電気的に接続される。半田膜５０を溶融させるための加熱温度は、半田膜５０の融点以上であればよく、例えば半田膜５０がＳｎ－Ａｇ－Ｃｕ系の鉛フリー半田の膜である場合、２５０～３００℃であってもよい。
　導体ピン５が導入された後、図２の（ａ）に示されるように、配線構造体６０上に電子部品（チップ部品２及び受動部品３）が搭載される。チップ部品２及び受動部品３を搭載する順番は任意である。チップ部品２及び受動部品３を配線構造体６０上に搭載した後、導体ピン５を導入してもよい。
　チップ部品２は、接続部６５と電気的に接続される。チップ部品２は、ＩＣチップ２１及びＩＣチップ２１上に設けられた複数の接続部２２を有する。接続部２２は、金属を含む柱状部２２Ａ及び柱状部２２Ａ上に設けられたバンプ２２Ｂを有していてもよい。チップ部品２の主面６Ｓ１に平行な方向における最大幅は、例えば０．１～５０ｍｍであってもよい。
　受動部品３は、接続部６６と電気的に接続される。受動部品３は、電子部品装置の設計に従って選択されるが、例えば、抵抗、コンデンサ又はこれらの組み合わせであってもよい。受動部品３は、例えば、バンプ３２を介して接続部６６に電気的に接続される。受動部品３の主面６Ｓ１に平行な方向における最大幅は、０．０５～２ｍｍ、１～２ｍｍ、０．５～１ｍｍ、又は０．１～０．５ｍｍであってもよい。
　導体ピン５、チップ部品２及び受動部品３が配線構造体６０上に固定された後、図２の（ｂ）に示されるように、これらを封止する封止層７が封止樹脂材によって形成される。封止層７は、導体ピン５、及び電子部品（チップ部品２及び受動部品３）の全体を埋め込むように形成される。電子部品と配線構造体との間に隙間がある場合、その隙間の一部又は全部が封止層７によって充填されてもよい。封止層７は、例えば、コンプレッション又はトランスファー方式の成形機によって、金型内で形成することができる。あるいは、フィルム状の封止樹脂材を用いて封止層７を形成してもよい（例えば、国際公開第２０１５／１８６７４４号参照。）。その場合、気泡の巻き込み防止の観点から、フィルム状の封止樹脂材を減圧下で積層してもよい。
　形成された封止層７を配線構造体６０とは反対側の面から研削することにより、図３の（ａ）に示されように、導体ピン５の先端を露出させる。封止層７の研削は、通常の研削装置を用いて行うことができる。
　続いて、図３の（ｂ）に示されるように、封止層７の配線構造体６０とは反対側の面を覆う導電性のシールド膜８が形成される。シールド膜８は、導体ピン５の先端と接続される。シールド膜８は、主として電磁波シールドの目的で設けられる。シールド膜８の厚さは、例えば０．１～１００μｍであってもよい。シールド膜８は、単層又は複数層の金属薄膜であることができ、これらは例えばスパッタ又は蒸着のような方法によって形成することができる。
　図４の（ａ）に示されるように、キャリア基材１が配線構造体６０から剥離される。仮固定材層１２を有するキャリア基材１は、例えば、加熱、光照射、又は機械剥離により、配線部６から剥離することができる。
　キャリア基材１の剥離の後、図４の（ｂ）に示されるように、配線部６の封止層７とは反対側の主面６Ｓ２上に、金属配線６１と接続される半田ボール９を設けてもよい。半田ボール９は二次実装用の接続端子として用いられる。必要によりリフローが行われる。
　以上例示された方法によって、電子部品装置１００が得られる。電子部品装置１００は、配線構造体６０と、配線構造体６０に搭載された複数の電子部品（チップ部品２及び受動部品３）と、電子部品及び導体ピン５を封止する封止層７と、接続部６７に対して立った状態で封止層７を貫通する導体ピン５と、から主として構成される。
　電子部品装置を製造する方法は、以上説明した例に限定されるものではなく、必要により変更が可能である。例えば、大面積の１枚のキャリア基材上に、複数の電子部品装置に対応する配線構造体を形成してもよい。
　以下、導体ピンを接続部に対して立った状態で配線構造体上に固定する試験の例を示す。
　絶縁層上に配置された直径２００μｍの円形断面を有する接続部を有する試験用の配線構造体を準備した。配線構造体は、絶縁層上に設けられ、接続部を囲む円形の開口を有する表面絶縁層を有していた。図５の（ｂ）に示される工程と同様に、接続部６７に対応する位置に設けられた直径１９０μｍの円形の開口４１Ａを有する厚さ３０μｍのメタルマスク４１を配線構造体上に置き、水溶性フラックス剤（千住金属工業株式会社製「ＷＦ－６４５７」）印刷して、接続部６７上にフラックス剤５２を導入した。
　次に、図５の（ｃ）に示される工程と同様に、接続部６７に対応する位置に設けられた直径９２μｍの円形の開口４２Ａを有する厚さ１４５μｍ（リブ高さ４５μｍ含む）のメタルマスク４２を配線構造体６０上に設置し、導体ピン搭載機（渋谷工業株式会社製「ＳＢＰ６６２」）を用いて、導体ピン５（銅ピン）及び半田膜５０を有する半田被覆ピン５５（直径７６μｍ、長さ１８０μｍ、ファインネクス株式会社製）をメタルマスク４２の開口４２Ａから挿入することにより、接続部６７に対して立った状態で接続部６７上に配置した。
　続いて、図６の（ａ）に示される工程と同様に、窒素雰囲気中、最高温度２６５℃の条件のリフローにより、半田膜５０を溶融させ、導体ピン５と接続部５７とが半田膜５０を介して電気的に接続されるように導体ピン５を固定した。
　最後に、図６の（ｂ）に示される工程と同様に、水洗によりフラックス剤５２を除去した。図７は、以上の方法によって作製された、配線構造体及び配線構造体上に固定された導体ピンの顕微鏡写真である。図７の写真に示されるように、導体ピン５を、接続部６７に対して立った状態で配線構造体上に固定できることが確認された。
　１…キャリア基材、２…チップ部品（電子部品）、３…受動部品（電子部品）、５…導体ピン、６…配線部、６Ｓ１，６Ｓ２…配線部の主面、７…封止層、８…シールド膜、１１…支持体、１２…仮固定材層、２２，６５，６６，６７…接続部、４１，４２…マスク、４１Ａ，４２Ａ…開口、５０…半田膜、５５…半田被覆ピン、６０…配線構造体、６１…金属配線、６２…絶縁層、１００…電子部品装置。

Claims (9)

  1. 　金属配線及び絶縁層を含み対向する２つの主面を有する配線部と前記配線部の一方の主面上に設けられた接続部とを有する配線構造体を準備することと、
    　導体ピンを、前記接続部に対して立った状態で前記配線構造体上に固定することと、
    　前記配線構造体上に１個以上の電子部品を搭載することと、
    　前記電子部品及び前記導体ピンを封止する封止層を前記配線構造体上に形成することと、
    を含む、電子部品装置を製造する方法。
  2. 　当該方法が、前記封止層を前記配線構造体とは反対側の面から研削することにより、前記導体ピンの先端を露出させることを更に含む、請求項１に記載の方法。
  3. 　複数の前記導体ピンが、前記電子部品を囲むように前記配線構造体上に配置され、
    　当該方法が、前記封止層を覆い、前記導体ピンの先端と接続された導電性のシールド膜を形成することを更に含む、請求項２に記載の方法。
  4. 　前記配線構造体の前記接続部が設けられた主面側に、開口を有するマスクを配置し、前記開口から前記導体ピンを挿入することを含む方法によって、前記導体ピンが前記接続部に対して立った状態で前記配線構造体上に固定される、請求項１～３のいずれか一項に記載の方法。
  5. 　前記導体ピンと前記導体ピンの表面を覆う半田膜とを有する半田被覆ピンを前記接続部に対して立った状態で配置し、その状態で前記半田膜を溶融させることによって、前記導体ピンが、前記接続部と半田を介して電気的に接続するように前記配線構造体上に固定される、請求項１～４のいずれか一項に記載の方法。
  6. 　前記導体ピンが、最大幅１０～５００μｍ、長さ５０～１０００μｍの柱状の金属成形体である、請求項１～５のいずれか一項に記載の方法。
  7. 　金属配線及び絶縁層を含み対向する２つの主面を有する配線部と前記配線部の一方の主面上に設けられた接続部とを有する配線構造体と、
    　前記配線構造体に搭載された１個以上の電子部品と、
    　前記電子部品を封止する、前記配線構造体上に形成された封止層と、
    　前記接続部に対して立った状態で前記封止層を貫通する導体ピンと、
    を備える電子部品装置。
  8. 　複数の前記導体ピンが、前記電子部品を囲むように前記配線構造体上に配置され、
    　当該電子部品装置が、前記封止層を覆い、前記導体ピンの先端と接続された導電性のシールド膜を更に備える、請求項７に記載の電子部品装置。
  9. 　前記導体ピンと前記接続部との間に介在する半田膜を更に有する、請求項７又は８に記載の電子部品装置。
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JP2013021359A (ja) * 2012-09-27 2013-01-31 Shinko Electric Ind Co Ltd リードピン付配線基板及びその製造方法
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