WO2021258509A1 - 一种减少贾凡尼效应的线路板加工方法 - Google Patents

一种减少贾凡尼效应的线路板加工方法 Download PDF

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Publication number
WO2021258509A1
WO2021258509A1 PCT/CN2020/106993 CN2020106993W WO2021258509A1 WO 2021258509 A1 WO2021258509 A1 WO 2021258509A1 CN 2020106993 W CN2020106993 W CN 2020106993W WO 2021258509 A1 WO2021258509 A1 WO 2021258509A1
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Prior art keywords
circuit board
processing method
development
ink
board processing
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PCT/CN2020/106993
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English (en)
French (fr)
Inventor
李伟正
唐宏华
武守坤
陈春
吴军权
付康
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惠州市金百泽电路科技有限公司
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Publication of WO2021258509A1 publication Critical patent/WO2021258509A1/zh

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0023—Etching of the substrate by chemical or physical means by exposure and development of a photosensitive insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0502—Patterning and lithography

Definitions

  • the invention belongs to the technical field of circuit board processing, and in particular relates to a circuit board processing method that reduces the Gavani effect.
  • the Javani effect is also known as the galvanic effect and galvanic corrosion, that is, two connected metals with different activities dissolve and contact the electrolyte to cause a galvanic reaction, and the more active metal atoms lose electrons and are oxidized (corroded). The essence is that the active metal is oxidized. Due to the potential difference between gold and copper, the copper pads connected to the large gold surface in the OSP process will continue to lose electrons and dissolve into divalent copper ions, which will cause the pads to become smaller and affect subsequent component placement and reliability. sex.
  • the present invention provides a circuit board processing method that reduces the Javani effect.
  • the present invention can effectively prevent the generation of the Javani effect, improve production quality, significantly reduce scrap and increase yield.
  • Solder mask ink primer ⁇ exposure ⁇ first development ⁇ solder mask ⁇ second development ⁇ first curing ⁇ fast pressing ⁇ second curing ⁇ surface treatment;
  • the first curing time is 5-15 minutes; the second curing time is 45-85 minutes.
  • the first curing time is 10 minutes; the second curing time is 60 minutes.
  • solder resist ink primer a copper layer on the substrate and a metal layer electrically connected to the copper layer are coated with solder resist ink.
  • the thickness of the ink is 1-10um.
  • solder resist ink is printed on the surface of the circuit board substrate by a printer or a coating machine.
  • the exposure area in the exposure process is larger than the edge of the metal layer area by 0.05-0.2 mm.
  • the substrate is developed after the exposure is completed, and the solder resist ink in the unexposed area is cleaned and removed to expose the copper layer.
  • solder mask and the second development process a layer of solder mask ink is added to the surface of the substrate after the first development, and the thickness is increased by the second development process.
  • the bonding pressure of the fast pressing is 0.2-0.8 MPa.
  • the surface treatment is a micro-etching or roughening treatment. After the micro-etching or roughening treatment is completed, the solder resist ink layer on the metal layer is removed by a film stripping process to obtain a finished product.
  • the first development, solder mask, and second development process are combined to form a thin layer of ink first, and then process to achieve the required ink thickness, reducing side erosion during development; and then through the first curing
  • the process combination of fast pressing and second curing will compact the solder resist ink, which can effectively avoid the side corrosion of the development and avoid the occurrence of the Javanni effect.
  • the invention can effectively prevent the generation of the Javanni effect, improve the production quality, obviously reduce the scrap and increase the yield of good products.
  • Solder mask ink primer ⁇ exposure ⁇ first development ⁇ solder mask ⁇ second development ⁇ first curing ⁇ fast pressing ⁇ second curing ⁇ surface treatment;
  • the first curing time is 10 minutes; the second curing time is 60 minutes.
  • solder resist ink primer a copper layer on the substrate and a metal layer electrically connected to the copper layer are coated with solder resist ink.
  • the thickness of the ink is 8um.
  • solder resist ink is printed on the surface of the circuit board substrate by a printer or a coating machine.
  • the exposed area in the exposure process is 0.1 mm larger than the edge of the metal layer area.
  • the substrate is developed after the exposure is completed, and the solder resist ink in the unexposed area is cleaned and removed to expose the copper layer.
  • solder mask and the second development process a layer of solder mask ink is added to the surface of the substrate after the first development, and the thickness is increased by the second development process.
  • the bonding pressure of the fast press is 0.5 MPa.
  • the surface treatment is micro-etching, and after the micro-etching treatment is completed, the solder resist ink layer on the metal layer is removed by a film stripping process to obtain a finished product.
  • the first development, solder mask, and second development process are combined to form a thin layer of ink first, and then process to achieve the required ink thickness, reducing side erosion during development; and then through the first curing
  • the process combination of fast pressing and second curing will compact the solder resist ink, which can effectively avoid the side corrosion of the development and avoid the occurrence of the Javanni effect.
  • the invention can effectively prevent the generation of the Javanni effect, improve the production quality, obviously reduce the scrap and increase the yield of good products.
  • Solder mask ink primer ⁇ exposure ⁇ first development ⁇ solder mask ⁇ second development ⁇ first curing ⁇ fast pressing ⁇ second curing ⁇ surface treatment;
  • the first curing time is 10 minutes; the second curing time is 60 minutes.
  • solder resist ink primer a copper layer on the substrate and a metal layer electrically connected to the copper layer are coated with solder resist ink.
  • the thickness of the ink is 8um.
  • solder resist ink is printed on the surface of the circuit board substrate by a printer or a coating machine.
  • the exposed area in the exposure process is 0.1 mm larger than the edge of the metal layer area.
  • the substrate is developed after the exposure is completed, and the solder resist ink in the unexposed area is cleaned and removed to expose the copper layer.
  • solder mask and the second development process a layer of solder mask ink is added to the surface of the substrate after the first development, and the thickness is increased by the second development process.
  • the bonding pressure of the fast press is 0.5 MPa.
  • the surface treatment is micro-etching, and after the micro-etching treatment is completed, the solder resist ink layer on the metal layer is removed by a film stripping process to obtain a finished product.
  • the first development, solder mask, and second development process are combined to form a thin layer of ink first, and then process to achieve the required ink thickness, reducing side erosion during development; and then through the first curing
  • the process combination of fast pressing and second curing will compact the solder resist ink, which can effectively avoid the side corrosion of the development and avoid the occurrence of the Javanni effect.
  • the invention can effectively prevent the generation of the Javanni effect, improve the production quality, obviously reduce the scrap and increase the yield of good products.
  • Solder mask ink primer ⁇ exposure ⁇ first development ⁇ solder mask ⁇ second development ⁇ first curing ⁇ fast pressing ⁇ second curing ⁇ surface treatment;
  • the first curing time is 5 minutes; the second curing time is 45 minutes.
  • solder resist ink primer a copper layer on the substrate and a metal layer electrically connected to the copper layer are coated with solder resist ink.
  • the thickness of the ink is 5um.
  • solder resist ink is printed on the surface of the circuit board substrate by a printer or a coating machine.
  • the exposure area in the exposure process is larger than the edge of the metal layer area by 0.05 mm.
  • the substrate is developed after the exposure is completed, and the solder resist ink in the unexposed area is cleaned and removed to expose the copper layer.
  • solder mask and the second development process a layer of solder mask ink is added to the surface of the substrate after the first development, and the thickness is increased by the second development process.
  • the bonding pressure of the fast pressing is 0.3 MPa.
  • the surface treatment is a roughening treatment. After the roughening treatment is completed, the solder resist ink layer on the metal layer is removed by a film stripping process to obtain a finished product.
  • the first development, solder mask, and second development process are combined to form a thin layer of ink first, and then process to achieve the required ink thickness, reducing side erosion during development; and then through the first curing
  • the process combination of fast pressing and second curing will compact the solder resist ink, which can effectively avoid the side corrosion of the development and avoid the occurrence of the Javanni effect.
  • the invention can effectively prevent the generation of the Javanni effect, improve the production quality, obviously reduce the scrap and increase the yield of good products.
  • Solder mask ink primer ⁇ exposure ⁇ first development ⁇ solder mask ⁇ second development ⁇ first curing ⁇ fast pressing ⁇ second curing ⁇ surface treatment;
  • the first curing time is 12 minutes; the second curing time is 80 minutes.
  • solder resist ink primer a copper layer on the substrate and a metal layer electrically connected to the copper layer are coated with solder resist ink.
  • the thickness of the ink is 7um.
  • solder resist ink is printed on the surface of the circuit board substrate by a printer or a coating machine.
  • the exposed area in the exposure process is 0.15 mm larger than the edge of the metal layer area.
  • the substrate is developed after the exposure is completed, and the solder resist ink in the unexposed area is cleaned and removed to expose the copper layer.
  • solder mask and the second development process a layer of solder mask ink is added to the surface of the substrate after the first development, and the thickness is increased by the second development process.
  • the bonding pressure of the fast pressing is 0.6 MPa.
  • the surface treatment is a micro-etching treatment. After the micro-etching treatment is completed, the solder resist ink layer on the metal layer is removed by a film stripping process to obtain a finished product.
  • the first development, solder mask, and second development process are combined to form a thin layer of ink first, and then process to achieve the required ink thickness, reducing side erosion during development; and then through the first curing
  • the process combination of fast pressing and second curing will compact the solder resist ink, which can effectively avoid the side corrosion of the development and avoid the occurrence of the Javanni effect.
  • the invention can effectively prevent the generation of the Javanni effect, improve the production quality, obviously reduce the scrap and increase the yield of good products.
  • Solder mask ink primer ⁇ exposure ⁇ first development ⁇ solder mask ⁇ second development ⁇ first curing ⁇ fast pressing ⁇ second curing ⁇ surface treatment;
  • the first curing time is 15 minutes; the second curing time is 85 minutes.
  • solder resist ink primer a copper layer on the substrate and a metal layer electrically connected to the copper layer are coated with solder resist ink.
  • the thickness of the ink is 3um.
  • solder resist ink is printed on the surface of the circuit board substrate by a printer or a coating machine.
  • the exposed area in the exposure process is 0.2 mm larger than the edge of the metal layer area.
  • the substrate is developed after the exposure is completed, and the solder resist ink in the unexposed area is cleaned and removed to expose the copper layer.
  • solder mask and the second development process a layer of solder mask ink is added to the surface of the substrate after the first development, and the thickness is increased by the second development process.
  • the bonding pressure of the fast pressing is 0.8 MPa.
  • the surface treatment is a roughening treatment. After the roughening treatment is completed, the solder resist ink layer on the metal layer is removed by a film stripping process to obtain a finished product.
  • the first development, solder mask, and second development process are combined to form a thin layer of ink first, and then process to achieve the required ink thickness, reducing side erosion during development; and then through the first curing
  • the process combination of fast pressing and second curing will compact the solder resist ink, which can effectively avoid the side corrosion of the development and avoid the occurrence of the Javanni effect.
  • the invention can effectively prevent the generation of the Javanni effect, improve the production quality, obviously reduce the scrap and increase the yield of good products.
  • the invention can effectively prevent the generation of the Javanni effect, improve the production quality, obviously reduce the scrap and increase the yield of good products.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)

Abstract

一种减少贾凡尼效应的线路板加工方法，包括以下步骤：阻焊油墨打底→曝光→第一次显影→防焊→第二次显影→第一次固化→快压→第二次固化→表面处理；所述第一次固化的时间为5-15min；所述第二次固化的时间为45-85min。该方法可以有效的杜绝贾凡尼效应的产生，改善了生产品质，明显降低了报废，提高了良品率。

Description

一种减少贾凡尼效应的线路板加工方法 技术领域
本发明属于线路板加工技术领域，具体涉及一种减少贾凡尼效应的线路板加工方法。
 背景技术
贾凡尼效应又称原电池效应、电偶腐蚀，即相连的、活性不同的两个金属与电解质溶解接触发生原电池反应，比较活泼的金属原子失去电子而被氧化（腐蚀）。本质就是活泼的金属被氧化。由于金和铜之间的电位差，在OSP的处理流程中与大金面相连的铜焊盘会不断失去电子溶解成2价铜离子，导致焊盘变小，影响后续元器件贴装及可靠性。
 技术问题
这一问题虽然不常发生，不过一旦出现就是批量性问题。现有技术中，通常采用以下方式改善贾凡尼效应的问题：
1、控制油墨的厚度，将油墨的厚度控制在下限10-15um，这样油墨曝光后在显影时可以减小undercut位，俗称减小显影的侧蚀，不能杜绝贾凡尼效应，只要有侧蚀就会有贾凡尼效应的发生；
2、通过设计加大焊盘，让油墨与露出焊盘的位置加宽，在产生氧化还原反应时就会降低对线路的伤害，此方法改善贾凡尼效应的效果较差。
 技术解决方案
有鉴于此，本发明提供一种减少贾凡尼效应的线路板加工方法，本发明可以有效的杜绝贾凡尼效应的产生，改善了生产品质，明显降低了报废，提高了良品率。
本发明的技术方案为：
一种减少贾凡尼效应的线路板加工方法，其特征在于，包括以下步骤：
阻焊油墨打底→曝光→第一次显影→防焊→第二次显影→第一次固化→快压→第二次固化→表面处理；
所述第一次固化的时间为5-15min；所述第二次固化的时间为45-85min。
进一步的，所述第一次固化的时间为10min；所述第二次固化的时间为60min。
 
进一步的，所述阻焊油墨打底工艺中为在基板上具有铜层以及与所述铜层电性连接的金属层涂布阻焊油墨。
进一步的，所述阻焊油墨打底工艺中，油墨的厚度为1-10um。
进一步的，所述阻焊油墨通过印刷机或者涂覆机印刷在线路板基板的板面。
进一步的，所述曝光工艺中的曝光区域比所述金属层区域的边缘大0.05-0.2mm。
进一步的，所述第一次显影工艺，将曝光完成后对所述基板进行显影处理，将未曝光区域的阻焊油墨清洗去除，露出所述铜层。
进一步的，所述防焊和第二次显影工艺，在第一次显影后的基板表面在增加一层阻焊油墨，通过二次显影处理，增加厚度。
进一步的，所述快压的贴合压力为0.2-0.8MPa。
进一步的，所述表面处理为微蚀或粗化处理，微蚀或者粗化处理完成后通过剥膜工艺去除所述金属层上的阻焊油墨层，得到成品。
 有益效果
本发明中，分别通过第一次显影、防焊、第二次显影的工艺组合，使得先形成薄层油墨，再加工达到要求的油墨厚度，减小显影的侧蚀；再通过第一次固化、快压、第二次固化的工艺组合，将阻焊油墨压实，可以使得有效避免显影的侧蚀，避免贾凡尼效应的发生。
本发明可以有效的杜绝贾凡尼效应的产生，改善了生产品质，明显降低了报废，提高了良品率。
 本发明的最佳实施方式
为使本发明的目的、技术方案及优点更加清楚明白，以下结合具体实施方式，对本发明进行进一步的详细说明。应当理解的是，此处所描述的具体实施方式仅用以解释本发明，并不限定本发明的保护范围。
一种减少贾凡尼效应的线路板加工方法，其特征在于，包括以下步骤：
阻焊油墨打底→曝光→第一次显影→防焊→第二次显影→第一次固化→快压→第二次固化→表面处理；
进一步的，所述第一次固化的时间为10min；所述第二次固化的时间为60min。
 
进一步的，所述阻焊油墨打底工艺中为在基板上具有铜层以及与所述铜层电性连接的金属层涂布阻焊油墨。
进一步的，所述阻焊油墨打底工艺中，油墨的厚度为8um。
进一步的，所述阻焊油墨通过印刷机或者涂覆机印刷在线路板基板的板面。
进一步的，所述曝光工艺中的曝光区域比所述金属层区域的边缘大0.1mm。
进一步的，所述第一次显影工艺，将曝光完成后对所述基板进行显影处理，将未曝光区域的阻焊油墨清洗去除，露出所述铜层。
进一步的，所述防焊和第二次显影工艺，在第一次显影后的基板表面在增加一层阻焊油墨，通过二次显影处理，增加厚度。
进一步的，所述快压的贴合压力为0.5MPa。
进一步的，所述表面处理为微蚀，微蚀处理完成后通过剥膜工艺去除所述金属层上的阻焊油墨层，得到成品。
本发明中，分别通过第一次显影、防焊、第二次显影的工艺组合，使得先形成薄层油墨，再加工达到要求的油墨厚度，减小显影的侧蚀；再通过第一次固化、快压、第二次固化的工艺组合，将阻焊油墨压实，可以使得有效避免显影的侧蚀，避免贾凡尼效应的发生。
本发明可以有效的杜绝贾凡尼效应的产生，改善了生产品质，明显降低了报废，提高了良品率。
 本发明的实施方式
实施例1
一种减少贾凡尼效应的线路板加工方法，其特征在于，包括以下步骤：
阻焊油墨打底→曝光→第一次显影→防焊→第二次显影→第一次固化→快压→第二次固化→表面处理；
进一步的，所述第一次固化的时间为10min；所述第二次固化的时间为60min。
进一步的，所述阻焊油墨打底工艺中为在基板上具有铜层以及与所述铜层电性连接的金属层涂布阻焊油墨。
进一步的，所述阻焊油墨打底工艺中，油墨的厚度为8um。
进一步的，所述阻焊油墨通过印刷机或者涂覆机印刷在线路板基板的板面。
进一步的，所述曝光工艺中的曝光区域比所述金属层区域的边缘大0.1mm。
进一步的，所述第一次显影工艺，将曝光完成后对所述基板进行显影处理，将未曝光区域的阻焊油墨清洗去除，露出所述铜层。
进一步的，所述防焊和第二次显影工艺，在第一次显影后的基板表面在增加一层阻焊油墨，通过二次显影处理，增加厚度。
进一步的，所述快压的贴合压力为0.5MPa。
进一步的，所述表面处理为微蚀，微蚀处理完成后通过剥膜工艺去除所述金属层上的阻焊油墨层，得到成品。
本发明中，分别通过第一次显影、防焊、第二次显影的工艺组合，使得先形成薄层油墨，再加工达到要求的油墨厚度，减小显影的侧蚀；再通过第一次固化、快压、第二次固化的工艺组合，将阻焊油墨压实，可以使得有效避免显影的侧蚀，避免贾凡尼效应的发生。
本发明可以有效的杜绝贾凡尼效应的产生，改善了生产品质，明显降低了报废，提高了良品率。
 
实施例2
一种减少贾凡尼效应的线路板加工方法，其特征在于，包括以下步骤：
阻焊油墨打底→曝光→第一次显影→防焊→第二次显影→第一次固化→快压→第二次固化→表面处理；
所述第一次固化的时间为5min；所述第二次固化的时间为45min。
进一步的，所述阻焊油墨打底工艺中为在基板上具有铜层以及与所述铜层电性连接的金属层涂布阻焊油墨。
进一步的，所述阻焊油墨打底工艺中，油墨的厚度为5um。
进一步的，所述阻焊油墨通过印刷机或者涂覆机印刷在线路板基板的板面。
进一步的，所述曝光工艺中的曝光区域比所述金属层区域的边缘大0.05mm。
进一步的，所述第一次显影工艺，将曝光完成后对所述基板进行显影处理，将未曝光区域的阻焊油墨清洗去除，露出所述铜层。
进一步的，所述防焊和第二次显影工艺，在第一次显影后的基板表面在增加一层阻焊油墨，通过二次显影处理，增加厚度。
进一步的，所述快压的贴合压力为0.3MPa。
进一步的，所述表面处理为粗化处理，粗化处理完成后通过剥膜工艺去除所述金属层上的阻焊油墨层，得到成品。
本发明中，分别通过第一次显影、防焊、第二次显影的工艺组合，使得先形成薄层油墨，再加工达到要求的油墨厚度，减小显影的侧蚀；再通过第一次固化、快压、第二次固化的工艺组合，将阻焊油墨压实，可以使得有效避免显影的侧蚀，避免贾凡尼效应的发生。
本发明可以有效的杜绝贾凡尼效应的产生，改善了生产品质，明显降低了报废，提高了良品率。
 
实施例3
一种减少贾凡尼效应的线路板加工方法，其特征在于，包括以下步骤：
阻焊油墨打底→曝光→第一次显影→防焊→第二次显影→第一次固化→快压→第二次固化→表面处理；
所述第一次固化的时间为12min；所述第二次固化的时间为80min。
进一步的，所述阻焊油墨打底工艺中为在基板上具有铜层以及与所述铜层电性连接的金属层涂布阻焊油墨。
进一步的，所述阻焊油墨打底工艺中，油墨的厚度为7um。
进一步的，所述阻焊油墨通过印刷机或者涂覆机印刷在线路板基板的板面。
进一步的，所述曝光工艺中的曝光区域比所述金属层区域的边缘大0.15mm。
进一步的，所述第一次显影工艺，将曝光完成后对所述基板进行显影处理，将未曝光区域的阻焊油墨清洗去除，露出所述铜层。
进一步的，所述防焊和第二次显影工艺，在第一次显影后的基板表面在增加一层阻焊油墨，通过二次显影处理，增加厚度。
进一步的，所述快压的贴合压力为0.6MPa。
进一步的，所述表面处理为微蚀处理，微蚀处理完成后通过剥膜工艺去除所述金属层上的阻焊油墨层，得到成品。
本发明中，分别通过第一次显影、防焊、第二次显影的工艺组合，使得先形成薄层油墨，再加工达到要求的油墨厚度，减小显影的侧蚀；再通过第一次固化、快压、第二次固化的工艺组合，将阻焊油墨压实，可以使得有效避免显影的侧蚀，避免贾凡尼效应的发生。
本发明可以有效的杜绝贾凡尼效应的产生，改善了生产品质，明显降低了报废，提高了良品率。
 
实施例4
一种减少贾凡尼效应的线路板加工方法，其特征在于，包括以下步骤：
阻焊油墨打底→曝光→第一次显影→防焊→第二次显影→第一次固化→快压→第二次固化→表面处理；
所述第一次固化的时间为15min；所述第二次固化的时间为85min。
进一步的，所述阻焊油墨打底工艺中为在基板上具有铜层以及与所述铜层电性连接的金属层涂布阻焊油墨。
进一步的，所述阻焊油墨打底工艺中，油墨的厚度为3um。
进一步的，所述阻焊油墨通过印刷机或者涂覆机印刷在线路板基板的板面。
进一步的，所述曝光工艺中的曝光区域比所述金属层区域的边缘大0.2mm。
进一步的，所述第一次显影工艺，将曝光完成后对所述基板进行显影处理，将未曝光区域的阻焊油墨清洗去除，露出所述铜层。
进一步的，所述防焊和第二次显影工艺，在第一次显影后的基板表面在增加一层阻焊油墨，通过二次显影处理，增加厚度。
进一步的，所述快压的贴合压力为0.8MPa。
进一步的，所述表面处理为粗化处理，粗化处理完成后通过剥膜工艺去除所述金属层上的阻焊油墨层，得到成品。
本发明中，分别通过第一次显影、防焊、第二次显影的工艺组合，使得先形成薄层油墨，再加工达到要求的油墨厚度，减小显影的侧蚀；再通过第一次固化、快压、第二次固化的工艺组合，将阻焊油墨压实，可以使得有效避免显影的侧蚀，避免贾凡尼效应的发生。
本发明可以有效的杜绝贾凡尼效应的产生，改善了生产品质，明显降低了报废，提高了良品率。
对于本领域技术人员而言，显然本发明不限于上述示范性实施例的细节，而且在不背离本发明的精神或基本特征的情况下，能够以其他的具体形式实现本发明。因此，无论从哪一点来看，均应将实施例看作是示范性的，而且是非限制性的，本发明的范围由所附权利要求而不是上述说明限定，因此旨在将落在权利要求的等同要件的含义和范围内的所有变化囊括在本发明内。
此外，应当理解，虽然本说明书按照实施方式加以描述，但并非每个实施方式仅包含一个独立的技术方案，说明书的这种叙述方式仅仅是为清楚起见，本领域技术人员应当将说明书作为一个整体，各实施例中的技术方案也可以经适当组合，形成本领域技术人员可以理解的其他实施方式。需注意的是，本发明中所未详细描述的技术特征，均可以通过本领域任一现有技术实现。
 工业实用性
本发明可以有效的杜绝贾凡尼效应的产生，改善了生产品质，明显降低了报废，提高了良品率。

Claims (10)

  1. 一种减少贾凡尼效应的线路板加工方法，其特征在于，包括以下步骤：
    阻焊油墨打底→曝光→第一次显影→防焊→第二次显影→第一次固化→快压→第二次固化→表面处理；
    所述第一次固化的时间为5-15min；所述第二次固化的时间为45-85min。
  2. 根据权利要求1所述的减少贾凡尼效应的线路板加工方法，其特征在于，所述第一次固化的时间为10min；所述第二次固化的时间为60min。
  3. 根据权利要求1所述的减少贾凡尼效应的线路板加工方法，其特征在于，所述阻焊油墨打底工艺中为在基板上具有铜层以及与所述铜层电性连接的金属层涂布阻焊油墨。
  4. 根据权利要求1所述的减少贾凡尼效应的线路板加工方法，其特征在于，所述阻焊油墨打底工艺中，油墨的厚度为1-10um。
  5. 根据权利要求1所述的减少贾凡尼效应的线路板加工方法，其特征在于，所述阻焊油墨通过印刷机或者涂覆机印刷在线路板基板的板面。
  6. 根据权利要求3所述的减少贾凡尼效应的线路板加工方法，其特征在于，所述曝光工艺中的曝光区域比所述金属层区域的边缘大0.05-0.2mm。
  7. 根据权利要求1所述的减少贾凡尼效应的线路板加工方法，其特征在于，所述第一次显影工艺，将曝光完成后对所述基板进行显影处理，将未曝光区域的阻焊油墨清洗去除，露出所述铜层。
  8. 根据权利要求7所述的减少贾凡尼效应的线路板加工方法，其特征在于，所述防焊和第二次显影工艺，在第一次显影后的基板表面在增加一层阻焊油墨，通过二次显影处理，增加厚度。
  9. 根据权利要求1所述的减少贾凡尼效应的线路板加工方法，其特征在于，所述快压的贴合压力为0.2-0.8MPa。
  10. 根据权利要求1所述的减少贾凡尼效应的线路板加工方法，其特征在于，所述表面处理为微蚀或粗化处理，微蚀或者粗化处理完成后通过剥膜工艺去除所述金属层上的阻焊油墨层，得到成品。
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