WO2020093587A1 - 一种串行总线隔离装置及液晶显示面板 - Google Patents

一种串行总线隔离装置及液晶显示面板 Download PDF

Info

Publication number
WO2020093587A1
WO2020093587A1 PCT/CN2019/070741 CN2019070741W WO2020093587A1 WO 2020093587 A1 WO2020093587 A1 WO 2020093587A1 CN 2019070741 W CN2019070741 W CN 2019070741W WO 2020093587 A1 WO2020093587 A1 WO 2020093587A1
Authority
WO
WIPO (PCT)
Prior art keywords
transistor
terminal
switch module
write operation
isolation switch
Prior art date
Application number
PCT/CN2019/070741
Other languages
English (en)
French (fr)
Inventor
张先明
曹丹
李文芳
Original Assignee
深圳市华星光电技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市华星光电技术有限公司 filed Critical 深圳市华星光电技术有限公司
Publication of WO2020093587A1 publication Critical patent/WO2020093587A1/zh

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals

Definitions

  • the invention relates to the field of display technology, in particular to a serial bus isolation device and a liquid crystal display panel.
  • PMIC Power management IC
  • PMIC Power management IC
  • TFT gate high-voltage VGH, low-voltage VHL, source voltage VDD, reference voltage VCOM, etc. various voltages (such as TFT gate high-voltage VGH, low-voltage VHL, source voltage VDD, reference voltage VCOM, etc.) for powering the display circuit and backlight in the display panel.
  • NVM non-volatile memory
  • the code is stored in the flash memory through the timing control circuit (Time Control, TCON for short) read the code in the flash memory and write it to the PMIC register.
  • TCON will monitor during the blanking time of each frame, so it will always occupy the I2C bus.
  • the electrically erasable programmable read-only memory (SOC) of the TV drive system (SOC) Programmable Read-Only Memory (EEPROM for short) and tuner (Tunner) will also use the I2C bus.
  • the liquid crystal display panel machine factory will adjust the voltage flicker, and the reference voltage (VCOM) needs to be adjusted. Therefore, the I2C bus of the TV drive system and the I2C bus of the control board (CB) need to be connected together ; But when the TV drive system performs a search or other actions, the tuner's I2C bus will also act, at this time the TV drive system and the I2C bus of the control board will conflict, resulting in an unsuccessful TV drive system search and TCON Abnormal movement.
  • the object of the present invention is to provide a serial bus isolation device and a liquid crystal display panel, which can isolate the I2C bus of the TV drive system and the control board to prevent the conflict between the TV drive system and the I2C bus of the control board.
  • the present invention provides a serial bus isolation device, which includes a first isolation switch module and a second isolation switch module; the first isolation switch module is used to receive a write operation control signal and a television drive system, respectively Serial data signal and serial data signal of the control board, the first isolation switch module includes a first transistor and a second transistor, the first terminal of the first transistor is coupled to an external write operation control signal input terminal , Its second terminal is grounded, and its control terminal is used to receive the serial data signal of the TV driving system, and the first terminal of the second transistor is used to receive the serial data signal of the control board.
  • the two terminals are grounded, and the control terminal is coupled to the write operation control signal input terminal;
  • the second isolation switch module is used to receive the write operation control signal and the serial clock signal of the television driving system and Serial clock signal of the control board,
  • the second isolation switch module includes a third transistor and a fourth transistor, a first end of the third transistor is coupled to the write As a control signal input terminal, the second terminal is grounded, and the control terminal is used to receive the serial clock signal of the control board, and the first terminal of the fourth transistor is used to receive the serial of the television driving system
  • the second end of the clock signal is grounded, and the control end thereof is coupled to the input terminal of the write operation control signal; when the write operation control signal is at the first level, the first isolation switch module and the second The isolation switch module works in the first mode to control the serial bus of the TV drive system and the serial bus of the control board to be isolated from each other; when the write operation control signal is at the second level, the first The isolation switch module and the second isolation switch module work in the second mode to control the
  • the serial clock signal is consistent with the level of the serial clock signal of the television driving system, so that the television driving system adjusts the reference voltage; wherein, the first transistor and the second The body tube, the third transistor, and the fourth transistor are all PMOS tubes, the drain of the PMOS tube is used as the first terminal, the source of the PMOS tube is used as the second terminal, and the gate of the PMOS tube is used as the control terminal.
  • the first level and the second level are the same potential and opposite electrical levels.
  • the present invention also provides a serial bus isolation device, which includes a first isolation switch module and a second isolation switch module; the first isolation switch module is used to receive a write operation control signal and a TV drive, respectively The serial data signal of the system and the serial data signal of the control board; the second isolation switch module is used to receive the write operation control signal, the serial clock signal of the television drive system and the control board respectively Serial clock signal; when the write operation control signal is at a first level, the first isolation switch module and the second isolation switch module work in a first mode to control the serial of the television drive system The bus and the serial bus of the control board are isolated from each other; when the write operation control signal is at the second level, the first isolation switch module and the second isolation switch module work in a second mode to control the The serial data signal of the control board and the serial data signal of the television drive system have the same level, and the serial clock signal of the control board and the television The level of the serial clock signal of the dynamic system is the same, so that the television drive system adjusts the reference voltage;
  • the present invention also provides a liquid crystal display panel, the liquid crystal display panel includes a serial bus isolation device, the serial bus isolation device includes a first isolation switch module and a second isolation switch module;
  • the first isolation switch module is used to receive the write operation control signal, the serial data signal of the TV drive system and the serial data signal of the control board respectively;
  • the second isolation switch module is used to receive the write operation control signal, A serial clock signal of the television driving system and a serial clock signal of the control board; when the write operation control signal is at a first level, the first isolation switch module and the second isolation switch module Work in the first mode to control the serial bus of the TV drive system and the serial bus of the control board to be isolated from each other; when the write operation control signal is at a second level, the first isolation switch module Work with the second isolation switch module in a second mode to control the serial data signal of the control board and the serial number of the television drive system
  • the level of the signal is consistent, the serial clock signal of the control board and the serial clock signal of the television drive system are consistent, so
  • the invention sets the isolation switch module, when the reference voltage needs to be adjusted to adjust the voltage flicker, the I2C bus of the TV drive system and the I2C bus of the control board are connected together, and the I2C bus of the control board does not operate, the host system only accepts the TV The operation of the I2C bus of the machine drive system.
  • the I2C bus of the TV drive system communicates with the I2C bus of the control board.
  • the serial data signal SDA_C of the control board and the serial data signal SDA_S of the TV drive system have the same level and control.
  • the serial clock signal SCL_C of the board is consistent with the serial clock signal SCL_S of the TV drive system, so that the TV drive system can adjust the reference voltage to adjust the voltage flicker;
  • the I2C bus of the TV drive system and the I2C bus of the control board are isolated from each other, that is, the I2C bus of the TV drive system and the I2C bus of the control board work independently and do not affect each other.
  • the I2C bus of the machine drive system conflicts with the I2C bus of the control board.
  • FIG. 1 the architecture of an embodiment of the serial bus isolation device of the present invention
  • FIG. 2 is a circuit diagram of an embodiment of the serial bus isolation device of the present invention.
  • the first feature “above” or “below” the second feature may include the direct contact of the first and second features, or may include the first and second features Contact not directly but through another feature between them.
  • the first feature is “above”, “above” and “above” the second feature includes that the first feature is directly above and obliquely above the second feature, or simply means that the first feature is higher in level than the second feature.
  • the first feature is “below”, “below” and “below” the second feature includes that the first feature is directly below and obliquely below the second feature, or simply means that the first feature is less horizontal than the second feature.
  • the serial bus isolation device 10 includes a first isolation switch module 11 and a second isolation switch module 12.
  • the first isolation switch module 11 is electrically connected to an external write operation control signal input terminal 19 for receiving a write operation control signal WP, and the first isolation switch module 11 is also used to receive serial data of a TV driving system respectively The signal SDA_S and the serial data signal SDA_C of the control board.
  • the second isolation switch module 12 is electrically connected to an external write operation control signal input terminal 19 for receiving a write operation control signal WP, and the second isolation switch module 12 is also used to receive a serial clock of a TV driving system respectively The signal SCL_S and the serial clock signal SCL_C of the control board.
  • the first isolation switch module 11 and the second isolation switch module 12 work in the first mode to control the serial bus of the television driving system ( I2C bus) and the serial bus (I2C bus) of the control board are isolated from each other; when the write operation control signal WP is at a second level, the first isolation switch module 11 and the second isolation switch module 12 Work in the second mode to control the serial data signal SDA_C of the control board and the serial data signal SDA_S of the TV drive system to have the same level, the serial clock signal SCL_C of the control board and the TV
  • the level of the serial clock signal SCL_S of the machine drive system is the same, so that the TV drive system adjusts the reference voltage (VCOM); wherein, the first level and the second level are the same potential, Electrically opposite level. For example, the first level is a low level, and the second level is a high level.
  • the isolation switch module when the reference voltage needs to be adjusted to adjust the voltage flicker, the I2C bus of the TV drive system and the I2C bus of the control board are connected together, and the I2C bus of the control board does not operate, the host system only accepts The operation of the I2C bus of the TV drive system, the I2C bus of the TV drive system communicates with the I2C bus of the control board, the serial data signal SDA_C of the control board and the serial data signal SDA_S of the TV drive system have the same level,
  • the serial clock signal SCL_C of the control board is consistent with the serial clock signal SCL_S of the TV drive system, so that the TV drive system can adjust the reference voltage to adjust the voltage flicker;
  • the I2C bus of the TV drive system and the I2C bus of the control board are isolated from each other, that is, the I2C bus of the TV drive system and the I2C bus of the control board work independently without affecting each other, so avoiding The I2C bus of
  • the serial bus isolation device 10 includes a first isolation switch module 11 and a second isolation switch module 12.
  • the first isolation switch module 11 includes a first transistor M1 and a second transistor M2.
  • the first transistor M1 the first terminal is coupled to an external write operation control signal input terminal 19 for receiving the write operation control signal WP, the second terminal is grounded (GND), and the control terminal is used for receiving serial data of the TV driving system Signal SDA_S.
  • the first transistor M1 is a PMOS tube, and the drain of M1 is coupled as the first end to the write operation control signal input terminal 19 for receiving the write operation control signal WP, and the source of M1 as the second end is grounded, M1
  • the grid serves as the control terminal for receiving the serial data signal SDA_S of the TV driving system.
  • the second transistor M2 the first terminal is used to receive the serial data signal SDA_C of the control board, the second terminal is grounded, and the control terminal is coupled to the write operation control signal input terminal 19 for receiving the write operation control signal WP.
  • the second transistor M2 is a PMOS tube, the drain of M2 is used as the first terminal to receive the serial data signal SDA_C of the control board, the source of M2 is grounded as the second terminal, and the gate of M2 is coupled as the control terminal
  • the write operation control signal input terminal 19 is used to receive the write operation control signal WP.
  • the second isolation switch module 12 includes a third transistor M3 and a fourth transistor M4.
  • the third transistor M3 has a first terminal coupled to the write operation control signal input terminal 19 for receiving the write operation control signal WP, a second terminal grounded, and a control terminal for receiving the serial clock signal SCL_C of the control board.
  • the third transistor M3 is a PMOS tube, and the drain of M3 is coupled as the first end to the write operation control signal input terminal 19 for receiving the write operation control signal WP, the source of M3 as the second end grounded, and M3
  • the gate serves as a control terminal for receiving the serial clock signal SCL_C of the control board.
  • the fourth transistor M4 the first terminal is used to receive the serial clock signal SCL_S of the TV driving system, the second terminal is grounded, and the control terminal is coupled to the write operation control signal input terminal 19 for receiving the write operation control signal WP.
  • the fourth transistor M4 is a PMOS tube, the drain of M4 is used as the first terminal for receiving the serial clock signal SCL_S of the TV driving system, the source of M4 is grounded as the second terminal, and the gate of M4 is used as the control terminal
  • the input terminal 19 is coupled to the write operation control signal for receiving the write operation control signal WP.
  • the first isolation switch module 11 and the second isolation switch module 12 work in the first mode, and the second transistor M2 and the fourth transistor M4 are turned off To control the I2C bus of the TV drive system and the I2C bus of the control board to be isolated from each other. That is, at this time, the I2C bus of the TV drive system and the I2C bus of the control board work independently without affecting each other, thus avoiding conflicts between the I2C bus of the TV drive system and the I2C bus of the control board.
  • the first isolation switch module 11 and the second isolation switch module 12 operate in the second mode, and the first transistor M1 and the second transistor M2 are based on The serial data signal SDA_S of the TV drive system is turned on / off, and the serial data signal SDA_C of the control board is consistent with the serial data signal SDA_S of the TV drive system; the third transistor M3 and the fourth transistor M4 are based on The serial clock signal SCL_S of the TV drive system is turned on / off, and the level of the serial clock signal SCL_C of the control board and the serial clock signal SCL_S of the TV drive system are the same, so that the TV drive system performs the reference voltage Adjustment.
  • the write operation control signal WP is at a high level, the I2C bus of the control board does not operate, and the host system only accepts the action of the I2C bus of the TV drive system.
  • the working principle of the serial data signal SDA is: when the serial data signal SDA_S of the TV drive system is high, the first transistor M1 is turned on, the data signal node SDA_1 is low, the second transistor M2 is turned off, the control board
  • the serial data signal SDA_C is high level, consistent with SDA_S; when the serial data signal SDA_S of the TV driving system is low level, the first transistor M1 is turned off, the data signal node SDA_1 is high level, and the second transistor M2 is turned on ,
  • the serial data signal SDA_C of the control board is low, which is also consistent with SDA_S.
  • the working principle of the serial clock signal SCL is consistent with the working principle of the serial data signal SDA: when the serial clock signal SCL_S of the TV driving system is high, the third transistor M3 is turned on, and the clock signal node SCL_1 is low, The fourth transistor M4 is turned off, the serial clock signal SCL_C of the control board is high, which is consistent with SCL_S; when the serial clock signal SCL_S of the TV drive system is low, the third transistor M3 is turned off, and the clock signal node SCL_1 is high Level, the fourth transistor M4 is turned on, and the serial clock signal SCL_C of the control board is low, which is also consistent with SCL_S.
  • the I2C bus of the TV drive system can communicate with the I2C bus of the control board, so that the TV drive system adjusts the reference voltage, thereby adjusting the voltage flicker.
  • the first isolation switch module 11 further includes a first resistor R1, the first terminal of the first transistor M1 and the control terminal of the second transistor M2 are electrically connected to the write operation control signal input terminal 19 through the first resistor R1;
  • the two isolation switch module 12 further includes a second resistor R2. Both the first terminal of the third transistor M3 and the control terminal of the fourth transistor M4 are electrically connected to the write operation control signal input terminal 19 through the second resistor R2.
  • the high-level write operation control signal at the write operation control signal input terminal 19, or the high-level signal at the first end of the first transistor M1 flows through the first resistor R1 to generate a voltage drop, thereby realizing voltage division and current limiting.
  • the high-level write operation control signal at the write operation control signal input terminal 19, or the high-level signal at the first end of the third transistor M3, flows through the second resistor R2 to generate a voltage drop to achieve voltage division and current limiting .
  • the serial bus isolation device 10 includes a first isolation switch module 11 and a second isolation switch module 12.
  • the first isolation switch module 11 is electrically connected to an external write operation control signal input terminal 19 for receiving a write operation control signal WP, and the first isolation switch module 11 is also used to receive serial data of a TV driving system respectively The signal SDA_S and the serial data signal SDA_C serial clock signal SCL_S of the control board.
  • the second isolation switch module 12 is electrically connected to an external write operation control signal input terminal 19 for receiving a write operation control signal WP, and the second isolation switch module 12 is also used to receive a serial clock of a TV driving system respectively The signal SCL_S and the serial clock signal SCL_C of the control board.
  • the first isolation switch module and the second isolation switch module work in a first mode to control the serial bus (I2C) of the television driving system Isolated from the serial bus (I2C) of the control board; when the write control signal WP is at the second level, the first isolation switch module and the second isolation switch module work in a second mode,
  • the serial clock signal SCL_C of the control board and the serial of the television drive system The level of the clock signal SCL_S is the same, so that the TV driving system adjusts the reference voltage (VCOM); wherein, the first level and the second level are the same potential and opposite electrical levels .
  • the first level is a low level
  • the second level is a high level.
  • the isolation switch module By setting the isolation switch module, when the reference voltage needs to be adjusted to adjust the voltage flicker, the I2C bus of the TV drive system and the I2C bus of the control board are connected together, and the I2C bus of the control board does not operate, and the system only accepts the TV. The operation of the I2C bus of the machine drive system.
  • the I2C bus of the TV drive system communicates with the I2C bus of the control board.
  • the serial data signal SDA_C of the control board and the serial data signal SDA_S of the TV drive system have the same level and control
  • the serial clock signal SCL_C of the board is consistent with the serial clock signal SCL_S of the TV drive system, so that the TV drive system can adjust the reference voltage to adjust the voltage flicker;
  • the I2C bus of the TV drive system and the I2C bus of the control board are isolated from each other, that is, the I2C bus of the TV drive system and the I2C bus of the control board work independently without affecting each other, so the TV is avoided
  • the I2C bus of the machine drive system conflicts with the I2C bus of the control board.
  • the first isolation switch module 11 of the serial bus isolation device 10 includes a first transistor M1 and a second transistor M2; the second isolation switch module 12 includes a third transistor M3 and a fourth transistor M4, as shown in picture 2.
  • the first transistor M1 the first terminal is coupled to an external write operation control signal input terminal 19 for receiving the write operation control signal WP, the second terminal is grounded (GND), and the control terminal is used for receiving serial data of the TV driving system Signal SDA_S.
  • the first transistor M1 is a PMOS tube, and the drain of M1 is coupled as the first end to the write operation control signal input terminal 19 for receiving the write operation control signal WP, and the source of M1 as the second end is grounded, M1
  • the grid serves as the control terminal for receiving the serial data signal SDA_S of the TV driving system.
  • the second transistor M2 the first terminal is used to receive the serial data signal SDA_C of the control board, the second terminal is grounded, and the control terminal is coupled to the write operation control signal input terminal 19 for receiving the write operation control signal WP.
  • the second transistor M2 is a PMOS tube, the drain of M2 is used as the first terminal to receive the serial data signal SDA_C of the control board, the source of M2 is grounded as the second terminal, and the gate of M2 is coupled as the control terminal
  • the write operation control signal input terminal 19 is used to receive the write operation control signal WP.
  • the third transistor M3 has a first terminal coupled to the write operation control signal input terminal 19 for receiving the write operation control signal WP, a second terminal grounded, and a control terminal for receiving the serial clock signal SCL_C of the control board.
  • the third transistor M3 is a PMOS tube, and the drain of M3 is coupled as the first end to the write operation control signal input terminal 19 for receiving the write operation control signal WP, the source of M3 as the second end grounded, and M3
  • the gate serves as a control terminal for receiving the serial clock signal SCL_C of the control board.
  • the fourth transistor M4 the first terminal is used to receive the serial clock signal SCL_S of the TV driving system, the second terminal is grounded, and the control terminal is coupled to the write operation control signal input terminal 19 for receiving the write operation control signal WP.
  • the fourth transistor M4 is a PMOS tube, the drain of M4 is used as the first terminal for receiving the serial clock signal SCL_S of the TV driving system, the source of M4 is grounded as the second terminal, and the gate of M4 is used as the control terminal
  • the input terminal 19 is coupled to the write operation control signal for receiving the write operation control signal WP.
  • the first isolation switch module 11 and the second isolation switch module 12 work in the first mode, and the second transistor M2 and the fourth transistor M4 are turned off To control the I2C bus of the TV drive system and the I2C bus of the control board to be isolated from each other. That is, at this time, the I2C bus of the TV drive system and the I2C bus of the control board work independently without affecting each other, thus avoiding conflicts between the I2C bus of the TV drive system and the I2C bus of the control board.
  • the first isolation switch module 11 and the second isolation switch module 12 operate in the second mode, and the first transistor M1 and the second transistor M2 are based on The serial data signal SDA_S of the TV drive system is turned on / off, and the serial data signal SDA_C of the control board is consistent with the serial data signal SDA_S of the TV drive system; the third transistor M3 and the fourth transistor M4 are based on The serial clock signal SCL_S of the TV drive system is turned on / off, and the level of the serial clock signal SCL_C of the control board and the serial clock signal SCL_S of the TV drive system are the same, so that the TV drive system performs the reference voltage Adjustment.
  • the write operation control signal WP is at a high level, the I2C bus of the control board does not operate, and the host system only accepts the action of the I2C bus of the TV drive system.
  • the working principle of the serial data signal SDA is: when the serial data signal SDA_S of the TV drive system is high, the first transistor M1 is turned on, the data signal node SDA_1 is low, the second transistor M2 is turned off, the control board
  • the serial data signal SDA_C is high level, consistent with SDA_S; when the serial data signal SDA_S of the TV driving system is low level, the first transistor M1 is turned off, the data signal node SDA_1 is high level, and the second transistor M2 is turned on ,
  • the serial data signal SDA_C of the control board is low, which is also consistent with SDA_S.
  • the working principle of the serial clock signal SCL is consistent with the working principle of the serial data signal SDA: when the serial clock signal SCL_S of the TV driving system is high, the third transistor M3 is turned on, and the clock signal node SCL_1 is low, The fourth transistor M4 is turned off, the serial clock signal SCL_C of the control board is high, which is consistent with SCL_S; when the serial clock signal SCL_S of the TV drive system is low, the third transistor M3 is turned off, and the clock signal node SCL_1 is high Level, the fourth transistor M4 is turned on, and the serial clock signal SCL_C of the control board is low, which is also consistent with SCL_S.
  • the I2C bus of the TV drive system can communicate with the I2C bus of the control board, so that the TV drive system adjusts the reference voltage, thereby adjusting the voltage flicker.
  • the first isolation switch module 11 further includes a first resistor R1, the first terminal of the first transistor M1 and the control terminal of the second transistor M2 are electrically connected to the write operation control signal input terminal 19 through the first resistor R1;
  • the two isolation switch module 12 further includes a second resistor R2. Both the first terminal of the third transistor M3 and the control terminal of the fourth transistor M4 are electrically connected to the write operation control signal input terminal 19 through the second resistor R2.
  • the high-level write operation control signal at the write operation control signal input terminal 19, or the high-level signal at the first end of the first transistor M1 flows through the first resistor R1 to generate a voltage drop, thereby realizing voltage division and current limiting.
  • the high-level write operation control signal at the write operation control signal input terminal 19, or the high-level signal at the first end of the third transistor M3, flows through the second resistor R2 to generate a voltage drop to achieve voltage division and current limiting .

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种串行总线隔离装置（10）以及液晶显示面板，通过设置隔离开关模块（11,12），在需要调整基准电压（VCOM）以调节电压闪烁时，电视机驱动***的I2C总线和控制板的I2C总线连通在一起，且控制板的I2C总线不动作，主机***仅接受电视机驱动***的I2C总线的动作，电视机驱动***的I2C总线和控制板的I2C总线进行通讯；在需要进行电视机驱动***搜台或者其它动作时，电视机驱动***的I2C总线和控制板的I2C总线相互隔离，避免了电视机驱动***的I2C总线和控制板的I2C总线冲突。

Description

一种串行总线隔离装置及液晶显示面板 技术领域
本发明涉及显示技术领域，尤其涉及一种串行总线隔离装置及液晶显示面板。
 背景技术
电源管理集成电路（Power Management IC，简称PMIC），是用来管理主机***中的电源设备，常用于手机以及各种移动终端设备。PMIC可以提供各种电压（例如TFT栅极高压VGH、低压VHL、源极电压VDD、基准电压VCOM等），用于向显示面板中的显示电路和背光供电。
 技术问题
现有技术中，为了节省尺寸（size），PMIC内部没有做非易失存储器（Non-volatile Memory，简称NVM），代码（code）存储在快闪式存储器（Flash Memory）里，通过时序控制电路（Time Control，简称TCON）读取快闪式存储器里的代码写到PMIC的寄存器里面。且为了防止读取串行总线（I2C总线）过程中出错，TCON会在每一帧的空闲（blanking）时间里去监测，因此会一直占用I2C总线。而电视机驱动***（SOC）的带电可擦可编程只读存储器（Electrically Erasable Programmable Read-Only Memory，简称EEPROM）和调谐器（Tunner）也会使用I2C总线。同时，液晶显示面板整机厂会进行电压闪烁（flicker）调节，需要调整基准电压（VCOM），因此电视机驱动***的I2C总线和控制板（Control Board，简称CB）的I2C总线需要连通在一起；但是当电视机驱动***进行搜台或者其它动作时，调谐器的I2C总线也会动作，此时电视机驱动***和控制板的I2C总线会冲突，造成电视机驱动***搜台不成功和TCON动作异常。
因此，如何防止电视机驱动***与控制板的I2C总线冲突，是液晶显示面板技术发展过程中亟待解决的问题。
 技术解决方案
本发明的目的在于，提供一种串行总线隔离装置以及液晶显示面板，可以隔离电视机驱动***与控制板的I2C总线，防止电视机驱动***与控制板的I2C总线冲突。
为实现上述目的，本发明提供了一种串行总线隔离装置，包括第一隔离开关模块和第二隔离开关模块；所述第一隔离开关模块用于分别接收写操作控制信号、电视机驱动***的串行数据信号和控制板的串行数据信号，所述第一隔离开关模块包括第一晶体管和第二晶体管，所述第一晶体管的第一端耦接至外部的写操作控制信号输入端，其第二端接地，而其控制端用于接收所述电视机驱动***的串行数据信号，所述第二晶体管的第一端用于接收所述控制板的串行数据信号，其第二端接地，而其控制端耦接至所述写操作控制信号输入端；所述第二隔离开关模块用于分别接收所述写操作控制信号、所述电视机驱动***的串行时钟信号和所述控制板的串行时钟信号，所述第二隔离开关模块包括第三晶体管和第四晶体管，所述第三晶体管的第一端耦接至所述写操作控制信号输入端，其第二端接地，而其控制端用于接收所述控制板的串行时钟信号，所述第四晶体管的第一端用于接收所述电视机驱动***的串行时钟信号，其第二端接地，而其控制端耦接至所述写操作控制信号输入端；在所述写操作控制信号为第一电平时，所述第一隔离开关模块和所述第二隔离开关模块工作在第一模式，以控制所述电视机驱动***的串行总线和所述控制板的串行总线相互隔离；在所述写操作控制信号为第二电平时，所述第一隔离开关模块和所述第二隔离开关模块工作在第二模式，以控制所述控制板的串行数据信号与所述电视机驱动***的串行数据信号的电平一致、所述控制板的串行时钟信号与所述电视机驱动***的串行时钟信号的电平一致，以使所述电视机驱动***对基准电压进行调整；其中，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管均为PMOS管，PMOS管的漏极作为第一端、PMOS管的源极作为第二端、PMOS管的栅极作为控制端，所述第一电平与所述第二电平为电位相同、电性相反的电平。
为实现上述目的，本发明还提供了一种串行总线隔离装置，包括第一隔离开关模块和第二隔离开关模块；所述第一隔离开关模块用于分别接收写操作控制信号、电视机驱动***的串行数据信号和控制板的串行数据信号；所述第二隔离开关模块用于分别接收所述写操作控制信号、所述电视机驱动***的串行时钟信号和所述控制板的串行时钟信号；在所述写操作控制信号为第一电平时，所述第一隔离开关模块和所述第二隔离开关模块工作在第一模式，以控制所述电视机驱动***的串行总线和所述控制板的串行总线相互隔离；在所述写操作控制信号为第二电平时，所述第一隔离开关模块和所述第二隔离开关模块工作在第二模式，以控制所述控制板的串行数据信号与所述电视机驱动***的串行数据信号的电平一致、所述控制板的串行时钟信号与所述电视机驱动***的串行时钟信号的电平一致，以使所述电视机驱动***对基准电压进行调整；其中，所述第一电平与所述第二电平为电位相同、电性相反的电平。
为实现上述目的，本发明还提供了一种液晶显示面板，所述液晶显示面板包括串行总线隔离装置，所述串行总线隔离装置包括第一隔离开关模块和第二隔离开关模块；所述第一隔离开关模块用于分别接收写操作控制信号、电视机驱动***的串行数据信号和控制板的串行数据信号；所述第二隔离开关模块用于分别接收所述写操作控制信号、所述电视机驱动***的串行时钟信号和所述控制板的串行时钟信号；在所述写操作控制信号为第一电平时，所述第一隔离开关模块和所述第二隔离开关模块工作在第一模式，以控制所述电视机驱动***的串行总线和所述控制板的串行总线相互隔离；在所述写操作控制信号为第二电平时，所述第一隔离开关模块和所述第二隔离开关模块工作在第二模式，以控制所述控制板的串行数据信号与所述电视机驱动***的串行数据信号的电平一致、所述控制板的串行时钟信号与所述电视机驱动***的串行时钟信号的电平一致，以使所述电视机驱动***对基准电压进行调整；其中，所述第一电平与所述第二电平为电位相同、电性相反的电平。
 有益效果
本发明通过设置隔离开关模块，在需要调整基准电压以调节电压闪烁时，电视机驱动***的I2C总线和控制板的I2C总线连通在一起，且控制板的I2C总线不动作，主机***仅接受电视机驱动***的I2C总线的动作，电视机驱动***的I2C总线和控制板的I2C总线进行通讯，控制板的串行数据信号SDA_C与电视机驱动***的串行数据信号SDA_S的电平一致、控制板的串行时钟信号SCL_C与电视机驱动***的串行时钟信号SCL_S的电平一致，以使所述电视机驱动***可以对基准电压进行调整，从而调节电压闪烁；在需要进行电视机驱动***搜台或者其它动作时，电视机驱动***的I2C总线和控制板的I2C总线相互隔离，也即电视机驱动***的I2C总线和控制板的I2C总线分别独立工作，互不影响，因此避免了电视机驱动***的I2C总线和控制板的I2C总线冲突。
 附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1，本发明串行总线隔离装置一实施例的架构；
图2，本发明串行总线隔离装置一实施例的电路图。
 本发明的实施方式
下面详细描述本发明的实施方式，所述实施方式的示例在附图中示出，其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。下面通过参考附图描述的实施方式是示例性的，仅用于解释本发明，而不能理解为对本发明的限制。
在本发明中，除非另有明确的规定和限定，第一特征在第二特征之“上”或之“下”可以包括第一和第二特征直接接触，也可以包括第一和第二特征不是直接接触而是通过它们之间的另外的特征接触。而且，第一特征在第二特征“之上”、“上方”和“上面”包括第一特征在第二特征正上方和斜上方，或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”包括第一特征在第二特征正下方和斜下方，或仅仅表示第一特征水平高度小于第二特征。
下文的公开提供了许多不同的实施方式或例子用来实现本发明的不同结构。为了简化本发明的公开，下文中对特定例子的部件和设置进行描述。当然，它们仅仅为示例，并且目的不在于限制本发明。此外，本发明可以在不同例子中重复参考数字和/或参考字母，这种重复是为了简化和清楚的目的，其本身不指示所讨论各种实施方式和/或设置之间的关系。此外，本发明提供了的各种特定的工艺和材料的例子，但是本领域普通技术人员可以意识到其他工艺的应用和/或其他材料的使用。
参考图1，本发明串行总线隔离装置一实施例的架构。所述的串行总线隔离装置10包括第一隔离开关模块11和第二隔离开关模块12。所述第一隔离开关模块11电连接至外部的写操作控制信号输入端19用于接收写操作控制信号WP，所述第一隔离开关模块11还用于分别接收电视机驱动***的串行数据信号SDA_S和控制板的串行数据信号SDA_C。所述第二隔离开关模块12电连接至外部的写操作控制信号输入端19用于接收写操作控制信号WP，所述第二隔离开关模块12还用于分别接收电视机驱动***的串行时钟信号SCL_S和控制板的串行时钟信号SCL_C。在所述写操作控制信号WP为第一电平时，所述第一隔离开关模块11和所述第二隔离开关模块12工作在第一模式，以控制所述电视机驱动***的串行总线（I2C总线）和所述控制板的串行总线（I2C总线）相互隔离；在所述写操作控制信号WP为第二电平时，所述第一隔离开关模块11和所述第二隔离开关模块12工作在第二模式，以控制所述控制板的串行数据信号SDA_C与所述电视机驱动***的串行数据信号SDA_S的电平一致、所述控制板的串行时钟信号SCL_C与所述电视机驱动***的串行时钟信号SCL_S的电平一致，以使所述电视机驱动***对基准电压（VCOM）进行调整；其中，所述第一电平与所述第二电平为电位相同、电性相反的电平。例如，所述第一电平为低电平，所述第二电平为高电平。
通过设置隔离开关模块，在需要调整基准电压以调节电压闪烁（flicker）时，电视机驱动***的I2C总线和控制板的I2C总线连通在一起，且控制板的I2C总线不动作，主机***仅接受电视机驱动***的I2C总线的动作，电视机驱动***的I2C总线和控制板的I2C总线进行通讯，控制板的串行数据信号SDA_C与电视机驱动***的串行数据信号SDA_S的电平一致、控制板的串行时钟信号SCL_C与电视机驱动***的串行时钟信号SCL_S的电平一致，以使所述电视机驱动***可以对基准电压进行调整，从而调节电压闪烁；在需要进行电视机驱动***搜台或者其它动作时，电视机驱动***的I2C总线和控制板的I2C总线相互隔离，也即电视机驱动***的I2C总线和控制板的I2C总线分别独立工作，互不影响，因此避免了电视机驱动***的I2C总线和控制板的I2C总线冲突。
参考图2，本发明串行总线隔离装置一实施例的电路图。所述的串行总线隔离装置10包括第一隔离开关模块11和第二隔离开关模块12。
第一隔离开关模块11包括第一晶体管M1和第二晶体管M2。
第一晶体管M1，第一端耦接至外部的写操作控制信号输入端19用于接收写操作控制信号WP，第二端接地（GND），控制端用于接收电视机驱动***的串行数据信号SDA_S。优选的，第一晶体管M1为PMOS管，M1的漏极作为第一端耦接至写操作控制信号输入端19用于接收写操作控制信号WP、M1的源极作为第二端接地、M1的栅极作为控制端用于接收电视机驱动***的串行数据信号SDA_S。
第二晶体管M2，第一端用于接收控制板的串行数据信号SDA_C，第二端接地，控制端耦接至写操作控制信号输入端19用于接收写操作控制信号WP。优选的，第二晶体管M2为PMOS管，M2的漏极作为第一端用于接收控制板的串行数据信号SDA_C、M2的源极作为第二端接地、M2的栅极作为控制端耦接至写操作控制信号输入端19用于接收写操作控制信号WP。
第二隔离开关模块12包括第三晶体管M3和第四晶体管M4。
第三晶体管M3，第一端耦接至写操作控制信号输入端19用于接收写操作控制信号WP，第二端接地，控制端用于接收控制板的串行时钟信号SCL_C。优选的，第三晶体管M3为PMOS管，M3的漏极作为第一端耦接至写操作控制信号输入端19用于接收写操作控制信号WP、M3的源极作为第二端接地、M3的栅极作为控制端用于接收控制板的串行时钟信号SCL_C。
第四晶体管M4，第一端用于接收电视机驱动***的串行时钟信号SCL_S，第二端接地，控制端耦接至写操作控制信号输入端19用于接收写操作控制信号WP。优选的，第四晶体管M4为PMOS管，M4的漏极作为第一端用于接收电视机驱动***的串行时钟信号SCL_S、M4的源极作为第二端接地、M4的栅极作为控制端耦接至写操作控制信号输入端19用于接收写操作控制信号WP。
在写操作控制信号输入端19输入的写操作控制信号WP为第一电平时，第一隔离开关模块11和第二隔离开关模块12工作在第一模式，第二晶体管M2、第四晶体管M4截止，以控制所述电视机驱动***的I2C总线和所述控制板的I2C总线相互隔离。也即，此时，电视机驱动***的I2C总线和控制板的I2C总线分别独立工作，互不影响，因此避免了电视机驱动***的I2C总线和控制板的I2C总线冲突。
在写操作控制信号输入端19输入的写操作控制信号WP为第二电平时，第一隔离开关模块11和第二隔离开关模块12工作在第二模式，第一晶体管M1、第二晶体管M2根据电视机驱动***的串行数据信号SDA_S导通/截止，控制控制板的串行数据信号SDA_C与电视机驱动***的串行数据信号SDA_S的电平一致；第三晶体管M3、第四晶体管M4根据电视机驱动***的串行时钟信号SCL_S导通/截止，控制控制板的串行时钟信号SCL_C与电视机驱动***的串行时钟信号SCL_S的电平一致，以使电视机驱动***对基准电压进行调整。
具体的，在电视机驱动***需要调整电压闪烁时，写操作控制信号WP为高电平，控制板的I2C总线不动作，主机***仅接受电视机驱动***的I2C总线的动作。串行数据信号SDA的工作原理为：电视机驱动***的串行数据信号SDA_S为高电平时，第一晶体管M1导通，数据信号节点SDA_1为低电平，第二晶体管M2截止，控制板的串行数据信号SDA_C为高电平，与SDA_S一致；电视机驱动***的串行数据信号SDA_S为低电平时，第一晶体管M1截止，数据信号节点SDA_1为高电平，第二晶体管M2导通，控制板的串行数据信号SDA_C为低电平，亦与SDA_S一致。串行时钟信号SCL的工作原理与串行数据信号SDA的工作原理一致：电视机驱动***的串行时钟信号SCL_S为高电平时，第三晶体管M3导通，时钟信号节点SCL_1为低电平，第四晶体管M4截止，控制板的串行时钟信号SCL_C为高电平，与SCL_S一致；电视机驱动***的串行时钟信号SCL_S为低电平时，第三晶体管M3截止，时钟信号节点SCL_1为高电平，第四晶体管M4导通，控制板的串行时钟信号SCL_C为低电平，亦与SCL_S一致。这样，电视机驱动***的I2C总线可以和控制板的I2C总线进行通讯，以使电视机驱动***对基准电压进行调整，从而调节电压闪烁。
优选的，第一隔离开关模块11进一步包括第一电阻R1，第一晶体管M1的第一端与第二晶体管M2的控制端均通过第一电阻R1电连接至写操作控制信号输入端19；第二隔离开关模块12进一步包括第二电阻R2，第三晶体管M3的第一端与第四晶体管M4的控制端均通过第二电阻R2电连接至写操作控制信号输入端19。写操作控制信号输入端19的高电平写操作控制信号，或第一晶体管M1的第一端的高电平信号，流经第一电阻R1产生压降，实现分压和限流。相应的，写操作控制信号输入端19的高电平写操作控制信号，或第三晶体管M3的第一端的高电平信号，流经第二电阻R2产生压降，实现分压和限流。
本发明还提供一种采用上述串行总线隔离装置的液晶显示面板。参考图1所示，所述的串行总线隔离装置10包括第一隔离开关模块11和第二隔离开关模块12。所述第一隔离开关模块11电连接至外部的写操作控制信号输入端19用于接收写操作控制信号WP，所述第一隔离开关模块11还用于分别接收电视机驱动***的串行数据信号SDA_S和控制板的串行数据信号SDA_C串行时钟信号SCL_S。所述第二隔离开关模块12电连接至外部的写操作控制信号输入端19用于接收写操作控制信号WP，所述第二隔离开关模块12还用于分别接收电视机驱动***的串行时钟信号SCL_S和控制板的串行时钟信号SCL_C。在所述写操作控制信号WP为第一电平时，所述第一隔离开关模块和所述第二隔离开关模块工作在第一模式，以控制所述电视机驱动***的串行总线（I2C）和所述控制板的串行总线（I2C）相互隔离；在所述写操作控制信号WP为第二电平时，所述第一隔离开关模块和所述第二隔离开关模块工作在第二模式，以控制所述控制板的串行数据信号SDA_C与所述电视机驱动***的串行数据信号SDA_S的电平一致、所述控制板的串行时钟信号SCL_C与所述电视机驱动***的串行时钟信号SCL_S的电平一致，以使所述电视机驱动***对基准电压（VCOM）进行调整；其中，所述第一电平与所述第二电平为电位相同、电性相反的电平。例如，所述第一电平为低电平，所述第二电平为高电平。
通过设置隔离开关模块，在需要调整基准电压以调节电压闪烁（flicker）时，电视机驱动***的I2C总线和控制板的I2C总线连通在一起，且控制板的I2C总线不动作，***仅接受电视机驱动***的I2C总线的动作，电视机驱动***的I2C总线和控制板的I2C总线进行通讯，控制板的串行数据信号SDA_C与电视机驱动***的串行数据信号SDA_S的电平一致、控制板的串行时钟信号SCL_C与电视机驱动***的串行时钟信号SCL_S的电平一致，以使所述电视机驱动***可以对基准电压进行调整，从而调节电压闪烁；在需要进行电视机驱动***搜台或者其它动作时，电视机驱动***的I2C总线和控制板的I2C总线相互隔离，也即电视机驱动***的I2C总线和控制板的I2C总线分别独立工作，互不影响，因此避免了电视机驱动***的I2C总线和控制板的I2C总线冲突。
在一实施例中，所述的串行总线隔离装置10的第一隔离开关模块11包括第一晶体管M1和第二晶体管M2；第二隔离开关模块12包括第三晶体管M3和第四晶体管M4，如图2所示。
第一晶体管M1，第一端耦接至外部的写操作控制信号输入端19用于接收写操作控制信号WP，第二端接地（GND），控制端用于接收电视机驱动***的串行数据信号SDA_S。优选的，第一晶体管M1为PMOS管，M1的漏极作为第一端耦接至写操作控制信号输入端19用于接收写操作控制信号WP、M1的源极作为第二端接地、M1的栅极作为控制端用于接收电视机驱动***的串行数据信号SDA_S。
第二晶体管M2，第一端用于接收控制板的串行数据信号SDA_C，第二端接地，控制端耦接至写操作控制信号输入端19用于接收写操作控制信号WP。优选的，第二晶体管M2为PMOS管，M2的漏极作为第一端用于接收控制板的串行数据信号SDA_C、M2的源极作为第二端接地、M2的栅极作为控制端耦接至写操作控制信号输入端19用于接收写操作控制信号WP。
第三晶体管M3，第一端耦接至写操作控制信号输入端19用于接收写操作控制信号WP，第二端接地，控制端用于接收控制板的串行时钟信号SCL_C。优选的，第三晶体管M3为PMOS管，M3的漏极作为第一端耦接至写操作控制信号输入端19用于接收写操作控制信号WP、M3的源极作为第二端接地、M3的栅极作为控制端用于接收控制板的串行时钟信号SCL_C。
第四晶体管M4，第一端用于接收电视机驱动***的串行时钟信号SCL_S，第二端接地，控制端耦接至写操作控制信号输入端19用于接收写操作控制信号WP。优选的，第四晶体管M4为PMOS管，M4的漏极作为第一端用于接收电视机驱动***的串行时钟信号SCL_S、M4的源极作为第二端接地、M4的栅极作为控制端耦接至写操作控制信号输入端19用于接收写操作控制信号WP。
在写操作控制信号输入端19输入的写操作控制信号WP为第一电平时，第一隔离开关模块11和第二隔离开关模块12工作在第一模式，第二晶体管M2、第四晶体管M4截止，以控制所述电视机驱动***的I2C总线和所述控制板的I2C总线相互隔离。也即，此时，电视机驱动***的I2C总线和控制板的I2C总线分别独立工作，互不影响，因此避免了电视机驱动***的I2C总线和控制板的I2C总线冲突。
在写操作控制信号输入端19输入的写操作控制信号WP为第二电平时，第一隔离开关模块11和第二隔离开关模块12工作在第二模式，第一晶体管M1、第二晶体管M2根据电视机驱动***的串行数据信号SDA_S导通/截止，控制控制板的串行数据信号SDA_C与电视机驱动***的串行数据信号SDA_S的电平一致；第三晶体管M3、第四晶体管M4根据电视机驱动***的串行时钟信号SCL_S导通/截止，控制控制板的串行时钟信号SCL_C与电视机驱动***的串行时钟信号SCL_S的电平一致，以使电视机驱动***对基准电压进行调整。
具体的，在电视机驱动***需要调整电压闪烁时，写操作控制信号WP为高电平，控制板的I2C总线不动作，主机***仅接受电视机驱动***的I2C总线的动作。串行数据信号SDA的工作原理为：电视机驱动***的串行数据信号SDA_S为高电平时，第一晶体管M1导通，数据信号节点SDA_1为低电平，第二晶体管M2截止，控制板的串行数据信号SDA_C为高电平，与SDA_S一致；电视机驱动***的串行数据信号SDA_S为低电平时，第一晶体管M1截止，数据信号节点SDA_1为高电平，第二晶体管M2导通，控制板的串行数据信号SDA_C为低电平，亦与SDA_S一致。串行时钟信号SCL的工作原理与串行数据信号SDA的工作原理一致：电视机驱动***的串行时钟信号SCL_S为高电平时，第三晶体管M3导通，时钟信号节点SCL_1为低电平，第四晶体管M4截止，控制板的串行时钟信号SCL_C为高电平，与SCL_S一致；电视机驱动***的串行时钟信号SCL_S为低电平时，第三晶体管M3截止，时钟信号节点SCL_1为高电平，第四晶体管M4导通，控制板的串行时钟信号SCL_C为低电平，亦与SCL_S一致。这样，电视机驱动***的I2C总线可以和控制板的I2C总线进行通讯，以使电视机驱动***对基准电压进行调整，从而调节电压闪烁。
优选的，第一隔离开关模块11进一步包括第一电阻R1，第一晶体管M1的第一端与第二晶体管M2的控制端均通过第一电阻R1电连接至写操作控制信号输入端19；第二隔离开关模块12进一步包括第二电阻R2，第三晶体管M3的第一端与第四晶体管M4的控制端均通过第二电阻R2电连接至写操作控制信号输入端19。写操作控制信号输入端19的高电平写操作控制信号，或第一晶体管M1的第一端的高电平信号，流经第一电阻R1产生压降，实现分压和限流。相应的，写操作控制信号输入端19的高电平写操作控制信号，或第三晶体管M3的第一端的高电平信号，流经第二电阻R2产生压降，实现分压和限流。
 工业实用性
本申请的主题可以在工业中制造和使用，具备工业实用性。

Claims (14)

  1. 一种串行总线隔离装置，其中，包括第一隔离开关模块和第二隔离开关模块；所述第一隔离开关模块用于分别接收写操作控制信号、电视机驱动***的串行数据信号和控制板的串行数据信号，所述第一隔离开关模块包括第一晶体管和第二晶体管，所述第一晶体管的第一端耦接至外部的写操作控制信号输入端，其第二端接地，而其控制端用于接收所述电视机驱动***的串行数据信号，所述第二晶体管的第一端用于接收所述控制板的串行数据信号，其第二端接地，而其控制端耦接至所述写操作控制信号输入端；所述第二隔离开关模块用于分别接收所述写操作控制信号、所述电视机驱动***的串行时钟信号和所述控制板的串行时钟信号，所述第二隔离开关模块包括第三晶体管和第四晶体管，所述第三晶体管的第一端耦接至所述写操作控制信号输入端，其第二端接地，而其控制端用于接收所述控制板的串行时钟信号，所述第四晶体管的第一端用于接收所述电视机驱动***的串行时钟信号，其第二端接地，而其控制端耦接至所述写操作控制信号输入端；在所述写操作控制信号为第一电平时，所述第一隔离开关模块和所述第二隔离开关模块工作在第一模式，以控制所述电视机驱动***的串行总线和所述控制板的串行总线相互隔离；在所述写操作控制信号为第二电平时，所述第一隔离开关模块和所述第二隔离开关模块工作在第二模式，以控制所述控制板的串行数据信号与所述电视机驱动***的串行数据信号的电平一致、所述控制板的串行时钟信号与所述电视机驱动***的串行时钟信号的电平一致，以使所述电视机驱动***对基准电压进行调整；其中，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管均为PMOS管，PMOS管的漏极作为第一端、PMOS管的源极作为第二端、PMOS管的栅极作为控制端，所述第一电平与所述第二电平为电位相同、电性相反的电平。
  2. 如权利要求1所述的串行总线隔离装置，其中，所述第一隔离开关模块进一步包括第一电阻，所述第二隔离开关模块进一步包括第二电阻；所述第一晶体管的第一端与所述第二晶体管的控制端均通过所述第一电阻电连接至所述写操作控制信号输入端；所述第三晶体管的第一端与所述第四晶体管的控制端均通过所述第二电阻电连接至所述写操作控制信号输入端。
  3. 如权利要求1所述的串行总线隔离装置，其中，在所述写操作控制信号输入端输入的所述写操作控制信号为第一电平时，所述第一隔离开关模块和所述第二隔离开关模块工作在第一模式，所述第二晶体管、第四晶体管截止，以控制所述电视机驱动***的串行总线和所述控制板的串行总线相互隔离。
  4. 如权利要求1所述的串行总线隔离装置，其中，在所述写操作控制信号输入端输入的所述写操作控制信号为第二电平时，所述第一隔离开关模块和所述第二隔离开关模块工作在第二模式，所述第一晶体管、第二晶体管根据所述电视机驱动***的串行数据信号导通/截止，控制所述控制板的串行数据信号与所述电视机驱动***的串行数据信号的电平一致，所述第三晶体管、第四晶体管根据所述电视机驱动***的串行时钟信号导通/截止，控制所述控制板的串行时钟信号与所述电视机驱动***的串行时钟信号的电平一致，以使所述电视机驱动***对基准电压进行调整。
  5. 一种串行总线隔离装置，其中，包括第一隔离开关模块和第二隔离开关模块；所述第一隔离开关模块用于分别接收写操作控制信号、电视机驱动***的串行数据信号和控制板的串行数据信号；所述第二隔离开关模块用于分别接收所述写操作控制信号、所述电视机驱动***的串行时钟信号和所述控制板的串行时钟信号；在所述写操作控制信号为第一电平时，所述第一隔离开关模块和所述第二隔离开关模块工作在第一模式，以控制所述电视机驱动***的串行总线和所述控制板的串行总线相互隔离；在所述写操作控制信号为第二电平时，所述第一隔离开关模块和所述第二隔离开关模块工作在第二模式，以控制所述控制板的串行数据信号与所述电视机驱动***的串行数据信号的电平一致、所述控制板的串行时钟信号与所述电视机驱动***的串行时钟信号的电平一致，以使所述电视机驱动***对基准电压进行调整；其中，所述第一电平与所述第二电平为电位相同、电性相反的电平。
  6. 如权利要求5所述的串行总线隔离装置，其中，所述第一隔离开关模块包括第一晶体管和第二晶体管；所述第二隔离开关模块包括第三晶体管和第四晶体管；所述第一晶体管，第一端耦接至外部的写操作控制信号输入端，第二端接地，控制端用于接收所述电视机驱动***的串行数据信号；所述第二晶体管，第一端用于接收所述控制板的串行数据信号，第二端接地，控制端耦接至所述写操作控制信号输入端；所述第三晶体管，第一端耦接至所述写操作控制信号输入端，第二端接地，控制端用于接收所述控制板的串行时钟信号；所述第四晶体管，第一端用于接收所述电视机驱动***的串行时钟信号，第二端接地，控制端耦接至所述写操作控制信号输入端。
  7. 如权利要求6所述的串行总线隔离装置，其中，所述第一隔离开关模块进一步包括第一电阻，所述第二隔离开关模块进一步包括第二电阻；所述第一晶体管的第一端与所述第二晶体管的控制端均通过所述第一电阻电连接至所述写操作控制信号输入端；所述第三晶体管的第一端与所述第四晶体管的控制端均通过所述第二电阻电连接至所述写操作控制信号输入端。
  8. 如权利要求6所述的串行总线隔离装置，其中，在所述写操作控制信号输入端输入的所述写操作控制信号为第一电平时，所述第一隔离开关模块和所述第二隔离开关模块工作在第一模式，所述第二晶体管、第四晶体管截止，以控制所述电视机驱动***的串行总线和所述控制板的串行总线相互隔离。
  9. 如权利要求6所述的串行总线隔离装置，其中，在所述写操作控制信号输入端输入的所述写操作控制信号为第二电平时，所述第一隔离开关模块和所述第二隔离开关模块工作在第二模式，所述第一晶体管、第二晶体管根据所述电视机驱动***的串行数据信号导通/截止，控制所述控制板的串行数据信号与所述电视机驱动***的串行数据信号的电平一致，所述第三晶体管、第四晶体管根据所述电视机驱动***的串行时钟信号导通/截止，控制所述控制板的串行时钟信号与所述电视机驱动***的串行时钟信号的电平一致，以使所述电视机驱动***对基准电压进行调整。
  10. 一种液晶显示面板，其中，所述液晶显示面板包括串行总线隔离装置，所述串行总线隔离装置包括第一隔离开关模块和第二隔离开关模块；所述第一隔离开关模块用于分别接收写操作控制信号、电视机驱动***的串行数据信号和控制板的串行数据信号；所述第一隔离开关模块用于分别接收所述写操作控制信号、所述电视机驱动***的串行时钟信号和所述控制板的串行时钟信号；在所述写操作控制信号为第一电平时，所述第一隔离开关模块和所述第二隔离开关模块工作在第一模式，以控制所述电视机驱动***的串行总线和所述控制板的串行总线相互隔离；在所述写操作控制信号为第二电平时，所述第一隔离开关模块和所述第二隔离开关模块工作在第二模式，以控制所述控制板的串行数据信号与所述电视机驱动***的串行数据信号的电平一致、所述控制板的串行时钟信号与所述电视机驱动***的串行时钟信号的电平一致，以使所述电视机驱动***对基准电压进行调整；其中，所述第一电平与所述第二电平为电位相同、电性相反的电平。
  11. 如权利要求10所述的液晶显示面板，其中，所述第一隔离开关模块包括第一晶体管和第二晶体管；所述第二隔离开关模块包括第三晶体管和第四晶体管；所述第一晶体管，第一端耦接至外部的写操作控制信号输入端，第二端接地，控制端用于接收所述电视机驱动***的串行数据信号；所述第二晶体管，第一端用于接收所述控制板的串行数据信号，第二端接地，控制端耦接至所述写操作控制信号输入端；所述第三晶体管，第一端耦接至所述写操作控制信号输入端，第二端接地，控制端用于接收所述控制板的串行时钟信号；所述第四晶体管，第一端用于接收所述电视机驱动***的串行时钟信号，第二端接地，控制端耦接至所述写操作控制信号输入端。
  12. 如权利要求11所述的液晶显示面板，其中，所述第一隔离开关模块进一步包括第一电阻，所述第二隔离开关模块进一步包括第二电阻；所述第一晶体管的第一端与所述第二晶体管的控制端均通过所述第一电阻电连接至所述写操作控制信号输入端；所述第三晶体管的第一端与所述第四晶体管的控制端均通过所述第二电阻电连接至所述写操作控制信号输入端。
  13. 如权利要求11所述的液晶显示面板，其中，在所述写操作控制信号输入端输入的所述写操作控制信号为第一电平时，所述第一隔离开关模块和所述第二隔离开关模块工作在第一模式，所述第二晶体管、第四晶体管截止，以控制所述电视机驱动***的串行总线和所述控制板的串行总线相互隔离。
  14. 如权利要求11所述的液晶显示面板，其中，在所述写操作控制信号输入端输入的所述写操作控制信号为第二电平时，所述第一隔离开关模块和所述第二隔离开关模块工作在第二模式，所述第一晶体管、第二晶体管根据所述电视机驱动***的串行数据信号导通/截止，控制所述控制板的串行数据信号与所述电视机驱动***的串行数据信号的电平一致，所述第三晶体管、第四晶体管根据所述电视机驱动***的串行时钟信号导通/截止，控制所述控制板的串行时钟信号与所述电视机驱动***的串行时钟信号的电平一致，以使所述电视机驱动***对基准电压进行调整。
PCT/CN2019/070741 2018-11-09 2019-01-08 一种串行总线隔离装置及液晶显示面板 WO2020093587A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201811333428.2A CN109545157B (zh) 2018-11-09 2018-11-09 一种串行总线隔离装置及液晶显示面板
CN201811333428.2 2018-11-09

Publications (1)

Publication Number Publication Date
WO2020093587A1 true WO2020093587A1 (zh) 2020-05-14

Family

ID=65846813

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/070741 WO2020093587A1 (zh) 2018-11-09 2019-01-08 一种串行总线隔离装置及液晶显示面板

Country Status (2)

Country Link
CN (1) CN109545157B (zh)
WO (1) WO2020093587A1 (zh)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1734434A (zh) * 2005-07-21 2006-02-15 深圳创维－Rgb电子有限公司 混合逻辑电平双向总线转换器及连接方法
WO2008121486A1 (en) * 2007-04-02 2008-10-09 Square D Company Remote display chain for multiple user interface applications
CN102194436A (zh) * 2011-04-18 2011-09-21 北京彩讯科技股份有限公司 Ddc接口隔离保护电路
CN204314873U (zh) * 2014-12-24 2015-05-06 浙江宇视科技有限公司 一种i2c隔离电路及i2c总线***
CN107678999A (zh) * 2017-10-25 2018-02-09 东莞博力威电池有限公司 一种i2c隔离电路

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1734434A (zh) * 2005-07-21 2006-02-15 深圳创维－Rgb电子有限公司 混合逻辑电平双向总线转换器及连接方法
WO2008121486A1 (en) * 2007-04-02 2008-10-09 Square D Company Remote display chain for multiple user interface applications
CN102194436A (zh) * 2011-04-18 2011-09-21 北京彩讯科技股份有限公司 Ddc接口隔离保护电路
CN204314873U (zh) * 2014-12-24 2015-05-06 浙江宇视科技有限公司 一种i2c隔离电路及i2c总线***
CN107678999A (zh) * 2017-10-25 2018-02-09 东莞博力威电池有限公司 一种i2c隔离电路

Also Published As

Publication number Publication date
CN109545157B (zh) 2020-07-10
CN109545157A (zh) 2019-03-29

Similar Documents

Publication Publication Date Title
US9779682B2 (en) GOA circuit with forward-backward scan function
US9378692B2 (en) Gate driving circuit and method, and liquid crystal display
US9830874B2 (en) Electronic device having smaller number of drive chips
US20170169778A1 (en) Goa circuit of reducing power consumption
US9858880B2 (en) GOA circuit based on oxide semiconductor thin film transistor
US10262742B2 (en) Memory protection circuit and liquid crystal display including same
US10665194B1 (en) Liquid crystal display device and driving method thereof
GB2548047A (en) Shift register, level-transmission gate drive circuit, and display panel
US20170301407A1 (en) Shift register unit and method for driving the same, gate drive circuit and display device
US10504478B2 (en) Semiconductor device having shifted operation voltages in different modes and electronic apparatus thereof
US20200043436A1 (en) Goa circuit and liquid crystal display device
WO2020133646A1 (zh) 显示装置驱动***及显示装置驱动方法
US7920668B2 (en) Systems for displaying images by utilizing vertical shift register circuit to generate non-overlapped output signals
JP2011027915A (ja) 液晶表示装置
CN108665837B (zh) 扫描驱动电路及其驱动方法和平板显示装置
US9153191B2 (en) Power management circuit and gate pulse modulation circuit thereof capable of increasing power conversion efficiency
KR100430102B1 (ko) 액정표시장치의 게이트 구동 회로
CN109410861B (zh) 驱动器及显示装置
WO2020093587A1 (zh) 一种串行总线隔离装置及液晶显示面板
CN111028807A (zh) 液晶显示面板的驱动电路及驱动方法
US20160379585A1 (en) Gate driver on array circuit, driving method thereof, and display device including the same
CN113257178B (zh) 驱动电路及显示面板
US11367404B2 (en) Device and method for controlling backlight, and display device
US20160240265A1 (en) Shift register circuit
US7623110B2 (en) Systems for displaying images by utilizing horizontal shift register circuit for generating overlapped output signals

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19883146

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19883146

Country of ref document: EP

Kind code of ref document: A1