WO2020133646A1 - 显示装置驱动***及显示装置驱动方法 - Google Patents
显示装置驱动***及显示装置驱动方法 Download PDFInfo
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- WO2020133646A1 WO2020133646A1 PCT/CN2019/075517 CN2019075517W WO2020133646A1 WO 2020133646 A1 WO2020133646 A1 WO 2020133646A1 CN 2019075517 W CN2019075517 W CN 2019075517W WO 2020133646 A1 WO2020133646 A1 WO 2020133646A1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
Definitions
- the present invention relates to the field of display technology, and in particular, to a display device driving system and a display device driving method.
- LCD liquid crystal displays
- other flat display devices have been widely used in mobile phones, TVs, and individuals due to their advantages of high image quality, power saving, thin body, and wide range of applications.
- Various consumer electronic products such as digital assistants, digital cameras, notebook computers, and desktop computers have become the mainstream in display devices.
- the flat panel display device generally includes a display panel and an external driving circuit.
- the external driving circuit generally includes a control board (CB) and a system chip (SOC).
- the control board is provided with components such as a timing controller (TCON) and a power management chip (PMIC). .
- the control board (CB) is connected to the control board integrated circuit (I2C) bus.
- the control board I2C bus is connected to the timing controller and the power management chip.
- the existing power management chip does not have a storage module inside, and its working parameters ( code) is stored in the external flash memory connected to the timing controller. Because the I2C bus of the control board connects the timing controller and the power management chip, the timing controller can read the code stored in the flash memory and pass the control during operation.
- the board I2C bus is transmitted to the power management chip for its use. In order to prevent reading errors, this process is generally carried out during the frame blanking time of the display device, and will always occupy the control board I2C bus during the process.
- the system chip is connected to the system chip I2C bus.
- the system chip I2C bus needs to be directly connected to the control board I2C bus, so that the system chip can use the connected system chip I2C bus and the control board I2C bus to communicate with the control board to Perform the flicker adjustment operation. Because the system chip I2C bus is directly connected to the control board I2C bus, at some moments, the signal on the system chip I2C bus and the control board I2C bus may interfere with each other, affecting the effective transmission of the signal.
- the object of the present invention is to provide a display device driving system capable of connecting or disconnecting the first I2C bus and the second I2C bus in a time-sharing manner, thereby ensuring the effective communication between the system chip and the control board and avoiding the first I2C When the bus and the second I2C bus work independently, the signals interfere with each other.
- Another object of the present invention is to provide a display device driving method capable of connecting or disconnecting the first I2C bus and the second I2C bus in a time-sharing manner, thereby ensuring the effective communication between the system chip and the control board When one I2C bus and the second I2C bus work independently, the signals interfere with each other.
- the present invention first provides a display device driving system, including a system chip, a control board, a switch module, a first I2C bus, and a second I2C bus;
- the system chip is electrically connected to the input end of the switch module via the first I2C bus
- the control board is electrically connected to the output end of the switch module via the second I2C bus
- the control end of the switch module is connected to the control signal
- the switch module When the control signal is a preset first potential, the switch module electrically connects its input terminal and output terminal, thereby electrically connecting the first I2C bus and the second I2C bus; when the control signal is preset When the second potential is reached, the switch module disconnects its input end from the output end, thereby disconnecting the first I2C bus from the second I2C bus.
- the control board includes a body and a timing controller and a power management chip provided on the body; the second I2C bus is electrically connected to the timing controller and the power management chip.
- the first I2C bus includes a first serial data line and a first serial clock line;
- the input terminal of the switch module includes a first input terminal and a second input terminal;
- the first serial data line and the first The serial clock line is electrically connected to the first input terminal and the second input terminal respectively;
- the second I2C bus includes a second serial data line and a second serial clock line; the output terminal of the switch module includes a first output terminal and a second output terminal; the second serial data line and the second The serial clock line is electrically connected to the first output terminal and the second output terminal, respectively.
- the switch module When the control signal is the preset first potential, the switch module connects its first input terminal to the first output terminal, and connects its second input terminal to the second output terminal; when the control signal is When the second potential is set, the switch module disconnects its first input terminal from the first output terminal, and disconnects its second input terminal from the second output terminal.
- the switch module includes a first sub-switch module and a second sub-switch module; the control terminal of the first sub-switch module and the control terminal of the second sub-switch module are the control terminals of the switch module; the first sub-switch module The input end and the output end are respectively the first input end and the first output end of the switch module; the input end and the output end of the second sub-switch module are the second input end and the second output end of the switch module, respectively.
- the first sub-switch module When the control signal is a preset first potential, the first sub-switch module connects its input end to the output end, and the second sub-switch module connects its input end to the output end; when the control signal is preset At the second potential, the first sub-switch module disconnects its input terminal from the output terminal, and the second sub-switch module disconnects its input terminal from the output terminal.
- the first sub-switch module includes a first field effect tube and a second field effect tube, the gate of the first field effect tube and the gate of the second field effect tube are electrically connected to control the first sub-switch module
- the source is the input of the first sub-switch module, and the drain is electrically connected to the drain of the second field-effect transistor, and the source of the second field-effect transistor is the output of the first sub-switch module;
- the second sub-switch module includes a third field effect tube and a fourth field effect tube.
- the gate of the third field effect tube and the gate of the fourth field effect tube are electrically connected to control the second sub-switch module.
- the source terminal is the input terminal of the second sub-switch module, and the drain is electrically connected to the drain of the fourth field effect transistor, and the source of the fourth field-effect transistor is the output terminal of the second sub-switch module.
- the first FET, the second FET, the third FET and the fourth FET are all N-type FETs.
- the preset first potential is a high potential
- the preset second potential is a low potential
- the invention also provides a display device driving method, which is applied to the above display device driving system, and includes:
- the control signal is a preset first potential, and the switch module electrically connects the input end and the output end thereof, thereby electrically connecting the first I2C bus and the second I2C bus;
- the control signal is a preset second potential, and the switch module disconnects its input terminal from the output terminal, thereby disconnecting the first I2C bus from the second I2C bus.
- the system chip is electrically connected to the input end of the switch module via the first I2C bus
- the control board is electrically connected to the output end of the switch module via the second I2C bus.
- the control terminal is connected to the control signal.
- the switch module electrically connects the input terminal and the output terminal to electrically connect the first I2C bus and the second I2C bus.
- the switch module disconnects its input and output terminals to disconnect the first I2C bus from the second I2C bus, and can connect or disconnect the first I2C bus and the second I2C bus in a time-sharing manner.
- the display device driving method of the present invention can connect or disconnect the first I2C bus and the second I2C bus in a time-sharing manner, thereby ensuring the effective communication between the system chip and the control board and avoiding the first I2C bus and the second I2C bus The signals interfere with each other when working alone.
- FIG. 1 is a schematic structural diagram of a display device driving system of the present invention
- FIG. 2 is a flowchart of a driving method of a display device of the present invention
- FIG. 3 is a timing diagram of step S1 of the display device driving method of the present invention.
- FIG. 4 is a timing diagram of step S2 of the display device driving method of the present invention.
- the present invention provides a display device driving system, including a system chip 10 Control panel 20 , Switch module 30 ,the first I2C bus 40 And second I2C bus 50 .
- the system chip 10 First I2C bus 40 With switch module 30
- the input terminal is electrically connected to the control board 20 Second I2C bus 50 With switch module 30
- the output of the switch is electrically connected, the switch module 30
- the switch module 30 Connect its input and output terminals electrically, so that the first I2C bus 40 With the second I2C bus 50 Electrical connection.
- the switch module 30 Disconnect its input from the output, so that the first I2C bus 40 With the second I2C bus 50 disconnect.
- control board 20 Including ontology twenty one And on the body twenty one Timing controller twenty two And power management chip twenty three .
- the second I2C bus 50 With timing controller twenty two And power management chip twenty three All are electrically connected.
- the first I2C bus 40 Including the first serial data line SDA_S And the first serial clock line SCL_S .
- the switch module 30 The input terminal includes a first input terminal and a second input terminal.
- the first serial data line SDA_S And the first serial clock line SCL_S It is electrically connected to the first input terminal and the second input terminal respectively.
- the second I2C bus 50 Includes second serial data line SDA_C And the second serial clock line SCL_C .
- the switch module 30 The output terminal includes a first output terminal and a second output terminal.
- the second serial data line SDA_C And the second serial clock line SCL_C They are electrically connected to the first output terminal and the second output terminal respectively.
- the switch module 30 Connect the first input terminal to the first output terminal, and connect the second input terminal to the second output terminal.
- the switch module 30 Disconnect its first input from the first output, and disconnect its second input from the second output.
- the switch module 30 Including the first sub-switch module 31 And the second sub-switch module 32 .
- the first sub-switch module 31 Control terminal and second sub-switch module 32 The control terminal is the switch module 30 Control side.
- the first sub-switch module 31 The input terminal and output terminal are switch modules 30 The first input terminal and the first output terminal.
- the second sub-switch module 32 The input terminal and output terminal are switch modules 30 The second input and the second output.
- the control signal WP When it is the preset first potential, the first sub-switch module 31 Connect its input and output, the second sub-switch module 32 Connect its input and output.
- the control signal WP When it is the preset second potential, the first sub-switch module 31 Disconnect its input and output, the second sub-switch module 32 Disconnect its input and output.
- the first sub-switch module 31 Including the first FET Q1 FET Q2 , The first FET Q1 Grid and second field effect transistor Q2 Is electrically connected to the first sub-switch module 31
- the control terminal of the source is the first sub-switch module 31
- the input terminal, the drain is electrically connected to the second FET Q2
- the drain of the second FET Q2 The source is the first sub-switch module 31 Output.
- the second sub-switch module 32 Including third field effect transistor Q3 And fourth field effect transistor Q4 , The third FET Q3 Gate and fourth field effect transistor Q4 Is electrically connected to the second sub-switch module 32
- the control terminal of the source is the second sub-switch module 32 Input terminal, the drain is electrically connected to the fourth field effect transistor Q4 The drain of the fourth FET Q4
- the source is the second sub-switch module 32 Output.
- the first field effect tube Q1 2.
- Second Field Effect Transistor Q2 3rd field effect transistor Q3 And fourth field effect transistor Q4 All N Type field effect tube.
- the preset first potential is a high potential
- the preset second potential is a low potential
- a switch module is provided by 31 , The switch module 31 The control terminal access control signal WP , The input terminal is electrically connected to the system chip 10 Electrically connected first I2C bus 40 , The output terminal is electrically connected to the control board 20 Electrically connected second I2C bus 50 , When the system chip needs to be 10 With control panel 20 When electrically connected, please refer to the picture 3 To make the control signal WP For the first potential of high potential, control the switch module 31 Connect its input and output terminals electrically, so that the first I2C bus 40 With the second I2C bus 50 Electrically connected, so that the system chip 10 And control board 20 The first one that can be electrically connected I2C bus 40 With the second I2C bus 50 Communication, this time first I2C bus 40 The first serial data line SDA_S The waveform of the voltage on the second I2C bus 50 Second serial data line SDA_C The waveform of the voltage on is consistent, the first I2C bus 40 The first serial clock
- the second potential of the low potential controls the switch module 31 Disconnect its input from the output, so that the first I2C bus 40 With the second I2C bus 50 Disconnected, at this time the first I2C bus 40
- the first serial data line SDA_S The waveform of the voltage on the second I2C bus 50 Second serial data line SDA_C
- the waveforms on the voltage are independent, the first I2C bus 40
- the first serial clock line SCL_S The waveform of the voltage on the second I2C bus 50 Second serial clock line SCL_C
- the waveforms on the voltage are independent, the first I2C bus 40 And second I2C bus 50 Able to transmit signals independently without interfering with each other.
- the present invention also provides a display device driving method, which is applied to the above-mentioned display device driving system and includes the following steps:
- step S1 Please refer to the picture 1 And figure 3 ,
- the control signal WP It is the preset first potential, specifically high potential, switch module 30 Connect its input and output terminals electrically, so that the first I2C bus 40 With the second I2C bus 50 Electrically connected, so that the system chip 10 And control board 20 The first one that can be electrically connected I2C bus 40 With the second I2C bus 50 Communication, this time first I2C bus 40
- the first serial data line SDA_S The waveform of the voltage on the second I2C bus 50 Second serial data line SDA_C
- the waveform of the voltage on is consistent
- the first I2C bus 40 The first serial clock line SCL_S The waveform of the voltage on the second I2C bus 50 Second serial clock line SCL_C The waveform of the voltage on is consistent.
- step S2 Please refer to the picture 1 And figure 4 ,
- switch module 30 Disconnect its input from the output, so that the first I2C bus 40 With the second I2C bus 50 Disconnected, at this time the first I2C bus 40
- the first serial data line SDA_S The waveform of the voltage on the second I2C bus 50 Second serial data line SDA_C
- the waveforms on the voltage are independent of each other, the first I2C bus 40
- the first serial clock line SCL_S The waveform of the voltage on the second I2C bus 50 Second serial clock line SCL_C
- the waveforms on the voltage are independent of each other, the first I2C bus 40 And second I2C bus 50 Able to transmit signals independently without interfering with each other.
- the system chip I2C The bus is electrically connected to the input end of the switch module, and the control board passes the second I2C
- the bus is electrically connected to the output end of the switch module, the control end of the switch module is connected to the control signal, and when the control signal is the preset first potential, the switch module electrically connects its input end and the output end to connect the first I2C Bus and second I2C The bus is electrically connected.
- the switch module disconnects its input end from the output end to connect the first I2C Bus and second I2C The bus is disconnected.
- I2C Bus and second I2C The bus is connected or disconnected, so as to ensure the effective communication between the system chip and the control board, and avoid the first I2C Bus and second I2C When the bus works alone, the signals interfere with each other.
- the display device driving method of the present invention can I2C Bus and second I2C The bus is connected or disconnected, so as to ensure the effective communication between the system chip and the control board, and avoid the first I2C Bus and second I2C When the bus works alone, the signals interfere with each other.
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Abstract
一种显示装置驱动***及显示装置驱动方法,显示装置驱动***中***芯片(10)经第一I2C总线(40)与开关模块(30)的输入端电性连接,控制板(20)经第二I2C总线(50)与开关模块(30)的输出端电性连接,开关模块(30)的控制端接入控制信号(WP),当控制信号(WP)为预设的第一电位时,开关模块(30)将其输入端与输出端电性连接从而将第一I2C总线(40)与第二I2C总线(50)电性连接,当控制信号(WP)为预设的第二电位时,开关模块(30)将其输入端与输出端断开从而将第一I2C总线(40)与第二I2C总线(50)断开,能够分时将第一I2C总线(40)与第二I2C总线(50)连接或断开,从而在保证***芯片(10)及控制板(20)之间有效通讯的同时,避免第一I2C总线(40)及第二I2C(50)总线单独工作时信号相互干扰。
Description
本发明涉及显示技术领域,尤其涉及一种显示装置驱动***及显示装置驱动方法。
随着显示技术的发展,液晶显示器(Liquid Crystal Display,LCD)等平面显示装置因具有高画质、省电、机身薄及应用范围广等优点,而被广泛的应用于手机、电视、个人数字助理、数字相机、笔记本电脑、台式计算机等各种消费性电子产品,成为显示装置中的主流。
平板显示装置一般包括显示面板及外部驱动电路,外部驱动电路一般包括控制板(CB)及***芯片(SOC),控制板上设有时序控制器(TCON)及电源管理芯片(PMIC)等元器件。控制板(CB)与控制板集成电路(I2C)总线连接,该控制板I2C总线连接时序控制器及电源管理芯片,现有的电源管理芯片为了节省尺寸,内部不设置存储模块,其工作参数(code)存储在与时序控制器连接的外部闪存(flash)里,由于控制板I2C总线将时序控制器及电源管理芯片连接,因此工作时,时序控制器能够读取闪存内存储的code并通过控制板I2C总线传输至电源管理芯片中以供其使用,为了防止读取出错,此过程一般在显示装置的帧消隐(blanking)时间进行,进行时会一直占用控制板I2C总线。与此同时,***芯片与***芯片I2C总线连接,该***芯片I2C总线需要与控制板I2C总线直接连接,从而***芯片能够利用连接的***芯片I2C总线及控制板I2C总线与控制板进行通信,以进行调整闪烁(flicker)的操作。由于***芯片I2C总线与控制板I2C总线直接相连,在某些时刻可能会产生***芯片I2C总线上的信号与控制板I2C总线上的信号相互干扰的情况发生,影响信号的有效传输。
本发明的目的在于提供一种显示装置驱动***,能够分时将第一I2C总线与第二I2C总线连接或断开,从而在保证***芯片及控制板之间有效通讯的同时,避免第一I2C总线及第二I2C总线单独工作时信号相互干扰。
本发明的另一目的在于提供一种显示装置驱动方法,能够分时将第一I2C总线与第二I2C总线连接或断开,从而在保证***芯片及控制板之间有效通讯的同时,避免第一I2C总线及第二I2C总线单独工作时信号相互干扰。
为实现上述目的,本发明首先提供一种显示装置驱动***,包括***芯片、控制板、开关模块、第一I2C总线及第二I2C总线;
所述***芯片经第一I2C总线与开关模块的输入端电性连接,所述控制板经第二I2C总线与开关模块的输出端电性连接,所述开关模块的控制端接入控制信号;
当所述控制信号为预设的第一电位时,开关模块将其输入端与输出端电性连接,从而将第一I2C总线与第二I2C总线电性连接;当所述控制信号为预设的第二电位时,开关模块将其输入端与输出端断开,从而将第一I2C总线与第二I2C总线断开。
所述控制板包括本体及设于本体上的时序控制器及电源管理芯片;所述第二I2C总线与时序控制器及电源管理芯片均电性连接。
所述第一I2C总线包括第一串行数据线及第一串行时钟线;所述开关模块的输入端包括第一输入端及第二输入端;所述第一串行数据线及第一串行时钟线分别与第一输入端及第二输入端电性连接;
所述第二I2C总线包括第二串行数据线及第二串行时钟线;所述开关模块的输出端包括第一输出端及第二输出端;所述第二串行数据线及第二串行时钟线分别与第一输出端及第二输出端电性连接。
当所述控制信号为预设的第一电位时,开关模块将其第一输入端与第一输出端连接,并将其第二输入端与第二输出端连接;当所述控制信号为预设的第二电位时,开关模块将其第一输入端与第一输出端断开,并将其第二输入端与第二输出端断开。
所述开关模块包括第一子开关模块及第二子开关模块;所述第一子开关模块的控制端与第二子开关模块的控制端为开关模块的控制端;所述第一子开关模块的输入端及输出端分别为开关模块的第一输入端及第一输出端;所述第二子开关模块的输入端及输出端分别为开关模块的第二输入端及第二输出端。
当所述控制信号为预设的第一电位时,第一子开关模块将其输入端与输出端连接,第二子开关模块将其输入端与输出端连接;当所述控制信号为预设的第二电位时,第一子开关模块将其输入端与输出端断开,第二子开关模块将其输入端与输出端断开。
所述第一子开关模块包括第一场效应管及第二场效应管,所述第一场效应管的栅极与第二场效应管的栅极电性连接为第一子开关模块的控制端,源极为第一子开关模块的输入端,漏极电性连接第二场效应管的漏极,所述第二场效应管的源极为第一子开关模块的输出端;
所述第二子开关模块包括第三场效应管及第四场效应管,所述第三场效应管的栅极与第四场效应管的栅极电性连接为第二子开关模块的控制端,源极为第二子开关模块的输入端,漏极电性连接第四场效应管的漏极,所述第四场效应管的源极为第二子开关模块的输出端。
所述第一场效应管、第二场效应管、第三场效应管及第四场效应管均为N型场效应管。
所述预设的第一电位为高电位,预设的第二电位为低电位。
本发明还提供一种显示装置驱动方法,应用于上述显示装置驱动***,包括:
所述控制信号为预设的第一电位,开关模块将其输入端与输出端电性连接,从而将第一I2C总线与第二I2C总线电性连接;
所述控制信号为预设的第二电位,开关模块将其输入端与输出端断开,从而将第一I2C总线与第二I2C总线断开。
本发明的有益效果:本发明的显示装置驱动***中***芯片经第一I2C总线与开关模块的输入端电性连接,控制板经第二I2C总线与开关模块的输出端电性连接,开关模块的控制端接入控制信号,当控制信号为预设的第一电位时,开关模块将其输入端与输出端电性连接从而将第一I2C总线与第二I2C总线电性连接,当控制信号为预设的第二电位时,开关模块将其输入端与输出端断开从而将第一I2C总线与第二I2C总线断开,能够分时将第一I2C总线与第二I2C总线连接或断开,从而在保证***芯片及控制板之间有效通讯的同时,避免第一I2C总线及第二I2C总线单独工作时信号相互干扰。本发明的显示装置驱动方法能够分时将第一I2C总线与第二I2C总线连接或断开,从而在保证***芯片及控制板之间有效通讯的同时,避免第一I2C总线及第二I2C总线单独工作时信号相互干扰。
为了能更进一步了解本发明的特征以及技术内容,请参阅以下有关本发明的详细说明与附图,然而附图仅提供参考与说明用,并非用来对本发明加以限制。
附图中,
图1为本发明的显示装置驱动***的结构示意图;
图2为本发明的显示装置驱动方法的流程图;
图3为本发明的显示装置驱动方法的步骤S1的时序图;
图4为本发明的显示装置驱动方法的步骤S2的时序图。
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图
1
,本发明提供一种显示装置驱动***,包括***芯片
10
、控制板
20
、开关模块
30
、第一
I2C
总线
40
及第二
I2C
总线
50
。
所述***芯片
10
经第一
I2C
总线
40
与开关模块
30
的输入端电性连接,所述控制板
20
经第二
I2C
总线
50
与开关模块
30
的输出端电性连接,所述开关模块
30
的控制端接入控制信号
WP
。
当所述控制信号
WP
为预设的第一电位时,开关模块
30
将其输入端与输出端电性连接,从而将第一
I2C
总线
40
与第二
I2C
总线
50
电性连接。当所述控制信号
WP
为预设的第二电位时,开关模块
30
将其输入端与输出端断开,从而将第一
I2C
总线
40
与第二
I2C
总线
50
断开。
具体地,所述控制板
20
包括本体
21
及设于本体
21
上的时序控制器
22
及电源管理芯片
23
。所述第二
I2C
总线
50
与时序控制器
22
及电源管理芯片
23
均电性连接。
具体地,所述第一
I2C
总线
40
包括第一串行数据线
SDA_S
及第一串行时钟线
SCL_S
。所述开关模块
30
的输入端包括第一输入端及第二输入端。所述第一串行数据线
SDA_S
及第一串行时钟线
SCL_S
分别与第一输入端及第二输入端电性连接。所述第二
I2C
总线
50
包括第二串行数据线
SDA_C
及第二串行时钟线
SCL_C
。所述开关模块
30
的输出端包括第一输出端及第二输出端。所述第二串行数据线
SDA_C
及第二串行时钟线
SCL_C
分别与第一输出端及第二输出端电性连接。当所述控制信号
WP
为预设的第一电位时,开关模块
30
将其第一输入端与第一输出端连接,并将其第二输入端与第二输出端连接。当所述控制信号
WP
为预设的第二电位时,开关模块
30
将其第一输入端与第一输出端断开,并将其第二输入端与第二输出端断开。
进一步地,所述开关模块
30
包括第一子开关模块
31
及第二子开关模块
32
。所述第一子开关模块
31
的控制端与第二子开关模块
32
的控制端为开关模块
30
的控制端。所述第一子开关模块
31
的输入端及输出端分别为开关模块
30
的第一输入端及第一输出端。所述第二子开关模块
32
的输入端及输出端分别为开关模块
30
的第二输入端及第二输出端。当所述控制信号
WP
为预设的第一电位时,第一子开关模块
31
将其输入端与输出端连接,第二子开关模块
32
将其输入端与输出端连接。当所述控制信号
WP
为预设的第二电位时,第一子开关模块
31
将其输入端与输出端断开,第二子开关模块
32
将其输入端与输出端断开。
具体地,在图
1
所示的实施例中,所述第一子开关模块
31
包括第一场效应管
Q1
及第二场效应管
Q2
,所述第一场效应管
Q1
的栅极与第二场效应管
Q2
的栅极电性连接为第一子开关模块
31
的控制端,源极为第一子开关模块
31
的输入端,漏极电性连接第二场效应管
Q2
的漏极,所述第二场效应管
Q2
的源极为第一子开关模块
31
的输出端。所述第二子开关模块
32
包括第三场效应管
Q3
及第四场效应管
Q4
,所述第三场效应管
Q3
的栅极与第四场效应管
Q4
的栅极电性连接为第二子开关模块
32
的控制端,源极为第二子开关模块
32
的输入端,漏极电性连接第四场效应管
Q4
的漏极,所述第四场效应管
Q4
的源极为第二子开关模块
32
的输出端。所述第一场效应管
Q1
、第二场效应管
Q2
、第三场效应管
Q3
及第四场效应管
Q4
均为
N
型场效应管。
优选地,所述预设的第一电位为高电位,预设的第二电位为低电位。
需要说明的是,本发明的显示装置驱动***中,通过设置一开关模块
31
,该开关模块
31
的控制端接入控制信号
WP
,输入端电性连接与***芯片
10
电性连接的第一
I2C
总线
40
,输出端电性连接与控制板
20
电性连接的第二
I2C
总线
50
,当需要将***芯片
10
与控制板
20
电性连接时,请参阅图
3
,使控制信号
WP
为高电位的第一电位,控制开关模块
31
将其输入端与输出端电性连接,从而将第一
I2C
总线
40
与第二
I2C
总线
50
电性连接,从而使得***芯片
10
及控制板
20
之间能够通过电性连接的第一
I2C
总线
40
与第二
I2C
总线
50
通讯,此时第一
I2C
总线
40
的第一串行数据线
SDA_S
上的电压的波形与第二
I2C
总线
50
的第二串行数据线
SDA_C
上的电压的波形一致,第一
I2C
总线
40
的第一串行时钟线
SCL_S
上的电压的波形与第二
I2C
总线
50
的第二串行时钟线
SCL_C
上的电压的波形一致。当需要将第一
I2C
总线
40
与第二
I2C
总线
50
断开使两者独立传输信号时,请参阅图
4
,使控制信号
WP
为低电位的第二电位,控制开关模块
31
将其输入端与输出端断开,从而将第一
I2C
总线
40
与第二
I2C
总线
50
断开,此时第一
I2C
总线
40
的第一串行数据线
SDA_S
上的电压的波形与第二
I2C
总线
50
的第二串行数据线
SDA_C
上的电压的波形之间是独立的,第一
I2C
总线
40
的第一串行时钟线
SCL_S
上的电压的波形与第二
I2C
总线
50
的第二串行时钟线
SCL_C
上的电压的波形之间是独立的,第一
I2C
总线
40
及第二
I2C
总线
50
能够独立传输信号,信号之间互不干扰。
请参阅图
2
,基于同一发明构思,本发明还提供一种显示装置驱动方法,应用于上述的显示装置驱动***,包括如下步骤:
步骤
S1
、请参阅图
1
及图
3
,当需要将***芯片
10
与控制板
20
电性连接时,所述控制信号
WP
为预设的第一电位,具体为高电位,开关模块
30
将其输入端与输出端电性连接,从而将第一
I2C
总线
40
与第二
I2C
总线
50
电性连接,从而使得***芯片
10
及控制板
20
之间能够通过电性连接的第一
I2C
总线
40
与第二
I2C
总线
50
通讯,此时第一
I2C
总线
40
的第一串行数据线
SDA_S
上的电压的波形与第二
I2C
总线
50
的第二串行数据线
SDA_C
上的电压的波形一致,第一
I2C
总线
40
的第一串行时钟线
SCL_S
上的电压的波形与第二
I2C
总线
50
的第二串行时钟线
SCL_C
上的电压的波形一致。
步骤
S2
、请参阅图
1
及图
4
,当需要将所述控制信号
WP
为预设的第二电位,具体为低电位,开关模块
30
将其输入端与输出端断开,从而将第一
I2C
总线
40
与第二
I2C
总线
50
断开,此时第一
I2C
总线
40
的第一串行数据线
SDA_S
上的电压的波形与第二
I2C
总线
50
的第二串行数据线
SDA_C
上的电压的波形是互相独立的,第一
I2C
总线
40
的第一串行时钟线
SCL_S
上的电压的波形与第二
I2C
总线
50
的第二串行时钟线
SCL_C
上的电压的波形是互相独立的,第一
I2C
总线
40
及第二
I2C
总线
50
能够独立传输信号,信号之间互不干扰。
综上所述,本发明的显示装置驱动***中***芯片经第一
I2C
总线与开关模块的输入端电性连接,控制板经第二
I2C
总线与开关模块的输出端电性连接,开关模块的控制端接入控制信号,当控制信号为预设的第一电位时,开关模块将其输入端与输出端电性连接从而将第一
I2C
总线与第二
I2C
总线电性连接,当控制信号为预设的第二电位时,开关模块将其输入端与输出端断开从而将第一
I2C
总线与第二
I2C
总线断开,能够分时将第一
I2C
总线与第二
I2C
总线连接或断开,从而在保证***芯片及控制板之间有效通讯的同时,避免第一
I2C
总线及第二
I2C
总线单独工作时信号相互干扰。本发明的显示装置驱动方法能够分时将第一
I2C
总线与第二
I2C
总线连接或断开,从而在保证***芯片及控制板之间有效通讯的同时,避免第一
I2C
总线及第二
I2C
总线单独工作时信号相互干扰。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明权利要求的保护范围。
Claims (18)
- 一种显示装置驱动***,包括***芯片、控制板、开关模块、第一I2C总线及第二I2C总线;所述***芯片经第一I2C总线与开关模块的输入端电性连接,所述控制板经第二I2C总线与开关模块的输出端电性连接,所述开关模块的控制端接入控制信号;当所述控制信号为预设的第一电位时,开关模块将其输入端与输出端电性连接,从而将第一I2C总线与第二I2C总线电性连接;当所述控制信号为预设的第二电位时,开关模块将其输入端与输出端断开,从而将第一I2C总线与第二I2C总线断开。
- 如权利要求1所述的显示装置驱动***,其中,所述控制板包括本体及设于本体上的时序控制器及电源管理芯片;所述第二I2C总线与时序控制器及电源管理芯片均电性连接。
- 如权利要求1所述的显示装置驱动***,其中,所述第一I2C总线包括第一串行数据线及第一串行时钟线;所述开关模块的输入端包括第一输入端及第二输入端;所述第一串行数据线及第一串行时钟线分别与第一输入端及第二输入端电性连接;所述第二I2C总线包括第二串行数据线及第二串行时钟线;所述开关模块的输出端包括第一输出端及第二输出端;所述第二串行数据线及第二串行时钟线分别与第一输出端及第二输出端电性连接。
- 如权利要求3所述的显示装置驱动***,其中,当所述控制信号为预设的第一电位时,开关模块将其第一输入端与第一输出端连接,并将其第二输入端与第二输出端连接;当所述控制信号为预设的第二电位时,开关模块将其第一输入端与第一输出端断开,并将其第二输入端与第二输出端断开。
- 如权利要求4所述的显示装置驱动***,其中,所述开关模块包括第一子开关模块及第二子开关模块;所述第一子开关模块的控制端与第二子开关模块的控制端为开关模块的控制端;所述第一子开关模块的输入端及输出端分别为开关模块的第一输入端及第一输出端;所述第二子开关模块的输入端及输出端分别为开关模块的第二输入端及第二输出端。
- 如权利要求5所述的显示装置驱动***,其中,当所述控制信号为预设的第一电位时,第一子开关模块将其输入端与输出端连接,第二子开关模块将其输入端与输出端连接;当所述控制信号为预设的第二电位时,第一子开关模块将其输入端与输出端断开,第二子开关模块将其输入端与输出端断开。
- 如权利要求6所述的显示装置驱动***,其中,所述第一子开关模块包括第一场效应管及第二场效应管,所述第一场效应管的栅极与第二场效应管的栅极电性连接为第一子开关模块的控制端,源极为第一子开关模块的输入端,漏极电性连接第二场效应管的漏极,所述第二场效应管的源极为第一子开关模块的输出端;所述第二子开关模块包括第三场效应管及第四场效应管,所述第三场效应管的栅极与第四场效应管的栅极电性连接为第二子开关模块的控制端,源极为第二子开关模块的输入端,漏极电性连接第四场效应管的漏极,所述第四场效应管的源极为第二子开关模块的输出端。
- 如权利要求7所述的显示装置驱动***,其中,所述第一场效应管、第二场效应管、第三场效应管及第四场效应管均为N型场效应管。
- 如权利要求1所述的显示装置驱动***,其中,所述预设的第一电位为高电位,预设的第二电位为低电位。
- 一种显示装置驱动方法,应用于显示装置驱动***,所述显示装置驱动***包括***芯片、控制板、开关模块、第一I2C总线及第二I2C总线;所述***芯片经第一I2C总线与开关模块的输入端电性连接,所述控制板经第二I2C总线与开关模块的输出端电性连接,所述开关模块的控制端接入控制信号;当所述控制信号为预设的第一电位时,开关模块将其输入端与输出端电性连接,从而将第一I2C总线与第二I2C总线电性连接;当所述控制信号为预设的第二电位时,开关模块将其输入端与输出端断开,从而将第一I2C总线与第二I2C总线断开;所述显示装置驱动方法包括:所述控制信号为预设的第一电位,开关模块将其输入端与输出端电性连接,从而将第一I2C总线与第二I2C总线电性连接;所述控制信号为预设的第二电位,开关模块将其输入端与输出端断开,从而将第一I2C总线与第二I2C总线断开。
- 如权利要求10所述的显示装置驱动方法,其中,所述控制板包括本体及设于本体上的时序控制器及电源管理芯片;所述第二I2C总线与时序控制器及电源管理芯片均电性连接。
- 如权利要求10所述的显示装置驱动方法,其中,所述第一I2C总线包括第一串行数据线及第一串行时钟线;所述开关模块的输入端包括第一输入端及第二输入端;所述第一串行数据线及第一串行时钟线分别与第一输入端及第二输入端电性连接;所述第二I2C总线包括第二串行数据线及第二串行时钟线;所述开关模块的输出端包括第一输出端及第二输出端;所述第二串行数据线及第二串行时钟线分别与第一输出端及第二输出端电性连接。
- 如权利要求12所述的显示装置驱动方法,其中,当所述控制信号为预设的第一电位时,开关模块将其第一输入端与第一输出端连接,并将其第二输入端与第二输出端连接;当所述控制信号为预设的第二电位时,开关模块将其第一输入端与第一输出端断开,并将其第二输入端与第二输出端断开。
- 如权利要求13所述的显示装置驱动方法,其中,所述开关模块包括第一子开关模块及第二子开关模块;所述第一子开关模块的控制端与第二子开关模块的控制端为开关模块的控制端;所述第一子开关模块的输入端及输出端分别为开关模块的第一输入端及第一输出端;所述第二子开关模块的输入端及输出端分别为开关模块的第二输入端及第二输出端。
- 如权利要求14所述的显示装置驱动方法,其中,当所述控制信号为预设的第一电位时,第一子开关模块将其输入端与输出端连接,第二子开关模块将其输入端与输出端连接;当所述控制信号为预设的第二电位时,第一子开关模块将其输入端与输出端断开,第二子开关模块将其输入端与输出端断开。
- 如权利要求15所述的显示装置驱动方法,其中,所述第一子开关模块包括第一场效应管及第二场效应管,所述第一场效应管的栅极与第二场效应管的栅极电性连接为第一子开关模块的控制端,源极为第一子开关模块的输入端,漏极电性连接第二场效应管的漏极,所述第二场效应管的源极为第一子开关模块的输出端;所述第二子开关模块包括第三场效应管及第四场效应管,所述第三场效应管的栅极与第四场效应管的栅极电性连接为第二子开关模块的控制端,源极为第二子开关模块的输入端,漏极电性连接第四场效应管的漏极,所述第四场效应管的源极为第二子开关模块的输出端。
- 如权利要求16所述的显示装置驱动方法,其中,所述第一场效应管、第二场效应管、第三场效应管及第四场效应管均为N型场效应管。
- 如权利要求10所述的显示装置驱动方法,其中,所述预设的第一电位为高电位,预设的第二电位为低电位。
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