WO2019184068A1 - 一种像素驱动电路及显示装置 - Google Patents

一种像素驱动电路及显示装置 Download PDF

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WO2019184068A1
WO2019184068A1 PCT/CN2018/087737 CN2018087737W WO2019184068A1 WO 2019184068 A1 WO2019184068 A1 WO 2019184068A1 CN 2018087737 W CN2018087737 W CN 2018087737W WO 2019184068 A1 WO2019184068 A1 WO 2019184068A1
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Prior art keywords
control signal
thin film
film transistor
reset
module
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PCT/CN2018/087737
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English (en)
French (fr)
Inventor
李骏
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武汉华星光电半导体显示技术有限公司
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Priority to US16/111,214 priority Critical patent/US10643542B2/en
Publication of WO2019184068A1 publication Critical patent/WO2019184068A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0238—Improving the black level
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/066—Adjustment of display parameters for control of contrast

Definitions

  • the present invention relates to the field of liquid crystal display, and in particular to a pixel driving circuit and a display device.
  • OLEDs Organic light-emitting diodes
  • AMOLED active matrix organic light emitting diode
  • FIG. 1 The basic driving circuit of the AMOLED is shown in FIG. 1. It is a 2T1C mode, that is, includes two thin film transistors and one storage capacitor, specifically, a switching thin film transistor A1, a driving thin film transistor A2, and a storage capacitor C1.
  • Vth is the threshold voltage of the driving thin film transistor A2. Due to the long-term operation, the threshold voltage Vth of the driving thin film transistor A2 may drift, thereby causing a change in the driving current of the light-emitting element OLED, causing a defect in the OLED panel and affecting the image quality.
  • the technical problem to be solved by the present invention is to provide a pixel driving circuit and a display device capable of adjusting the contrast of a display black screen while compensating for a threshold voltage, thereby improving display characteristics of the display device.
  • a technical solution adopted by the present invention is to provide a pixel driving circuit, which includes a first reset module, a second reset module, a compensation module, and a light emitting module; and the first reset module is configured to receive the first Controlling the signal and transmitting the first reset voltage to the compensation module to reset the compensation module under the control of the first control signal; the second reset module is configured to receive the second control signal and to apply the second reset voltage under the control of the second control signal Transmitting to the lighting module to reset the lighting module; the compensation module is configured to receive the second control signal and write the data signal under the control of the second control signal and perform threshold voltage compensation; the lighting module is configured to receive the third control signal and Illuminating under the control of the control signal; wherein, the first reset module comprises a fourth thin film transistor; the gate of the fourth thin film transistor receives the first control signal, the source is connected to the first reset voltage, and the drain is connected to the compensation module; The second reset module includes a seventh thin film transistor; the gate of the seventh
  • a pixel driving circuit which includes a first reset module, a second reset module, a compensation module, and a light emitting module; and the first reset module is configured to receive the first a control signal and transmitting a first reset voltage to the compensation module to reset the compensation module under control of the first control signal; the second reset module is configured to receive the second control signal and reset the second control under the control of the second control signal Transmitting a voltage to the light emitting module to reset the light emitting module; the compensation module is configured to receive the second control signal and write the data signal under the control of the second control signal and perform threshold voltage compensation; the light emitting module is configured to receive the third control signal and Illumination under the control of three control signals.
  • a display device including a pixel driving circuit, the circuit including a first reset module, a second reset module, a compensation module, and a light emitting module; a reset module is configured to receive the first control signal and transmit the first reset voltage to the compensation module to reset the compensation module under control of the first control signal; the second reset module is configured to receive the second control signal and in the second control signal The second reset voltage is transmitted to the light emitting module to reset the light emitting module; the compensation module is configured to receive the second control signal and write the data signal under the control of the second control signal and perform threshold voltage compensation; the light emitting module is configured to receive The third control signal emits light under the control of the third control signal.
  • the pixel driving circuit and the display device of the present invention comprise a first reset module, a second reset module, a compensation module and a lighting module;
  • the first reset module is configured to receive the first control signal and be in the first control signal The first reset voltage is transmitted to the compensation module to reset the compensation module;
  • the second reset module is configured to receive the second control signal and transmit the second reset voltage to the light emitting module under the control of the second control signal to reset the light emitting module
  • the compensation module is configured to receive the second control signal and write the data signal under the control of the second control signal and perform threshold voltage compensation;
  • the light emitting module is configured to receive the third control signal and emit light under the control of the third control signal.
  • the present invention can improve the display characteristics of the display device by adjusting the contrast of the display black screen by adjusting the first reset voltage and the second reset voltage while compensating for the threshold voltage.
  • FIG. 1 is a circuit schematic diagram of a pixel driving circuit of the prior art
  • FIG. 2 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the present invention.
  • FIG. 3 is a circuit schematic diagram of the pixel driving circuit shown in FIG. 2;
  • FIG. 4 is a timing chart of control signals of the pixel driving circuit shown in FIG. 3;
  • FIG. 5 is a schematic structural view of a display device according to an embodiment of the present invention.
  • the pixel driving circuit 10 includes a first reset module 11, a second reset module 12, a compensation module 13, and a light emitting module 14.
  • the compensation module 13 is connected to the first reset module 11 and the light-emitting module 14, respectively, and the second reset module 12 is connected to the light-emitting module 14.
  • the first reset module 11 is configured to receive the first control signal S1 and output the first reset voltage Vref1 to the compensation module 13 under the control of the first control signal S1 to reset the compensation module 13.
  • the second reset module 12 is configured to receive the second control signal S2 and transmit the second reset voltage Vref2 to the light emitting module 14 under the control of the second control signal S2 to reset the light emitting module 14.
  • the compensation module 13 is configured to receive the second control signal S2 and write the data signal Data under the control of the second control signal S2 and perform threshold voltage compensation.
  • the lighting module 14 is configured to receive the third control signal S3 and emit light under the control of the third control signal S3.
  • FIG. 3 is a circuit schematic diagram of the pixel driving circuit shown in FIG.
  • the compensation module 13 includes a first thin film transistor T1, a second thin film transistor T2, a third thin film transistor T3, and a storage capacitor Cst;
  • the first reset module 11 includes a fourth thin film transistor T4;
  • the light emitting module 14 includes a fifth The thin film transistor T5, the sixth thin film transistor T6, and the light emitting element D1;
  • the second reset module 12 includes a seventh thin film transistor T7.
  • the gate of the first thin film transistor T1 is respectively connected to one end of the storage capacitor Cst, the drain of the second thin film transistor T2, and the drain of the fourth thin film transistor T4 in the first reset module 11, and the drain of the first thin film transistor T1.
  • the source of the first thin film transistor T1 and the source of the sixth thin film transistor T6 and the third of the light-emitting module 14 are respectively connected to the source of the fifth thin film transistor T5 and the source of the second thin film transistor T2.
  • the drain of the thin film transistor T3 is connected; the gates of the second thin film transistor T2 and the third thin film transistor T3 receive the second control signal S2; the source of the third thin film transistor T3 receives the data signal Data; the other end of the storage capacitor Cst A voltage VDD is connected.
  • the gate of the fourth thin film transistor T4 receives the first control signal S1, the source is connected to the first reset voltage Vref1, and the drain is connected to the drain of the second thin film transistor T2 in the compensation module 13.
  • the gate of the fifth thin film transistor T5 receives the third control signal S3, the drain is connected to the drain of the first transistor T1, the source is respectively connected to the anode of the light emitting element D1 and the seventh thin film transistor T7 of the second reset module 12
  • the drain of the sixth thin film transistor T6 receives the third control signal S3, the drain is connected to the first voltage VDD, the source is connected to the source of the first transistor T1, and the cathode of the light-emitting element D1 and the second voltage VSS connection.
  • the light emitting element D1 is an organic light emitting diode.
  • the gate of the seventh thin film transistor T7 receives the second control signal S2, the source is connected to the second reset voltage Vref2, and the drain is connected to the source of the fifth thin film transistor T5 in the light emitting module 14.
  • the first voltage VDD is at a high level
  • the second voltage VSS, the first reset voltage Vref1, and the second reset voltage Vref2 are at a low level.
  • the first thin film transistor T1 is a driving transistor
  • the second to seventh thin film transistors T2 to T7 are switching transistors.
  • the first to seventh thin film transistors T1 to T7 are all P-type thin film transistors, that is, when the control signal is low, the corresponding thin film transistors are turned on.
  • the thin film transistor tube used in the present invention can also adopt an N-type thin film transistor or a mixed mode of an N-type thin film transistor and a P-type thin film transistor, and the thin film transistor used as a switching transistor has a source and a drain.
  • the functions are interchangeable and no specific distinction is made here.
  • FIG. 4 is a timing diagram of control signals of the pixel driving circuit shown in FIG.
  • the operation process of the pixel driving circuit 10 is divided into three stages, which are a first working stage B1, a second working stage B2, and a third working stage B3, respectively.
  • the first working phase B1 is a compensation module reset phase. Specifically, the first working phase B1 is a reset phase of the gate of the thin film transistor T1 in the compensation module 13.
  • the first control signal S1 is valid, and the second control signal S2 and the third control signal S3 are invalid.
  • the first control signal S1 is set to a low level, and the second control signal S2 and the third control signal S3 are set to a high level.
  • the fourth thin film transistor T4 is turned on, and the first reset voltage Vref1 received from the source of the fourth thin film transistor T4 is output through the drain of the fourth thin film transistor T4, and the gate and the fourth of the first thin film transistor T1.
  • the drain of the thin film transistor T4 is connected, and therefore, the gate of the first thin film transistor T1 is reset to the first reset voltage Vref1.
  • the second working phase B2 is a data writing, threshold voltage compensation, and lighting module reset phase.
  • the second control signal S2 is valid, and the first control signal S1 and the third control signal S3 are invalid.
  • the second control signal S2 is set to a low level, and the first control signal S2 and the third control signal S3 are set to a high level.
  • the second thin film transistor T2 is turned on, so that the gate and the drain of the first thin film transistor T1 are short-circuited to form a diode connection structure.
  • the third thin film transistor T3 is turned on, and the data signal Data received from the source of the third thin film transistor T2 is written into the gate of the first thin film transistor T1 via the drain of the second thin film transistor T2, and passes through the diode of the first thin film transistor T1.
  • the connect structure charges the gate of the first thin film transistor T1 to be close to Vdata-
  • the seventh transistor T7 is turned on, and the second reset voltage Vref1 received from the source of the seventh thin film transistor T7 is output through the drain of the seventh thin film transistor T7, and the anode of the light emitting element D1 and the seventh thin film transistor T7 The drain is connected, and therefore, the anode of the light-emitting element D1 is reset to the second reset voltage Vref2.
  • the third working phase B3 is the lighting phase.
  • the third control signal S3 is valid, and the first control signal S1 and the second control signal S2 are invalid.
  • the third control signal S3 is set to a low level, and the first control signal S1 and the second control signal S2 are set to a high level.
  • I OLED ⁇ k (VDD-(Vdata-
  • IOLED is a driving current
  • VDD is a first voltage
  • Vdata is a voltage of a data signal Data
  • K is a current amplification factor of the thin film transistor T1.
  • the driving current IOLED is substantially independent of the threshold voltage Vth of the first thin film transistor T1, so that the problem that the threshold voltage Vth of the first thin film transistor T1 drifts causes the display of the picture to be poor can be eliminated.
  • the reset voltage of the gate of the first thin film transistor T1 is set to the first reset voltage Vref1
  • the reset potential of the anode of the light-emitting element D1 is set to the second reset voltage Vref2, wherein the first reset voltage Vref1 And the second reset voltage Vref2 can be separately set, thereby reducing the brightness of the black screen, thereby increasing the contrast of the display panel.
  • the voltage of the gate of the first thin film transistor T1 can only be close to Vdata-
  • the second reset voltage Vref2 is set to a lower voltage, so that the light-emitting element D1 is not easily charged to the turn-on voltage and emits light, and the luminance of the black screen is 0, which can greatly improve the contrast.
  • the second reset voltage Vref2 needs to be set to be smaller than the second voltage VSS, and the first reset voltage Vref1 is set according to the brightness of the black screen until the set first reset voltage Vref1 causes the brightness of the black screen to reach a minimum value.
  • the first reset voltage Vref1 and the second reset voltage Vref2 are different.
  • the first reset voltage Vref1 is greater than the second reset voltage Vref2.
  • FIG. 5 is a schematic illustration of a display device in accordance with an embodiment of the present invention. As shown in FIG. 5, the display device 1 includes the pixel drive circuit 10 described above.
  • the pixel driving circuit and the display device of the present invention comprise a first reset module, a second reset module, a compensation module and a lighting module;
  • the first reset module is configured to receive the first control signal and be in the first control signal The first reset voltage is transmitted to the compensation module to reset the compensation module;
  • the second reset module is configured to receive the second control signal and transmit the second reset voltage to the light emitting module under the control of the second control signal to reset the light emitting module
  • the compensation module is configured to receive the second control signal and write the data signal under the control of the second control signal and perform threshold voltage compensation;
  • the light emitting module is configured to receive the third control signal and emit light under the control of the third control signal.
  • the present invention can improve the display characteristics of the display device by adjusting the contrast of the display black screen by adjusting the first reset voltage and the second reset voltage while compensating for the threshold voltage.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of El Displays (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

一种像素驱动电路(10)及显示装置(1)，像素驱动电路(10)包括第一复位模块(11)、第二复位模块(12)、补偿模块(13)和发光模块(14)；第一复位模块(11)用于在第一控制信号(S1)的控制下将第一复位电压(Vref1)传输至补偿模块(13)以复位补偿模块(13)；第二复位模块(12)用于在第二控制信号(S2)的控制下将第二复位电压(Vref2)传输至发光模块(14)以复位发光模块(14)；补偿模块(13)用于在第二控制信号(S2)的控制下写入数据信号(Data)并进行阈值电压(Vth)补偿；发光模块(14)用于在第三控制信号(S3)的控制下发光，实现对阈值电压(Vth)进行补偿的同时，通过调整第一复位电压(Vref1)和第二复位电压(Vref2)调整显示黑画面的对比度，从而改善显示装置(1)的显示特性。

Description

一种像素驱动电路及显示装置 【技术领域】
本发明涉及液晶显示领域，特别是涉及一种像素驱动电路及显示装置。
【背景技术】
有机发光二极管(OLED)色域广、对比度高、节能、并具有可折叠性，因而在新世代显示器中具有强有力的竞争力。其中，有源矩阵有机发光二极管(AMOLED)技术是柔性显示重点发展方向之一。AMOLED的基本驱动电路如图1所示，其为2T1C模式，即包括两个薄膜晶体管和一个存储电容，具体地，包括一个开关薄膜晶体管A1、一个驱动薄膜晶体管A2和一个存储电容C1。发光元件OLED的驱动电流由驱动薄膜晶体管A2控制，其电流大小为：I OLED＝k(V gs-V th) 2；其中，k为驱动薄膜晶体管A2的电流放大系数，由驱动薄膜晶体管A2本身特性决定，Vth为驱动薄膜晶体管A2的阈值电压。由于长时间的操作，驱动薄膜晶体管A2的阈值电压Vth会发生漂移，从而导致发光元件OLED的驱动电流变化，使得OLED面板出现不良，影响画质。
【发明内容】
本发明主要解决的技术问题是提供一种像素驱动电路及显示装置，能够实现对阈值电压进行补偿的同时，调整显示黑画面的对比度，从而改善显示装置的显示特性。
为解决上述技术问题，本发明采用的一个技术方案是：提供一种像素驱动电路，该电路包括第一复位模块、第二复位模块、补偿模块和发光模块；第一复位模块用于接收第一控制信号并在第一控制信号的控制下将第一复位电压传输至补偿模块以复位补偿模块；第二复位模块用于接收第二控制信号并在第二控制信号的控制下将第二复位电压传输至发光模块以复位发光模块；补偿模块用于接收第二控制信号并在第二控制信号的控制下写入数据信号并进行阈值电 压补偿；发光模块用于接收第三控制信号并在第三控制信号的控制下发光；其中，第一复位模块包括第四薄膜晶体管；第四薄膜晶体管的栅极接收第一控制信号，源极与第一复位电压连接，漏极与补偿模块连接；其中，第二复位模块包括第七薄膜晶体管；第七薄膜晶体管的栅极接收第二控制信号，源极与第二复位电压连接，漏极与发光模块连接；其中，补偿模块包括第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管和存储电容；第一薄膜晶体管的栅极分别与存储电容的一端、第二薄膜晶体管的漏极、第一复位模块连接，第一薄膜晶体管的漏极分别与发光模块和第二薄膜晶体管的源极连接，第一薄膜晶体管的源极分别与发光模块和第三薄膜晶体管的漏极连接；第二薄膜晶体管和第三薄膜晶体管的栅极接收第二控制信号；第三薄膜晶体管的源极接收数据信号；存储电容的另一端与第一电压连接；其中，发光模块包括第五薄膜晶体管、第六薄膜晶体管和发光元件；第五薄膜晶体管的栅极接收第三控制信号、漏极与第一薄膜晶体管的漏极连接、源极分别与发光元件的阳极和第七薄晶体管的漏极连接；第六薄膜晶体管的栅极接收第三控制信号、漏极与第一电压连接，源极与第一薄膜晶体管的源极连接；发光元件的阴极与第二电压连接；其中，第一电压为高电平，第二电压、第一复位电压、第二复位电压为低电平；其中，电路的工作过程分为三个阶段，分别为第一工作阶段、第二工作阶段和第三工作阶段；在第一工作阶段，第一控制信号有效，第二控制信号和第三控制信号无效；在第二工作阶段，第二控制信号有效，第一控制信号和第三控制信号无效；在第三工作阶段，第三控制信号有效，第一控制信号和第二控制信号无效。
为解决上述技术问题，本发明采用的另一个技术方案是：提供一种像素驱动电路，该电路包括第一复位模块、第二复位模块、补偿模块和发光模块；第一复位模块用于接收第一控制信号并在第一控制信号的控制下将第一复位电压传输至补偿模块以复位补偿模块；第二复位模块用于接收第二控制信号并在第二控制信号的控制下将第二复位电压传输至发光模块以复位发光模块；补偿模块用于接收第二控制信号并在第二控制信号的控制下写入数据信号并进行阈值 电压补偿；发光模块用于接收第三控制信号并在第三控制信号的控制下发光。
为解决上述技术问题，本发明采用的再一个技术方案是：提供一种显示装置，该显示装置包括像素驱动电路，该电路包括第一复位模块、第二复位模块、补偿模块和发光模块；第一复位模块用于接收第一控制信号并在第一控制信号的控制下将第一复位电压传输至补偿模块以复位补偿模块；第二复位模块用于接收第二控制信号并在第二控制信号的控制下将第二复位电压传输至发光模块以复位发光模块；补偿模块用于接收第二控制信号并在第二控制信号的控制下写入数据信号并进行阈值电压补偿；发光模块用于接收第三控制信号并在第三控制信号的控制下发光。
本发明的有益效果是：本发明的像素驱动电路及显示装置包括第一复位模块、第二复位模块、补偿模块和发光模块；第一复位模块用于接收第一控制信号并在第一控制信号的控制下将第一复位电压传输至补偿模块以复位补偿模块；第二复位模块用于接收第二控制信号并在第二控制信号的控制下将第二复位电压传输至发光模块以复位发光模块；补偿模块用于接收第二控制信号并在第二控制信号的控制下写入数据信号并进行阈值电压补偿；发光模块用于接收第三控制信号并在第三控制信号的控制下发光。通过上述方式，本发明能够实现对阈值电压进行补偿的同时，通过调整第一复位电压和第二复位电压调整显示黑画面的对比度，从而改善显示装置的显示特性。
【附图说明】
图1是现有技术的像素驱动电路的电路原理图；
图2是本发明实施例的像素驱动电路的结构示意图；
图3是图2所示像素驱动电路的电路原理图；
图4是图3所示像素驱动电路的控制信号时序图；
图5是本发明实施例的显示装置的结构示意图。
【具体实施方式】
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅是本发明的一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
图2是本发明实施例的像素驱动电路的结构示意图。如图2所示，像素驱动电路10包括第一复位模块11、第二复位模块12、补偿模块13和发光模块14。其中，补偿模块13分别与第一复位模块11和发光模块14连接，第二复位模块12与发光模块14连接。
第一复位模块11用于接收第一控制信号S1并在第一控制信号S1的控制下将第一复位电压传Vref1输至补偿模块13以复位补偿模块13。
第二复位模块12用于接收第二控制信号S2并在第二控制信号S2的控制下将第二复位电压Vref2传输至发光模块14以复位发光模块14。
补偿模块13用于接收第二控制信号S2并在第二控制信号S2的控制下写入数据信号Data并进行阈值电压补偿。
发光模块14用于接收第三控制信号S3并在第三控制信号S3的控制下发光。
请一并参考图3，图3是图2所示像素驱动电路的电路原理图。如图3所示：补偿模块13包括第一薄膜晶体管T1、第二薄膜晶体管T2、第三薄膜晶体管T3和存储电容Cst；第一复位模块11包括第四薄膜晶体管T4；发光模块14包括第五薄膜晶体管T5、第六薄膜晶体管T6和发光元件D1；第二复位模块12包括第七薄膜晶体管T7。
第一薄膜晶体管T1的栅极分别与存储电容Cst的一端、第二薄膜晶体管T2的漏极、第一复位模块11中的第四薄膜晶体管T4的漏极连接，第一薄膜晶体管T1的漏极分别与发光模块14中第五薄膜晶体管T5的漏极、第二薄膜晶体管T2的源极连接，第一薄膜晶体管T1的源极分别与发光模块14中第六薄膜晶体管T6的源极、第三薄膜晶体管T3的漏极连接；第二薄膜晶体管T2和第三薄膜晶体管T3的栅极接收第二控制信号S2；第三薄膜晶体管T3的源极接收数据 信号Data；存储电容Cst的另一端与第一电压VDD连接。
第四薄膜晶体管T4的栅极接收第一控制信号S1，源极与第一复位电压Vref1连接，漏极与补偿模块13中的第二薄膜晶体管T2的漏极连接。
第五薄膜晶体管T5的栅极接收第三控制信号S3、漏极与第一晶体管T1的漏极连接、源极分别与发光元件D1的阳极和第二复位模块12中的第七薄膜晶体管T7的漏极连接；第六薄膜晶体管T6的栅极接收第三控制信号S3、漏极与第一电压VDD连接，源极与第一晶体管T1的源极连接；发光元件D1的阴极与第二电压VSS连接。其中，发光元件D1为有机发光二极管。
第七薄膜晶体管T7的栅极接收第二控制信号S2，源极与第二复位电压Vref2连接，漏极与发光模块14中的第五薄膜晶体管T5中的源极连接。
在本实施例中，第一电压VDD为高电平，第二电压VSS、第一复位电压Vref1、第二复位电压Vref2为低电平。
在本发明实施例中，第一薄膜晶体管T1为驱动晶体管，第二薄膜晶体管T2到第七薄膜晶体管T7为开关晶体管。其中第一薄膜晶体管T1到第七薄膜晶体管T7均为P型薄膜晶体管，也即当控制信号为低电平时相应的薄膜晶体管导通。当然，在实际电路设计中，本发明所用薄膜晶体管管还可以采用N型薄膜晶体管或者N型薄膜晶体管与P型薄膜晶体管的混合方式，并且所用薄膜晶体管在作为开关晶体管时，源极和漏极的功能可以互换，在此不做具体的区分。
请一并参考图4，图4是图3所示像素驱动电路的控制信号时序图。如图4所示，像素驱动电路10的工作过程分为三个阶段，分别为第一工作阶段B1、第二工作阶段B2和第三工作阶段B3。
第一工作阶段B1为补偿模块复位阶段，具体来说，第一工作阶段B1为补偿模块13中薄膜晶体管T1的栅极的复位阶段。在第一工作阶段B1，第一控制信号S1有效，第二控制信号S2、第三控制信号S3无效。换个角度来说，在第一工作阶段B1，将第一控制信号S1置为低电平，第二控制信号S2、第三控制信号S3置为高电平。此时，第四薄膜晶体管T4导通，从第四薄膜晶体管T4的 源极接收的第一复位电压Vref1经第四薄膜晶体管T4的漏极输出，第一薄膜晶体管的T1的栅极与第四薄膜晶体管T4的漏极连接，因此，第一薄膜晶体管T1的栅极被复位到第一复位电压Vref1。
第二工作阶段B2为数据写入、阈值电压补偿和发光模块复位阶段。在第二工作阶段B2，第二控制信号S2有效，第一控制信号S1、第三控制信号S3无效。换个角度来说，在第二工作阶段B2，将第二控制信号S2置为低电平，第一控制信号S2、第三控制信号S3置为高电平。此时，第二薄膜晶体管T2导通，使得第一薄膜晶体管T1的栅极和漏极短接形成了diode connect(二极管)结构。第三薄膜晶体管T3导通，从第三薄膜晶体管T2的源极接收的数据信号Data经第二薄膜晶体管T2的漏极写入第一薄膜晶体管T1的栅极，经过第一薄膜晶体管T1的diode connect结构，将第一薄膜晶体管T1的栅极充电至接近Vdata-|Vth|，其中，Vth为第一薄膜晶体管T1的阈值电压，Vdata为数据信号的电压。
与此同时，第七晶体管T7导通，从第七薄膜晶体管T7的源极接收的第二复位电压Vref1经第七薄膜晶体管T7的漏极输出，发光元件D1的阳极与第七薄膜晶体管T7的漏极连接，因此，发光元件D1的阳极被复位到第二复位电压Vref2。
第三工作阶段B3为发光阶段。在第三工作阶段B3，第三控制信号S3有效，第一控制信号S1、第二控制信号S2无效。换个角度来说，在第三工作阶段B3，将第三控制信号S3置为低电平，第一控制信号S1、第二控制信号S2置为高电平。第五薄膜晶体管T5、第六薄膜晶体管T6导通时，发光元件D1流经的驱动电流满足如下公式：
I OLED≈k(VDD-(Vdata-|Vth|)-|Vth|) 2≈k(VDD-Vdata) 2；
其中，IOLED为驱动电流，VDD为第一电压，Vdata为数据信号Data的电压，K为薄膜晶体管T1的电流放大系数。
从上述公式可以看出，驱动电流IOLED基本上与第一薄膜晶体管T1的阈值电压Vth无关，从而可以消除第一薄膜晶体管T1的阈值电压Vth漂移引起画 面显示不良的问题。
另外，在本发明中，第一薄膜晶体管T1的栅极的复位电压设置为第一复位电压Vref1，而发光元件D1的阳极的复位电位设置为第二复位电压Vref2，其中，第一复位电压Vref1和第二复位电压Vref2可以分开设置，从而降低黑画面的亮度，进而增大显示面板的对比度。
具体来说，对于高解析度的显示面板，由于第二控制信号S2的低电平时间短，导致第一薄膜晶体管T1的栅极的电压只能接近而无法达到Vdata-|Vth|，其中，随着第一复位电压Vref1升高，第二控制信号S2变为高电平时，第一薄膜晶体管T1的栅极的电压会随着升高。因此，在显示黑画面时，可以设置第一复位电压Vref1为较高电压，从而可以降低驱动电流，使得黑画面的亮度降低，达到增大显示面板的对比度的目的。
与此同时，第二复位电压Vref2设置为较低电压，使得发光元件D1不容易充电到开启电压而出现发光，黑画面的亮度为0，可以极大提高对比度。
综上所述，第二复位电压Vref2需要设置为小于第二电压VSS，第一复位电压Vref1根据黑画面的亮度进行设置，直到设置后的第一复位电压Vref1使得黑画面的亮度达到最小值为止。
在本实施例，第一复位电压Vref1和第二复位电压Vref2不同。优选地，第一复位电压Vref1大于第二复位电压Vref2。
图5是本发明实施例的显示装置的示意图。如图5所示，显示装置1包括了上述的像素驱动电路10。
本发明的有益效果是：本发明的像素驱动电路及显示装置包括第一复位模块、第二复位模块、补偿模块和发光模块；第一复位模块用于接收第一控制信号并在第一控制信号的控制下将第一复位电压传输至补偿模块以复位补偿模块；第二复位模块用于接收第二控制信号并在第二控制信号的控制下将第二复位电压传输至发光模块以复位发光模块；补偿模块用于接收第二控制信号并在第二控制信号的控制下写入数据信号并进行阈值电压补偿；发光模块用于接收第三 控制信号并在第三控制信号的控制下发光。通过上述方式，本发明能够实现对阈值电压进行补偿的同时，通过调整第一复位电压和第二复位电压调整显示黑画面的对比度，从而改善显示装置的显示特性。
以上所述仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (20)

  1. 一种像素驱动电路，其中，所述电路包括第一复位模块、第二复位模块、补偿模块和发光模块；
    所述第一复位模块用于接收第一控制信号并在所述第一控制信号的控制下将第一复位电压传输至所述补偿模块以复位所述补偿模块；
    所述第二复位模块用于接收第二控制信号并在所述第二控制信号的控制下将第二复位电压传输至所述发光模块以复位所述发光模块；
    所述补偿模块用于接收第二控制信号并在所述第二控制信号的控制下写入数据信号并进行阈值电压补偿；
    所述发光模块用于接收第三并在所述第三控制信号的控制下发光；
    其中，所述第一复位模块包括第四薄膜晶体管；所述第四薄膜晶体管的栅极接收所述第一控制信号，源极与所述第一复位电压连接，漏极与所述补偿模块连接；
    其中，所述第二复位模块包括第七薄膜晶体管；所述第七薄膜晶体管的栅极接收所述第二控制信号，源极与所述第二复位电压连接，漏极与所述发光模块连接；
    其中，所述补偿模块包括第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管和存储电容；所述第一薄膜晶体管的栅极分别与所述存储电容的一端、所述第二薄膜晶体管的漏极、所述第一复位模块连接，所述第一薄膜晶体管的漏极分别与所述发光模块和所述第二薄膜晶体管的源极连接，所述第一薄膜晶体管的源极分别与所述发光模块和所述第三薄膜晶体管的漏极连接；所述第二薄膜晶体管和所述第三薄膜晶体管的栅极接收所述第二控制信号；所述第三薄膜晶体管的源极接收所述数据信号；所述存储电容的另一端与第一电压连接；
    其中，所述发光模块包括第五薄膜晶体管、第六薄膜晶体管和发光元件；所述第五薄膜晶体管的栅极接收所述第三控制信号、漏极与所述第一薄膜晶体 管的漏极连接、源极分别与所述发光元件的阳极和所述第七薄晶体管的漏极连接；所述第六薄膜晶体管的栅极接收所述第三控制信号、漏极与所述第一电压连接，源极与所述第一薄膜晶体管的源极连接；所述发光元件的阴极与第二电压连接；
    其中，所述第一电压为高电平，所述第二电压、所述第一复位电压、所述第二复位电压为低电平；
    其中，所述电路的工作过程分为三个阶段，分别为第一工作阶段、第二工作阶段和第三工作阶段；在所述第一工作阶段，所述第一控制信号有效，所述第二控制信号和所述第三控制信号无效；在所述第二工作阶段，所述第二控制信号有效，所述第一控制信号和所述第三控制信号无效；在所述第三工作阶段，所述第三控制信号有效，所述第一控制信号和所述第二控制信号无效。
  2. 根据权利要求1所述的电路，其中，所述第二复位电压小于所述第二电压，所述第一复位电压根据黑画面的亮度进行调节。
  3. 一种像素驱动电路，其中，所述电路包括第一复位模块、第二复位模块、补偿模块和发光模块；
    所述第一复位模块用于接收第一控制信号并在所述第一控制信号的控制下将第一复位电压传输至所述补偿模块以复位所述补偿模块；
    所述第二复位模块用于接收第二控制信号并在所述第二控制信号的控制下将第二复位电压传输至所述发光模块以复位所述发光模块；
    所述补偿模块用于接收第二控制信号并在所述第二控制信号的控制下写入数据信号并进行阈值电压补偿；
    所述发光模块用于接收第三控制信号并在所述第三控制信号的控制下发光。
  4. 根据权利要求3所述的电路，其中，所述第一复位模块包括第四薄膜晶体管；
    所述第四薄膜晶体管的栅极接收所述第一控制信号，源极与所述第一复位电压连接，漏极与所述补偿模块连接。
  5. 根据权利要求4所述的电路，其中，所述第二复位模块包括第七薄膜晶体管；
    所述第七薄膜晶体管的栅极接收所述第二控制信号，源极与所述第二复位电压连接，漏极与所述发光模块连接。
  6. 根据权利要求5所述的电路，其中，所述补偿模块包括第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管和存储电容；
    所述第一薄膜晶体管的栅极分别与所述存储电容的一端、所述第二薄膜晶体管的漏极、所述第一复位模块连接，所述第一薄膜晶体管的漏极分别与所述发光模块和所述第二薄膜晶体管的源极连接，所述第一薄膜晶体管的源极分别与所述发光模块和所述第三薄膜晶体管的漏极连接；
    所述第二薄膜晶体管和所述第三薄膜晶体管的栅极接收所述第二控制信号；
    所述第三薄膜晶体管的源极接收所述数据信号；
    所述存储电容的另一端与第一电压连接。
  7. 根据权利要求6所述的电路，其中，所述发光模块包括第五薄膜晶体管、第六薄膜晶体管和发光元件；
    所述第五薄膜晶体管的栅极接收所述第三控制信号、漏极与所述第一薄膜晶体管的漏极连接、源极分别与所述发光元件的阳极和所述第七薄晶体管的漏极连接；
    所述第六薄膜晶体管的栅极接收所述第三控制信号、漏极与所述第一电压连接，源极与所述第一薄膜晶体管的源极连接；
    所述发光元件的阴极与第二电压连接。
  8. 根据权利要求7所述的电路，其中，所述第一电压为高电平，所述第二电压、所述第一复位电压、所述第二复位电压为低电平。
  9. 根据权利要求8所述的电路，其中，所述第二复位电压小于所述第二电压，所述第一复位电压根据黑画面的亮度进行调节。
  10. 根据权利要求7所述的电路，其中，所述电路的工作过程分为三个阶 段，分别为第一工作阶段、第二工作阶段和第三工作阶段；
    在所述第一工作阶段，所述第一控制信号有效，所述第二控制信号和所述第三控制信号无效；
    在所述第二工作阶段，所述第二控制信号有效，所述第一控制信号和所述第三控制信号无效；
    在所述第三工作阶段，所述第三控制信号有效，所述第一控制信号和所述第二控制信号无效。
  11. 根据权利要求10所述的电路，其中，当所述电路中的薄膜晶体管为P型薄膜晶体管时：
    当所述第一控制信号、所述第二控制信号、所述第三控制信号为低电平时，所述第一控制信号、所述第二控制信号、所述第三控制信号有效；
    当所述第一控制信号、所述第二控制信号、所述第三控制信号为高电平时，所述第一控制信号、所述第二控制信号、所述第三控制信号无效。
  12. 一种显示装置，其中，所述显示装置包括像素驱动电路，所述电路包括第一复位模块、第二复位模块、补偿模块和发光模块；
    所述第一复位模块用于接收第一控制信号并在所述第一控制信号的控制下将第一复位电压传输至所述补偿模块以复位所述补偿模块；
    所述第二复位模块用于接收第二控制信号并在所述第二控制信号的控制下将第二复位电压传输至所述发光模块以复位所述发光模块；
    所述补偿模块用于接收第二控制信号并在所述第二控制信号的控制下写入数据信号并进行阈值电压补偿；
    所述发光模块用于接收第三控制信号并在所述第三控制信号的控制下发光。
  13. 根据权利要求12所述的显示装置，其中，所述第一复位模块包括第四薄膜晶体管；
    所述第四薄膜晶体管的栅极接收所述第一控制信号，源极与所述第一复位电压连接，漏极与所述补偿模块连接。
  14. 根据权利要求13所述的显示装置，其中，所述第二复位模块包括第七薄膜晶体管；
    所述第七薄膜晶体管的栅极接收所述第二控制信号，源极与所述第二复位电压连接，漏极与所述发光模块连接。
  15. 根据权利要求14所述的显示装置，其中，所述补偿模块包括第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管和存储电容；
    所述第一薄膜晶体管的栅极分别与所述存储电容的一端、所述第二薄膜晶体管的漏极、所述第一复位模块连接，所述第一薄膜晶体管的漏极分别与所述发光模块和所述第二薄膜晶体管的源极连接，所述第一薄膜晶体管的源极分别与所述发光模块和所述第三薄膜晶体管的漏极连接；
    所述第二薄膜晶体管和所述第三薄膜晶体管的栅极接收所述第二控制信号；
    所述第三薄膜晶体管的源极接收所述数据信号；
    所述存储电容的另一端与第一电压连接。
  16. 根据权利要求15所述的显示装置，其中，所述发光模块包括第五薄膜晶体管、第六薄膜晶体管和发光元件；
    所述第五薄膜晶体管的栅极接收所述第三控制信号、漏极与所述第一薄膜晶体管的漏极连接、源极分别与所述发光元件的阳极和所述第七薄晶体管的漏极连接；
    所述第六薄膜晶体管的栅极接收所述第三控制信号、漏极与所述第一电压连接，源极与所述第一薄膜晶体管的源极连接；
    所述发光元件的阴极与第二电压连接。
  17. 根据权利要求16所述的显示装置，其中，所述第一电压为高电平，所述第二电压、所述第一复位电压、所述第二复位电压为低电平。
  18. 根据权利要求17所述的显示装置，其中，所述第二复位电压小于所述第二电压，所述第一复位电压根据黑画面的亮度进行调节。
  19. 根据权利要求16所述的显示装置，其中，所述电路的工作过程分为三 个阶段，分别为第一工作阶段、第二工作阶段和第三工作阶段；
    在所述第一工作阶段，所述第一控制信号有效，所述第二控制信号和所述第三控制信号无效；
    在所述第二工作阶段，所述第二控制信号有效，所述第一控制信号和所述第三控制信号无效；
    在所述第三工作阶段，所述第三控制信号有效，所述第一控制信号和所述第二控制信号无效。
  20. 根据权利要求19所述的显示装置，其中，当所述电路中的薄膜晶体管为P型薄膜晶体管时：
    当所述第一控制信号、所述第二控制信号、所述第三控制信号为低电平时，所述第一控制信号、所述第二控制信号、所述第三控制信号有效；
    当所述第一控制信号、所述第二控制信号、所述第三控制信号为高电平时，所述第一控制信号、所述第二控制信号、所述第三控制信号无效。
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