WO2019016266A1 - Procédé de production d'une couche de détention et de barrière sur un substrat et substrat associé - Google Patents

Procédé de production d'une couche de détention et de barrière sur un substrat et substrat associé Download PDF

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Publication number
WO2019016266A1
WO2019016266A1 PCT/EP2018/069506 EP2018069506W WO2019016266A1 WO 2019016266 A1 WO2019016266 A1 WO 2019016266A1 EP 2018069506 W EP2018069506 W EP 2018069506W WO 2019016266 A1 WO2019016266 A1 WO 2019016266A1
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WIPO (PCT)
Prior art keywords
layer
substrate
barrier layer
adhesive
circuit board
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PCT/EP2018/069506
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German (de)
English (en)
Inventor
Rainer FRIEDLEIN
Anne EIBISCH
Hans-Peter Sperlich
Matthias Uhlig
Sebastian GATZ
Original Assignee
Meyer Burger (Germany) Gmbh
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Publication of WO2019016266A1 publication Critical patent/WO2019016266A1/fr

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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/34—Nitrides
    • C23C16/345—Silicon nitride
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/511—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using microwave discharges

Definitions

  • US Pat. No. 6,255,217 B1 discloses a plasma-assisted process for improving the adhesion of an inorganic barrier layer, for example S13N4 or SiC, on a copper-based Connection structure in which the connection structure is exposed to a non-oxidizing Hb and / or N2 and / or N H3 and / or noble gas plasma.
  • an inorganic barrier layer for example S13N4 or SiC
  • a method of coating a copper surface, e.g. B. conductor tracks, on a semiconductor wafer with a CuSi x N y layer is described in US 7 718 548 B2.
  • the object of this method is to prevent the diffusion of copper into the surrounding semiconductor.
  • the method includes pre-treating the wafer with a He plasma to shield carbon-doped dielectric regions of the surface from the coating. This is followed by another pretreatment step with a diluted Nh plasma to remove CuO from the copper surface. Subsequently, the wafer is exposed to silane (SiH 4 ) to form a CuSi x layer on the copper surface. This is followed by another treatment step with a NH3 / N2 plasma to form the CuSixNy layer.
  • Object of the present invention is to propose a method by means of which reliably on a substrate which may not be heated to temperatures above 150 ° C, an adhesive and barrier layer is produced which has an electrical breakdown strength of at least 10 ⁇ / ⁇ even below for several hours exposure to atmospheric moisture, water or aqueous liquids, in particular salt water or special water-based liquids with a pH of between 4 and 9, which contain dissolved substances, such as salts and / or proteins.
  • the inventive method is used to produce an adhesive and barrier layer on a substrate at temperatures 7 ⁇ 150 ° C, that is, the substrate undergoes no heating in the process to temperatures above 150 ° C.
  • the surface of the substrate, which is provided for the production of the adhesive and barrier layer, has both electrically insulating and electrically conductive regions.
  • the adhesion and barrier layer is at least partially, at least on the electrically conductive areas of the surface of the substrate as a dense and at least partially closed, electrically insulating and well-adherent adhesive and barrier layer by means of a PECVD process (PECVD: Plasma Enhanced Chemical Vapor Deposition) deposited with applied substrate bias, wherein the adhesive and barrier layer comprises at least one single layer of hydrogen-poor silicon nitride SiN x H y .
  • PECVD Plasma Enhanced Chemical Vapor Deposition
  • the exact composition is dependent on the process conditions, e.g. As the composition of the precursors, the pressure in the process chamber, the substrate temperature, etc. dependent.
  • the process according to the invention offers a possibility for generating an electrically resistant to electric shock, even under the action of atmospheric moisture, water and aqueous liquids with a pH value between 4 and 9, which contain dissolved substances, such as salts and / or proteins (> 10 ⁇ / ⁇ ) and well-adhering adhesion and barrier layer also on substrates whose surface have pronounced height differences of up to 5000 ⁇ .
  • the electrical breakdown strength is determined under the influence of a liquid known as Artificial Perspiration (AATCC) (Pickering Laboratories, Inc., Mountain View, CA 94043, USA, Product Number: 1700-0015) under normal conditions (room temperature, normal pressure) for a period of time tested for at least 7 hours.
  • AATCC Artificial Perspiration
  • dielectric strength testing was conducted for up to 120 hours.
  • Other suitable test liquids are also known to the person skilled in the art for testing the dielectric strength.
  • the adhesive and barrier layer is produced as a closed layer on the electrically insulating and the electrically conductive regions of the surface of the substrate.
  • the surface of the substrate which is provided for the production of the adhesive and barrier layer preferably also at least partially comprises the side surfaces. It may also be advantageous to also create the adhesive and barrier layer on the back of the substrate, even if the back should not have any electrically conductive areas.
  • the substrate constitutes a single-layer or multilayer printed circuit board populated with electronic and / or micromechanical components, wherein the electrically conductive regions of the surface of the substrate represent contacts, solder joints or conductor tracks, which are preferably metallic or metallized.
  • the circuit board is populated with SM D components.
  • the substrate may, for example, be a printed circuit board in which the printed conductors have solder joints made of a soft solder, usually a tin solder, which besides Sn may also contain, for example, In, Sb, Ag, Bi, Cu, Pb etc., and in which the interconnects between the solder joints with Abdecklack (eg., An epoxy resin) may be covered. Between the solder joints and electronic and / or micromechanical components, such. B. SMD components can be arranged. In this case, the adhesive and barrier layer can be equally produced on the electrically insulated areas of the surface covered with covering lacquer and on the solder joints, that is to say the electrically conductive areas of the surface.
  • the adhesive and barrier layer can also be generated at least partially on the side surfaces and / or the back of the circuit board, at least partially z. B. may consist of glass fiber fabric.
  • the adhesive and barrier layer can also be on the optional existing electronic and / or micromechanical components, eg. B. SMD components, and their contacts extend. Except for the deposition of the adhesive and barrier layer, areas of the printed circuit board that serve to electrically contact the printed circuit board after assembly are, for example, plug connectors.
  • the substrate is preferably a flexible polymer film or a rigid glass substrate which is coated with anode and cathode layers, as well as metal lattices (eg Mo-Al-Mo), transparent conductive oxide layers (TCO: transparent conductive oxide; For example, ITO, ZnO, PEDOT) is coated, wherein, for example, an OLED is formed.
  • anode and cathode layers as well as metal lattices (eg Mo-Al-Mo), transparent conductive oxide layers (TCO: transparent conductive oxide;
  • ITO, ZnO, PEDOT transparent conductive oxide
  • the adhesion and barrier layer in this case can be on the front as well as on the back and side surfaces of the layer stack of cathode, small molecule SM, TCO, metal grid and matrix of the grid both on the electrically insulating areas the surface as well as on the electrically conductive areas of the surface, are generated equally.
  • the method according to the invention is suitable for producing an adhesion and barrier layer on a substrate whose surface has a pronounced topology with a maximum height h, which is to be understood as a height difference between the lowest and the highest points of the surface of the substrate, in the range of 0 to 5000 ⁇ , preferably in the range of 200 to 1000 ⁇ .
  • the substrate is, for example, a printed circuit board
  • the solder joints between 200 to 300 ⁇ m and SMD components can protrude beyond the printed conductors or over the areas of the printed conductors coated with covering paint up to 1000 ⁇ m.
  • the inventive method allows a uniform, dense and closed coating even those surfaces with pronounced topologies with a long-term stable and electrically impact resistant adhesive and barrier layer even in a humid environment.
  • At least one plasma source for the PECVD process is a radio-frequency plasma source or an ICP plasma source or a microwave plasma source, preferably a linear microwave plasma source.
  • z. B. 6 plasma sources preferably several linear microwave plasma sources used.
  • characterized a large-area coating for. B. an area of about 200 mm by 40 mm.
  • an area of 50 cm x 50 cm is coated.
  • a layer growth rate of over 40 nm / min can be achieved.
  • the bias voltage (substrate bias) applied to the substrate is a pulsed DC voltage or an AC voltage.
  • the substrate bias voltage is a pulsed DC voltage or a high-frequency AC voltage, which at the substrate location an electric field strength in the range of 8.5 V / cm to 45 V / cm, preferably between 15 and 20 V / cm, z. B. 17 V / cm generated.
  • the actual substrate bias voltages are in the range of -150 to -600 V, preferably between -250 and -350 V.
  • the indicated field strengths were derived from the substrate biases and geometric quantities of a plasma source of an embodiment without regard to the sign.
  • at least SihU gas and NH 3 gas and / or Isb gas are used as precursors for the PECVD process. Argon can also be added to dilute the precursors.
  • at least SihU gas and NH3 gas are used, wherein the flow rate ratio of Nh gas to SihU gas, for example, between 1, 1 and 1, 4, preferably between 1, 2 and 1, 3, more preferably at 1, 25th ,
  • a further embodiment of the method according to the invention is characterized in that the inventive method is applied until the adhesive and barrier layer has a layer thickness between 150 nm and 1000 nm, and / or in that the substrate during the PECVD process to a maximum Temperature of 150 ° C is heated.
  • the surface of the substrate is exposed to a hydrogen-containing, preferably a hydrogen-containing and additionally nitrogen-containing, plasma with applied substrate prestressing prior to the production of the adhesive and barrier layer.
  • This pretreatment serves to increase the adhesive strength of the adhesive and barrier layer on the substrate surface.
  • the pretreatment is performed so that the hydrogen-containing plasma is an NH 3 or N H 3 / H 2 plasma, and / or such that the applied substrate bias is a pulsed DC voltage or high frequency AC voltage having an electric field strength in the range between 8.5 V / cm to 45 V / cm, preferably between 15 and 20 V / cm, generated, and / or so that the substrate is heated to a maximum temperature of 150 ° C.
  • the applied substrate bias is a pulsed DC voltage or high frequency AC voltage having an electric field strength in the range between 8.5 V / cm to 45 V / cm, preferably between 15 and 20 V / cm, generated, and / or so that the substrate is heated to a maximum temperature of 150 ° C.
  • the inventive method is extended to the effect that a layer system is applied to the surface of the substrate.
  • This layer system comprises at least the adhesion and barrier layer and at least one dense diffusion barrier layer and / or at least one dense, hydrophobic cover layer.
  • each of the functional layers of the layer system can each contain a single layer or a sequence of individual layers.
  • the layer system may contain all functional layers or only the adhesive and barrier layer and the diffusion barrier layer or only the adhesive and barrier layer and the cover layer.
  • the layer system has a high long-term stability against the action of water and aqueous liquids with a pH value between 4 and 9, the dissolved substances, such as salts and / or proteins enthalfen, so that an electrical breakdown strength over IOV / ⁇ over many hours of exposure to at least the above-mentioned liquids is guaranteed
  • the surface of the substrate on which the generation of the layer system is provided preferably also comprises the side surfaces at least in regions.
  • the layer system can additionally be produced on the back side of the substrate.
  • the diffusion barrier layer comprises at least one single layer of SiN x H y or SiO x H y or SiNxOyHz or Al x O y , or a sequence of individual layers of the aforementioned materials, and the at least one single layer or the sequence of monolayers is generated by means of a PECVD process.
  • the exact composition of the materials depends on the PECVD process conditions.
  • the diffusion barrier layer can comprise a single layer of one of the aforementioned materials or a sequence of individual layers of one of the aforementioned materials or a sequence of individual layers of different materials from the group of the aforementioned materials in any combination, for example SiNxHy-SiOxHy-SiNxHy or SiO x H y -SiO x H y -SiN x H y etc.
  • the diffusion barrier layer comprises a sequence of two to ten individual layers, more preferably of six individual layers.
  • At least one plasma source used for the PECVD process for producing the diffusion barrier layer is a radio-frequency plasma source or an ICP plasma source or a microwave plasma source, preferably a linear microwave plasma source.
  • a radio-frequency plasma source or an ICP plasma source or a microwave plasma source preferably a linear microwave plasma source.
  • the plurality of plasma sources may be arranged such that a single layer of the diffusion barrier layer is generated by means of a plurality of plasma sources, and / or the plurality of plasma sources may be arranged such that different individual layers of the diffusion barrier layer are generated by means of multiple plasma sources.
  • At least SihU gas and isobO gas or O 2 gas are used as precursors for the PECVD process for depositing a single layer of SiO x Hy.
  • at least SihU gas and N2O gas are used. Dilution of the process gas with Isb gas and / or Ar gas is possible.
  • optional hb gas can be added. If the diffusion barrier layer contains a single layer of SiN x H y , as described above, SihU gas and NH 3 gas can be used as precursors. Dilution of the process gas with Isb gas and / or Ar gas is possible. Furthermore, optional hb gas can be added.
  • the hydrophobic cover layer comprises at least one single layer of a carbonaceous material.
  • a carbonaceous material Possible materials are organic materials, eg. For example, fluoropolymers, such as PTFE, or inorganic materials, eg. B. carbon-doped silicon nitride SiN: C (carbon doped silicon nitride). Due to its hydrophobicity, the cover layer advantageously contributes to increased long-term stability with respect to the dielectric strength of the layer system under the action of water and aqueous liquids.
  • a single layer of an organic material of the cover layer by means of a plasma polymerization process and / or printing method, for.
  • a plasma polymerization process and / or printing method for.
  • screen printing or ink jet printing, and / or dipping method and / or casting method for.
  • the cover layer comprises at least one single layer of SiN x C y H z , wherein the SiN x C y H z layer is deposited by means of a PECVD process at temperatures below 150 ° C.
  • a plurality of plasma sources are used for the PECVD process for producing the cover layer.
  • the plurality of plasma sources may be arranged to produce a single layer as a cap layer by means of an array of plasma sources, and / or the plurality of plasma sources may be arranged to produce a succession of single layers of the cap layer using disparate arrangements of plasma sources.
  • At least one plasma source for the PECVD process for producing a SiNxCyHz layer is a radio-frequency plasma source or an ICP plasma source or a microwave plasma source, preferably a linear microwave plasma source.
  • the cover layer is applied by means of ink jet printing.
  • This cover layer may be an organic layer, hereinafter referred to as organic coating for planarization (OCP), and may additionally contain gettering materials (G-OCP) to bind incoming water or aqueous liquids and thus enhance the protective effect of the barrier layer extend.
  • OCP organic coating for planarization
  • G-OCP gettering materials
  • an arbitrary sequence of functional layers a., B., C. deposited on the surface of the substrate may contain stacked multilayers of functional layers in any order, e.g. B. a. - b. - c. - a - b. - c. - b. - c. etc., wherein the layer sequence always with a. begins as a first layer on the surface of the substrate.
  • At least one lacquer layer is applied to the adhesion and barrier layer or to the layer system comprising at least one adhesion and barrier layer and at least one diffusion barrier layer and / or at least one cover layer.
  • the term "lacquer layer” also encompasses a single layer or a sequence of several layers of polymers deposited by means of a PECVD process
  • the lacquer layer forms the end of the layer or layers produced on the surface of the substrate
  • the lacquer layer may contain, for example, polyimides.
  • Printing and / or immersion and / or casting and / or spraying methods and / or a PECVD process can be used to apply the lacquer layer increased long-term stability with respect to the dielectric strength of the adhesive and barrier layer or the layer system under the influence of water and water-like liquids.
  • the method according to the invention is on the adhesive and barrier layer or on the layer system of at least one adhesive and barrier layer and at least one diffusion barrier layer, at least one cover layer consisting of several alternating layers of G-OCP and the adhesive and barrier layer SiNH deposited. This is finally followed by a cover layer of OCP without getter material.
  • the object of the invention is furthermore achieved by a substrate having a surface which has electrically insulating and electrically conductive regions, wherein a layer system is arranged at least on the electrically conductive regions of the surface of the substrate
  • At least one dense diffusion barrier layer comprising at least one single layer or a sequence of individual layers and / or
  • At least one dense hydrophobic cover layer comprises at least a single layer.
  • the layer system of a substrate formed according to the invention has an electrical breakdown strength of more than 10 V / ⁇ , even if the substrate is exposed to a bath in water or an aqueous liquid for at least 48 h.
  • the layers of the layer system are at least partially, d. H. at least on the electrically conductive areas of the surface of the substrate, designed as closed layers.
  • the layer system is arranged on both electrically conductive and electrically insulating regions of the surface as a system of closed layers.
  • the layer system comprises in this case
  • At least one dense and closed diffusion barrier layer comprising at least one single layer or a sequence of individual layers and / or
  • At least one dense and closed hydrophobic cover layer of at least one single layer At least one dense and closed hydrophobic cover layer of at least one single layer.
  • the surface of the substrate which is provided for the arrangement of the layer system, preferably also at least partially includes the side surfaces.
  • the back side of the substrate can also be coated with a layer system.
  • its surface on which the layer system is arranged has a topology, which is to be understood as a height difference between the lowest and highest points of the surface of the substrate, with a maximum height h in the range from 0 to 5000 ⁇ m on, preferably in the range of 200 to 1000 m.
  • the diffusion barrier layer comprises at least one single layer of SiNxH y or SiO x H y or SiNxOyHz or Al x O y , or a sequence of individual layers of the aforementioned materials in any combination, the sequence also several may comprise successive single layers of the same material.
  • the cover layer comprises at least one single layer of a carbonaceous material.
  • the cover layer contains at least one single layer of an organic material and / or at least one single layer of SiN x C y H z .
  • a lacquer layer is arranged on the layer system of the substrate according to the invention.
  • the lacquer layer forms the conclusion of the layer system with respect to the environment and advantageously increases the long-term stability of the layer system.
  • the substrate according to the invention is a single-layer or multilayer printed circuit board equipped with electronic components, wherein the electrically conductive regions of the surface of the substrate represent contacts, solder joints or conductor tracks, which are preferably metallic or metallized.
  • the electrically insulating regions of the surface of the substrate may be, for example, the regions between the solder joints of the printed circuit board, which may be coated with a covering paint.
  • the printed circuit board with electronic and / or micromechanical components, particularly preferably with SMD components, equipped.
  • the layer system is arranged at least on the solder side of the printed circuit board.
  • the solder side of the circuit board is the surface or are all surfaces of the circuit board to understand on which the solder joints, z. B. from a soft solder, usually a tin solder, which may contain, in addition to Sn, for example, In, Sb, Ag, Bi, Cu, Pb, etc., are arranged.
  • the solder side can be equipped with SMD components.
  • the layer system is also arranged on the component side and / or the side surfaces, and / or an unassembled rear side as well as edges of the printed circuit board.
  • the edges and side surfaces of the circuit board can at least partially z. B. consist of fiberglass fabric.
  • Under the assembly side is particularly the surface of the circuit board to understand on the wired electronic and / or micromechanical components, optionally also SMD components are arranged.
  • the invention is not limited to the illustrated and described embodiments, but also includes all the same in the context of the invention embodiments. Furthermore, the invention is not limited to the specifically described combinations of features, but may also be defined by any other combination of specific features of all individually disclosed individual features, unless the individual features are mutually exclusive, or a specific combination of individual features is not explicitly excluded.
  • a first embodiment of the method according to the invention involves the production of an adhesive and barrier layer of SiN x H y on the surface of a printed circuit board, wherein the surface of the circuit board contains solder joints and between the solder joints coated with Abdecklack (Lötstopplack).
  • the surface of the circuit board for pretreatment is exposed to an N H3 plasma, wherein to the circuit board a bias in the form of a pulsed DC voltage (reverse pulse duration 1 ⁇ , frequency 350 kHz) with an electric field strength of 17 V. / cm is applied.
  • the printed circuit board is at a temperature of about 100 ° C during the pretreatment, but not greater than 150 ° C, heated.
  • values greater than 1 MPa are achieved.
  • the bias voltage has a height of -300 V.
  • the surface to be coated with the adhesive and barrier layer has dimensions of approximately 200 mm in length and approximately 40 mm in width.
  • the gaseous precursors for the PECVD process are NH3 and SH 4 in a mixing ratio of NH3 to SH 4 1, uses 25th
  • the circuit board is heated to a temperature of about 100 ° C but not greater than 150 ° C during the PECVD process.
  • a substrate bias voltage in the form of a pulsed DC voltage (reversing pulse duration 1 s, frequency 350kHz) in the amount of -300 V, which generates an electric field strength of 17 V / cm, applied.
  • a circuit board treated with the method described in the first embodiment was placed at room temperature in a bath of a test liquid called "artificial perspiration", which besides water may also contain various minerals, proteins and other additives, and electrical electrodes were placed in the test liquid A DC voltage of 5 to 20 V was applied, and an electrical breakdown strength of 50 ⁇ / ⁇ could be measured experimentally for the adhesive and barrier layer on the printed circuit board even after 7 h in the test liquid.
  • the adhesion and barrier layer produced according to the first exemplary embodiment additionally comprises a diffusion barrier layer comprising a total of four individual layers SiNxHy and SiO x H y with a layer thickness of 1170 nm and a hydrophobic cover layer made of SiN x C y H z a layer thickness of about 400 nm, but not greater than 500 nm, deposited by PECVD. It could be shown experimentally for a printed circuit board treated according to the second exemplary embodiment that the required electrical breakdown strength of at least 10 ⁇ / ⁇ was also present after a 120-hour waiting period for a measurement in the test bath filled with artificial perspiration.
  • Figures 1 to 5 show in a schematic, not to scale exemplary embodiments of the inventive method and / or the substrate according to the invention.
  • FIG. 1 shows an exemplary embodiment for producing an adhesive and barrier layer on a substrate.
  • the substrate is a printed circuit board 1 whose Lötrich surface has printed conductors 2, which are provided with solder joints 3 made of a soft solder. Between the solder joints 3, the interconnects 2 with a Abdecklack 4, often an epoxy resin, sealed. Between the highest point of the surface of the solder joints 3 and the highest point of the surface of the Abdecklacks 4 there is a height difference, which may be up to 5000 ⁇ .
  • the adhesion and barrier layer 5 comprises a single layer of SiN x H y .
  • FIG. 2 shows a printed circuit board 1 on whose solder side surface conductor tracks 2 are arranged, which are provided with solder joints 3 made of a soft solder. Between the solder joints 3, the conductor tracks 2 are sealed with a Abdecklack 4.
  • an SMD component 6 is arranged on the solder side of the circuit board 1.
  • a closed adhesive and barrier layer 5 is deposited with a substantially constant layer thickness comprising a single layer of SiNxH y .
  • solder side surface of the printed circuit board V has printed conductors 2 and solder joints 3 the area between the solder joints 3 is sealed with Abdecklack 4.
  • the soldering side surface in this embodiment has no height differences; However, surfaces with topologies of up to 5000 ⁇ m are likewise accessible to the method according to the invention.
  • an adhesive and barrier layer 5 is arranged, comprising a single layer of SiN x H y ; followed by a diffusion barrier layer 7, which comprises 4 individual layers, namely a SiOxH y -Einzel Anlagen 71, two consecutive SiNxHy single layers 72 and another SiO x Hy single layer 71; and a cover 8 as a conclusion to the environment.
  • the cover layer 8 is hydrophobic.
  • the cover layer 8 includes a single layer, for. Example of an organic material or of an inorganic carbonaceous material such as SiN x C y H z .
  • the cover layer 8 can also be arranged below the diffusion barrier layer 7, ie between the adhesion and barrier layer 5 and the diffusion barrier layer 7.
  • FIG. 4 shows a similar exemplary embodiment as FIG. 3, wherein the diffusion barrier layer 7 in FIG. 4 comprises alternating SiO x Hy single layers 71 and SiN x Hy single layers 72.
  • a single layer of a lacquer layer 9 is applied, which may also be a single layer of a PECVD deposited polymer applied, which seals the layer system from the environment.
  • FIG. 5 shows a detail of a printed circuit board 1 'with a layer system 10 produced by means of the method according to the invention, which comprises multilayer layers of diffusion barrier layers 7, 7' and cover layers 8, 8 'stacked next to the adhesion and barrier layer 5.
  • the Lötrich- surface of the circuit board 1 ' has interconnects 2 and solder joints 3, wherein the area between the solder joints 3 is sealed with Abdecklack 4.
  • a layer system 10 which contains the following functional layers, generated in the sequence listed, starting on the solder side surface: an adhesive and barrier layer 5 comprising a single layer of SiN x H y ;
  • a first diffusion barrier layer 7 comprising two SiO x Hy monolayers 71 and two
  • a first cover layer 8 comprising a single layer of SiN x C y H z ;
  • a second diffusion barrier layer 7 ' comprising a SiO x H y single layer 71', a
  • a second cover layer 8 comprising a single layer of a hydrophobic carbonaceous, inorganic or organic material.
  • FIG. 6 shows a detail of a printed circuit board 1 'with a layer system 10 produced by the method according to the invention as in FIG. 5, wherein the layer system 10 not only on the solder side and the side surfaces (not shown) of the circuit board 1', but also on the Rear side of the circuit board 1 'is arranged.
  • the method according to the invention can first be used to coat the solder side of the printed circuit board 1 ', wherein the side surfaces of the printed circuit board 1' are also coated. Subsequently, the circuit board 1 'is rotated, so that in a repeated application of the method according to the invention, the coating of the back is done.
  • the layer systems 10 on the solder side and on the back side of the printed circuit board 1 'can each contain the same sequence of functional layers and / or individual layers, as shown in FIG. However, the sequence of the functional layers and / or the individual layers in the layer systems on the solder side and on the back side of the circuit board 1 'can also be different.

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
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  • Inorganic Chemistry (AREA)
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  • Non-Metallic Protective Coatings For Printed Circuits (AREA)

Abstract

L'invention concerne un procédé de production d'une couche de détention et de barrière (5) résistant électriquement à la pénétration sur un substrat (1) dont la surface comporte des zones électriquement isolantes (4, 11) et des zones électriquement conductrices (3). La couche de détention et de barrière (5) dense, électriquement isolante, à bonne adhésion comprend au moins une couche individuelle éloignée en SiNxHy au moyen d'un processus de DCVPE lors de la réalisation de la précontrainte du substrat. L'invention concerne en outre un substrat (1'), un système de couche étant agencé au moins sur les zones électriquement conductrices (3) de sa surface, comprenant une couche de détention et de barrière (5) et une couche de barrière de diffusion (7, 7') et/ou une couche de couvercle (8, 8') hydrophobe. Le procédé convient particulièrement à la protection de porte-composants électroniques, en particulier des cartes de circuits imprimés ou des afficheurs et DELO flexibles, contre des influences environnementales néfastes, par ex. sous l'action de liquides aqueux ou de l'humidité de l'air. Il est approprié à l'application sur des substrats de grande aire à la topologie marquée. Le substrat selon l'invention présente une résistance électrique à la pénétration élevée même sous l'action de liquides aqueux ou de l'humidité de l'air.
PCT/EP2018/069506 2017-07-18 2018-07-18 Procédé de production d'une couche de détention et de barrière sur un substrat et substrat associé WO2019016266A1 (fr)

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DE102017212272.2 2017-07-18
DE102017212272.2A DE102017212272A1 (de) 2017-07-18 2017-07-18 Verfahren zur Erzeugung einer Haft- und Barriereschicht auf einem Substrat und zugehöriges Substrat

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WO2019016266A1 true WO2019016266A1 (fr) 2019-01-24

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