WO2018068540A1 - 基于重叠复用的调制解调方法和装置 - Google Patents
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- H04L1/00—Arrangements for detecting or preventing errors in the information received
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- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
- H03M13/2909—Product codes
- H03M13/2915—Product codes with an error detection code in one dimension
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- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
- H03M13/2927—Decoding strategies
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- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
- H04L1/0052—Realisations of complexity reduction techniques, e.g. pipelining or use of look-up tables
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
- H03M13/098—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit using single parity bit
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
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- H—ELECTRICITY
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- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/22—Arrangements affording multiple use of the transmission path using time-division multiplexing
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/22—Arrangements affording multiple use of the transmission path using time-division multiplexing
- H04L5/26—Arrangements affording multiple use of the transmission path using time-division multiplexing combined with the use of different frequencies
Definitions
- the present application relates to the field of communications, and in particular, to a modulation and demodulation method and apparatus based on overlapping multiplexing.
- the modulation and demodulation technology based on Overlapped X Division Multiplexing includes various implementation schemes, such as modulation and demodulation based on Overlapped Time Division Multiplexing (OvTDM), based on overlapping frequency division multiplexing.
- OFDM Overlapped Frequency Division Multiplexing
- OvCDM Overlapped Code Division Multiplexing
- OFDM Overlapped Space Division Multiplexing
- OFSDM Overlapped Space Division Multiplexing
- X represents an arbitrary domain, such as time T, space S, frequency F, code division C, mixed H, and the like.
- OvTDM optical network management
- Time Division Multiplexing is a technique for sharing a plurality of signal symbols occupying a narrow time duration in digital communication for a wide time duration.
- FIG. 1 it is a schematic diagram of a conventional time division multiplexing technique.
- the time durations of each multiplexed signal symbol in Figure 1 are T1, T2, T3, T4, ..., respectively, which are generally required to occupy the same time slot width in engineering.
- ⁇ T is the minimum guard slot, and the actual guard slot width should be a bit more.
- ⁇ T should be greater than the transition time width of the demultiplexed gate used plus the maximum amount of time jitter of the system. This is the most common time division multiplexing technique. Most of the existing multi-channel digital broadcasting systems and multi-channel digital communication systems use this technology.
- the most important feature of this technology when applied to digital communication is that the multiplexed signal symbols are completely isolated from each other in time, and there is never mutual interference. There is no restriction on the multiplexed signal symbols, and the symbols of the respective signals.
- the duration (slot width) can have different widths, and can also be applied to different communication systems, as long as their time slots do not overlap each other, and thus are most widely used. But with this multiplexing, multiplexing itself has no effect on improving the spectral efficiency of the system.
- the conventional view is that adjacent channels do not overlap in the time domain to avoid interference between adjacent channels, but this technique restricts the improvement of spectral efficiency.
- the prior art time division multiplexing technology has the view that the channels do not need to be isolated from each other, and can have strong mutual overlap, as shown in FIG.
- the overlap between channels is regarded as a new coding constraint relationship, and corresponding modulation and demodulation techniques are proposed according to the constraint relationship, so it is called overlapping time division multiplexing (OvTDM: Overlapped Time Division). Multiplexing), this technique increases the spectral efficiency proportionally to the number of overlaps K.
- the overlapping time division multiplexing system includes a signal transmitter A01 and a receiver A02.
- Transmitter A01 includes overlapping time division multiplexing modulation device 101 and transmitting device 102.
- the overlapping time division multiplexing modulation device 101 is configured to generate a complex modulation envelope waveform carrying an input signal sequence; the transmitting device 102 is configured to transmit the complex modulation envelope waveform to the receiver A02.
- the receiver A02 includes a receiving device 201 and a sequence detecting device 202.
- the receiving device 201 is configured to receive a complex modulation envelope waveform transmitted by the transmitting device 102.
- the sequence detecting device 202 is configured to perform time series data sequence detection on the received complex modulation envelope waveform for decision output.
- receiver A02 also includes pre-processing means 203 disposed between receiving means 201 and sequence detecting means 202 for assisting in the formation of a sequence of synchronous received digital signals within each frame.
- the input digital signal sequence forms a plurality of transmission signals in which the plurality of symbols overlap each other in the time domain by the overlapping time division multiplexing modulation means 101, and the transmission signal is transmitted from the transmitting means 102 to the receiver A02.
- the receiving device 201 of the receiver A02 receives the signal transmitted by the transmitting device 102, and forms a digital signal suitable for the sequence detecting device 202 to detect and receive through the pre-processing device 203.
- the sequence detecting device 202 performs the data sequence detection in the time domain of the received signal, thereby outputting judgment.
- the overlapping time division multiplexing modulation device 101 includes a waveform generation module 301, a shift module 302, a multiplication module 303, and a superposition module 304.
- the waveform generation module 301 is configured to generate an initial envelope waveform of the waveform smoothing in the time domain according to the design parameters.
- the shifting module 302 is configured to shift the initial envelope waveform by a predetermined shift interval in the time domain according to the number of overlapping multiplexing to obtain a shift envelope waveform of each fixed interval.
- Modulation module 305 is operative to convert the input digital signal sequence into a sequence of signal symbols represented by positive and negative signs.
- the multiplication module 303 is configured to multiply the sequence of signal symbols by the shifted envelope waveforms of each fixed interval after the offset to obtain respective modulation envelope waveforms.
- the superposition module 304 is configured to superimpose each modulation envelope waveform in the time domain to obtain a complex modulation envelope waveform carrying the input signal sequence.
- FIG. 5 is a block diagram of the pre-processing apparatus 203 of the receiver A02.
- the pre-processing device 203 includes a synchronizer 501, a channel estimator 502, and a digitizer 503.
- the synchronizer 501 forms symbol time synchronization in the receiver for the received signal; the channel estimator 502 then estimates the channel parameters; the digitizer 503 digitizes the received signal in each frame to form a suitable sequence detecting device. The sequence detects the received digital signal sequence.
- FIG. 6 is a block diagram of the sequence detecting device 202 of the receiver A02.
- the sequence detecting means 202 includes an analyzing unit memory 601, a comparator 602 and a plurality of reserved path memories 603 and an Euclidean distance memory 604 or a weighted Euclidean distance memory (not shown).
- the analysis unit memory 601 makes a complex convolutional coding model and a trellis diagram of the overlapping time division multiplexing system, and lists all states of the overlapping time division multiplexing system, and stores them; and the comparator 602 according to the analysis unit memory 601
- the trellis diagram in the search for the path of the minimum Euclidean distance or the weighted minimum Euclidean distance of the received digital signal; and the reserved path memory 603 and the Euclidean distance memory 604 or the weighted Euclidean distance memory are used to store the comparator 602, respectively.
- the reserved path and Euclidean distance or weighted Euclidean distance of the output need to be prepared for each of the stable states.
- the length of the reserved path memory 603 may preferably be 4K to 5K.
- the Euclidean distance memory 604 or the weighted Euclidean distance memory preferably stores only relative distances.
- the signal transmitter modulates the signal and transmits it to the signal receiver, which receives the modulated signal and demodulates it.
- the demodulation process includes a decoding step (i.e., a sequence detection step performed by the sequence detecting device described above).
- the Chase algorithm is mostly used for decoding, and the algorithm involves a large number of sorting operations, and the calculation amount is very large.
- the present application provides a modulation and demodulation method and apparatus based on overlapping multiplexing, which solves the problem that most of the conventional decoding uses the Chase algorithm for decoding, and the algorithm process involves a large number of sorting operations, and the computational complexity is high.
- the present application provides a modulation method based on overlapping multiplexing, including:
- the encoded signal is transmitted.
- the present application further provides a demodulation method based on overlapping multiplexing, including:
- the decoded result is output.
- the present application further provides a modulation apparatus based on overlapping multiplexing, including:
- An input information obtaining module configured to obtain input information
- parity product code encoding module for performing parity product code encoding on the input information
- An overlap multiplexing modulation coding module configured to perform overlapping multiplexing modulation coding
- a signal transmitting module for transmitting the encoded signal.
- the parity product code encoding module comprises:
- a row coding unit for performing row coding on the information bits; specifically, the row coding unit is configured to perform the result that the k r +1 bit information of each row is the result of the first k c column modulo addition of the current row. coding;
- Column encoding means for information bit column is encoded; Specifically, the coding section for performing the column with the first row of each column k c + 1 information bit k r is a front two rows mold the addition result of the current column coding;
- a factor graph generating unit is configured to generate a factor graph according to the encoding rule according to the encoded result.
- the coding structure is a diagonal coding structure, a two-dimensional coding structure, a three-dimensional coding structure or a four-dimensional coding structure.
- the present application further provides a demodulation apparatus based on overlapping multiplexing, including:
- An input signal acquisition module for acquiring an input signal
- An overlap multiplexing demodulation decoding module configured to perform overlap multiplexing demodulation decoding on the input signal
- a factor graph belief propagation decoding module for performing factor graph belief propagation decoding
- the decoding result output module is configured to output the decoding result.
- the factor graph belief propagation decoding module comprises:
- An initial log likelihood ratio calculation unit for calculating an initial log likelihood ratio
- the maximum number of iterations setting unit is used to set the maximum number of iterations
- a verification information update unit configured to calculate a verification node, and update the verification information
- An information message update unit for calculating a variable node and updating an information message
- a log likelihood ratio updating unit for calculating a log likelihood ratio value in a case where all information bits are related to the check node providing information
- the decoding result output unit is configured to output a decoding result after satisfying a certain preset condition.
- the verification information update unit is configured to adopt a formula Calculating a check node and updating the check information; wherein ⁇ ij is check information, indicating a log likelihood ratio value in the case where other variable nodes provide information except the jth variable node; ⁇ j'i is an information message , indicating the log likelihood ratio value in the case where the other check nodes provide information except the i-th check node; N(i) is the local symbol information set of the check node constraint; N(i) ⁇ j represents N (i) does not contain a subset of the jth variable node; ⁇ is a multiplication operation;
- the preset condition is that the maximum number of iterations is reached.
- the information message update unit is configured to adopt a formula Calculate variable nodes and update information messages
- Log likelihood ratio update unit is used to adopt the formula Calculating a log likelihood ratio value in the case where all information bits are related to the check node providing information
- x j is the transmitted codeword in the transmitter transmit signal
- y j is the received codeword in the input signal received by the receiver
- M(j) is the check set in which the variable node participates, M(j) ⁇ i denotes that M(j) does not include a subset of the i-th check node
- ⁇ i'j is check information indicating a log likelihood ratio value in the case where other variable nodes provide information other than the j-th variable node
- Lrr(x j ) is a log likelihood ratio representation of the channel information initially received by the receiver
- ⁇ ji is an information message indicating a logarithm in the case where the other check nodes provide information other than the i-th check node
- ⁇ j represents a log likelihood ratio value in the case where all information bits are associated with the check node providing information.
- the modulation multiplexing method and apparatus based on overlap multiplexing provided by the present application
- a precoding structure is adopted, and the transmitting end performs parity check product code encoding on the input information sequence, and generates the encoded result according to the encoding rule.
- the factor map is further subjected to overlapping multiplexing modulation coding, and the encoded signal is transmitted through the antenna.
- the demodulation method the signal is transmitted through the channel, and after receiving the signal through the antenna, the receiving end first performs digital signal processing, including synchronization, equalization, etc., and then performs overlapping multiplexing demodulation and decoding, and finally decodes the decoded signal.
- the result is a factor graph belief propagation decoding, and finally the decoded sequence is obtained.
- Column. the product code decoding method is adopted, and the parity code is used as a subcode, and the belief propagation concept of the factor graph is used for the decoding end.
- the parity product code is adopted, the structure is simple, and the factor graph method is adopted in the decoding process, so that the operation complexity is reduced.
- 1 is a schematic diagram of a conventional time division multiplexing technique
- 2 is a schematic diagram of the principle of overlapping time division multiplexing
- FIG. 3 is a schematic structural diagram of an overlapping time division multiplexing system
- FIG. 4 is a schematic structural diagram of an overlapping time division multiplexing modulation apparatus
- FIG. 5 is a schematic structural diagram of a receiver preprocessing apparatus
- FIG. 6 is a schematic structural diagram of a receiver sequence detecting device
- FIG. 7 is a structural diagram of a parity product code in an embodiment of the present application.
- Figure 8 is a bidirectional transfer factor diagram of an embodiment of the present application.
- FIG. 9 is a schematic diagram of correspondence between a parity product code matrix and a factor graph in an embodiment of the present application.
- FIG. 10 is a block diagram of a transmitting end of a precoding OvXDM system in an embodiment of the present application
- FIG. 11 is a schematic flowchart of a modulation method based on overlapping multiplexing according to an embodiment of the present application.
- FIG. 12 is a schematic flowchart of a parity product coding step in a modulation method based on overlapping multiplexing according to an embodiment of the present application
- FIG. 13 is a schematic flowchart of an overlapping multiplexing modulation and coding step in a modulation method based on overlapping multiplexing according to an embodiment of the present application;
- 15 is a schematic diagram showing the principle of a symbol superposition process of a K-way waveform
- 16 is a schematic flowchart of a demodulation method based on overlapping multiplexing according to an embodiment of the present application
- FIG. 17 is a schematic flowchart of a decoding step in a demodulation method based on overlapping time division multiplexing according to an embodiment of the present application
- Figure 19 is a node state transition diagram
- FIG. 21 is a schematic flowchart of a factor graph propagation and decoding step in a demodulation method based on overlapping multiplexing according to an embodiment of the present application
- FIG. 22 is a schematic block diagram of a modulation apparatus based on overlapping multiplexing according to an embodiment of the present application.
- FIG. 23 is a parity code product code in a modulation apparatus based on overlapping multiplexing according to an embodiment of the present application.
- 24 is a schematic block diagram of a demodulation device based on overlapping multiplexing according to an embodiment of the present application
- FIG. 25 is a schematic diagram of a unit of a factor graph belief propagation decoding module in a demodulation apparatus based on overlapping multiplexing according to an embodiment of the present application.
- X represents an arbitrary domain, such as time T, space S, frequency F, code division C, hybrid H, and the like.
- OvTDM overlapping time division multiplexing
- OFDM overlapping frequency division multiplexing
- the signal transmitter modulates the signal and transmits it to the signal receiver, which receives the modulated signal and demodulates it.
- a decoding step is included in the demodulation process.
- those skilled in the art adopt the traditional decoding method.
- the Chase algorithm is mostly used, and the algorithm involves a large number of sorting operations, and the calculation amount is very large.
- the simple OvXDM (X stands for time T, frequency F, space S, code domain C or mixed H, etc.) system completes the waveform decoding at the receiving end, and the whole process ends.
- OvXDM the OvXDM system will be combined with common traditional communication technologies to improve the overall system performance, such as cascading OvXDM systems, pre-encoded OvXDM systems, and so on.
- the error correction code generally has better error correction capability, which can improve the performance of the overall system and reduce the bit error rate, so most of the error correction codes will be applied to the OvXDM system.
- the product code is a block-shaped error correction code, which introduces the idea of iteration at the decoding end, which constitutes the more popular Turbo product code, which is TPC code.
- TPC code which is the more popular Turbo product code.
- Such code has in today's communication system. Very wide range of applications. In the traditional communication system, the Chase algorithm is mostly used for decoding, and the algorithm involves a large number of sorting operations, and the calculation amount is very large.
- the product code proposed in the present application uses a very simple parity code as a subcode, which can be very flexible and convenient for code length control and adaptation.
- an iterative decoding method based on the belief propagation of the factor graph is adopted, which is flexible and simple.
- the present application introduces a decoding method of a parity product code based on a decoding idea of belief propagation of a factor graph.
- Error correction codes include a product code (Turbo Product Code, TPC code) and a low density parity check code (LDPC code).
- TPC code Tribo Product Code
- LDPC code low density parity check code
- This application takes a parity product code as an example, and its coding structure is as shown in the figure. As shown in Fig. 7, the coding structure is very simple, the row and subcodes can be selected with the same code length, or different code lengths can be selected, the structure is flexible and simple, and the code rate is easier to adjust.
- the factor map obtained under this coding is easier to obtain the factor map obtained under this coding, as shown in FIG.
- the node shown at the bottom of the figure is a variable node, and the number is the code length in the coding matrix block, and the node shown at the top of the figure is the check node, and the number is the length of the check bit.
- the relationship between the corresponding coding matrix and the bidirectional factor graph is as shown in FIG. 9. It can be found in the correlation factor graph constructed by the parity product code that the factor graph has a large girth. It is also more suitable for decoding methods of belief propagation. When performing belief propagation decoding, the message can be propagated through operations in the logarithmic domain.
- the input information sequence is x
- k c 10
- k r 10
- the number of overlaps K 5
- the Chebyshev window is used as the multiplexing waveform.
- the modulation mode is BPSK
- the precoding uses the TPC error correction code as an example.
- the system process is as follows: the transmitting end performs TPC encoding on the input information sequence, then performs OvXDM encoding, and transmits the encoded signal through the antenna.
- the signal is transmitted through the channel, and after receiving the signal through the antenna, the receiving end performs digital signal processing, including synchronization, equalization, etc., and then performs OvXDM decoding, and finally decodes the decoded result through TPC, that is, uses the present
- the applied factor graph belief propagation decoding method finally obtains the decoded sequence as x'.
- OvXDM (X stands for time T, frequency F, space S, code domain C or mixed H, etc.) decoding includes maximum likelihood sequence decoding algorithms such as Viterbi decoding, maximum a posteriori probability algorithm such as BCJR algorithm, MAP algorithm , Log_MAP algorithm, etc.
- maximum likelihood sequence decoding algorithms such as Viterbi decoding, maximum a posteriori probability algorithm such as BCJR algorithm, MAP algorithm , Log_MAP algorithm, etc.
- BCJR algorithm maximum a posteriori probability algorithm
- MAP algorithm maximum a posteriori probability algorithm
- Log_MAP algorithm Log_MAP algorithm
- x j is a transmission code word
- y j is a reception code word
- N(i) A set of local symbol information for which the node constraint is checked. N(i) ⁇ j indicates that N(i) does not contain a subset of the jth variable node.
- M(j) The check set to which the variable node participates. M(j) ⁇ i indicates that M(j) does not contain a subset of the i-th check node.
- Lrr(x j ) A log likelihood ratio representation of the channel information initially received.
- ⁇ ji Information message indicating the log likelihood ratio value in the case where the other check nodes provide information other than the i-th check node.
- ⁇ j Information message indicating a log likelihood ratio value in the case where the check nodes associated with all information bits provide information.
- ⁇ ij check information indicating a log likelihood ratio value in the case where other variable nodes provide information other than the jth variable node.
- this embodiment provides a modulation method based on overlapping multiplexing, including the following steps:
- Step 1.1 Get the input information.
- the input information is the sequence of signal digits entered in Figure 4.
- Step 1.2 Perform parity check product code encoding on the input information.
- Step 1.3 Perform overlapping multiplexing modulation coding
- Step 1.4 The encoded signal is transmitted, that is, the complex modulation envelope waveform generated in FIG. 4 is transmitted as a transmission signal to the receiving end.
- step 1.2 includes the following sub-steps:
- Sub-step 1-1 The input information is filled in the information bits of the coding structure.
- the coding structure may be a diagonal coding structure, a two-dimensional coding structure, a three-dimensional coding structure, a four-dimensional coding structure or a higher-dimensional coding structure.
- a two-dimensional coding structure is taken as an example for description.
- the input information sequence is written into the corresponding information bits in a two-dimensional structure of k c ⁇ k r .
- k r represents the number of rows
- k c represents the number of columns.
- Sub-step 1-2 Row encoding the information in the information bits.
- the k r +1 bit information of each row is the result of the modulo two addition of the first k c column of the current row.
- Sub-step 1-3 Column coding the information in the information bits.
- each column of k c +1 bit information is the result of two plus k r rows before the current column is the column mode coding.
- the code rate of the TPC is In this embodiment, it is 0.8264.
- Sub-steps 1-4 The encoded result is generated according to the encoding rule.
- step 1.3 includes the following substeps:
- Sub-step 2.1 Generate an initial envelope waveform h(t) in the time domain based on the design parameters.
- the user can input the design parameters to achieve flexible configuration according to system performance indicators in the actual system.
- the design parameters include the window length L of the initial envelope waveform, such as when the initial envelope waveform is a Bartlett envelope waveform.
- the design parameters include the window length L of the initial envelope waveform and the sidelobe attenuation r, such as when the initial envelope waveform is a Chebyshev envelope waveform.
- the design parameters can be determined according to the characteristics of the corresponding initial envelope waveform.
- Sub-step 2.2 The initial envelope waveform is shifted according to the predetermined shift interval in the corresponding domain (in the present embodiment, the time domain) according to the number of overlap multiplexing K to obtain the shift envelope waveform h of each fixed interval. (ti* ⁇ T).
- the shift interval is a time interval ⁇ T
- the symbol width of the signal is ⁇ T.
- Sub-step 2.3 Convert the sequence of signal numbers obtained after encoding in step 1.2 into a sequence of signal symbols represented by positive and negative signs.
- 0 in the digital signal sequence is converted to +A
- 1 is converted to -A
- A is a non-zero arbitrary number to obtain a sequence of positive and negative symbols.
- A is 1, the input ⁇ 0, 1 ⁇ bit sequence is converted into a ⁇ +1, -1 ⁇ symbol sequence by BPSK (Binary Phase Shift Keying) modulation.
- BPSK Binary Phase Shift Keying
- Sub-step 2.5 superimposing each modulation envelope waveform x i h(ti* ⁇ T) in the corresponding domain (in the present embodiment, the time domain) to obtain a complex modulation envelope waveform carrying the input signal sequence, that is, transmitting signal of.
- the signal sent can be expressed as follows:
- step 1.4 the encoded signal is transmitted, that is, the obtained complex modulation envelope waveform is transmitted as a transmission signal.
- the superimposed output symbol (output signal symbol sequence) is: s(t) ⁇ ⁇ +1+2+1-1-3-1-1+ 1 ⁇ .
- FIG. 14 is a schematic diagram of the principle of K-way waveform multiplexing, which has a parallelogram shape.
- Each row represents a waveform to be transmitted x i h(ti* ⁇ T) obtained by multiplying a symbol x i to be transmitted with an envelope waveform h (ti* ⁇ T) at a corresponding time.
- a 0 to a k-1 represent coefficient values of each part obtained by K-segmentation of each window function waveform (envelope waveform), specifically, coefficients regarding amplitude values.
- FIG. 15 is a schematic diagram showing the principle of the symbol superposition process of the K-way waveform. In the superimposition process of Fig.
- the third digit on the left side of the first row indicates the first input symbol +1
- the third digit on the left of the second row indicates the second input symbol +1
- the third digit on the left of the third row indicates the third input.
- Symbol-1 the middle 3 digits of the 1st line represent the 4th input symbol -1
- the middle 3 digits of the 2nd row represent the 5th input symbol -1
- the 3rd row of the 3rd row represents the 6th input symbol + 1.
- the third number on the right side of the first line indicates the seventh input symbol -1
- the third number on the right side of the second line indicates the eighth input symbol +1. Therefore, after the three waveforms are superimposed, the resulting output symbol is ⁇ +1+2+1-1-3-1-1+1 ⁇ .
- step 1.3 the overlapping multiplexing modulation coding may be performed in addition to the above method, and any feasible method in the prior art may be adopted.
- the embodiment Based on the multiplexing multiplexing based modulation method provided by the foregoing embodiment 1, the embodiment provides a demodulation method based on overlapping multiplexing.
- the demodulation method based on overlapping multiplexing includes the following steps:
- Step 3.1 Obtain the input signal.
- the input signal is the complex modulation envelope waveform signal transmitted in Figure 4.
- Step 3.2 Perform overlapping multiplexing demodulation decoding on the input signal.
- Step 3.3 Perform a factor graph belief propagation decoding.
- Step 3.4 Output the decoded result.
- step 3.2 specifically includes the following sub-steps:
- the received signal is synchronized, including carrier synchronization, frame synchronization, symbol time synchronization, and the like.
- the received signal in each frame is digitized.
- FIG. 18 is the node state transition diagram.
- Viterbi decoding is the most widely used method in convolutional codes. Its basic idea is to traverse all the paths in the Trellis graph. By comparing the multiple branches arriving at each state during the state transition of the Trellis graph, it is correct. The distance of the path, only the path with the smallest distance is retained, and the estimation of the correct path is obtained by comparison and screening, and decoding is realized.
- step 3.2 may adopt the above method, or may Other possible methods in the prior art are employed.
- step 3.3 includes the following sub-steps:
- Sub-step 3-1 Calculate the initial log likelihood ratio.
- the log likelihood ratio result is generally related to the modulation method, the decoding method of the OvXDM system (ie, the overlap multiplexing demodulation decoding method), and the final purpose is to extract the soft value.
- Sub-step 3-2 Set the maximum number of iterations.
- the number of iterations is set to 50, and the number of iterations is larger, and the final decoding sequence is closer to the theoretical sequence, but if it is too large, the complexity of the algorithm is also increased.
- Sub-step 3-3 Calculate the check node and update the check information.
- Sub-step 3-4 Calculate the variable node and update the information message.
- Update information messages for each row and column.
- Sub-steps 3-5 Calculate the log likelihood ratio value ⁇ j in the case where all information bits are associated with the check node providing information.
- Sub-step 3-6 The decision is made.
- the embodiment adopts a hard decision method and adopts a BPSK modulation mode, and assumes that the corresponding modulation mapping here is 1->-1, 0->+1, that is,
- Sub-step 3-7 After a certain preset condition is met, the decoding result is output.
- the preset condition is that the maximum number of iterations is reached.
- the embodiment based on the multiplexing multiplexing based modulation method provided in Embodiment 1, the embodiment provides a modulation apparatus based on overlapping multiplexing, which includes an input information acquiring module A11 and a parity product code encoding module A12. And multiplexing the modulation and coding module A13 and the signal transmission module A14.
- the input information acquisition module A11 is used to acquire input information.
- the parity product code encoding module A12 is configured to perform parity product code encoding on the input information.
- the overlap multiplexed modulation and coding module A13 is used to perform overlap multiplexed modulation coding.
- the signal transmitting module A14 is configured to transmit the encoded signal.
- the parity product code encoding module A12 includes an information bit filling unit A21, a row encoding unit A22, a column encoding unit A23, and a factor graph generating unit A24.
- the information bit filling unit A21 is for filling the input information into the information bits of the encoding structure.
- the coding structure may be a diagonal coding structure, a two-dimensional coding structure, a three-dimensional coding structure, a four-dimensional coding structure or a higher-dimensional coding structure.
- a two-dimensional coding structure is taken as an example for description.
- k r represents the number of rows, and k c represents the number of columns.
- the row coding unit A22 is configured to perform row coding on the information bits in the information bits. Specifically, the row coding unit is configured to perform the result that the k r +1 bit information of each row is the result of the first k c column modulo addition of the current row. coding.
- Column A23 encoding unit for information bit column is encoded; Specifically, in the first column of a coding unit for each column c +1 k-bit information is added to the results of the previous two rows k R & lt current column is the column mold coding.
- the factor map generation unit A24 is configured to generate a factor map according to the encoding rule.
- the modulation apparatus based on the overlap multiplexing provided in this embodiment corresponds to the modulation method based on the overlap multiplexing provided in the first embodiment, and therefore, the principle is not described herein again.
- the embodiment provides a demodulation device based on overlapping multiplexing, including an input signal acquisition module B11, and an overlay multiplexing demodulation translation.
- the input signal acquisition module B11 is for acquiring an input signal.
- the multiplex demodulation decoding module B12 is configured to perform multiplex multiplexing demodulation decoding on the input signal.
- the factor map belief propagation decoding module B13 is used for performing factor graph belief propagation decoding.
- the decoding result output module B14 is for outputting the decoding result.
- the factor graph belief propagation decoding module B13 includes an initial log likelihood ratio calculating unit B21, a maximum iteration number setting unit B22, a check information updating unit B23, an information message updating unit B24, and a pair.
- the initial log likelihood ratio calculation unit B21 is used to calculate an initial log likelihood ratio.
- the maximum number of iterations setting unit B22 is used to set the maximum number of iterations.
- the check information update unit B23 is for calculating the check node and updating the check information.
- the information message updating unit B24 is used to calculate a variable node and update the information message.
- the log likelihood ratio updating unit B25 is used to calculate a log likelihood ratio value in the case where the check node providing information related to all the information bits is calculated.
- Decision unit B26 is used to make the decision.
- the decoding result output unit B27 is configured to output a decoding result after satisfying a certain preset condition.
- the preset condition may be that the maximum number of iterations is reached.
- the embodiment adopts a hard decision method and adopts a BPSK modulation mode, and assumes that the corresponding modulation mapping here is 1->-1, 0->+1, that is,
- the verification information updating unit B23 is used to adopt a formula. Calculating a check node and updating the check information; wherein ⁇ ij is check information, indicating a log likelihood ratio value in the case where other variable nodes provide information except the jth variable node; ⁇ j'i is an information message , indicating the log likelihood ratio value in the case where the other check nodes provide information except the i-th check node; N(i) is the local symbol information set of the check node constraint; N(i) ⁇ j represents N (i) does not contain a subset of the jth variable node; ⁇ is a multiplication operation.
- Information message update unit B24 is used to adopt the formula Calculate the variable node and update the information message.
- Log likelihood ratio updating unit B25 is used to adopt a formula A log likelihood ratio value in the case where all information bits are associated with the check node providing information is calculated.
- x j is the transmitted codeword in the transmitter transmit signal
- y j is the received codeword in the input signal received by the receiver
- M(j) is the check set in which the variable node participates, M(j) ⁇ i denotes that M(j) does not include a subset of the i-th check node
- ⁇ i'j is check information indicating a log likelihood ratio value in the case where other variable nodes provide information other than the j-th variable node
- Lrr(x j ) is a log likelihood ratio representation of the channel information initially received by the receiver
- ⁇ ji is an information message indicating a logarithm in the case where the other check nodes provide information other than the i-th check node
- ⁇ j represents a log likelihood ratio value in the case where all information bits are associated with the check node providing information.
- the demodulation device based on the overlap multiplexing provided in this embodiment corresponds to the demodulation method based on the overlap multiplexing provided in the second embodiment. Therefore, the principle is not described herein again.
- the transmitting end first performs parity check product code encoding on the input information sequence, and then performs overlapping multiplexing modulation coding.
- the encoded signal is transmitted through the antenna.
- Demodulation method, signal After channel transmission, the receiving end receives the signal through the antenna, first performs digital signal processing, including synchronization, equalization, etc., and then performs overlapping multiplexing demodulation and decoding, and finally performs the factor graph belief propagation on the decoded result. Decoding, and finally the decoded sequence is obtained.
- the product code decoding method is adopted, and the parity code is used as a subcode, and the belief propagation concept of the factor graph is used for the decoding end.
- the parity product code is adopted, the structure is simple, and the factor graph method is adopted in the decoding process, so that the operation complexity is reduced.
- the method and apparatus for multiplexing and demodulating based on overlapping multiplexing can be applied to mobile communications, satellite communications, microwave line-of-sight communications, scatter communications, atmospheric optical communications, infrared communications, underwater acoustic communications, and the like.
- a wireless communication system it can be applied to both large-capacity wireless transmissions and small-capacity lightweight radio systems.
- the program may be stored in a computer readable storage medium, and the storage medium may include: a read only memory. Random access memory, disk or optical disk, etc.
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Abstract
Description
Claims (10)
- 一种基于重叠复用的调制方法,其特征在于,包括:获取输入信息;对输入信息进行奇偶校验乘积码编码,生成因子图;进行重叠复用调制编码;将编码后的信号发射出去。
- 如权利要求1所述的方法,其特征在于,对输入信息进行奇偶校验乘积码编码,包括:将输入信息填入编码结构的信息位内;对信息位中的信息进行行编码;对信息位中的信息进行列编码;将编码后的结果按照编码规则生成因子图。
- 如权利要求2所述的方法,其特征在于,所述编码结构为对角编码结构、二维编码结构、三维编码结构或四维编码结构。
- 如权利要求2所述的方法,其特征在于,对输入信息进行奇偶校验乘积码编码,包括:将输入信息序列按kc×kr的二维结构写入对应的信息位中,其中输入信息长度N=kc×kr;kr表示行数,kc表示列数。以每行的第kr+1位信息是当前行的前kc列模二加的结果进行行编码;以每列的第kc+1位信息是当前列的前kr行模二加的结果进行列编码;将编码后的结果按照编码规则生成因子图。
- 一种基于重叠复用的解调方法,其特征在于,包括:获取输入信号;对输入信号进行重叠复用解调译码;进行因子图置信传播译码;将译码结果输出。
- 如权利要求5所述的方法,其特征在于,因子图置信传播译码包括:计算初始对数似然比;设置迭代的最大次数;计算校验节点,并更新校验信息;计算变量节点,并更新信息消息;计算所有信息比特相关的校验节点提供信息的情况下的对数似然比值;进行判决;满足一定预设条件后,输出译码结果。
- 如权利要求6所述的方法,其特征在于:其中,xj为发射机发送信号中的发送码字;yj为接收机接收到的输入信号中的接收码字;M(j)为变量节点所参加的校验集,M(j)\i表示M(j)不包含第i个校验节点的子集;δi'j为校验信息,表示除第j个变量节点外其它变量节点提供信息的情况下的对数似然比值;llr(xj)为接收机初始接收到信道信息的对数似然比表示形式;λji为信息消息,表示除第i个校验节点外其它校验节点提供信息的情况下的对数似然比值;λj表示所有信息比特相关的校验节点提供信息的情况下的对数似然比值。
- 一种基于重叠复用的调制装置,其特征在于,包括:输入信息获取模块,用于获取输入信息;奇偶校验乘积码编码模块,用于对输入信息进行奇偶校验乘积码编码;重叠复用调制编码模块,用于进行重叠复用调制编码;信号发射模块,用于将编码后的信号发射出去。
- 一种基于重叠复用的解调装置,其特征在于,包括:输入信号获取模块,用于获取输入信号;重叠复用解调译码模块,用于对输入信号进行重叠复用解调译码;因子图置信传播译码模块,用于进行因子图置信传播译码;译码结果输出模块,用于将译码结果输出。
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CN107919937B (zh) * | 2016-10-10 | 2020-10-27 | 深圳光启合众科技有限公司 | 基于重叠复用的译码方法、装置及调制解调方法和*** |
CN110892752B (zh) | 2017-09-21 | 2022-07-05 | Oppo广东移动通信有限公司 | 一种资源选择的方法、设备及计算机存储介质 |
CN110808741A (zh) * | 2019-11-19 | 2020-02-18 | 安徽新华学院 | 一种wsn中基于ovtdm和cs的ldpc信道编码方法 |
CN110855297A (zh) * | 2019-11-19 | 2020-02-28 | 安徽新华学院 | 应用于无线传感器网络中的ldpc信道编码模块和*** |
CN113949453B (zh) * | 2020-07-15 | 2023-04-11 | 华为技术有限公司 | 调制编码、解调译码的方法、装置、设备及通信*** |
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CN117478254B (zh) * | 2023-12-28 | 2024-05-17 | 深圳大学 | 一种利用部分重叠信道提高LoRa网络吞吐量的方法 |
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