WO2016179868A1 - 一种液晶显示面板的驱动电路及驱动方法 - Google Patents

一种液晶显示面板的驱动电路及驱动方法 Download PDF

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Publication number
WO2016179868A1
WO2016179868A1 PCT/CN2015/080879 CN2015080879W WO2016179868A1 WO 2016179868 A1 WO2016179868 A1 WO 2016179868A1 CN 2015080879 W CN2015080879 W CN 2015080879W WO 2016179868 A1 WO2016179868 A1 WO 2016179868A1
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Prior art keywords
data voltage
signal
data
line
column
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PCT/CN2015/080879
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English (en)
French (fr)
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吴晶晶
熊志
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深圳市华星光电技术有限公司
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Priority to US14/759,907 priority Critical patent/US10147372B2/en
Publication of WO2016179868A1 publication Critical patent/WO2016179868A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3614—Control of polarity reversal in general
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/067—Special waveforms for scanning, where no circuit details of the gate driver are given
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/16—Determination of a pixel data signal depending on the signal applied in the previous frame
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/16—Calculation or use of calculated indices related to luminance levels in display data
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals

Definitions

  • the present invention relates to the field of liquid crystal display panels, and in particular to a driving circuit and a driving method for a liquid crystal display panel.
  • the driving circuit of the liquid crystal display panel is as shown in FIG. 1 (illustrated by taking 720*1280 resolution as an example in FIG. 1), and the driving circuit 10 includes a plurality of rows (2160 rows in the example of FIG. 1) which are arranged in parallel. X; multiple columns (3840 columns in the example of FIG.
  • each of the specific sub-pixel units 110 includes a pixel field effect transistor T and capacitor unit A (or pixel electrode); pixel field effect transistor T has a gate (G), a source (S) and a drain (D); the capacitor unit A includes a parallel liquid crystal capacitor Clc (or pixel) Capacitor, liquid crystal pixel) and storage capacitor Cs, one end of which is connected to the drain (D) or the source (S), the example in Figure 1 is connected to the drain (D), the other end is connected to the common voltage (Vcom); and is configured in the same
  • the source (S) of the FET T is connected to the corresponding data line Y.
  • the gate (G) of the sub-pixel unit 101 of the row is turned on or off by the level of the scanning voltage V G m (or the row scanning driving voltage) on the scanning line Xm of a certain row, and the row can be received when turned on.
  • the data voltage V S n (not shown in FIG. 1) of the data line Y of the pixel unit 110 is such that the drain (D) or the capacitor unit A is charged and received, and the data voltage corresponding to the gray scale needs to be displayed, thereby making the line
  • the sub-pixel unit 110 realizes displaying an image screen corresponding to the gray scale under the voltage driving on the scan line X and the data line Y.
  • the scan line X is turned on line by line, the gray line corresponding to the display needs to be displayed through the data line Y.
  • the data voltage is used to achieve normal display of the picture.
  • this alternating voltage is the reference voltage of the common electrode Vcom
  • the data voltage Vsn has both positive polarity (such as VDDA in FIG. 1 corresponds to Vcom is positive polarity and has negative polarity (such as VSSA in Figure 1 corresponds to Vcom being negative polarity). Therefore, the driving process of the liquid crystal display panel continuously charges the drain voltage V D (or the pixel voltage of the sub-pixel unit 110 through the data voltage (source voltage V S ) on the data line Y) from the positive polarity to the negative polarity.
  • the negative polarity is charged to the positive polarity, and the charging process must be completed within a limited time during which the FET T on each scanning line Xm is turned on.
  • the data voltage Vs of the previous row of the same polarity is charged to the current row during the precharge operation, and the drain voltage of the current row of sub-pixel cells 110 is advanced.
  • the polarity of V D is reversed to ensure that the liquid crystal pixel Clc can quickly reach the voltage level of the actual desired gray level.
  • the ON time of each scanning line Xm is greatly shortened, and the problem of insufficient charging time is more severe.
  • FIG. 2 Please refer to FIG. 2, FIG. 3 and FIG. 4a and FIG. 4b.
  • the liquid crystal display panel is driven by the same pre-charging time.
  • the frame inversion and column inversion precharge scan voltage waveforms as shown in FIG. 2, wherein CKV is a scan-driven clock pulse control signal, and Gm is a corresponding precharge scan voltage waveform on the row scan line Xm, or a row. Scanning the driving voltage signal, which can be converted into a row scanning voltage V G m.
  • the scanning line X is turned on, and the sub-display is required.
  • the pixel unit 110 performs precharging.
  • the voltage waveforms corresponding to G1 and G2 cause the sub-pixel units 110 of the corresponding row scanning lines X1 and X2 to be turned on.
  • the sub-pixel unit 110 (1, 1) in FIG. 4b Y1 corresponding to the data lines a data voltage V2 is written next row unit 110 in the same sub-pixels (2,1), i.e. sub-pixel unit 110 X2 row (2,1) is precharged, so that the pixel unit 110 corresponding sub-X2 (2, 1)
  • the polarity of the data voltage V1 (exemplified in FIG. 4a ) of the previous frame is charged in accordance with the data voltage V2 corresponding to the sub-pixel unit 110 (1, 1) and then inverted.
  • the data voltage V3 that actually needs to be written is the data voltage corresponding to the gray scale of the current frame sub-pixel unit 110 (2, 1) .
  • V2>V3>V1 is illustrated as an example. This mode is intended to shorten the negative polarity of the previous frame (V1 is negative with respect to Vcom) to positive polarity (V3 is positive with respect to Vcom).
  • charging the data voltage corresponding to the previous row of sub-pixel units 110 to the corresponding sub-pixel unit 110 that needs to be displayed in the same row of the current row may cause some image frames that do not need to be pre-charged to also turn on pre-charging or pre-charging time is too long.
  • Unnecessary pre-charging increases the power consumption of the liquid crystal display panel and the temperature rise of the driving circuit due to the increase in power consumption.
  • the scanning line X may be turned on for a long time, so that the liquid crystal display panel is pre-charged into the data normally displayed by the non-liquid crystal panel. Voltage, which reduces the sharpness of the image display on the LCD panel degree.
  • the prior art cannot meet the requirements of the liquid crystal display panel for low power consumption and high image sharpness display.
  • the technical problem to be solved by the present invention is to provide a driving circuit and a driving method for a liquid crystal display panel, which can calculate the pre-charging time of the current sub-pixel unit in real time, thereby reducing the driving power consumption of the liquid crystal panel and lowering the temperature of the driving circuit. Improve the sharpness of the display.
  • a technical solution adopted by the present invention is to provide a driving circuit, and the driving circuit includes:
  • the timing control chip is configured to receive the video signal, parse and obtain the frame open signal and the column-to-data voltage signal corresponding to the gray scale, and extract the parsed column to the data voltage signal in real time, and currently need to display the previous frame of the sub-pixel unit
  • the column is calculated to obtain a first data voltage, and the column-to-data voltage signal corresponding to the sub-pixel unit of the same row of the current row of the current frame of the current sub-pixel unit is displayed in real time, and the second data voltage is calculated and obtained in real time.
  • the precharge control signal is obtained as the precharge time, and the precharge time is used as the precharge control signal;
  • a scan driving circuit including a shift register, a logic operator, and a potential shifter
  • the shift register is configured to receive the frame enable signal to generate a line scan driving voltage signal
  • the logic operator is configured to receive the precharge control signal and superimpose the row scan driving voltage signal to obtain a line scan driving signal;
  • the potential shifter is configured to convert the line scan drive signal into a line scan drive voltage for transmission to a corresponding scan line.
  • another technical solution adopted by the present invention is to provide a driving circuit, and the driving circuit includes:
  • a timing control chip configured to receive a video signal, and parse and obtain a frame-on signal and a column-to-data voltage signal corresponding to the gray scale; and perform a real-time calculation of the data voltage signal according to the column to obtain a pre-displayed sub-pixel unit Charging time, and then obtaining a precharge control signal according to the precharge time;
  • a scan driving circuit configured to receive the frame enable signal to generate a line scan driving voltage signal; and to receive the precharge control signal and superimpose it with the scan driving voltage signal, thereby converting to a line scan driving voltage, and transmitting To the corresponding scan line.
  • the timing control chip is specifically configured to extract the column-to-data voltage signal of the previous frame of the sub-pixel unit that needs to be displayed in real time from the parsed data column signal, calculate and obtain the first data voltage, and extract the current required display in real time.
  • the same row of the previous row of the sub-pixel current frame corresponds to the column-to-data voltage signal of the sub-pixel unit and calculates the second data voltage, extracts the column-to-data voltage signal of the current frame of the current sub-pixel to be displayed in real time, and calculates and obtains the third data voltage.
  • real-time calculation obtains the time when the first data voltage is charged to the third data voltage according to the second data voltage, and the time is taken as the pre-charging time, and the pre-charging time is used as the pre-charging control signal time to obtain the pre-charging control. signal.
  • the scan driving circuit comprises a shift register, a logic operator and a potential shifter
  • the shift register is configured to receive a frame open signal to generate a line scan driving voltage signal
  • the logic operator is configured to receive a precharge control signal and superimpose the line scan driving voltage signal to obtain a line scan driving signal;
  • the potential shifter is configured to convert the line scan drive signal into a line scan drive voltage for transmission to a corresponding scan line.
  • the scan driving circuit further includes an output buffer
  • the output buffer is for enhancing the driving capability of the row scan driving voltage, and transmitting the enhanced row scan driving voltage to the corresponding scan line.
  • the driving circuit further includes a data driving circuit
  • the data driving circuit is configured to receive the column-oriented data voltage signal, convert it into a data voltage, and send the data to the corresponding data line.
  • Another technical solution adopted by the present invention is to provide a driving method, including the following steps:
  • the S1 driving circuit receives the video signal, and parses and obtains the frame open signal and the column-to-data voltage signal corresponding to the gray scale to be displayed;
  • S2 calculates, according to the column, the pre-charging time of the current sub-pixel unit to be obtained, and obtains a pre-charging control signal according to the pre-charging time;
  • S3 generates a line scan driving voltage signal according to the frame turn-on signal
  • S5 sends a line scan driving voltage to the corresponding scan line.
  • step S2 the specific steps of the step S2:
  • the column-to-data voltage signal of the previous frame of the sub-pixel unit is required to be displayed in real time, and the first data voltage is calculated and obtained, and the current row of the current frame of the current sub-pixel unit needs to be displayed in real time.
  • the column corresponds to the column data voltage signal of the sub-pixel unit and calculates and obtains the second data voltage, extracts the column data voltage signal that needs to display the current frame of the sub-pixel unit in real time, calculates and obtains the third data voltage, and calculates and obtains the third data voltage in real time.
  • a pre-charge control signal is obtained when a data voltage is charged to the third data voltage according to the time at which the second data voltage is charged, and the pre-charge time is used as the pre-charge control signal.
  • step S4 comprises the steps of:
  • S42 converts the line scan drive signal into a line scan drive voltage.
  • step S42 the method further comprises the steps of:
  • step S1 and before step S5 the method further includes the following steps:
  • S6 converts the column data voltage signal into a data voltage and sends it to the corresponding data line.
  • the driving circuit provided by the present invention first receives a video signal through a timing control chip, and parses and obtains a frame-on signal and a column-to-data voltage signal required for a corresponding gray level; secondly, the timing control chip uses the column direction The data voltage signal is calculated in real time to obtain a precharge time for displaying the sub-pixel unit, and then the precharge control signal is obtained according to the precharge time; the rescan drive circuit receives the frame on signal to generate a line scan driving voltage signal; and finally the scan driving circuit further receives The control signal is precharged and superimposed with the scan drive voltage signal, and then converted into a line scan drive voltage for transmission to the corresponding scan line.
  • the present invention calculates the pre-charging time of the sub-pixel unit in real time, so that the pre-charging time of each row of sub-pixel units does not cause overcharging, thereby achieving liquid crystal reduction.
  • the panel drives power consumption, reduces the temperature of the drive circuit, and improves the sharpness of the display.
  • FIG. 1 is a schematic structural view of a driving circuit of a liquid crystal display panel in the prior art
  • FIG. 2 is a schematic structural diagram of a precharge scan voltage waveform of frame inversion and column inversion in FIG. 1;
  • FIG. 3 is a schematic structural diagram of the charging process of the sub-pixel unit in the current frame in FIG. 2;
  • FIG. 4a is a schematic structural diagram of the data voltage and liquid crystal pixel polarity of the previous frame in FIG. 3;
  • 4b is a schematic structural diagram of the data voltage and liquid crystal pixel polarity of the current frame in the sub-pixel unit of FIG. 3;
  • FIG. 5 is a schematic structural view of a first embodiment of a driving circuit of a liquid crystal display panel provided by the present invention.
  • FIG. 6 is a schematic structural diagram of a precharge scan voltage waveform of frame inversion and column inversion in FIG. 5;
  • FIG. 7 is a schematic structural diagram of the charging process of the sub-pixel unit in the current frame in FIG. 6;
  • FIG. 8 is a schematic structural view of a second embodiment of a driving circuit of a liquid crystal display panel provided by the present invention.
  • FIG. 9 is a schematic flow chart of a third embodiment of a liquid crystal display panel driving method provided by the present invention.
  • FIG. 10 is a schematic flow chart of a fourth embodiment of a method for driving a liquid crystal display panel according to the present invention.
  • FIG. 5 is a schematic structural diagram of a first embodiment of a liquid crystal display panel driving circuit provided by the present invention.
  • the drive circuit 50 includes:
  • the timing control chip 510 is configured to receive the video signal, and parse and obtain the frame open signal STV and the column-to-data voltage signal Sn corresponding to the gray scale (Sn is exemplified as the corresponding data voltage waveform on the nth column data line Yn); For pre-charging time Tm of the currently required display sub-pixel unit 510 according to the column to the data voltage signal Sn in real time (m indicates that the sub-pixel unit 110 is currently required to be connected to the m-th scan line Xm), and then according to the pre-charge time Tm obtains a precharge control signal PCC;
  • a scan driving circuit 520 configured to receive the frame enable signal STV to generate a line scan driving voltage signal gm; and to receive the precharge control signal PCC and superimpose it with the scan driving voltage signal gm, thereby converting into a line scan
  • the driving voltage V G m is transmitted to the corresponding scanning line Xm.
  • the precharge control signal PCC includes the row precharge control signal PCCm of all the sub-pixel units 110 of the current frame.
  • the row precharge control signal PCCm is obtained by the precharge time Tm of the current row sub-pixel unit 110, which is the time (or pulse width) of the precharge time Tm as the line precharge control signal PCCm, and its high potential voltage or voltage signal and
  • the line scan driving voltage signal gm is the same.
  • the timing control chip 510 is configured to obtain a precharge control signal PCCm according to the precharge time Tm; the scan drive circuit 520 receives the precharge control signal PCCm and superimposes it with the scan drive voltage signal gm, thereby converting into a row.
  • the driving voltage V G m is scanned and transmitted to the corresponding scanning line Xm.
  • FIG. 1 or FIG. 4a or FIG. 4b in which the pre-charging time Tm of the sub-pixel unit 110 is required to be displayed according to the column direction in the present embodiment.
  • the data voltage signal Sn is obtained in real time, please refer to FIG. 4a and FIG. 4b, which specifically displays the data voltage V1 of the previous frame of the sub-pixel unit 110, such as the second row of sub-pixel units 110 (2, 1) according to current needs.
  • the column of the previous frame is parsed to the data voltage S1) and the data voltage V3 required for the current frame (obtained from the column of the current frame to the data voltage S1), and the charging time obtained by charging V1 to V3 is calculated and taken as The precharge time T2 is obtained, and the precharge time T2 is taken as the time to the charge control signal to obtain the precharge control signal PCC2.
  • the precharge time Tm of each row of sub-pixel units 110 of the current frame can be calculated, thereby obtaining the precharge control signal PCCm of each row of sub-pixel units.
  • FIG. 6 is a schematic structural diagram of a pre-charge scan voltage waveform of the frame inversion and column inversion in FIG. 5;
  • FIG. 7 is a diagram showing the charging process of the sub-pixel unit 110 in the current frame in FIG. Schematic.
  • the scan driving circuit 120 is configured to receive the frame turn-on signal STV to generate line scan driving voltage signals g1, g2, g3, g4, and G5, and superimposed with the received precharge control signal PCC (example includes five row precharge control signals PCCl, PCC2, PCC3, PCC4 and PCC5) to obtain line scan driving voltage signals G1, G2, G3, G4 and G5, and further
  • the data voltage Vs currently required to display the sub-pixel unit 110 is pre-charged to the corresponding sub-pixel unit 110 in advance to cause polarity inversion without overcharging.
  • the current need to display the sub-pixel unit, such as 110 (2, 1) is illustrated as an example, which directly charges the data voltage V1 of the previous frame to the current frame in the T2 period.
  • the data voltage V3 does not need to adopt the same pre-charging time of each row, thereby effectively shortening the pre-charging time Tm, which reduces the power consumption of the driving circuit of the liquid crystal display panel, reduces the temperature of the driving circuit, and solves the long-term problem of the prior art.
  • Tm the pre-charging time
  • the current embodiment needs to display the data voltage to be written by the sub-pixel unit, such as the data voltage V3 to be written by the sub-pixel unit 110 (2, 1) , and the data voltage of the previous frame. If the data voltage V1 of the previous frame of the sub-pixel unit 110 (2, 1) is compared, the time required to display whether the sub-pixel unit needs to be precharged or required to be precharged is calculated in real time, so that each line needs to display the sub-pixel. The pre-charging time of the unit does not cause overcharging, thereby reducing the driving power consumption of the liquid crystal panel, lowering the temperature of the driving chip, and improving the sharpness of the display screen.
  • FIG. 8 is a schematic structural diagram of a second embodiment of a driving circuit of a liquid crystal display panel provided by the present invention.
  • the drive circuit 80 includes:
  • the timing control chip 810 is configured to receive a video signal, and parse and obtain a frame open signal STV and a column-to-data voltage signal Sn corresponding to the gray scale to be displayed; and perform real-time calculation on the data voltage signal Sn according to the column to obtain a current required display Pre-charging time Tm of the pixel unit 110, and further obtaining a pre-charge control signal FCC according to the pre-charging time Tm;
  • the precharge control signal FCC includes the row precharge control signal FCCm of all the sub-pixel units 110 of the current frame, which is the same as the first embodiment described above;
  • the scan driving circuit 520 is configured to receive the frame open signal STV to generate a line scan driving voltage signal gm; and to receive the precharge control signal FCC and superimpose it with the scan driving voltage signal gm, thereby converting into a line scan Driving voltage V G m to be sent to the corresponding scan line Xm;
  • the timing control chip 810 is configured to calculate, according to the column, the pre-charging time Tm of the current sub-pixel unit 510 to be obtained in real time, and obtain the pre-charging control signal FCC of the current frame according to the pre-charging time Tm.
  • the column is obtained by extracting the parsed data to the data voltage signal Sn in real time, and currently needs to display the column-to-data voltage signal Sn of the previous frame of the sub-pixel unit, such as 110 (2, 1), and calculate the first data voltage, such as V1.
  • the charging time is charged by the first data voltage, such as V1, according to the second data voltage, such as V2, to the third data voltage, such as V3.
  • the magnitudes of the first data voltage, the second data voltage, and the third data voltage are related.
  • the scan driving circuit 820 includes a shift register 8201, a logic operator 8202, and a potential shifter 8203;
  • the shift register 8201 is configured to receive a frame open signal STV to generate a line scan driving voltage signal gm;
  • the logic operator 8202 is configured to receive the precharge control signal PCC and superimpose the line scan driving voltage signal gm to obtain a line scan driving signal Gm;
  • the potential shifter 8203 is configured to convert the line scan driving signal Gm into a line scan driving voltage V G m for transmission to the corresponding scanning line Xm.
  • the scan driving voltage signal gm, the precharge control signal PCC, and the row scan driving signal Gm are all digital signals, and the analog voltage V G m converted to a high voltage is boosted by the potential shifter 8203 to be sent to the corresponding scan line Xm.
  • the field effect transistor T in the sub-pixel unit 110 on the corresponding scan line Xm is turned on.
  • the scan driving circuit 820 further includes an output buffer 8204;
  • the output buffer 8204 is for enhancing the driving capability of the row scanning driving voltage V G m , such as increasing its input current or the like, and transmitting the enhanced row scanning driving voltage V G m to the corresponding scanning line Xm.
  • the driving circuit 80 further includes a data driving circuit 830;
  • the data driving circuit 830 is configured to receive the column-oriented data voltage signal Sn and convert it into a data voltage V S n for transmission to the corresponding data line Yn.
  • the column-oriented data voltage signal Sn is also a digital signal, and is converted by the digital driving circuit, such as an analog data voltage Vsn boosted to a high voltage, to be sent to the corresponding data line Yn for pairing the sub-pixel unit 110 connected to the data line Yn. Precharge is performed to reverse the polarity, and the data voltage Vsn corresponding to the gray scale is currently required to be written.
  • the present embodiment adopts a second data voltage of a sub-pixel unit corresponding to a third data voltage that is currently required to be displayed by the sub-pixel unit to be the same row as the previous row of the current frame.
  • the previous frame currently needs to display the first data voltage of the sub-pixel unit for comparison, and calculate whether the current sub-pixel unit needs to be pre-charged or calculate the time when the first data voltage is charged to the third data voltage according to the second data unit.
  • the pre-charging time is used as the pre-charging time, so that the pre-charging time of each sub-pixel unit is not generated, and the over-charging phenomenon is not generated, thereby reducing the driving power consumption of the liquid crystal panel, lowering the temperature of the driving circuit, and improving the sharpness of the display screen.
  • FIG. 9 is a schematic flow chart of a third embodiment of a method for driving a liquid crystal display panel according to the present invention.
  • the method includes:
  • Step 901 The driving circuit receives the video signal, and parses and obtains the frame open signal and the column-to-data voltage signal corresponding to the gray scale to be displayed;
  • Step 902 Calculate, according to the column, the data voltage signal in real time, to obtain a precharge time for displaying the sub-pixel unit, and obtain a precharge control signal according to the precharge time;
  • Step 903 Generate a line scan driving voltage signal according to the frame turn-on signal.
  • Step 904 superimposing the precharge control signal and the line scan driving voltage signal, thereby converting into a line scan driving voltage
  • Step 905 Send a line scan driving voltage to a corresponding scan line.
  • the method provided in this embodiment corresponds to the operation performed by the driving circuit 50 of the first embodiment.
  • the steps 901 and 902 correspond to the operations performed by the timing control chip 510
  • the steps 903, 904, and 905 correspond to the scanning.
  • the operation performed by the driving circuit 520 will not be described herein.
  • FIG. 10 is a flowchart of a fourth embodiment of a method for driving a liquid crystal display panel according to the present invention.
  • the method 10 includes:
  • Step 1001 The driving circuit receives the video signal, and parses and obtains the frame open signal and the column-to-data voltage signal corresponding to the gray scale to be displayed;
  • Step 1002 According to the column-to-data voltage signal obtained by the parsing, extract the column-to-data voltage signal that needs to be displayed in the previous frame of the sub-pixel unit in real time, calculate and obtain the first data voltage, and extract the current frame of the current sub-pixel unit that needs to be displayed in real time.
  • the same column of the previous row corresponds to the column data voltage signal of the sub-pixel unit and calculates and obtains the second data voltage, extracts the column data voltage signal that needs to display the current frame of the sub-pixel unit in real time, and calculates and obtains the third data voltage, and obtains the third data voltage in real time.
  • precharging the first data voltage according to the time when the second data voltage is charged to the third data voltage, using the time as the pre-charging time, and then using the pre-charging time as the pre-charging control signal;
  • Step 1003 Generate a line scan driving voltage signal according to the frame turn-on signal.
  • Step 1004 superimposing the precharge control signal and the line scan driving voltage signal, thereby converting into a line scan driving voltage
  • Step 1005 Send a line scan driving voltage to a corresponding scan line.
  • the method of the present embodiment corresponds to the operation performed by the driving circuit 80 of the second embodiment, and the specific steps 1001 and 1002 correspond to the operations performed by the timing control chip 810, and the steps 1003, 1004, and 1005 correspond to the scan driving circuit 820. The operations performed will not be described here.
  • step 1004 includes step 10041 and step 10042;
  • Step 10041 superimposing a precharge control signal and a line scan driving voltage signal to obtain a line scan driving signal
  • Step 10042 Convert the line scan driving signal into a line scan driving voltage
  • step 1004 further includes step 10043;
  • Step 10043 Enhance the driving capability of the line scan driving voltage.
  • step 1006 is further included before 1005;
  • Step 1006 Convert the column data voltage signal into a data voltage and send it to the corresponding data line.
  • step of transmitting the data voltage to the corresponding data line in step 1006 and step 1005 are simultaneous steps.

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Abstract

一种液晶显示面板的驱动电路（50）及驱动方法，该驱动电路（50）包括：时序控制芯片（510），用于接收视频信号，并解析获得帧开启信号（STV）和用于显示灰阶对应的列向数据电压信号（Sn）；和用于根据该列向数据电压信号（Sn）实时计算获得当前需要显示子像素单元的预充电时间（Tm），进而根据该预充电时间（Tm）得到预充电控制信号（PCC）；扫描驱动电路（520），用于接收该帧开启信号（STV）以产生行扫描驱动电压信号（gm）；和用于接收该预充电控制信号（PCC），并将其与该扫描驱动电压信号（gm）叠加，进而转换为行扫描驱动电压（V Gm），并发送至对应的扫描线（Xm）。

Description

一种液晶显示面板的驱动电路及驱动方法 【技术领域】
本发明涉及液晶显示面板技术领域，特别是涉及一种液晶显示面板的驱动电路及驱动方法。
【背景技术】
目前，液晶显示面板的驱动电路如图1所示(图1中以720*1280分辨率为例进行说明)，该驱动电路10包括多行(图1中示例为2160行)平行排列的扫描线X；多列(图1中示例为3840列)平行排列的数据线Y；数据线Xm(第m行扫描线，m为1至2160之间的正整数)与扫描线Yn(第n列数据线，n为1至3840之间的正整数)相互交叉；多个子像素单元110设于多行扫描线X与多列数据线Y的交叉处；具体的每个子像素单元110包括像素场效应管T及电容单元A(或称像素电极)；像素场效应管T具有栅极(G)、源极(S)和漏极(D)；该电容单元A包括并列的液晶电容Clc(或称像素电容、液晶像素)和存储电容Cs，其一端连接漏极(D)或源极(S)，图1中示例为连接漏极(D)，另一端连接公共电压(Vcom)；且配置在同一行的子像素单元110中像素场效应管T的栅极(G)与该行的扫描线X连接，同理，配置在同一列的子像素单元110中像素场效应管T的源极(S)与对应的数据线Y连接。如此通过某一行扫描线Xm上的扫描电压VGm(或称行扫描驱动电压)的高低使得该行的子像素单元101的栅极(G)打开或关闭，在打开时可接收该行子像素单元110的数据线Y的数据电压VSn(图1中未示出)，以使得对漏极(D)或电容单元A充电和接收需要显示灰阶对应的数据电压，进而使得该行的子像素单元110在扫描线X和数据线Y上的电压驱动下实现显示对应灰阶的图像画面，依此采用逐行开启扫描线X时，通过数据线Y写入需要显示灰阶对应的数据电压来实现画面的正常显示。
为了防止液晶面板的直流阻隔效应和直流残留现象，须在液晶两端施加交流电压(此交流电压以公共电极Vcom为参考电压)，即数据电压Vsn既有正极性(如图1中VDDA对应于Vcom为正极性)又有负极性(如图1中VSSA对应于Vcom为负极性)。因此液晶显示面板的驱动过程在不断的将子像素单元110的漏极电压VD(或称像素电压，通过数据线Y上数据电压(源极电压VS)传输)由正极性充电至负极性，再由负极性充电至正极性，而此充电过程必须在每行扫描 线Xm上的场效应管T打开的有限时间内完成。为保证场效应管T在很短的有限时间内充电完成，需在预充电动作时将相同极性的上一行的数据电压Vs充电至当前行，提前将当前行子像素单元110中漏极电压VD的极性反转，以保证液晶像素Clc能迅速达到实际所需灰阶的电压水平。另外由于液晶显示面板解析度及刷新频率的提高，每行扫描线Xm开启时间大大缩短，充电时间不足的问题更加严峻。
请查阅图2、图3和图4a、图4b，现有技术中液晶显示面板驱动采用相同预充电时间的方式。如图2所示的帧反转与列反转的预充电扫描电压波形，其中CKV为扫描驱动的时钟脉冲控制信号，Gm示例为行扫描线Xm上对应的预充电扫描电压波形，或称行扫描驱动电压信号，其可转换为行扫描电压VGm，液晶显示面板在数据线Y写入需要正常显示灰阶对应的数据电压VSn之前，先开启扫描线X，对需要显示的子像素单元110进行预充电，如在t2时间，G1和G2对应的电压波形使得对应行扫描线X1和X2的子像素单元110都打开，此时如图4b中子像素单元110(1，1)对应的数据电压V2写入下一行同一列子像素单元110(2，1)的数据线Y1中，即对X2行的子像素单元110(2，1)进行预充电，使得X2对应子像素单元110(2，1)由前一帧的数据电压V1(图4a中示例)极性按照子像素单元110(1，1)对应的数据电压V2进行充电后反转。然而在t3时刻才是实际需要写入的数据电压V3即当前帧子像素单元110(2，1)所需显示灰阶对应的数据电压。图3中以V2＞V3＞V1示例说明，此类方式本意是为了缩短由前一帧的负极性(V1相对于Vcom为负极性)反转到正极性(V3相对于Vcom为正极性)的充电时间，然而由于预充电时间t2为一个固定值(图2中示例为一个CKV时钟周期)，使得在t2时间内子像素单元110(2，1)已经充电至V2的数据电压水平，在实际写入所需灰阶对应数据电压V3时，再由V2下降至V3，延长了预充电时间使之为t4，并未达到缩短预充电时间的目的，相反还会增加预充电时间。
这种预充电方式采用每行扫描线X上的子像素单元110都进行预充电，且预充电时间都相同(即t1＝t2＝t3＝......＝tm)，其按照预充电时间t1，将上一行子像素单元110对应的数据电压充电至当前行相同列需要显示的对应子像素单元110，会导致一些无需预充电的图像帧也会开启预充电或预充电时间过长，不必要的预充电会增加液晶显示面板的功率消耗及因功率消耗增加而导致的驱动电路温度上升，同时可能长时间提前开启扫描线X，使得液晶显示面板提前充入非液晶面板正常显示的数据电压，降低了液晶显示面板图像画面显示效果的锐 度。
综上，现有技术不能满足液晶显示面板对低功耗、高画面锐度显示效果的要求。
【发明内容】
本发明主要解决的技术问题是提供一种液晶显示面板的驱动电路及驱动方法，能够实时计算当前需要显示子像素单元的预充电时间，进而实现降低液晶面板驱动功率消耗、降低驱动电路温度，同时提高显示画面的锐度。
为解决上述技术问题，本发明采用的一个技术方案是，提供一种驱动电路，该驱动电路包括：
时序控制芯片，用于接收视频信号，解析获得帧开启信号和需要显示灰阶对应的列向数据电压信号，且将解析得到的该列向数据电压信号实时提取当前需要显示子像素单元前一帧的该列向数据电压信号并计算获得第一数据电压，实时提取该当前需要显示子像素单元当前帧的上一行相同列对应子像素单元的列向数据电压信号并计算获得第二数据电压，实时提取该当前需要显示子像素单元当前帧的列向数据电压信号并计算获得第三数据电压，并实时计算获得由第一数据电压按照第二数据电压充电到第三数据电压的时间，将所述时间作为预充电时间，进而将该预充电时间作为预充电控制信号的时间得到所述预充电控制信号；
扫描驱动电路，包括移位寄存器、逻辑运算器和电位转移器；
该移位寄存器用于接收该帧开启信号以产生行扫描驱动电压信号；
该逻辑运算器用于接收该预充电控制信号，并与该行扫描驱动电压信号叠加获得行扫描驱动信号；
该电位移位器用于将该行扫描驱动信号转换为行扫描驱动电压，以发送至对应的扫描线。
为解决上述技术问题，本发明采用的又一个技术方案是，提供一种驱动电路，该驱动电路包括：
时序控制芯片，用于接收视频信号，并解析获得帧开启信号和需要显示灰阶对应的列向数据电压信号；和用于根据该列向数据电压信号实时计算获得当前需要显示子像素单元的预充电时间，进而根据该预充电时间得到预充电控制信号；
扫描驱动电路，用于接收该帧开启信号以产生行扫描驱动电压信号；和用于接收该预充电控制信号，并将其与该扫描驱动电压信号叠加，进而转换为行扫描驱动电压，并发送至对应的扫描线。
其中，该时序控制芯片具体用于将解析得到的该列向数据电压信号实时提取当前需要显示子像素单元前一帧的列向数据电压信号并计算获得第一数据电压，实时提取该当前需要显示子像素当前帧的上一行相同列对应子像素单元的列向数据电压信号并计算获得第二数据电压，实时提取该当前需要显示子像素当前帧的列向数据电压信号并计算获得第三数据电压，并实时计算获得由第一数据电压按照第二数据电压充电到第三数据电压的时间，将该时间作为预充电时间，进而将该预充电时间作为预充电控制信号的时间得到该预充电控制信号。
其中，该扫描驱动电路包括移位寄存器、逻辑运算器和电位转移器；
该移位寄存器用于接收帧开启信号以产生行扫描驱动电压信号；
该逻辑运算器用于接收预充电控制信号，并与行扫描驱动电压信号叠加获得行扫描驱动信号；
该电位移位器用于将该行扫描驱动信号转换为行扫描驱动电压，以发送至对应的扫描线。
其中，该扫描驱动电路还包括输出缓冲器；
该输出缓冲器用于增强该行扫描驱动电压的驱动能力，并将增强后的行扫描驱动电压发送至对应的扫描线。
进一步的，该驱动电路还包括数据驱动电路；
该数据驱动电路用于接收列向数据电压信号，并转换为数据电压，并发送至对应的数据线。
为解决上述技术问题，本发明采用的另一个技术方案是，提供一种驱动方法，包括以下步骤：
S1驱动电路接收视频信号，并解析获得帧开启信号和需要显示灰阶对应的列向数据电压信号；
S2根据该列向数据电压信号实时计算获得当前需要显示子像素单元的预充电时间，进而根据该预充电时间得到预充电控制信号；
S3根据该帧开启信号生成行扫描驱动电压信号；
S4将预充电控制信号和行扫描驱动电压信号叠加，进而转换为行扫描驱动电压；
S5发送行扫描驱动电压至对应的扫描线。
其中，该步骤S2的具体步骤：
根据解析获得的该列向数据电压信号，实时提取当前需要显示子像素单元前一帧的列向数据电压信号并计算获得第一数据电压，实时提取当前需要显示子像素单元当前帧的上一行相同列对应子像素单元的列向数据电压信号并计算获得第二数据电压，实时提取当前需要显示子像素单元当前帧的列向数据电压信号并计算获得第三数据电压，并实时计算获得由该第一数据电压按照该第二数据电压充电到该第三数据电压的时间，将该时间作为预充电时间，进而将该预充电时间作为预充电控制信号的时间得到该预充电控制信号。
其中，该步骤S4包括步骤：
S41将预充电控制信号和行扫描驱动电压信号叠加获得行扫描驱动信号；
S42将行扫描驱动信号转化为行扫描驱动电压。
其中，在步骤S42之后还包括步骤：
S43增强行扫描驱动电压的驱动能力。
进一步的，在步骤S1之后、步骤S5之前还包括步骤：
S6将列向数据电压信号转换为数据电压，并发送至对应的数据线。
本发明的有益效果是：本发明提供的驱动电路，首先通过时序控制芯片接收视频信号，并解析获得帧开启信号和对应灰阶需要的列向数据电压信号；其次该时序控制芯片利用该列向数据电压信号实时计算获得需要显示子像素单元的预充电时间，进而根据该预充电时间得到预充电控制信号；再次扫描驱动电路接收帧开启信号以产生行扫描驱动电压信号；最后扫描驱动电路还接收预充电控制信号，并将其与扫描驱动电压信号叠加，进而转换为行扫描驱动电压，以发送至对应的扫描线。与现有采用预充电时间都相同的技术相比，本发明实时计算当前需要显示子像素单元的预充电时间，使得每行子像素单元的预充电时间不会产生过充电现象，进而实现降低液晶面板驱动功率消耗、降低驱动电路温度，同时提高显示画面的锐度。
【附图说明】
图1是现有技术中液晶显示面板驱动电路的结构示意图；
图2是图1中帧反转与列反转的预充电扫描电压波形的结构示意图；
图3是图2中需要显示子像素单元在当前帧的充电过程的结构示意图；
图4a是图3中需要显示子像素单元在前一帧的数据电压及液晶像素极性的结构示意图；
图4b是图3中需要显示子像素单元在当前帧的数据电压及液晶像素极性的结构示意图；
图5是本发明提供的液晶显示面板的驱动电路第一实施方式的结构示意图；
图6是图5中帧反转与列反转的预充电扫描电压波形的结构示意图；
图7是图6中需要显示子像素单元在当前帧的充电过程的结构示意图；
图8是本发明提供的液晶显示面板的驱动电路第二实施方式的结构示意图；
图9是本发明提供的液晶显示面板驱动方法第三实施方式的流程示意图；
图10是本发明提供的液晶显示面板驱动方法第四实施方式的流程示意图。
【具体实施方式】
下面结合附图和实施方式对本发明进行详细说明。
请参阅图5，图5是本发明提供的液晶显示面板驱动电路第一实施方式的结构示意图。该驱动电路50包括：
时序控制芯片510，用于接收视频信号，并解析获得帧开启信号STV和需要显示灰阶对应的列向数据电压信号Sn(Sn示例为第n列数据线Yn上对应的数据电压波形)；和用于根据该列向数据电压信号Sn实时计算获得当前需要显示子像素单元510的预充电时间Tm(m表示当前需要显示子像素单元110连接第m行扫描线Xm)，进而根据该预充电时间Tm得到预充电控制信号PCC；
扫描驱动电路520，用于接收该帧开启信号STV以产生行扫描驱动电压信号gm；和用于接收该预充电控制信号PCC，并将其与该扫描驱动电压信号gm叠加，进而转换为行扫描驱动电压VGm，并发送至对应的扫描线Xm。
其中预充电控制信号PCC包含当前帧所有子像素单元110的行预充电控制信号PCCm。行预充电控制信号PCCm由当前行子像素单元110的预充电时间Tm得到，其是将预充电时间Tm作为行预充电控制信号PCCm的时间(或脉冲宽度)，其高电位电压或电压信号与行扫描驱动电压信号gm相同。
在其他实施方式中，时序控制芯片510用于根据预充电时间Tm得到预充电控制信号PCCm；扫描驱动电路520接收预充电控制信号PCCm，并将其与扫描驱动电压信号gm叠加，进而转换为行扫描驱动电压VGm，并发送至对应的扫描线Xm。
请参阅图1或图4a或图4b，其中不同于现有技术每行子像素单元110采用相同的预充电时间，本实施方式中当前需要显示子像素单元110的预充电时间Tm是根据列向数据电压信号Sn实时计算获得，请参阅图4a和图4b，其具体是根据当前需要显示子像素单元110如第二行子像素单元110(2，1)的前一帧的数据电压V1(由前一帧的列向数据电压S1解析获得)和当前帧所需的数据电压V3(由当前帧的列向数据电压S1解析获得)，计算获得由V1充电至V3的充电时间，并将其作为预充电时间T2，并将该预充电时间T2作为与充电控制信号的时间得到预充电控制信号PCC2。同理可计算获得当前帧每一行子像素单元110的预充电时间Tm，进而得到每行子像素单元的预充电控制信号PCCm。
请参阅图6和图7，图6是图5中帧反转与列反转的预充电扫描电压波形的结构示意图；图7是图6中需要显示子像素单元110在当前帧的充电过程的结构示意图。
如图6所示，其中图6中示例为包括5个行扫描驱动电压信号gm的情况，扫描驱动电路120用于接收帧开启信号STV以产生行扫描驱动电压信号g1、g2、g3、g4和g5，并与接收的预充电控制信号PCC(示例为包含5个行预充电控制信号PCCl、PCC2、PCC3、PCC4和PCC5)叠加得到行扫描驱动电压信号G1、G2、G3、G4和G5，进而再将数字信号Gm转换成模拟信号VGm，即行扫描驱动电压，以发送至对应的扫描线Xm，用于在实时计算获得的预充电时间Tm(m＝1、2、3、4和5)内，将当前需要显示子像素单元110的数据电压Vs提前预充到对应的子像素单元110，使之发生极性反转，而不会产生过充电现象。如图7和图4b所示，以当前需要显示子像素单元如110(2，1)为例进行说明，其在T2时间段直接将其前一帧的数据电压V1充电至当前帧所需的数据电压V3，无需采用每行相同的预充电时间，进而有效缩短了预充电时间Tm，使得降低了液晶显示面板驱动电路的功率消耗，降低了驱动电路的温度，同时解决了现有技术长时提前开启扫描线而造成的锐度降低的问题。
区别于现有技术的情况，本实施方式通过对当前需要显示子像素单元将要写入的数据电压如子像素单元110(2，1)将要写入的数据电压V3，与其前一帧的数据电压如子像素单元110(2，1)前一帧要的数据电压V1进行比对，实时计算当前需要显示子像素单元是否需要进行预充电或所需预充电的时间，使得每行需要显示子像素单元的预充电时间不会产生过充电现象，进而实现降低液晶面板驱动功率消耗、降低驱动芯片温度，同时提高显示画面的锐度。
请参阅图8，图8是本发明提供的液晶显示面板的驱动电路第二实施方式的结构示意图。该驱动电路80包括：
时序控制芯片810，用于接收视频信号，并解析获得帧开启信号STV和需要显示灰阶对应的列向数据电压信号Sn；和用于根据该列向数据电压信号Sn实时计算获得当前需要显示子像素单元110的预充电时间Tm，进而根据该预充电时间Tm得到预充电控制信号FCC；
其中预充电控制信号FCC包含当前帧所有子像素单元110的行预充电控制信号FCCm，与上述第一实施方式相同；
扫描驱动电路520，用于接收该帧开启信号STV以产生行扫描驱动电压信号gm；和用于接收该预充电控制信号FCC，并将其与该扫描驱动电压信号gm叠加，进而转换为行扫描驱动电压VGm，以发送至对应的扫描线Xm；
其中，该时序控制芯片810用于根据该列向数据电压信号Sn实时计算获得当前需要显示子像素单元510的预充电时间Tm，进而根据该预充电时间Tm得到当前帧的预充电控制信号FCC，具体是用于将解析得到的该列向数据电压信号Sn实时提取当前需要显示子像素单元如110(2，1)前一帧的列向数据电压信号Sn并计算获得第一数据电压如V1，实时提取该当前需要显示子像素如110(2，1)当前帧的上一行相同列对应子像素单元如110(1，1)的列向数据电压信号Sn并计算获得第二数据电压如V2，实时提取该当前需要显示子像素如110(2，1)当前帧的列向数据电压信号Sn并计算获得第三数据电压如V3，并实时计算获得由第一数据电压如V1按照第二数据电压如V2充电到第三数据电压如V3的时间Tm，将该时间Tm作为预充电时间，进而将该预充电时间Tm作为预充电控制的时间得到该预充电控制信号FCC。具体是将预充电时间Tm作为预充电控制信号FCC的时间(或脉冲宽度)得到预充电控制信号，与上述第一实施方式中预充电控制信号的获得方式相同。
可以理解的是，如图6和图7所示，对于不同行子像素单元110其由第一数据电压如V1按照第二数据电压如V2充电至第三数据电压如V3的充电时间，与该第一数据电压、第二数据电压和第三数据电压的大小有关系。对于如V1＜V2＜V3的情况，其按照V2的电压将V1充电至V3所需的预充电时间记为T/；对于如V1＜V3＜V2的情况，其按照V2将V1充电至V3所需的预充电时间记为T//，通常情况下T/与T//不同；对于如V1＝V3的情况，其无需进行子像素单元的极性反转。因此对于不同行子像素单元110具体是需要实时按当前帧需要 写入的第三数据电压与当前帧上一行相同列对应的第二数据电压和前一帧的第一数据电压进行对比，并计算出当前行子像素单元110是否需要进行预充电或所需的预充电时间。
其中，该扫描驱动电路820包括移位寄存器8201、逻辑运算器8202和电位转移器8203；
该移位寄存器8201用于接收帧开启信号STV以产生行扫描驱动电压信号gm；
该逻辑运算器8202用于接收预充电控制信号PCC，并与行扫描驱动电压信号gm叠加获得行扫描驱动信号Gm；
该电位移位器8203用于将该行扫描驱动信号Gm转换为行扫描驱动电压VGm，以发送至对应的扫描线Xm。
其中扫描驱动电压信号gm、预充电控制信号PCC及行扫描驱动信号Gm均为数字信号，经电位移位器8203提升转换为高电压的模拟电压VGm，以发送至对应的扫描线Xm用于开启对应扫描线Xm上的子像素单元110中场效应管T。
其中，该扫描驱动电路820还包括输出缓冲器8204；
该输出缓冲器8204用于增强该行扫描驱动电压VGm的驱动能力，如增加其输入电流等，并将增强后的行扫描驱动电压VGm发送至对应的扫描线Xm。
进一步的，该驱动电路80还包括数据驱动电路830；
该数据驱动电路830用于接收列向数据电压信号Sn，并转换为数据电压VSn，以发送至对应的数据线Yn。
其中，列向数据电压信号Sn也是数字信号，经数字驱动电路转换如提升为高电压的模拟数据电压Vsn，以发送至对应的数据线Yn用于对连接至数据线Yn上的子像素单元110进行预充电使其极性反转，并写入当前需要显示灰阶对应的数据电压Vsn。
区别于现有技术、第一实施方式的情况，本实施方式通过对当前需要显示子像素单元将要写入的第三数据电压与当前帧上一行相同列对应的子像素单元的第二数据电压和前一帧当前需要显示子像素单元的第一数据电压进行比对，计算当前子像素单元是否需要进行预充电或实时计算由第一数据电压按照第二数据单元充电至第三数据电压的时间，并将该时间作为预充电时间，使得每行需要显示子像素单元的预充电时间不会产生过充电现象，进而实现降低液晶面板驱动功率消耗、降低驱动电路温度，同时提高显示画面的锐度。
请参阅图9，图9是本发明提供的液晶显示面板驱动方法第三实施方式的流程示意图。该方法包括：
步骤901：驱动电路接收视频信号，并解析获得帧开启信号和需要显示灰阶对应的列向数据电压信号；
步骤902：根据该列向数据电压信号实时计算获得当前需要显示子像素单元的预充电时间，进而根据该预充电时间得到预充电控制信号；
步骤903：根据该帧开启信号生成行扫描驱动电压信号；
步骤904：将预充电控制信号和行扫描驱动电压信号叠加，进而转换为行扫描驱动电压；
步骤905：发送行扫描驱动电压至对应的扫描线。
其中，本实施方式提供的方法对应于上述第一实施方式的驱动电路50进行的操作，具体的，步骤901和步骤902对应时序控制芯片510进行的操作，步骤903、步骤904和步骤905对应扫描驱动电路520进行的操作，此处不再赘述。
请参阅图10，图10是本发明提供的液晶显示面板驱动方法第四实施方式的流程图。该方法10包括：
步骤1001：驱动电路接收视频信号，并解析获得帧开启信号和需要显示灰阶对应的列向数据电压信号；
步骤1002：根据解析获得的该列向数据电压信号，实时提取当前需要显示子像素单元前一帧的列向数据电压信号并计算获得第一数据电压，实时提取当前需要显示子像素单元当前帧的上一行相同列对应子像素单元的列向数据电压信号并计算获得第二数据电压，实时提取当前需要显示子像素单元当前帧的列向数据电压信号并计算获得第三数据电压，并实时计算获得由该第一数据电压按照该第二数据电压充电到该第三数据电压的时间，将该时间作为预充电时间，进而将该预充电时间作为预充电控制信号的时间得到该预充电控制信号；
步骤1003：根据该帧开启信号生成行扫描驱动电压信号；
步骤1004：将预充电控制信号和行扫描驱动电压信号叠加，进而转换为行扫描驱动电压；
步骤1005：发送行扫描驱动电压至对应的扫描线。
其中本实施方式的方法对应于上述第二实施方式的驱动电路80进行的操作，具体的步骤1001和步骤1002对应时序控制芯片810进行的操作，步骤1003、步骤1004和步骤1005对应扫描驱动电路820进行的操作，此处不再赘述。
其中，步骤1004包括步骤10041和步骤10042；
步骤10041：将预充电控制信号和行扫描驱动电压信号叠加获得行扫描驱动信号；
步骤10042：将行扫描驱动信号转化为行扫描驱动电压；
其中，步骤1004还包括步骤10043；
步骤10043：增强行扫描驱动电压的驱动能力。
进一步的，在步骤1001之后，1005之前还包括步骤1006；
步骤1006：将列向数据电压信号转换为数据电压，并发送至对应的数据线。
其中，可以理解的是，步骤1006中发送数据电压至对应的数据线与步骤1005是同时进行的步骤。
以上仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (18)

  1. 一种用于液晶面板的驱动电路，其中，包括：
    时序控制芯片，用于接收视频信号，解析获得帧开启信号和需要显示灰阶对应的列向数据电压信号，且将解析得到的所述列向数据电压信号实时提取所述当前需要显示子像素单元前一帧的所述列向数据电压信号并计算获得第一数据电压，实时提取所述当前需要显示子像素单元当前帧的上一行相同列对应子像素单元的所述列向数据电压信号并计算获得第二数据电压，实时提取所述当前需要显示子像素单元当前帧的所述列向数据电压信号并计算获得第三数据电压，并实时计算获得由所述第一数据电压按照所述第二数据电压充电到所述第三数据电压的时间，将所述时间作为预充电时间，进而将所述预充电时间作为所述预充电控制信号的时间得到所述预充电控制信号；
    扫描驱动电路，包括移位寄存器、逻辑运算器和电位转移器；
    所述移位寄存器用于接收所述帧开启信号以产生行扫描驱动电压信号；
    所述逻辑运算器用于接收所述预充电控制信号，并与所述扫描驱动电压信号叠加获得行扫描驱动信号；
    所述电位移位器用于将所述行扫描驱动信号转换为行扫描驱动电压，以发送至对应的扫描线。
  2. 一种用于液晶面板的驱动电路，其中，包括：
    时序控制芯片，用于接收视频信号，并解析获得帧开启信号和需要显示灰阶对应的列向数据电压信号；和用于根据所述列向数据电压信号实时计算获得当前需要显示子像素单元的预充电时间，进而根据所述预充电时间得到预充电控制信号；
    扫描驱动电路，用于接收所述帧开启信号以产生行扫描驱动电压信号；和用于接收所述预充电控制信号，并将其与所述扫描驱动电压信号叠加，进而转换为行扫描驱动电压，并发送至对应的扫描线。
  3. 根据权利要求2所述的驱动电路，其中，
    所述时序控制芯片具体用于将解析得到的所述列向数据电压信号实时提取所述当前需要显示子像素单元前一帧的所述列向数据电压信号并计算获得第一数据电压，实时提取所述当前需要显示子像素单元当前帧的上一行相同列对应 子像素单元的所述列向数据电压信号并计算获得第二数据电压，实时提取所述当前需要显示子像素单元当前帧的所述列向数据电压信号并计算获得第三数据电压，并实时计算获得由所述第一数据电压按照所述第二数据电压充电到所述第三数据电压的时间，将所述时间作为预充电时间，进而将所述预充电时间作为所述预充电控制信号的时间得到所述预充电控制信号。
  4. 根据权利要求2所述的驱动电路，其中，
    所述扫描驱动电路包括移位寄存器、逻辑运算器和电位转移器；
    所述移位寄存器用于接收所述帧开启信号以产生行扫描驱动电压信号；
    所述逻辑运算器用于接收所述预充电控制信号，并与所述扫描驱动电压信号叠加获得行扫描驱动信号；
    所述电位移位器用于将所述行扫描驱动信号转换为行扫描驱动电压，以发送至对应的扫描线。
  5. 根据权利要求4所述的驱动电路，其中，
    所述扫描驱动电路还包括输出缓冲器；
    所述输出缓冲器用于增强所述行扫描驱动电压的驱动能力，并将增强后的所述行扫描驱动电压发送至对应的扫描线。
  6. 根据权利要求2所述的驱动电路，其中，
    所述驱动电路还包括数据驱动电路；
    所述数据驱动电路用于接收所述列向数据电压信号，并转换为数据电压，将所述数据电压发送至对应的数据线。
  7. 根据权利要求3所述的驱动电路，其中，
    所述驱动电路还包括数据驱动电路；
    所述数据驱动电路用于接收所述列向数据电压信号，并转换为数据电压，将所述数据电压发送至对应的数据线。
  8. 根据权利要求4所述的驱动电路，其中，
    所述驱动电路还包括数据驱动电路；
    所述数据驱动电路用于接收所述列向数据电压信号，并转换为数据电压，将所述数据电压发送至对应的数据线。
  9. 根据权利要求5所述的驱动电路，其中，
    所述驱动电路还包括数据驱动电路；
    所述数据驱动电路用于接收所述列向数据电压信号，并转换为数据电压， 将所述数据电压发送至对应的数据线。
  10. 一种用于液晶面板的驱动方法，其中，包括步骤：
    S1驱动电路接收视频信号，并解析获得帧开启信号和需要显示灰阶对应的列向数据电压信号；
    S2根据所述列向数据电压信号实时计算获得当前需要显示子像素单元的预充电时间，进而根据所述预充电时间得到预充电控制信号；
    S3根据所述帧开启信号生成行扫描驱动电压信号；
    S4将所述预充电控制信号和所述行扫描驱动电压信号叠加，进而转换为行扫描驱动电压；
    S5发送所述行扫描驱动电压至对应的扫描线。
  11. 根据权利要求10所述的驱动方法，其中，
    所述步骤S2的具体步骤：
    根据所述列向数据电压信号，实时提取所述当前需要显示子像素前一帧的所述列向数据电压信号并计算获得第一数据电压，实时提取所述当前需要显示子像素单元当前帧的上一行相同列对应子像素单元的所述列向数据电压信号并计算获得第二数据电压，实时提取所述当前需要显示子像素单元当前帧的所述列向数据电压信号并计算获得第三数据电压，并实时计算获得由所述第一数据电压按照所述第二数据电压充电到所述第三数据电压的时间，将所述时间作为预充电时间，进而将所述预充电时间作为所述预充电控制信号的时间得到所述预充电控制信号。
  12. 根据权利要求10所述的包装箱体，其中，
    所述步骤S4包括步骤：
    S41将所述预充电控制信号和所述行扫描驱动电压信号叠加获得行扫描驱动信号；
    S42将所述行扫描驱动信号转化为所述行扫描驱动电压。
  13. 根据权利要求12所述的驱动方法，其特征在于，
    在所述步骤S42之后还包括步骤：
    S43增强所述行扫描驱动电压的驱动能力。
  14. 根据权利要求10所述的驱动方法，其特征在于，
    在所述步骤S1之后、所述步骤S5之前还包括步骤：
    S6将所述列向数据电压信号转换为数据电压，并发送至对应的数据线。
  15. 根据权利要求11所述的驱动方法，其特征在于，
    在所述步骤S1之后、所述步骤S5之前还包括步骤：
    S6将所述列向数据电压信号转换为数据电压，并发送至对应的数据线。
  16. 根据权利要求12所述的驱动方法，其特征在于，
    在所述步骤S1之后、所述步骤S5之前还包括步骤：
    S6将所述列向数据电压信号转换为数据电压，并发送至对应的数据线。
  17. 根据权利要求13所述的驱动方法，其特征在于，
    在所述步骤S1之后、所述步骤S5之前还包括步骤：
    S6将所述列向数据电压信号转换为数据电压，并发送至对应的数据线。
  18. 根据权利要求14所述的驱动方法，其特征在于，
    在所述步骤S1之后、所述步骤S5之前还包括步骤：
    S6将所述列向数据电压信号转换为数据电压，并发送至对应的数据线。
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