WO2015188520A1 - 像素驱动电路、驱动方法、阵列基板及显示装置 - Google Patents

像素驱动电路、驱动方法、阵列基板及显示装置 Download PDF

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Publication number
WO2015188520A1
WO2015188520A1 PCT/CN2014/087600 CN2014087600W WO2015188520A1 WO 2015188520 A1 WO2015188520 A1 WO 2015188520A1 CN 2014087600 W CN2014087600 W CN 2014087600W WO 2015188520 A1 WO2015188520 A1 WO 2015188520A1
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Prior art keywords
transistor
voltage
storage capacitor
line
gate
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PCT/CN2014/087600
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English (en)
French (fr)
Inventor
王颖
殷新社
李光
孙亮
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京东方科技集团股份有限公司
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Priority to EP14866804.9A priority Critical patent/EP3156994B1/en
Priority to US14/650,687 priority patent/US9747839B2/en
Publication of WO2015188520A1 publication Critical patent/WO2015188520A1/zh

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    • G—PHYSICS
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
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    • G09G2300/0809—Several active elements per pixel in active matrix panels
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    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
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    • G09G2330/028—Generation of voltages supplied to electrode drivers in a matrix display other than LCD

Definitions

  • Embodiments of the present invention relate to the field of display technologies, and in particular, to a pixel driving circuit, a driving method, an array substrate, and a display device.
  • OLED Organic Light-Emitting Diode
  • AMOLED Active matrix OLED
  • the main problem to be solved is the non-uniformity of the brightness of the OLED device driven by each AMOLED pixel driving unit.
  • the AMOLED uses a Thin-Film Transistor (TFT) to construct a pixel driving unit to provide a corresponding driving current for the light emitting device.
  • TFT Thin-Film Transistor
  • low temperature polysilicon thin film transistors or oxide thin film transistors are mostly used.
  • low temperature polysilicon thin film transistors and oxide thin film transistors have higher mobility and more stable characteristics, and are more suitable for use in AMOLED displays.
  • due to the limitations of the crystallization process low-temperature polysilicon thin film transistors fabricated on large-area glass substrates often have non-uniformities in electrical parameters such as threshold voltage and mobility, and this non-uniformity is converted into OLED devices.
  • Oxide thin film transistor has good uniformity of process, but similar to amorphous silicon thin film transistor, its threshold voltage will drift under long time pressure and high temperature. Due to different display screens, threshold shift of thin film transistors in each part of panel Different amounts will cause differences in display brightness. Since this difference is related to the previously displayed image, it often appears as an afterimage phenomenon.
  • the threshold characteristic of the driving transistor thereof greatly affects the driving current and the brightness of the final display.
  • the driving transistor is subjected to voltage stress and illumination, its threshold value will drift. This threshold drift will manifest as uneven brightness in the display effect.
  • the pixel circuit of the existing AMOLED generally has a complicated structure design of the pixel circuit, which directly leads to a decrease in the yield of the pixel circuit of the AMOLED.
  • an embodiment of the present invention urgently provides a pixel driving unit, a driving method thereof, and a pixel circuit.
  • the technical problem to be solved by the embodiments of the present invention is how to implement an AMOLED pixel driving circuit having the ability to compensate and eliminate display unevenness caused by the threshold voltage difference of the driving transistor.
  • an embodiment of the present invention provides a pixel driving circuit, including: a data line, a gate line, a first power line, a second power line, a reference signal line, a light emitting device, a driving transistor, a storage capacitor, and a reset.
  • a data line including: a data line, a gate line, a first power line, a second power line, a reference signal line, a light emitting device, a driving transistor, a storage capacitor, and a reset.
  • Unit data writing unit, compensation unit and lighting control unit;
  • the data line is for providing a data voltage
  • the gate line is for providing a scan voltage
  • the first power line is for providing a first power voltage
  • the second power line is for providing a second power voltage
  • the reference signal line is for providing a reference voltage
  • the reset unit is connected to the reference signal line and the storage capacitor for resetting a voltage across the storage capacitor to a predetermined signal voltage
  • the data writing unit is connected to the gate line, the data line and the second end of the storage capacitor, and is configured to write information including a data voltage to the second end of the storage capacitor,
  • the compensation unit is connected to the gate line, the first end of the storage capacitor, and the driving transistor, and is configured to write information including a driving transistor threshold voltage and information of the first power voltage to the first end of the storage capacitor;
  • the illumination control unit is connected to the reference signal line, the second end of the storage capacitor, the driving transistor, and the light emitting device, for writing the reference voltage to the second end of the storage capacitor, and controlling the The driving transistor drives the light emitting device to emit light;
  • the first end of the storage capacitor is connected to the gate of the driving transistor for transferring information including the data voltage to the gate of the driving transistor;
  • the driving transistor is connected to the first power line, the light emitting device is connected to the second power line, and the driving transistor is configured to be under the control of the light emitting control unit according to the data voltage, the driving transistor threshold voltage, the reference voltage, and the first The information of the supply voltage controls the amount of current flowing to the light emitting device.
  • the reset unit includes: a reset control line, a reset signal line, a first transistor and a second transistor, a gate of the first transistor is connected to the reset control line, and a source is connected to the reset signal line a drain connected to the first end of the storage capacitor, the first transistor is configured to write a reset signal line voltage to the first end of the storage capacitor; and a gate of the second transistor is connected to the reset control line
  • the source is connected to the reference signal line, the drain is connected to the second end of the storage capacitor, and the second transistor is used to write a reference voltage to the second end of the storage capacitor.
  • the first transistor and the second transistor are both P-type transistors.
  • the data writing unit includes: a fourth transistor, a gate of the fourth transistor is connected to the gate line, a source is connected to the data line, and a drain is connected to a second end of the storage capacitor
  • the fourth transistor is configured to write the data voltage to the second end of the storage capacitor.
  • the fourth transistor is a P-type transistor.
  • the compensation unit includes: a third transistor, a gate of the third transistor is connected to the gate line, a source is connected to a first end of the storage capacitor, and a drain is connected to a drain of the driving transistor And the third transistor is configured to write information including threshold voltage information of the driving transistor and the first power voltage to the first end of the storage capacitor.
  • the third transistor is a P-type transistor.
  • the illumination control unit includes: a light emission control line, a fifth transistor, and a sixth transistor; a gate of the fifth transistor is connected to the light emission control line, a source is connected to the reference signal line, and a drain Connecting a second end of the storage capacitor, the fifth transistor is for using the reference Writing a voltage to the second end of the storage capacitor and transferring the storage capacitor to the gate of the driving transistor; the gate of the sixth transistor is connected to the light emitting control line, the source is connected to the first end of the light emitting device, and the drain a pole connected to the drain of the driving transistor, the sixth transistor is configured to control the light emitting device to emit light, and the driving transistor is configured to, under the control of the light emitting control unit, according to the data voltage, the driving transistor threshold voltage, the first power source The voltage and reference voltage information controls the amount of current flowing to the light emitting device.
  • the fifth transistor and the sixth transistor are both P-type transistors.
  • the drive transistor is a P-type transistor.
  • the embodiment of the present invention further provides a driving method of the pixel driving circuit according to any of the above items, comprising the following process:
  • the reset unit In the reset phase, the reset unit resets a voltage across the storage capacitor to a predetermined voltage
  • the data writing unit writes the data voltage to a second end of the storage capacitor
  • the compensation unit writes threshold voltage information including a driving transistor to a first end of the storage capacitor and a power supply voltage information
  • a light emitting control unit that writes the reference voltage to a second end of the storage capacitor, the storage capacitor transducing information including a data voltage and a reference voltage to a gate of a driving transistor, the driving transistor The magnitude of the current flowing to the light emitting device is controlled according to information including the data voltage, the driving transistor threshold voltage, the reference voltage, and the first power source voltage under control of the light emitting control unit to drive the light emitting device to emit light.
  • the reset unit resets the voltage across the storage capacitor to be a reset signal line voltage and a reference voltage, respectively.
  • An embodiment of the present invention further provides an array substrate, including the pixel driving circuit of any of the above.
  • the embodiment of the invention further provides a display device comprising the above array substrate.
  • the pixel driving unit of the embodiment of the present invention has a structure in which a gate and a drain of a driving transistor are connected (when a gate control signal is turned on, a gate and a drain of the driving transistor are connected through a third switching transistor), so that the driving a drain of the transistor loads the first supply voltage together with a threshold voltage of the driving transistor to a first end of the storage capacitor, and thereby cancels a threshold voltage of the driving transistor;
  • the non-uniformity caused by the self-threshold voltage of the driving transistor and the image sticking phenomenon caused by the threshold voltage drift can be effectively eliminated; the difference in the active matrix light-emitting organic electroluminescent display tube is avoided.
  • the source matrix illuminates the quality of the organic electroluminescent display tube.
  • FIG. 1 is a circuit diagram of a pixel driving circuit according to an embodiment of the present invention.
  • FIG. 2 is a diagram showing a pixel structure of an embodiment of the present invention.
  • FIG. 3 is a timing chart of the pixel driving circuit of FIG. 1.
  • each transistor defined in the embodiment of the present invention is one end of the control transistor, and the source and the drain are both ends of the transistor except the gate, where the source and the drain are only for convenience.
  • the connection relationship of the transistors is not limited to the current direction. Those skilled in the art can clearly know the working principle and state according to the type of the transistor, the signal connection mode and the like.
  • the pixel driving circuit of the embodiment of the present invention includes: a data line Data, a gate line Gate, a first power line ELVDD, a second power line ELVSS, a reference signal line ref, a light emitting device D, a driving transistor T7, The storage capacitor C1, the reset unit, the data writing unit, the compensation unit, and the illumination control unit.
  • the data line Data is used to provide a data voltage
  • the gate line Gate is used to provide a scan voltage
  • the first power line ELVDD is used to provide a first power voltage
  • the second power line ELVSS is used to provide a second power voltage
  • the reference signal line ref Used to provide a reference voltage.
  • the light emitting device D may be an organic light emitting diode.
  • the gate of the driving transistor T7 is connected to the first terminal N1 of the storage capacitor C1, the source is connected to the first power line ELVDD, and the drain is connected to the light emission control unit.
  • the reset unit is connected to the reference signal line ref and the storage capacitor C1 for resetting the voltage across the storage capacitor C1 to a predetermined voltage.
  • the data writing unit connects the gate line Gate, the data line Data, and the second end N2 of the storage capacitor C1 for writing information including the data voltage to the second terminal N2 of the storage capacitor C1.
  • the compensation unit connects the gate line Gate, the first terminal N1 of the storage capacitor C1, and the driving transistor T7, and writes information including the threshold voltage information of the driving transistor and the first power supply voltage to the first terminal N1 of the storage capacitor C1.
  • the illumination control unit is connected to the reference signal line ref, the second terminal N2 of the storage capacitor C1, the driving transistor T7 and the light emitting device D for writing a reference voltage to the second terminal N2 of the storage capacitor C1, and controlling the driving transistor T7 to drive the light emitting device. D illuminates.
  • the first terminal N1 of the storage capacitor C1 is coupled to the gate of the driving transistor T7 for transferring information including the data voltage to the gate of the driving transistor T7.
  • the driving transistor T7 is connected to the first power line ELVDD, and the light emitting device D is connected to the second power line ELVSS, and the driving transistor T7 is used under the control of the light emitting control unit according to the data voltage, the threshold voltage of the driving transistor T7, the reference voltage, and Information of the first supply voltage controls the amount of current flowing to the light emitting device D.
  • the threshold voltage of the driving transistor is extracted by the compensation unit, and the threshold voltage of the driving transistor T7 can be offset during the driving of the light emitting device, so that the driving transistor can be effectively eliminated from the threshold voltage of the driving transistor.
  • the resulting non-uniformity and image sticking caused by threshold voltage drift avoid the problem of uneven display brightness caused by different threshold voltages of different driving pixels of the active matrix organic electroluminescent display device.
  • the light emission control unit writes a reference voltage to the second terminal N2 of the storage capacitor C1, and as shown in FIG. 2, the reference voltage is transmitted through the reference signal line ref independent of the first power source line ELVDD, during the driving process.
  • the current on the reference signal line ref is small, the voltage drop is small, and the storage capacitor is connected to the gate of the driving transistor. Because the reference voltage is stable with respect to the first power supply voltage, the gate voltage of the driving transistor is relatively stable, and The problem of uneven brightness of different pixels caused by the influence of the first power supply voltage drop on the current is avoided.
  • the pixel structure can also minimize the DC variation on the reference signal line ref
  • the effect of uniformity is displayed, and the purpose of sharing the reference signal line ref by adjacent pixels can be achieved, and the area occupied by the pixel driving circuit can be minimized, so that the aperture ratio can be improved.
  • FIG. 2 only schematically illustrates the pixel structure, and is not limited to the pixel structure, and other layout manners may be adopted in actual design.
  • the reset unit includes: a reset control line Reset, a reset signal line ini, a first transistor T1, and a second transistor T2.
  • the gate of the first transistor T1 is connected to the reset control line Reset, the source is connected to the reset signal line ini, and the drain is connected to the first end of the storage capacitor C1.
  • the first transistor T1 is used to write the voltage Vini of the reset signal line ini to the storage capacitor.
  • the gate of the second transistor T2 is connected to the reset control line Reset, the source connection reference signal line ref, the drain is connected to the second end of the storage capacitor C1, and the second transistor T2 is used to write the reference voltage Vref of the reference signal line ref into the storage.
  • the data writing unit includes a fourth transistor T4.
  • the gate of the fourth transistor T4 is connected to the gate line Gate, the source connection data line Data, and the drain is connected to the second end of the storage capacitor C1.
  • the fourth transistor T4 is used to write the data voltage Vdata to the second end of the storage capacitor. Even the voltage at point N2 is Vdata.
  • the compensation unit includes a third transistor T3, the gate of the third transistor T3 is connected to the gate line Gate, the source is connected to the first end of the storage capacitor C1, the drain is connected to the drain of the driving transistor T7, and the third transistor T3 is used to include the driving
  • the information of the threshold voltage Vth of the transistor T7 and the information of the first power supply voltage are written to the first end of the storage capacitor C1, that is, the voltage at the point N1 is Vdd-Vth, and Vdd is the first power supply voltage of the first power supply line ELVDD, and Vth is The threshold voltage of the driving transistor T7 is driven.
  • the light emission control unit includes an emission control line EM, a fifth transistor T5, and a sixth transistor T6.
  • the gate of the fifth transistor T5 is connected to the light-emitting control line EM, the source is connected to the reference signal line ref, and the drain is connected to the second end of the storage capacitor C1.
  • the fifth transistor T5 is used to write the reference voltage Vref to the second of the storage capacitor C1.
  • the terminal is transferred from the storage capacitor C1 to the gate of the driving transistor T7.
  • the gate of the sixth transistor T6 is connected to the light-emitting control line EM, the first end of the source is connected to the light-emitting device D, and the drain is connected to the drain of the driving transistor T7.
  • the sixth transistor T6 is used to control the light-emitting device D to emit light, that is, when the T6 is turned on.
  • the driving transistor T7 can cause the driving current to flow to the light emitting device D.
  • the driving transistor T7 controls the magnitude of the current flowing to the light emitting device D according to information including the data voltage Vdata, the driving transistor threshold voltage Vth, the first power source voltage Vdd, and the reference voltage Vref under the control of the light emission control unit.
  • the circuit structure of this embodiment includes three stages of operation.
  • the first stage t1 the reset control line Reset signal is valid, T1, T2 are turned on, and the two ends of the storage capacitor C1 are reset. At this time, the voltage Vint of the reset signal line int is written to the point N1, and the point N2 is the reference voltage Vref.
  • the second stage t2 the gate line signal is valid, so that T3 and T4 are turned on, the N2 point is written to Vdata, and the N1 point is written to Vdd-Vth.
  • the storage capacitor C1 stores the voltage as Vdd-Vth-Vdata.
  • information including the first power supply voltage information and the threshold voltage of the driving transistor is written to the first end of the storage capacitor C1.
  • the third stage t3 the signal of the illumination control line EM is valid, T5 and T6 are turned on, T5 is connected to the reference signal line ref, the potential of the N2 point is Vref, and the potential of the N1 point is Vdd-Vth-Vdata+Vref, which is the gate of the driving transistor.
  • ⁇ is the carrier mobility
  • Cox is the gate oxide capacitance
  • W/L is the width to length ratio of the driving transistor.
  • the current I has been independent of the threshold voltage Vth of the driving transistor T7, thereby avoiding that different pixels in the active matrix organic electroluminescent display device have different threshold voltages due to their driving transistors.
  • the resulting display brightness is uneven.
  • the current I is independent of Vdd.
  • Vref only charges the storage capacitor.
  • the current on the corresponding line is small, and the voltage drop is small.
  • the storage capacitor is connected to the gate of the driving transistor. Because Vref is stable with respect to Vdd, the gate of the driving transistor is driven. The voltage is also relatively stable, which can avoid the problem of uneven brightness of different pixels caused by the influence of Vdd drop on the current.
  • the driving transistor, the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor in the above embodiments are all P-type transistors. Of course, it can also be an N-type, or a combination of a P-type and an N-type, except that the effective signals of the gate control signal lines are different.
  • Embodiments of the present invention provide a driving method of the above pixel driving circuit, which includes the following processes:
  • the reset unit In the reset phase, the reset unit resets a voltage across the storage capacitor to a predetermined voltage
  • the data writing unit writing to the second end of the storage capacitor Describe a data voltage, the compensation unit writes threshold voltage information including a driving transistor and first power voltage information to a first end of the storage capacitor;
  • a light emitting control unit that writes the reference voltage to a second end of the storage capacitor, the storage capacitor transducing information including a data voltage and a reference voltage to a gate of a driving transistor, the driving transistor The magnitude of the current flowing to the light emitting device is controlled according to information including the data voltage, the driving transistor threshold voltage, the reference voltage, and the first power source voltage under control of the light emitting control unit to drive the light emitting device to emit light.
  • the reset unit resets the voltage across the storage capacitor to be a reset signal line voltage and a reference voltage, respectively.
  • This embodiment provides an array substrate including the pixel driving circuit of the above embodiment.
  • the display device may be: an AMOLED panel, a television, a digital photo frame, a mobile phone, a tablet computer, or the like having any display function.

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Abstract

一种像素驱动电路及其驱动方法、阵列基板及显示装置。像素驱动电路包括：数据线（Data）、栅线（Gate）、第一电源线（ELVDD）、第二电源线（ELVSS）、参考信号线（ref）、发光器件（D）、驱动晶体管（T7)、存储电容（C1）、复位单元、数据写入单元、补偿单元及发光控制单元。该像素驱动电路能够补偿和消除驱动晶体管阈值电压差所造成的显示不均。

Description

像素驱动电路、驱动方法、阵列基板及显示装置 技术领域
本发明实施例涉及显示技术领域，特别涉及一种像素驱动电路、驱动方法、阵列基板及显示装置。
背景技术
有机电致发光二极管(Organic Light-Emitting Diode，OLED)作为一种电流型发光器件已越来越多地被应用于高性能有源矩阵发光有机电致显示管中。传统的无源矩阵有机电致发光显示管(Passive Matrix OLED)随着显示尺寸的增大，需要更短的单个像素的驱动时间，因而需要增大瞬态电流，增加功耗。同时大电流的应用会造成氧化铟锡金属氧化物线上压降过大，并使OLED工作电压过高，进而降低其效率。而有源矩阵有机电致发光显示管(Active Matrix OLED，AMOLED)通过开关晶体管逐行扫描输入OLED电流，可以很好地解决这些问题。
在AMOLED的像素电路设计中，主要需要解决的问题是各AMOLED像素驱动单元所驱动的OLED器件亮度的非均匀性。
首先，AMOLED采用薄膜晶体管(Thin-Film Transistor，TFT)构建像素驱动单元为发光器件提供相应的驱动电流。据发明人所知，大多采用低温多晶硅薄膜晶体管或氧化物薄膜晶体管。与一般的非晶硅薄膜晶体管相比，低温多晶硅薄膜晶体管和氧化物薄膜晶体管具有更高的迁移率和更稳定的特性，更适合应用于AMOLED显示中。但是由于晶化工艺的局限性，在大面积玻璃基板上制作的低温多晶硅薄膜晶体管，常常在诸如阈值电压、迁移率等电学参数上具有非均匀性，这种非均匀性会转化为OLED器件的驱动电流差异和亮度差异，并被人眼所感知，即色不均现象。氧化物薄膜晶体管虽然工艺的均匀性较好，但是与非晶硅薄膜晶体管类似，在长时间加压和高温下，其阈值电压会出现漂移，由于显示画面不同，面板各部分薄膜晶体管的阈值漂移量不同，会造成显示亮度差异，由于这种差异与之前显示的图像有关，因此常呈现为残影现象。
由于OLED的发光器件是电流驱动器件，因此，在驱动发光器件发光的像素驱动单元中，其驱动晶体管的阈值特性对驱动电流和最终显示的亮度影响很大。驱动晶体管受到电压应力和光照都会使其阈值发生漂移，这种阀值漂移会在显示效果上体现为亮度不均。
另外，现有AMOLED的像素电路为了消除驱动晶体管阈值电压差所造成的影响，通常会将像素电路的结构设计的比较复杂，这会直接导致AMOLED的像素电路制作良品率的降低。
因此，为解决上述问题，本发明实施例急需提供一种像素驱动单元及其驱动方法、像素电路。
发明内容
(一)要解决的技术问题
本发明实施例要解决的技术问题是：如何实现一种具有补偿和消除驱动晶体管阈值电压差所造成的显示不均的能力的AMOLED像素驱动电路。
(二)技术方案
为解决上述技术问题，本发明实施例提供了一种像素驱动电路，包括：数据线、栅线、第一电源线、第二电源线、参考信号线、发光器件、驱动晶体管、存储电容、复位单元、数据写入单元、补偿单元及发光控制单元；
所述数据线用于提供数据电压；
所述栅线用于提供扫描电压；
所述第一电源线用于提供第一电源电压，所述第二电源线用于提供第二电源电压，所述参考信号线用于提供参考电压；
所述复位单元连接所述参考信号线和存储电容，用于复位所述存储电容两端的电压为预定信号电压；
所述数据写入单元连接栅线、数据线及所述存储电容的第二端，用于向所述存储电容的第二端写入包括数据电压的信息，
所述补偿单元连接栅线、存储电容的第一端和驱动晶体管，用于向存储电容的第一端写入包括驱动晶体管阈值电压的信息以及第一电源电压的信息；
所述发光控制单元连接所述参考信号线、所述存储电容的第二端、驱动晶体管和所述发光器件，用于向所述存储电容的第二端写入所述参考电压，并控制所述驱动晶体管驱动发光器件发光；
所述存储电容的第一端连接驱动晶体管的栅极，用于将包括数据电压的信息转写至驱动晶体管的栅极；
所述驱动晶体管连接第一电源线，所述发光器件连接第二电源线，所述驱动晶体管用于在发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压、参考电压以及第一电源电压的信息控制流向发光器件的电流大小。
在一个例子中，所述复位单元包括：复位控制线、复位信号线、第一晶体管和第二晶体管，所述第一晶体管的栅极连接所述复位控制线、源极连接所述复位信号线、漏极连接所述存储电容的第一端，所述第一晶体管用于将复位信号线电压写入所述存储电容的第一端；所述第二晶体管的栅极连接所述复位控制线、源极连接所述参考信号线、漏极连接所述存储电容的第二端，所述第二晶体管用于将参考电压写入所述存储电容的第二端。
在一个例子中，所述第一晶体管和第二晶体管均为P型晶体管。
在一个例子中，所述数据写入单元包括：第四晶体管，所述第四晶体管的栅极连接所述栅线、源极连接所述数据线、漏极连接所述存储电容的第二端，所述第四晶体管用于将所述数据电压写入存储电容的第二端。
在一个例子中，所述第四晶体管为P型晶体管。
在一个例子中，所述补偿单元包括：第三晶体管，所述第三晶体管的栅极连接所述栅线、源极连接所述存储电容的第一端、漏极连接所述驱动晶体管的漏极，所述第三晶体管用于将包括驱动晶体管的阈值电压信息以及第一电源电压的信息写入所述存储电容的第一端。
在一个例子中，所述第三晶体管为P型晶体管。
在一个例子中，所述发光控制单元包括：发光控制线、第五晶体管和第六晶体管；所述第五晶体管的栅极连接所述发光控制线、源极连接所述参考信号线、漏极连接所述存储电容的第二端，所述第五晶体管用于将所述参考 电压写入存储电容的第二端，并由存储电容转写至驱动晶体管栅极；所述第六晶体管的栅极连接所述发光控制线、源极连接所述发光器件的第一端、漏极连接所述驱动晶体管的漏极，所述第六晶体管用于控制发光器件发光，所述驱动晶体管用于在发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压、第一电源电压和参考电压的信息控制流向发光器件的电流大小。
在一个例子中，所述第五晶体管和第六晶体管均为P型晶体管。
在一个例子中，所述驱动晶体管为P型晶体管。
本发明实施例还提供了一种上述任一项所述的像素驱动电路的驱动方法，包括如下过程：
复位阶段，所述复位单元复位所述存储电容两端的电压为预定电压；
数据电压写入阶段，所述数据写入单元向所述存储电容的第二端写入所述数据电压，所述补偿单元向存储电容的第一端写入包括驱动晶体管的阈值电压信息以及第一电源电压信息；
发光阶段，所述发光控制单元向所述存储电容的第二端写入所述参考电压，所述存储电容将包括数据电压和参考电压的信息转写至驱动晶体管的栅极，所述驱动晶体管在发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压、参考电压以及第一电源电压的信息控制流向发光器件的电流大小，以驱动所述发光器件发光。
其中，在所述复位阶段，所述复位单元复位所述存储电容两端的电压分别为复位信号线电压和参考电压。
本发明实施例还提供了一种阵列基板，包括上述任一项所述的像素驱动电路。
本发明实施例还提供了一种显示装置，包括上述的阵列基板。
(三)有益效果
本发明实施例的像素驱动单元，通过驱动晶体管的栅极和漏极相连的结构(当栅极控制信号开启时，驱动晶体管的栅极与漏极通过第三开关晶体管相连)，使所述驱动晶体管的漏极将所述第一电源电压连同所述驱动晶体管的阈值电压一起加载至存储电容第一端，并以此抵消驱动晶体管的阈值电压； 可以在对发光器件进行驱动的过程中，有效地消除驱动晶体管由自身阈值电压所造成的非均匀性和因阈值电压漂移造成的残影现象；避免了有源矩阵发光有机电致显示管中不同像素驱动单元的发光器件之间因其驱动晶体管的阈值电压不同而造成的有源矩阵发光有机电致显示管亮度不均的问题；提高了像素驱动单元对发光器件的驱动效果，进一步提高了有源矩阵发光有机电致显示管的品质。
附图说明
图1是本发明实施例的一种像素驱动电路图；
图2是本发明实施例的一种像素结构图；
图3是图1中像素驱动电路的时序图。
具体实施方式
下面结合附图和实施例，对本发明的具体实施方式作进一步详细描述。以下实施例用于说明本发明实施例，但不用来限制本发明的范围。
需要说明的是，本发明实施例中所定义的各晶体管的栅极为控制晶体管打开的一端，源极和漏极是晶体管除栅极以外的两端，此处源极和漏极只是为了方便说明晶体管的连接关系，并不是对电流走向所做的限定，本领域技术人员可以根据晶体管的类型、信号连接方式等内容清楚的知道其工作的原理和状态。
如图1所示，本发明实施例的像素驱动电路，包括：数据线Data、栅线Gate、第一电源线ELVDD、第二电源线ELVSS、参考信号线ref、发光器件D、驱动晶体管T7、存储电容C1、复位单元、数据写入单元、补偿单元及发光控制单元。其中，数据线Data用于提供数据电压，栅线Gate用于提供扫描电压，第一电源线ELVDD用于提供第一电源电压，第二电源线ELVSS用于提供第二电源电压，参考信号线ref用于提供参考电压。
发光器件D可以为有机发光二极管。驱动晶体管T7的栅极连接所述存储电容C1的第一端N1，源极连接所述第一电源线ELVDD，漏极连接所述发光控制单元。
复位单元连接参考信号线ref和存储电容C1，用于复位存储电容C1两端的电压为预定电压。
数据写入单元连接栅线Gate、数据线Data及存储电容C1的第二端N2，用于向存储电容C1的第二端N2写入包括数据电压的信息。
补偿单元连接栅线Gate、存储电容C1的第一端N1以及驱动晶体管T7，向存储电容C1的第一端N1写入包括驱动晶体管的阈值电压信息以及第一电源电压的信息。
发光控制单元连接参考信号线ref、存储电容C1的第二端N2、驱动晶体管T7和发光器件D，用于向存储电容C1的第二端N2写入参考电压，并控制驱动晶体管T7驱动发光器件D发光。
存储电容C1的第一端N1连接驱动晶体管T7的栅极，用于将包括数据电压的信息转写至驱动晶体管T7的栅极。
驱动晶体管T7连接第一电源线ELVDD，发光器件D连接第二电源线ELVSS，所述驱动晶体管T7用于在发光控制单元的控制下根据包括所述数据电压、驱动晶体管T7阈值电压、参考电压以及第一电源电压的信息来控制流向发光器件D的电流大小。
本实施例的驱动电路中，通过补偿单元提取驱动晶体管的阈值电压，在对发光器件进行驱动的过程中能够与驱动晶体管T7的阈值电压进行抵销，从而可以有效地消除驱动晶体管由自身阈值电压所造成的非均匀性和因阈值电压漂移造成的残影现象，避免了有源矩阵有机电致发光显示器件中不同像素因其驱动晶体管的阈值电压不同而造成的显示亮度不均的问题。
此外，发光控制单元向存储电容C1的第二端N2写入参考电压，而且如图2所示，参考电压是通过与第一电源线ELVDD独立的参考信号线ref来传输的，在驱动过程中、参考信号线ref上的电流较小，电压降也就较小，存储电容与驱动晶体管的栅极连接，因为参考电压相对第一电源电压稳定，驱动晶体管的栅极电压也就较稳定，可以避免第一电源电压下降对电流的影响导致的不同像素的亮度不均的问题。
此外，该像素结构还可以最大程度的降低参考信号线ref上的直流变化对 显示均匀性的影响，并且可以实现相邻的像素共用参考信号线ref的目的，最大程度的减小像素驱动电路所占用的面积，从而能够提高开口率。
需要说明的是，图2只是对像素结构进行示意说明，并不是对像素结构的限定，实际设计时也可以采用其他的布局方式。
本实施例中，复位单元包括：复位控制线Reset、复位信号线ini、第一晶体管T1和第二晶体管T2。第一晶体管T1的栅极连接复位控制线Reset、源极连接复位信号线ini、漏极连接存储电容C1的第一端，第一晶体管T1用于将复位信号线ini的电压Vini写入存储电容C1的第一端。第二晶体管T2的栅极连接复位控制线Reset、源极连接参考信号线ref、漏极连接存储电容C1的第二端，第二晶体管T2用于将参考信号线ref的参考电压Vref写入存储电容C1的第二端。即复位C1两端的电压分别为Vini和Vref。
数据写入单元包括：第四晶体管T4。第四晶体管T4的栅极连接栅线Gate、源极连接数据线Data、漏极连接存储电容C1的第二端，第四晶体管T4用于将数据电压Vdata写入存储电容的第二端。即使N2点的电压为Vdata。
补偿单元包括第三晶体管T3，第三晶体管T3的栅极连接栅线Gate、源极连接存储电容C1的第一端、漏极连接驱动晶体管T7的漏极，第三晶体管T3用于将包括驱动晶体管T7的阈值电压Vth的信息及第一电源电压的信息写入存储电容C1的第一端，即N1点的电压为Vdd－Vth，Vdd为第一电源线ELVDD的第一电源电压，Vth为驱动晶体管T7的阈值电压。
发光控制单元包括：发光控制线EM、第五晶体管T5和第六晶体管T6。第五晶体管T5的栅极连接发光控制线EM、源极连接参考信号线ref、漏极连接存储电容C1的第二端，第五晶体管T5用于将参考电压Vref写入存储电容C1的第二端，并由存储电容C1转写至驱动晶体管T7的栅极。第六晶体管T6的栅极连接发光控制线EM、源极连接发光器件D的第一端、漏极连接驱动晶体管T7的漏极，第六晶体管T6用于控制发光器件D发光，即T6开启时驱动晶体管T7才能使驱动电流流向发光器件D。驱动晶体管T7在发光控制单元的控制下根据包括所述数据电压Vdata、驱动晶体管阈值电压Vth、第一电源电压Vdd和参考电压Vref的信息控制流向发光器件D的电流大小。
如图3所示，本实施例的电路结构工作时包括三个阶段。
第一阶段t1：复位控制线Reset信号有效，T1，T2开启，对存储电容C1两端进行复位。此时，N1点写入复位信号线int的电压Vint，N2点为参考电压Vref。
第二阶段t2：栅线信号有效，使得T3、T4开启，N2点写入Vdata，N1点写入Vdd－Vth，此时存储电容C1存储的电压为Vdd－Vth－Vdata。本阶段T3将包括第一电源电压信息和驱动晶体管的阈值电压的信息写入所述存储电容C1的第一端。
第三阶段t3：发光控制线EM的信号有效，T5、T6开启，T5连接参考信号线ref，N2点电位为Vref，N1点电位为Vdd－Vth－Vdata+Vref，这也就是驱动晶体管的栅极电位，驱动晶体管的源极电位为Vdd，栅源电压Vgs为Vdd－Vth－Vdata+Vref－Vdd，流向发光器件的电流为I＝1/2μCox(W/L)(Vgs－Vth)2＝1/2μCox(W/L)(Vref－Vdata)2。其中，μ为载流子迁移率，Cox为栅氧化层电容，W/L为驱动晶体管的宽长比。
由上述流向发光器件的电流的公式可看出，该电流I已经与驱动晶体管T7的阈值电压Vth无关，因此避免了有源矩阵有机电致发光显示器件中不同像素因其驱动晶体管的阈值电压不同而造成的显示亮度不均的问题。而且该电流I与Vdd无关，Vref只是对存储电容充电，相应线路上电流较小，电压降也就较小，存储电容与驱动晶体管的栅极连接，因为Vref相对Vdd稳定，驱动晶体管的栅极电压也就较稳定，可以避免Vdd下降对电流的影响导致的不同像素的亮度不均的问题。
上述实施例中的驱动晶体管、第一晶体管、第二晶体管、第三晶体管、第四晶体管、第五晶体管、第六晶体管均为P型晶体管。当然也可以是N型，或P型和N型的组合，只是栅极控制信号线的有效信号不同。
本发明实施例提供了一种上述的像素驱动电路的驱动方法，包括以下过程：
复位阶段，所述复位单元复位所述存储电容两端的电压为预定电压；
数据电压写入阶段，所述数据写入单元向所述存储电容的第二端写入所 述数据电压，所述补偿单元向存储电容的第一端写入包括驱动晶体管的阈值电压信息以及第一电源电压信息；
发光阶段，所述发光控制单元向所述存储电容的第二端写入所述参考电压，所述存储电容将包括数据电压和参考电压的信息转写至驱动晶体管的栅极，所述驱动晶体管在发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压、参考电压以及第一电源电压的信息控制流向发光器件的电流大小，以驱动所述发光器件发光。
其中，在所述复位阶段，所述复位单元复位所述存储电容两端的电压分别为复位信号线电压和参考电压。
具体驱动步骤可参见上述实施例的三个工作阶段的介绍，此处不在赘述。
本实施例提供了一种阵列基板，包括上述实施例的像素驱动电路。
本实施例提供了一种显示装置，包括上述的阵列基板。该显示装置可以为：AMOLED面板、电视、数码相框、手机、平板电脑等具有任何显示功能的产品或部件。
以上实施方式仅用于说明本发明，而并非对本发明的限制，有关技术领域的普通技术人员，在不脱离本发明的精神和范围的情况下，还可以做出各种变化和变型，因此所有等同的技术方案也属于本发明的范畴，本发明的专利保护范围应由权利要求限定。
本申请要求于2014年6月13日递交的中国专利申请第201410265310.6号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。

Claims (13)

  1. 一种像素驱动电路，包括：数据线、栅线、第一电源线、第二电源线、参考信号线、发光器件、驱动晶体管、存储电容、复位单元、数据写入单元、补偿单元及发光控制单元；
    所述数据线用于提供数据电压；
    所述栅线用于提供扫描电压；
    所述第一电源线用于提供第一电源电压，所述第二电源线用于提供第二电源电压，所述参考信号线用于提供参考电压；
    所述复位单元连接所述参考信号线和存储电容，用于复位所述存储电容两端的电压为预定信号电压；
    所述数据写入单元连接栅线、数据线及所述存储电容的第二端，用于向所述存储电容的第二端写入包括数据电压的信息，
    所述补偿单元连接栅线、存储电容的第一端和驱动晶体管，用于向存储电容的第一端写入包括驱动晶体管阈值电压的信息以及第一电源电压的信息；
    所述发光控制单元连接所述参考信号线、所述存储电容的第二端、驱动晶体管和所述发光器件，用于向所述存储电容的第二端写入所述参考电压，并控制所述驱动晶体管驱动发光器件发光；
    所述存储电容的第一端连接驱动晶体管的栅极，用于将包括数据电压的信息转写至驱动晶体管的栅极；
    所述驱动晶体管连接第一电源线，所述发光器件连接第二电源线，所述驱动晶体管用于在发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压、参考电压以及第一电源电压的信息控制流向发光器件的电流大小。
  2. 如权利要求1所述的像素驱动电路，其中，所述复位单元包括：复位控制线、复位信号线、第一晶体管和第二晶体管，所述第一晶体管的栅极连接所述复位控制线、源极连接所述复位信号线、漏极连接所述存储电容的第 一端，所述第一晶体管用于将复位信号线电压写入所述存储电容的第一端；所述第二晶体管的栅极连接所述复位控制线、源极连接所述参考信号线、漏极连接所述存储电容的第二端，所述第二晶体管用于将参考电压写入所述存储电容的第二端。
  3. 如权利要求2所述的像素驱动电路，其中，所述第一晶体管和第二晶体管均为P型晶体管。
  4. 如权利要求1所述的像素驱动电路，其中，所述数据写入单元包括：第四晶体管，所述第四晶体管的栅极连接所述栅线、源极连接所述数据线、漏极连接所述存储电容的第二端，所述第四晶体管用于将所述数据电压写入存储电容的第二端。
  5. 如权利要求4所述的像素驱动电路，其中，所述第四晶体管为P型晶体管。
  6. 如权利要求1所述的像素驱动电路，其中，所述补偿单元包括：第三晶体管，所述第三晶体管的栅极连接所述栅线、源极连接所述存储电容的第一端、漏极连接所述驱动晶体管的漏极，所述第三晶体管用于将包括驱动晶体管的阈值电压信息以及第一电源电压的信息写入所述存储电容的第一端。
  7. 如权利要求6所述的像素驱动电路，其中，所述第三晶体管为P型晶体管。
  8. 如权利要求1～7中任一项所述的像素驱动电路，其中，所述发光控制单元包括：发光控制线、第五晶体管和第六晶体管；所述第五晶体管的栅极连接所述发光控制线、源极连接所述参考信号线、漏极连接所述存储电容的第二端，所述第五晶体管用于将所述参考电压写入存储电容的第二端，并由存储电容转写至驱动晶体管栅极；所述第六晶体管的栅极连接所述发光控制线、源极连接所述发光器件的第一端、漏极连接所述驱动晶体管的漏极，所述第六晶体管用于控制发光器件发光，所述驱动晶体管用于在发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压、第一电源电压和参考电压的信息控制流向发光器件的电流大小。
  9. 如权利要求8所述的像素驱动电路，其中，所述驱动晶体管、所述第 五晶体管和第六晶体管均为P型晶体管。
  10. 一种如权利要求1～9中任一项所述的像素驱动电路的驱动方法，包括如下过程：
    复位阶段，所述复位单元复位所述存储电容两端的电压为预定电压；
    数据电压写入阶段，所述数据写入单元向所述存储电容的第二端写入所述数据电压，所述补偿单元向存储电容的第一端写入包括驱动晶体管的阈值电压信息以及第一电源电压信息；
    发光阶段，所述发光控制单元向所述存储电容的第二端写入所述参考电压，所述存储电容将包括数据电压和参考电压的信息转写至驱动晶体管的栅极，所述驱动晶体管在发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压、参考电压以及第一电源电压的信息控制流向发光器件的电流大小，以驱动所述发光器件发光。
  11. 如权利要求10所述的驱动方法，其中，
    在所述复位阶段，所述复位单元复位所述存储电容两端的电压分别为复位信号线电压和参考电压。
  12. 一种阵列基板，包括如权利要求1～9中任一项所述的像素驱动电路。
  13. 一种显示装置，包括如权利要求12所述的阵列基板。
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