WO2014153810A1 - 悬浮栅晶体管及其制作方法、应用方法、显示器驱动电路 - Google Patents
悬浮栅晶体管及其制作方法、应用方法、显示器驱动电路 Download PDFInfo
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- WO2014153810A1 WO2014153810A1 PCT/CN2013/075310 CN2013075310W WO2014153810A1 WO 2014153810 A1 WO2014153810 A1 WO 2014153810A1 CN 2013075310 W CN2013075310 W CN 2013075310W WO 2014153810 A1 WO2014153810 A1 WO 2014153810A1
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- insulating film
- floating gate
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- photoresist
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0243—Details of the generation of driving signals
- G09G2310/0248—Precharge or discharge of column electrodes before or after applying exact column voltages
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/08—Details of timing specific for flat panels, other than clock recovery
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/04—Maintaining the quality of display appearance
- G09G2320/043—Preventing or counteracting the effects of ageing
- G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements
Definitions
- Embodiments of the present invention relate to a floating gate transistor based on a thin film transistor (TFT) fabrication process, a fabrication method thereof, an application method, and a display driving circuit.
- TFT thin film transistor
- the term "suspended gate” is derived from a special MOS transistor.
- the transistor has a source 104, a drain 105, and two gates.
- One of the gates has an electrical connection, called control gate 100, which acts as a gate in a general sense.
- the other gate has no outer leads. It is completely wrapped in the two layers of the SiO2 film 102 and is floating. Therefore, it is called a floating gate 103, as shown in Fig. 1.
- the floating gate MOS transistor works by changing the threshold voltage of the MOS transistor by using whether or not the floating gate stores a charge or a stored charge, thereby changing the external characteristics of the MOS transistor. This process can be described as follows. When a sufficiently high voltage (such as 25 V) is applied to the drain and gate of the MOS transistor, and the source and the bottom of the village are grounded, the PN junction between the drain and the substrate is reverse-punched, generating a large amount of high-energy electrons. . These electrons are deposited on the floating gate through a thin layer of SiOx film, which causes the floating gate to have a negative charge. If this process is maintained long enough, the floating gate will accumulate enough electrons.
- a sufficiently high voltage such as 25 V
- the electrons on the floating gate can be stored for a long time because there is no discharge loop.
- a negative charge is applied to the floating gate, a positive charge is induced on the surface of the substrate, which causes the turn-on voltage of the MOS transistor to become high.
- the threshold voltage which enables the MOS transistor to be turned on is applied to the gate of the MOS transistor at this time, and the MOS transistor will remain in the off state.
- the storage unit uses this principle to store binary data.
- the charge on the floating gate can be modified in two ways:
- an embodiment of the present invention provides a floating gate transistor based on a TFT manufacturing technology, a manufacturing method thereof, an application method, and a display driving circuit, wherein the floating gate can store a certain electric charge, thereby being capable of storing data.
- the role is a floating gate transistor based on a TFT manufacturing technology, a manufacturing method thereof, an application method, and a display driving circuit, wherein the floating gate can store a certain electric charge, thereby being capable of storing data.
- An aspect of the present invention provides a floating gate transistor including a substrate, a floating gate, a source, a drain, and a control gate disposed on the substrate, further comprising: a first insulating film sequentially disposed on the substrate a polysilicon film in which a channel region is formed, and a position of the channel region corresponds to a position of the floating gate.
- a second insulating film and a third insulating film are sequentially disposed on the polysilicon film, and the floating gate is disposed between the second insulating film and the third insulating film.
- the third insulating film is respectively disposed on the two sides of the floating gate with a first opening and a second opening, and the first opening and the second opening respectively extend to the polysilicon film to form a source via And a drain via, wherein the source via and the drain via are provided with a metal thin film to form a source and a drain, respectively.
- a portion of the third insulating film corresponding to the floating gate is deposited with a metal thin film to form a control gate.
- the first insulating film, the second insulating film, and the third insulating film are made of one or both of SiOx, SiNx, and SiOxNy.
- Another aspect of the present invention also provides a display driving circuit comprising the above floating gate transistor.
- Still another aspect of the present invention provides a method for fabricating a floating gate transistor, comprising the steps of: sequentially forming a first insulating film and a polysilicon film on a substrate; forming a channel region in the polysilicon film; Forming a second insulating film and a third insulating film on the film, and a floating gate disposed between the second insulating film and the third insulating film; forming a source region and a drain region in the polysilicon film Forming a control gate on the third insulating film.
- sequentially forming a first insulating film and a polysilicon film on the substrate comprising: sequentially depositing the first insulating film and the amorphous silicon film on the substrate; performing annealing treatment to form the amorphous silicon film Polysilicon film.
- forming a channel region in the polysilicon film includes: coating a surface of the polysilicon film with a first layer of photoresist, and performing photolithographic exposure on the polysilicon film and the first layer of photoresist a region corresponding to the reserved region is a channel region; and a borane ion or a phosphine ion is implanted in the channel region, so that the polysilicon film located in the channel region forms P-type polysilicon or N-type polysilicon; A stripping process removes the first layer of photoresist; an annealing process is performed.
- forming a second insulating film and a third insulating film in the polysilicon film, and a floating gate disposed between the second insulating film and the third insulating film includes: using a vapor deposition method in the a second insulating film and a second amorphous silicon film are sequentially deposited on the polysilicon film; a second layer of photoresist is coated on the surface of the second amorphous silicon film, and lithographic exposure is performed to make the second layer of lithography Retaining a region of the glue corresponding to the channel region; using an etching process, retaining a region of the second layer of amorphous silicon film corresponding to the channel region to form a floating gate; stripping the second a layer of photoresist; depositing a third insulating film on the surface of the second insulating film and the surface of the floating gate by vapor deposition.
- forming a source region and a drain region in the polysilicon film includes: coating a third layer of photoresist on the third layer of insulating film, exposing and developing the third layer of photoresist; Etching the second insulating film, the third insulating film to remove the second insulating film, and the third insulating film corresponds to the unreserved region of the third photoresist A region in which a source region and a drain region are formed in the polysilicon film.
- forming a control gate on the third insulating film includes: heavily doping a borane ion or a phosphorus ion in the source region and the drain region to form a good conductive layer; a three-layer photoresist; depositing a layer on the second insulating film, the unetched region of the third insulating film, and the source and drain regions formed in the polysilicon film by vapor deposition a metal film; depositing a fourth layer of photoresist on the metal film, exposing and developing the fourth layer of photoresist; performing etching to form a source, a drain, and a control gate on the metal film; The fourth layer of photoresist is stripped.
- Still another aspect of the present invention provides a method for applying a floating gate transistor fabricated by using the method of fabricating a floating gate transistor, comprising the steps of: connecting a control gate and a source with a pre- The voltage source, the channel region and the drain are grounded; after a predetermined time, the power is turned off, a predetermined amount of negative charges are accumulated on the floating gate, and the threshold voltage of the floating gate transistor reaches a set value.
- the method further includes: testing a voltage of the thin film transistor, grounding the control gate and the source when the voltage of the thin film transistor exceeds a preset adjustment voltage, and connecting the channel region and the drain to the preset voltage The power supply; when the voltage of the thin film transistor is less than a preset adjustment voltage, the returning step connects the control gate and the source to a power source having a preset voltage, and the channel region and the drain of the polysilicon film are grounded.
- FIG. 1 is a schematic view showing the structure of a floating gate MOS transistor in the prior art
- FIG. 2 is a schematic structural view of a floating gate thin film transistor according to an embodiment of the present invention.
- FIG. 3 is a plan view showing a floating gate thin film transistor according to an embodiment of the present invention.
- 4 to 21 are schematic structural views showing the first step to the eighteenth step of the method for fabricating a floating gate transistor according to an embodiment of the present invention
- FIG. 22 is a schematic diagram showing a power connection structure of a floating gate transistor application method according to an embodiment of the present invention
- FIG. 23 is a schematic diagram showing a power connection structure of a floating gate transistor application method according to an embodiment of the present invention.
- the floating gate technology is currently widely used in EPROM, EEPROM, Flash memory and other devices.
- a device having a memory function is also required, but due to factors such as manufacturing process and demand, a device having a memory function has not been fabricated on a glass substrate.
- an embodiment of the present invention provides a floating gate transistor including a substrate 1, a floating gate 3, a source 4, a drain 5, and a control gate 6 disposed on the substrate 1. .
- the floating gate transistor further includes a first insulating film 7 and a polysilicon film 8 which are sequentially disposed on the substrate 1.
- a channel region 2 is formed in the polysilicon film 8, and the position of the channel region 2 corresponds to the position of the floating gate 3. That is, the polysilicon film 8 serves as an active layer of the TFT.
- a second insulating film 9 and a third insulating film 10 are sequentially disposed on the polysilicon film 8, and the floating gate 3 is interposed between the second insulating film 9 and the third insulating film 10.
- the third insulating film 10 is disposed on both sides of the floating gate 3 (also on both sides of the channel region of the polysilicon film 8), and is respectively provided with a first opening and a second opening, the first opening and the second opening
- the openings extend inwardly to the polysilicon film 8 to form source vias 41 and drain vias 51, respectively.
- the source via 41 and the drain via 51 are provided with a metal thin film in contact with the source region and the drain region of the polysilicon film 8 to form the source 4 and the drain 5, respectively.
- a portion of the third insulating film 10 corresponding to the floating gate 3 is provided with a metal film to form the control gate 6.
- the control gate 6 corresponds to the channel region of the polysilicon film 8 via the floating gate 3; the planar area of the control gate 6 may be greater than or equal to the planar area of the floating gate 3.
- a metal film is deposited on the third insulating film 10, and the metal film covers the exposed portion of the polysilicon film 8 at the same time, and then exposed to the third insulating film 10 by photolithography.
- the control gate 6 is formed at a corresponding position, and the source 4 and the drain 5 are formed in the exposed portions of the polysilicon film 8, respectively.
- Source 4 and drain 5 can also be connected to respective wirings or devices, respectively, as desired.
- the source 4 and the drain 5 may be connected to the data line and the pixel electrode, respectively. These wirings connected to the source 4 and the drain 5 can be prepared together with the source 4 and the drain 5.
- the first insulating film, the second insulating film, and the third insulating film may be made of one or a combination of SiOx, SiNx, and SiOxNy.
- the floating gate technology is applied to the field of TFTs
- the substrate may be a glass substrate (or a quartz substrate, a plastic substrate, etc.), so that the floating gate transistor applied to the display driving circuit can store charges, and can be further used for adjustment.
- TFT threshold voltage TFT threshold voltage
- the floating gate transistor of the present embodiment is capable of adjusting the threshold voltage of the TFT, and eliminates the problem that the entire circuit does not operate due to the inaccuracy of the threshold voltage of the TFT in the production process of the backplane such as the LCD.
- GOA Gate On Array
- COA Color Filter on Array
- one pixel uses several MOS transistors for compensation, driving and other functions. If the technique of this embodiment is used, the number of MOS transistors can be greatly reduced, the number of pixels and the resolution of the display can be increased.
- GOA technology is a high-tech design in TFT-LCD.
- the basic concept is to integrate the gate drive of the liquid crystal panel on the glass substrate to form a scan drive circuit for the panel; COA integrates the color filter and the array substrate.
- One of the integration technologies together.
- An embodiment of the present invention further provides a method for fabricating a floating gate transistor, comprising the steps of: sequentially forming a first insulating film 7 and a polysilicon film 8 on a substrate;
- a source 4, a drain 5, and a control gate 6 are formed on the third insulating film.
- An example of sequentially forming the first insulating film 7 and the polysilicon film 8 on the substrate includes: sequentially depositing the first insulating film 7 and the first amorphous silicon film 81 on the substrate 1; performing annealing treatment to make The first layer of amorphous silicon film 81 forms the polysilicon film 8.
- the polysilicon film 8 can be patterned to obtain an island-like pattern, for example, a photolithography process.
- An example of forming a channel region in the polysilicon film 8 includes: coating a surface of the polysilicon film 8 with a first layer of photoresist 11, exposing and developing the first layer of photoresist 11, the polysilicon film a region on the 8 corresponding to the unretained region of the first layer of photoresist 11 is used to obtain a channel region, that is, the first layer of photoresist 11 exposes a channel region; and borane is implanted in the channel region
- the ionic or phosphonium ions are such that the polysilicon film 8 located in the channel region forms P-type polysilicon or N-type polysilicon; the first layer of photoresist 11 is removed by a lift-off process; and then, an annealing process is performed.
- a second insulating film 9 and a third insulating film 10 are formed on the polysilicon film 8, and an example of the floating gate 3 disposed between the second insulating film 9 and the third insulating film 10 includes: A second insulating film 9 and a second amorphous silicon film 12 are sequentially deposited on the polysilicon film 8 by vapor deposition; a second layer of photoresist 13 is coated on the surface of the second amorphous silicon film 12.
- the floating gate 3 can also be made of materials other than the crystalline silicon film.
- An example of forming a source region and a drain region in the polysilicon film includes: applying a third layer of photoresist 14 on the third layer of insulating film 10, exposing the third layer of photoresist 14, Developing; then, etching the second insulating film 9 and the third insulating film 10 to remove the second insulating film 9, the third insulating film 10, and the third A region corresponding to the unretained region of the layer photoresist 14 is provided with a first via hole and a second via hole to expose the source region 82 and the drain region 83 in the polysilicon film 8.
- One example of forming the control gate 6 on the third insulating film 10 includes: heavily doping borane ions or phosphonium ions in the source region 82 and the drain region 83 so that the source The region 82 and the drain region 83 are in good contact with the metal thin film deposited in the subsequent step; peeling off the third layer of photoresist 14; using the vapor deposition method on the second insulating film 9, the third layer A non-etched region of the insulating film 10 and a source region 82 and a drain region 83 formed on the polysilicon film 8 are deposited with a metal film 15; a fourth layer of photoresist 16 is deposited on the metal film 15 to The fourth layer of photoresist 16 is exposed and developed; etching is performed to form a control gate 6 on the metal film 15, and the fourth layer of photoresist 16 is stripped.
- the metal thin film 15 can be, for example, aluminum or aluminum alloy. Preparation of copper, copper alloy, etc.
- the method of fabricating the floating gate transistor is as follows:
- the first insulating film 7 and the first amorphous silicon film 81 are sequentially grown on the substrate 1 by PECVD (plasma enhanced vapor deposition) as shown in FIG. 4; then, an ELA (excimer laser annealing) process is used to make the non-
- the crystalline silicon film 81 becomes a polysilicon film 8, as shown in FIG. 5; a first photoresist layer 11 is formed using a mask (lithography) process, and the first photoresist layer 11 is exposed to the channel region 2, as shown in 6 is shown.
- the lithography process generally includes processing such as gluing, exposure, development, etc., and will not be described in detail herein.
- the second amorphous silicon film is used.
- 12 is etched into the floating gate 3, as shown in FIG. 12; using the lift-off process, the second layer of photoresist 13 on the surface is stripped, as shown in FIG. 13; the third insulating film 10 is grown by PECVD, and the third layer is insulated.
- the film 10 completely covers the floating gate 3 as shown in FIG. 14; a region for forming the source via 41 and the drain via 51 of the transistor is exposed in the third layer photoresist 14 using a mask process, such as Figure 15; using an etching process, etching the source a hole 41 and a drain via 51, as shown in FIG.
- a region where the heavily doped polysilicon film 8 is exposed using a doping process results in a source region 82 and a drain region 83, for example, a source via 41 and a drain.
- a borane ion or a phosphorus ion is implanted in a corresponding region of the via 51, as shown in FIG. 17; a third layer of photoresist 14 is removed by a lift-off process, as shown in FIG. 18; using sputtering (spraying) a device, depositing a metal film 15 as shown in FIG.
- Embodiments of the present invention also provide an application method of a floating gate transistor fabricated by using the floating gate transistor fabrication method, including the following steps: connecting a control gate and a source to a power supply having a preset voltage, and a channel region And draining the ground; after a predetermined time, the power is turned off, a predetermined amount of negative charges are accumulated on the floating gate, and the threshold voltage of the floating gate transistor reaches a set value. The threshold voltage of the transistor is changed by whether or not the charge or stored charge is stored on the floating gate. After a preset time, the floating gate can store enough charge.
- the preset voltage in the embodiment is 25V, but the present invention is not limited thereto, and an appropriate preset voltage can be selected according to the prepared TFT.
- the returning step connects the control gate and the source to a power source having a preset voltage, and the channel region and the drain of the polysilicon film are grounded.
- the voltage of the floating gate transistor exceeds a preset adjustment voltage
- the voltage can also be performed by ultraviolet irradiation.
- the process of adjusting the threshold voltage of the TFT is as follows: Connect the programming power supply VCC to the control gate and source, ground the channel region and the drain, as shown in FIG. 22; apply a power supply of 25V to the programming power supply, as needed The amount of the adjusted floating gate charge controls the programming time, as shown in Figure 23; after the programming power supply is applied, the source, drain, and channel regions are all disconnected from the programming supply.
- TFT threshold voltage the voltage required for the floating gate transistor to start normally
- the floating gate of the floating gate transistor can store a certain amount of charge, and the control gate needs to add the voltage of the floating gate to drive the transistor normally on the basis of the normal driving voltage.
- the floating gate is used to adjust the threshold voltage of the TFT by this principle. This method avoids the inconsistency of the threshold voltage of the TFT, so that the entire circuit does not work normally, resulting in a large increase in cost.
- the floating gate transistor adjusts the threshold voltage of the TFT. After the final process is completed, according to the threshold voltage test of the TFT, the floating gate charge is programmed for the TFT whose threshold voltage is not in the normal range, so that it can be reused, which greatly improves the product. Yield.
- An embodiment of the present invention further provides a display driving circuit including a floating gate transistor.
- the floating gate transistor includes a substrate 1 , a floating gate 3 , a source 4 , and a drain 5 disposed on the substrate 1 .
- the floating gate transistor further includes a first insulating film 7 and a polysilicon film 8 sequentially disposed on the substrate 1, and a channel region 2 is formed in a middle portion of the polysilicon film 8, the position of the channel region 2 Corresponding to the position of the floating gate 3.
- the arrangement of the channel region 2 facilitates the fabrication of the floating gate during the fabrication of the floating gate transistor. This is because if the bottom gate structure is used, the ELA process may cause damage to the metal gate.
- a second insulating film 9 and a third insulating film 10 are sequentially disposed on the polysilicon film 8, and the floating gate 3 is disposed between the second insulating film 9 and the third insulating film 10.
- the third insulating film 10 is respectively disposed on the two sides of the floating gate 3 with a first opening and a second opening, and the first opening and the second opening respectively extend inward to form a source of the polysilicon film 8 a via hole 41 and a drain via 51, wherein the source via 41 and the drain via 51 are provided with metal thin films in contact with the source region and the drain region of the polysilicon film 8, respectively, forming the source 4 And drain 5.
- a portion of the third insulating film 10 corresponding to the floating gate 3 is deposited with a metal thin film to form the control gate 6.
- the control gate 6 also corresponds to the channel region 2.
- a metal film is deposited on the third insulating film 10, and the metal film covers a portion of the polysilicon film 8 exposed by the third insulating film 10, and then exposed by lithography.
- the control electrode 6 is formed at a corresponding position of the third insulating film 10, and the source 4 and the drain 5 are formed in the exposed portions of the polysilicon film 8, respectively.
- the first insulating film, the second insulating film, and the third insulating film may be formed by using one or a combination of SiOx, SiNx, and SiOxNy. (only part of the structure of the floating gate transistor is shown in Figure 2)
- the floating gate transistor of the embodiment of the present invention can be used to replace the thin film transistor of the prior art, and the threshold voltage of the floating gate transistor is adjustable, thereby avoiding the occurrence of a situation in which the entire driving circuit cannot work normally due to the discrepancy of the TFT voltage.
- An embodiment of the present invention further provides a method for manufacturing a display driving circuit, comprising the steps of: fabricating each electronic component of a display driving circuit on a PCB, wherein the manufacturing process of the floating gate transistor comprises:
- a source 4, a drain 5, and a control gate 6 are formed on the third insulating film.
- An example of sequentially forming the first insulating film 7 and the polysilicon film 8 on the substrate includes: sequentially depositing the first insulating film 7 and the first amorphous silicon film 81 on the substrate 1; performing annealing treatment to make The first layer of amorphous silicon film 81 forms the polysilicon film 8.
- An example of forming a channel region on the polysilicon film 8 includes: coating a surface of the polysilicon film 8 with a first layer of photoresist 11, exposing and developing the first layer of photoresist 11, the polysilicon film a region of 8 that corresponds to an unretained region of the first layer of photoresist 11 is used to obtain a channel region; a borane ion or a phosphonium ion is implanted in the channel region such that the channel is located in the channel
- the polysilicon film 8 of the region forms P-type polysilicon or N-type polysilicon; the first layer of photoresist 11 is removed by a lift-off process; and an annealing treatment is performed.
- a second insulating film 9 and a third insulating film 10 are formed on the polysilicon film 8, and an example of the floating gate 3 disposed between the second insulating film 9 and the third insulating film 10 includes: A second insulating film 9 and a second amorphous silicon film 12 are sequentially deposited on the polysilicon film 8 by vapor deposition; a second layer of photoresist 13 is coated on the surface of the second amorphous silicon film 12.
- An example of forming a source region and a drain region in the polysilicon film includes: applying a third layer of photoresist 14 on the third layer of insulating film 10, exposing the third layer of photoresist 14, Developing, exposing a portion corresponding to the source region and the drain region; etching the second insulating film 9 and the third insulating film 10 to remove the second insulating film 9, the A source region 82 and a drain region 83 are formed on the polysilicon film 8 in a region of the three-layer insulating film 10 corresponding to the unretained region of the third layer of photoresist 14.
- One example of forming the control gate 6 on the third insulating film 10 includes: heavily doping borane ions or phosphonium ions in the source region 82 and the drain region 83 so that the source The region 82 and the drain region 83 are in good contact with the metal thin film deposited in the subsequent step; peeling off the third layer of photoresist 14; using the vapor deposition method on the second insulating film 9, the third layer An unetched region of the insulating film 10 and a source region 82 and a drain region 83 formed on the polysilicon film 8 are deposited with a metal film 15; a fourth layer of photoresist 16 is coated on the metal film 15 The fourth layer of photoresist 16 is exposed and developed; the metal film 15 is etched, a control gate 6 is formed on the metal film 15, and the fourth layer of photoresist 16 is peeled off.
- Embodiments of the present invention also provide an application method of a display driving circuit.
- the calibration can be performed by adjusting the threshold voltage of the floating gate transistor in the display driving circuit, so that the display driving circuit can work normally, wherein the floating gate transistor threshold voltage adjusting process comprises: connecting the control gate and the source with a preset voltage The power supply, the channel region and the drain are grounded; after a predetermined time, the power is turned off, a predetermined amount of negative charges are accumulated on the floating gate, and the threshold voltage of the floating gate transistor reaches a set value.
- the threshold voltage of the transistor is changed by whether or not the charge is stored or stored on the floating gate.
- the floating gate can store enough charge for a preset time.
- the preset voltage in the embodiment is 25V, but the present invention is not limited thereto, and other suitable voltages may be used according to specific structures and materials.
- the returning step connects the control gate and the source to a power source having a predetermined voltage, and the channel region and the drain of the polysilicon film are grounded.
- voltage release can also be performed by ultraviolet irradiation.
- the process of adjusting the threshold voltage of the TFT is as follows: The control gate and source are connected to the programming power supply VCC, the channel region and the drain are grounded, as shown in FIG. 22; the programming power supply applies a 25V power supply, as needed The amount of the adjusted floating gate charge controls the programming time, as shown in Figure 23; after the programming power supply is applied, the source, drain, and channel region poles are all disconnected from the programming power supply.
- Test the TFT threshold voltage to determine whether the TFT threshold voltage meets the conditions for normal operation of the circuit. If it does not match, continue to adjust according to the above steps.
- the floating gate of the floating gate transistor can store a certain amount of charge, and the control gate needs to add the voltage of the floating gate to drive the transistor normally on the basis of the normal driving voltage.
- the floating gate is used to adjust the threshold voltage of the TFT by this principle. This method avoids the inconsistency of the threshold voltage of the TFT, so that the entire circuit does not work normally, resulting in a large increase in cost.
- the floating gate transistor adjusts the threshold voltage of the TFT. After the final process is completed, according to the threshold voltage test of the TFT, the floating gate charge is programmed for the TFT whose threshold voltage is not in the normal range, so that the reuse can be repeated, and the yield of the product is greatly improved. .
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Abstract
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US14/368,145 US9620532B2 (en) | 2013-03-29 | 2013-05-08 | Manufacturing method of transistor with floating gate and application method of transistor with floating gate electrode |
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CN201310108151.4A CN103199116B (zh) | 2013-03-29 | 2013-03-29 | 悬浮栅晶体管及其制作方法、应用方法、显示器驱动电路 |
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US11605438B2 (en) | 2020-11-16 | 2023-03-14 | Ememory Technology Inc. | Memory device for improving weak-program or stuck bit |
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KR20150044324A (ko) * | 2013-10-16 | 2015-04-24 | 삼성디스플레이 주식회사 | 박막 트랜지스터 어레이 기판 및 그의 제조 방법 |
KR102409970B1 (ko) * | 2015-11-18 | 2022-06-17 | 삼성디스플레이 주식회사 | 스캔라인 드라이버 및 이를 포함하는 디스플레이 장치 |
CN107275390A (zh) * | 2017-06-30 | 2017-10-20 | 京东方科技集团股份有限公司 | 薄膜晶体管及其制作方法、阵列基板及显示装置 |
CN108198754B (zh) * | 2017-12-04 | 2021-01-29 | 武汉华星光电半导体显示技术有限公司 | 一种多晶硅tft基板的制作方法及多晶硅tft基板 |
CN108281488B (zh) * | 2018-01-03 | 2021-07-27 | 京东方科技集团股份有限公司 | 一种阵列基板、其制备方法及显示装置 |
CN112735272B (zh) * | 2020-12-30 | 2022-05-17 | 武汉华星光电技术有限公司 | 显示面板及显示装置 |
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US20160111454A1 (en) | 2016-04-21 |
US9620532B2 (en) | 2017-04-11 |
CN103199116B (zh) | 2016-04-27 |
CN103199116A (zh) | 2013-07-10 |
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