WO2012172792A1 - Carte de câblage imprimé, et procédé de fabrication associé - Google Patents

Carte de câblage imprimé, et procédé de fabrication associé Download PDF

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Publication number
WO2012172792A1
WO2012172792A1 PCT/JP2012/003844 JP2012003844W WO2012172792A1 WO 2012172792 A1 WO2012172792 A1 WO 2012172792A1 JP 2012003844 W JP2012003844 W JP 2012003844W WO 2012172792 A1 WO2012172792 A1 WO 2012172792A1
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WO
WIPO (PCT)
Prior art keywords
opening
wiring board
printed wiring
resin layer
layer
Prior art date
Application number
PCT/JP2012/003844
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English (en)
Japanese (ja)
Inventor
木村　道生
保明 三井
大東　範行
忠相 遠藤
Original Assignee
住友ベークライト株式会社
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Publication of WO2012172792A1 publication Critical patent/WO2012172792A1/fr

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4857—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83909—Post-treatment of the layer connector or bonding area
    • H01L2224/83951—Forming additional members, e.g. for reinforcing, fillet sealant
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0313—Organic insulating material
    • H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
    • H05K1/0366—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement reinforced, e.g. by fibres, fabrics
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09509—Blind vias, i.e. vias having one side closed
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2072—Anchoring, i.e. one structure gripping into another
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0548—Masks
    • H05K2203/0554—Metal used as mask for etching vias, e.g. by laser ablation

Definitions

  • the present invention relates to a printed wiring board and a manufacturing method.
  • the printed wiring board includes a core layer and a build-up layer that is stacked on the core layer.
  • An example of such a printed wiring board is described in Patent Document 1.
  • the manufacturing method of the core layer of the printed wiring board described in Patent Document 1 is as follows. First, a base material-containing insulating layer in which the base material is unevenly distributed is created, and a metal foil is formed on one side of the base material-containing insulating layer. A carbon gas laser is irradiated to the surface of the base-material-containing insulating layer where the metal foil is not formed.
  • veer is removed completely using the reflected light of the laser from metal foil. As a result, the entire inner wall of the via can be smoothed, so that it is possible to significantly increase the plating revolving property.
  • a resin layer and a fiber substrate located in the resin layer are provided, and the resin layer has a region in which an opening diameter decreases from the first surface to the second surface of the resin layer. And an opening penetrating the resin layer is formed, a conductor that embeds the opening, and a second surface of the resin layer, and a second portion of the opening from the second surface side.
  • a terminal covering the opening surface on the surface side, the terminal is electrically connected to the conductor, and separate from the conductor, and the fiber base material is formed from a side wall of the opening.
  • a printed wiring board having a protruding portion that protrudes, wherein the protruding portion is located inside the conductor is provided.
  • the terminal may be anything that is electrically connected to the conductor and separate from the conductor.
  • it may be a circuit or wiring layer arranged on the second surface side of the resin layer, or may be a pad or the like.
  • the fiber base material protrudes from the side wall of the opening, and this protrusion is located inside the conductor.
  • the fiber base material is located in the resin layer.
  • difference of the relative position of a resin layer and a conductor can be suppressed with a fiber base material.
  • the fiber base material fixes the position of the conductor, so that the conductor is detached from the opening or displaced. Is suppressed. Therefore, the connection reliability of the printed wiring board can be improved.
  • the manufacturing method of the printed wiring board mentioned above can also be provided. That is, according to the present invention, a laminate including a resin layer having a first surface and a second surface, a fiber base material located in the resin layer, and a terminal disposed on the second surface side of the resin layer. Preparing the body, Forming an opening that penetrates through the fiber base material and has an area in which the opening diameter decreases from the first surface to the second surface of the resin layer, and in the opening; In the step of forming the opening, the resin layer is removed from the first surface side from the first surface to the second surface, and a second of the opening is formed.
  • the opening is formed so that the terminal is exposed from a surface-side opening surface, and the opening is formed so that an end of the fiber base protrudes from a side wall of the opening.
  • the inside of the opening is embedded with the conductor so that the protruding portion of the fiber base protruding from the side wall of the opening is located inside the conductor, and the conductor and the opening of the opening.
  • a printed wiring board excellent in connection reliability and a manufacturing method are provided.
  • the resin layer 106 (or 106 ') and the fiber base material 108 located in the resin layer 106 (or 106') are provided.
  • the resin layer 106 (or 106 ′) has a region where the opening diameter decreases from the first surface 10 toward the second surface 20, and an opening 116 penetrating the resin layer 106 (or 106 ′) is formed.
  • the printed wiring board includes a conductor 124 that embeds the opening 116 and a terminal (internal circuit) 104 that is electrically connected to the conductor 124.
  • the terminal 104 abuts on the second surface of the resin layer 106 (or 106 ′) and closes the opening surface on the second surface side of the opening 116 from the second surface side.
  • the terminal 104 is not configured integrally with the conductor 124 and is separate from the conductor 124.
  • the fiber base material 108 has a protrusion 109 protruding from the side wall of the opening 116, and the protrusion 109 is located inside the conductor 124.
  • the terminal is an internal circuit, but the terminal may be a wiring layer or a pad. Embodiments of the printed wiring board will be described in detail below.
  • FIG. 1 is a cross-sectional view illustrating a configuration of a printed wiring board 100 according to the first embodiment.
  • the printed wiring board 100 of the first embodiment includes a resin layer 106, a fiber base material 108, and a conductor (via 124).
  • the resin layer 106 is formed on the substrate 102.
  • the fiber base material 108 is unevenly distributed on the first surface 10 side with respect to the central portion (the center position of the thickness) of the resin layer 106.
  • the fiber base material is not disposed on the second surface 20 side with respect to the central portion (the center position of the thickness) of the resin layer 106.
  • the via 124 (conductor) is embedded in the illustrated opening 116.
  • the opening 116 is configured such that the opening diameter decreases from the first surface 10 to the second surface 20 of the resin layer 106 in a cross section along the thickness direction of the resin layer 106.
  • a part of the fiber base material 108 protrudes from the side wall of the opening 116 on the first surface 10 side with respect to the central portion of the resin layer 106.
  • the protruding end portion of the fiber base material 108 is located inside the conductor (via 124). In other words, the fiber base material 108 has the protruding portion 109 embedded in the via 124.
  • M1, M2, D1 to D4, and L1 to L3 shown in FIG. 1 are defined as follows.
  • M1 represents the center line of the fiber base material 108.
  • M2 represents the center line of the resin layer 106.
  • D1 indicates the distance from the first surface 10 to the center line M1 of the fiber base material 108.
  • D2 indicates the distance from the second surface 20 to the center line M1 of the fiber base material 108.
  • D3 indicates the distance from the first surface 10 to the second surface 20, that is, the film thickness of the resin layer 106.
  • D4 indicates the distance from the second surface 20 to the center line M2 of the resin layer 106.
  • L1 indicates the maximum opening diameter of the opening in a cross-sectional view (a cross section along the thickness direction of the resin layer 106) (hereinafter also referred to as a top diameter).
  • L2 indicates a minimum opening diameter of the opening in a cross-sectional view (a cross section along the thickness direction of the resin layer 106) (hereinafter also referred to as a bottom diameter).
  • L3 indicates an average length from the side wall of the opening 116 to the tip of the protruding portion 109. The length L3 of the protrusion 109 can be calculated from, for example, an SEM image in a cross-sectional view of the via 124.
  • the printed wiring board 100 includes a core layer and a buildup layer formed on the core layer.
  • the core layer corresponds to the substrate 102.
  • the build-up layer corresponds to the first build-up layer 128 formed on the substrate 102.
  • the first buildup layer 128 may be formed only on one side of the substrate 102, or may be formed on both sides of the substrate 102.
  • the number of first buildup layers 128 on the substrate 102 is not particularly limited as long as it is one or more, and may be two or more.
  • the first buildup layer 128 includes at least the resin layer 106, the fiber base material 108, and the via 124.
  • the total film thickness D3 of the resin layer 106 is not particularly limited, but is preferably 20 ⁇ m or more and 100 ⁇ m or less, and more preferably 30 ⁇ m or more and 80 ⁇ m or less. In order to obtain a miniaturized semiconductor device, the thickness of the buildup layer may be reduced. In such a structure, the via is easily detached from the opening. On the other hand, according to the present embodiment, even when the film thickness D3 is small as described above, a part of the fiber base material 108 (projecting portion 109) is embedded in the via 124. Desorption is prevented.
  • the fiber base material 108 is unevenly distributed on the first surface 10 side of the resin layer 106 from the center line of the thickness of the resin layer 106.
  • a part of the film thickness D3 is constituted by a distance D1 from the first surface 10 to the center line M1 of the fiber base material 108, and the rest of the film thickness D3 is from the center line M1 of the fiber base material 108 to the second surface. It consists of a distance D2 up to 20. That the fiber base material 108 is unevenly distributed means that the entire fiber base material 108 is embedded between the center line M2 of the resin layer 106 and the first surface 10, that is, the distance D1 is smaller than the distance D2. .
  • D2 / D1 is preferably 6/4 or more and 9/1 or less, more preferably 7/3 or more and 8/2 or less, and a larger D2 / D1 is particularly preferable. Further, by setting D2 / D1 to 6/4 or more, the linear expansion coefficient on the surface of the resin layer 106 can be reduced, so that the warpage on the surface can be reduced. On the other hand, by setting D2 / D1 to 9/1 or less, it is possible to improve the ability of the plating solution to flow into the opening 116.
  • the via 124 includes a base film (metal film) 118 and a plating layer (metal layer) 122.
  • the via 124 is a solid filled via that fills the inside of the opening 116.
  • a conductive circuit 126 is formed around the upper portion of the via 124. In the in-plane direction, the via 124 may be configured to be electrically connected to the conductive circuit 126 or may be configured not to be electrically connected at a distance.
  • the lower portion of the via 124 is provided in contact with a part of the internal circuit 104 provided on one surface of the substrate 102.
  • the via 124 serves as an external terminal that electrically connects the internal circuit 104 and a semiconductor element (not shown).
  • the lowermost via 124 functions as a connection via that connects the internal circuit 104 and the upper circuit pattern.
  • the via 124 may be composed of either a single layer or a multilayer metal film, but it is preferable that at least a part of the laminated metal film is composed of a plating film.
  • the conductive circuit 126 is formed on the resin layer 106 and includes a metal foil layer 114, a base film 118, and a plating layer 122.
  • the metal foil layer 114 is formed so as to contact the first surface 10 of the resin layer 106.
  • the conductive circuit 126 may have a rectangular shape in a top view, or a circuit pattern extending in a predetermined direction.
  • the base film 118 is composed of a deposited metal film or an electroless plating film.
  • the base film 118 extends in a film shape along the side wall of the opening 116 and the surface of the internal circuit 104 exposed from the opening 116, and integrally covers the side wall of the opening 116 and the surface of the internal circuit 104. .
  • the base film 118 is formed on the sidewall of the opening 116 and on the entire surface of the internal circuit 104 exposed from the opening 116. Further, the base film 118 is formed on the side wall and the upper surface of the metal foil layer 114.
  • the base film 118 may be formed so as to cover the tip of the protrusion 109, or may be formed so as to cover only a part of the protrusion 109 (however, the tip of the protrusion 109 is not covered). May be.
  • the plating layer 122 is a solid conductor embedded in the entire inside of the opening 116.
  • the plating layer 122 is filled inside the base film 118 that covers the inner surface of the opening 116. That is, the inside of the opening 116 is configured only by the base film 118 and the plating layer 122 (however, the base film 118 is not essential).
  • the plating layer 122 may be a single layer or a multilayer.
  • the plating layer 122 may be formed on the upper surface of the metal foil layer 114 located outside the opening 116 when the resin layer 106 is viewed from the first surface 10 side.
  • the opening 116 is a space formed so as to penetrate from the first surface 10 to the second surface 20 of the resin layer 106.
  • the opening 116 is configured such that the opening diameter decreases continuously or discontinuously from the first surface 10 toward the second surface 20 in a cross-sectional view, and more preferably continuously decreases. It is configured.
  • the opening 116 is reduced in diameter from the first surface 10 to the second surface 20 side.
  • the cross-sectional shape of the opening 116 may be a tapered shape tapered from the first surface 10 toward the second surface 20 or a cylinder shape having a plurality of steps on the side wall (however, the resin constituting the opening 116)
  • a portion of the side wall of the layer 106 in the vicinity of the second surface 20 may have a cutout region cut out by soft etching, in which soft etching is a method of forming an opening 116 described later. Is different in type and process).
  • One opening surface of the opening 116 is located on the same plane as the first surface 10 of the resin layer 106 and has the maximum opening diameter L1 in the opening 116.
  • the other opening surface of the opening 116 has a minimum opening diameter L ⁇ b> 2 in the opening 116.
  • the opening diameter L1 is not particularly limited as long as it is larger than the opening diameter L2.
  • the opening diameter L1 is preferably 1.1 times or more of the opening diameter L2 and not more than 3 times L2, and more preferably 1.5 times or more. 2 times or less of L2 is more preferable.
  • a structure in which the opening diameter L1 is larger than the opening diameter L2 may be employed.
  • Such a structure makes it easy for the via to be detached from the opening.
  • the protruding portion 109 is embedded in the via 124, the detachment of the via 124 is suppressed even in such a structure.
  • the sizes of the opening diameter L1 and the opening diameter L2 are the same in the embodiments described later. Although a method for manufacturing such an opening 116 will be described in detail later, it is obtained by removing the resin layer 106 only from the first surface 10 side from the first surface 10 to the second surface 20 of the resin layer 106. It is what was done.
  • the opening 116 is formed by removing a part of the resin layer 106 from the first surface 10 side toward the second surface 20 side, and from the second surface 20 side to the first surface 10 side. It is not obtained by removing a part of the resin layer 106 toward the surface. This also applies to embodiments described later.
  • the protruding portion 109 of the fiber base material 108 is positioned between the first surface 10 and the center line M2 in the cross section along the thickness direction of the printed wiring board, and is configured to be positioned inside the via 124.
  • the protruding portion 109 is coupled to the via 124 (in other words, the protruding portion 109 is fitted in the via 124).
  • the protruding portions 109 facing each other via the via 124 are separated from each other.
  • the protrusion 109 inside the opening 116 may be configured in a ring shape, or may be configured to be scattered along the outer edge of a circle.
  • the maximum value of the length of the protrusion 109 in the peripheral direction of the inner wall of the opening may be uniform or non-uniform as a whole.
  • a first region in which the protruding portion 109 protrudes from the inner wall and a second region in which the protruding portion 109 does not protrude from the inner wall may be provided in the peripheral direction of the inner wall of the opening.
  • the first region and the second region may be alternately provided adjacent to each other.
  • regions is in the below-mentioned range.
  • the protruding portion 109 may be embedded in the via 124 so as to be in direct contact with the plating layer 122, but may be embedded in the via 124 in a state where the entire tip is covered with the base film 118.
  • the fiber base material does not protrude from the part which becomes the minimum diameter of the opening part 116.
  • the fiber base material 108 may be spaced apart in the stacking direction.
  • a plurality of protrusions 109 may protrude from one side wall surface of the opening 116, but the balance between connection reliability and plating solution wraparound is excellent. Therefore, it is preferable that only one protrusion 109 protrudes.
  • the length L3 of the protrusion 109 / the maximum opening diameter L1 of the opening 116 is preferably 1/100 or more and 1/5 or less, more preferably 1/20 or more and 1/6 or less. Further, the length L3 of the protrusion 109 is, for example, preferably 0.1 ⁇ m or more and 30 ⁇ m or less, more preferably 1 ⁇ m or more and 20 ⁇ m or less, and further preferably 3 ⁇ m or more and 15 ⁇ m or less.
  • the length L3 of the protrusion 109 may be an average value or a maximum value, but is preferably specified by the maximum value. Note that the length of the protruding portion 109 is the length from the opening side wall from which the protruding portion 109 protrudes to the tip of the protruding portion 109.
  • the length L3 of the protrusion 109 is not particularly limited as long as the protrusion 109 is embedded in the via 124 inside the opening 116, but is preferably (opening diameter L1 ⁇ opening diameter L2) / 2 or less, More preferably, (opening diameter L1 ⁇ opening diameter L2) / 10 or more (opening diameter L1 ⁇ opening diameter L2) / 3 or less.
  • the length L3 of the protrusion 109, the length L3 of the protrusion 109 / the maximum opening diameter L1 of the opening 116 are the same in the embodiments described later.
  • the internal circuit 104 is a metal layer such as copper and has a region electrically connected to the via 124.
  • the internal circuit 104 is disposed on the substrate 102. Further, the internal circuit 104 is in direct contact with the second surface 20 of the resin layer 106, and a part of the internal circuit 104 covers the opening surface of the opening 116 from the second surface 20 side.
  • a via 124 is connected to a portion exposed from the opening surface.
  • 3 to 6 are process cross-sectional views showing the steps of the manufacturing process of the printed wiring board 100.
  • the method for manufacturing the printed wiring board 100 of the first embodiment includes the following steps. A step of forming a core layer (substrate 102), a step of forming a laminate 110 composed of asymmetric prepregs, and a step of forming vias 124. Hereinafter, each step will be described.
  • a substrate 102 having a metal foil attached on one surface is prepared.
  • the substrate 102 is not particularly limited as long as it is made of an insulating material.
  • epoxy resin, glass substrate-epoxy resin laminate, glass substrate-polyimide resin laminate, glass substrate-Teflon (registered trademark) ) Resin laminate, glass substrate-bismaleimide / triazine resin laminate, glass substrate-cyanate resin laminate, glass substrate-polyphenylene ether resin laminate, polyester resin, ceramic, resin impregnated ceramic, etc. can do.
  • a prepreg constituting a laminate 110 described later may be used as the substrate 102.
  • the metal foil a metal foil containing at least one metal element such as copper, aluminum, or nickel can be used. Among these, low resistance copper foil is preferable.
  • the metal foil may be formed on both surfaces of the substrate 102 or may be formed only on one surface.
  • a protective film (not shown) is formed on the metal foil. Subsequently, the protective film is patterned into a predetermined shape. Using this protective film, the metal foil is selectively etched. As a result, an internal circuit 104 having a predetermined pattern shape is formed on the substrate 102 as shown in FIG. In this step, an etching resist or a photosensitive resist can be used as the protective film.
  • a stacked body 110 is prepared.
  • the laminated body 110 is not specifically limited, For example, what laminated
  • the stacked body 110 may be a single layer or may have a multilayer structure. As the laminate 110, for example, a laminate of a plurality of prepregs can be used.
  • the ultra-thin metal foil with a carrier foil on at least one surface and heat-press-molded etc. can be used.
  • the build-up layer may be made of the same material as the core layer (substrate 102), but the fiber base material or the resin composition may be different.
  • the prepreg is a sheet-like material including the fiber base material 108 and the resin layer 106 obtained by impregnating the fiber base material 108 with one or more resin compositions and then semi-curing the fiber base material 108.
  • a sheet-like material having such a structure is preferable because it is excellent in various properties such as dielectric properties, mechanical and electrical connection reliability under high temperature and high humidity, and suitable for manufacturing a laminated board for circuit boards.
  • the method for impregnating the fiber base material with the resin composition used in the present embodiment is not particularly limited.
  • the resin composition is dissolved in a solvent to prepare a resin varnish, and the fiber base material is immersed in the resin varnish.
  • examples thereof include a method, a coating method using various coaters, a spraying method, and a method of laminating a resin layer with a supporting substrate.
  • the method of laminating with a film-like resin layer from both sides of the fiber base material is preferable.
  • the impregnation amount of the resin composition with respect to the fiber base material can be freely adjusted, and the moldability of the prepreg can be further improved.
  • FIG. 9 is a process cross-sectional view illustrating an example of a prepreg manufacturing process.
  • carrier material 5a, carrier material 5b, and sheet-like base material 4 are prepared as materials. Moreover, a vacuum laminating apparatus and a hot air drying apparatus 2 are prepared as apparatuses.
  • the carrier material 5a is composed of a resin layer 106a obtained from the first resin composition.
  • the carrier material 5b is composed of a resin layer 106b obtained from the second resin composition.
  • the carrier materials 5a and 5b can be obtained by, for example, a method of applying a resin varnish of the first resin composition and the second resin composition to a carrier film.
  • the sheet-like substrate 4 for example, a single layer or a plurality of laminated fiber substrates can be used.
  • the solvent used in the resin varnish preferably exhibits good solubility in the resin component in the resin composition, but a poor solvent may be used as long as it does not adversely affect the resin varnish.
  • the solvent exhibiting good solubility include acetone, methyl ethyl ketone, methyl isobutyl ketone, cyclohexanone, tetrahydrofuran, dimethylformamide, dimethylacetamide, dimethyl sulfoxide, ethylene glycol, cellosolve and carbitol.
  • the vacuum laminating apparatus 1 includes a roll that winds up the carrier material 5a, a roll that winds up the carrier material 5b, a roll that winds up the sheet-like substrate 4, and a laminating roll 7. Under decompression, the carrier material 5a and the carrier material 5b are superposed on both surfaces of the sheet-like substrate 4 for the sheet fed from each roll. The stacked laminate is joined by the laminate roll 7. Thereby, the joined body comprised from the carrier material 5a, the sheet-like base material 4, and the carrier material 5b is obtained.
  • the finally obtained prepreg 3 does not generate voids and can be in a good molded state. This is because the decompression void or the vacuum void can be removed by a heat treatment described later.
  • other devices such as a vacuum box device can be used.
  • heat treatment is performed at a temperature equal to or higher than the melting temperature of the resin composition constituting each carrier material 5a, 5b constituting the joined body. Thereby, the decompression void etc. which have occurred in the joining process under reduced pressure can be erased.
  • Other methods of heat treatment can be carried out using, for example, an infrared heating device, a heating roll device, a flat platen hot platen pressing device, or the like.
  • an asymmetric prepreg 3 (corresponding to the resin layer 106 and the fiber base material 108 in FIG. 3B) is obtained.
  • the fiber base material 108 is unevenly distributed in the thickness direction from the center position of the thickness of the resin layer 106.
  • Such a prepreg is called an asymmetric prepreg.
  • a first resin composition and a second resin composition (these may be different types or the same type, but are preferably the same type, which are used in the production of the prepreg, are preferably the same type. These are collectively referred to as a resin composition hereinafter). Detailed description.
  • the resin composition contains, for example, a thermosetting resin, a curing agent, and a filler. Hereinafter, each component will be described.
  • thermosetting resin modified
  • denatured with novolak-type phenol resins such as a phenol novolak resin, a cresol novolak resin, a bisphenol A novolak resin, unmodified resole phenol resin, tung oil, linseed oil, walnut oil Phenolic resin such as oil-modified resol phenolic resin, bisphenol A type epoxy resin, bisphenol F type epoxy resin, bisphenol S type epoxy resin, bisphenol E type epoxy resin, bisphenol M type epoxy resin, bisphenol P type epoxy Resin, bisphenol type epoxy resin such as bisphenol Z type epoxy resin, phenol novolac type epoxy resin, novolac type epoxy resin such as cresol novolac type epoxy resin, Phenyl type epoxy resin, biphenyl aralkyl type epoxy resin, arylalkylene type epoxy resin, naphthalene type epoxy resin, anthracene type epoxy resin, phenoxy type epoxy resin, dicyclopentadiene type epoxy resin, nor
  • a cyanate resin (including a prepolymer of cyanate resin) may be used.
  • cyanate resin By using cyanate resin, the thermal expansion coefficient of the resin layer can be reduced.
  • cyanate resin is excellent in electrical characteristics (low dielectric constant, low dielectric loss tangent), mechanical strength, and the like.
  • novolac type cyanate resin for example, those represented by the following general formula (I) can be used.
  • the average repeating unit n of the novolak type cyanate resin represented by the general formula (I) is an arbitrary integer, and is not particularly limited, but is preferably 1 or more and 10 or less, particularly preferably 2 or more and 7 or less.
  • the novolak cyanate resin has low heat resistance, and can suppress the desorption and volatilization of the low-mer during heating. Moreover, it can suppress that melt viscosity becomes high too much and the moldability of a resin layer falls by making average repeating unit n below an upper limit.
  • the content of the thermosetting resin is not particularly limited, but is preferably 5% by mass or more and 50% by mass or less, and particularly preferably 20% by mass or more and 40% by mass or less with respect to the total value of the entire resin composition.
  • the content of the thermosetting resin is not particularly limited, but is preferably 5% by mass or more and 50% by mass or less, and particularly preferably 20% by mass or more and 40% by mass or less with respect to the total value of the entire resin composition.
  • the resin composition preferably contains an inorganic filler. Thereby, even if a laminated board is made thin, the outstanding intensity
  • inorganic fillers examples include silicates such as talc, calcined clay, unfired clay, mica and glass, oxides such as titanium oxide, alumina, silica and fused silica, calcium carbonate, magnesium carbonate and hydrotalcite.
  • silicates such as talc, calcined clay, unfired clay, mica and glass
  • oxides such as titanium oxide, alumina, silica and fused silica, calcium carbonate, magnesium carbonate and hydrotalcite.
  • Hydroxides such as carbonates, aluminum hydroxide, magnesium hydroxide, calcium hydroxide, sulfates or sulfites such as barium sulfate, calcium sulfate, calcium sulfite, zinc borate, barium metaborate, aluminum borate, boric acid
  • borates such as calcium and sodium borate
  • nitrides such as aluminum nitride, boron nitride, silicon nitride and carbon nitride
  • titanates such as strontium titanate and barium titanate.
  • the content of the inorganic filler is not particularly limited, but is preferably 20% by mass or more and 80% by mass or less, and particularly preferably 30% by mass or more and 70% by mass or less with respect to the total value of the entire resin composition. When the content is within the above range, particularly low thermal expansion and low water absorption can be achieved.
  • thermosetting resin when a cyanate resin (especially a novolac-type cyanate resin) is used as the thermosetting resin, it is preferable to add an epoxy resin (substantially free of halogen atoms).
  • the epoxy resin include bisphenol A type epoxy resin, bisphenol F type epoxy resin, bisphenol E type epoxy resin, bisphenol S type epoxy resin, bisphenol M type epoxy resin, bisphenol P type epoxy resin, bisphenol Z type epoxy resin and the like.
  • Type epoxy resin phenol novolac type epoxy resin, novolac type epoxy resin such as cresol novolak type epoxy resin, biphenyl type epoxy resin, xylylene type epoxy resin, arylalkylene type epoxy resin such as biphenyl aralkyl type epoxy resin, naphthalene type epoxy resin, Anthracene type epoxy resin, phenoxy type epoxy resin, dicyclopentadiene type epoxy resin, norbornene type epoxy resin, adamantane type Epoxy resins, fluorene type epoxy resins and the like.
  • an epoxy resin one of these may be used alone, or two or more having different weight average molecular weights may be used in combination, or one or two or more and those prepolymers may be used in combination. May be.
  • arylalkylene type epoxy resins or naphthalene type epoxy resins are particularly preferable. Thereby, moisture-absorbing solder heat resistance and flame retardance can be further improved.
  • a cyanate resin especially a novolac-type cyanate resin
  • a phenol resin can be further added.
  • the phenol resin include novolac type phenol resins, resol type phenol resins, aryl alkylene type phenol resins, and the like.
  • the phenol resin one of these may be used alone, two or more having different weight average molecular weights may be used in combination, and one or two or more thereof and a prepolymer thereof may be used in combination. May be.
  • aryl alkylene type phenol resins are particularly preferable. Thereby, moisture absorption solder heat resistance can be improved further.
  • additives such as a coupling agent, a curing accelerator, a curing agent, a thermoplastic resin, and an organic filler can be appropriately blended in the resin composition as necessary.
  • the resin composition used in the present embodiment can be suitably used in a liquid form in which the above components are dissolved and / or dispersed with an organic solvent or the like.
  • the resin composition may contain additives other than the above components such as pigments, dyes, antifoaming agents, leveling agents, ultraviolet absorbers, foaming agents, antioxidants, flame retardants, and ion scavengers as necessary. It may be added.
  • the fiber substrate used in the present embodiment is not particularly limited, but may be a glass fiber substrate such as a glass cloth, a polybenzoxazole resin fiber, a polyamide resin fiber, an aromatic polyamide resin fiber, a wholly aromatic polyamide resin fiber, or the like. It is composed of at least one selected from polyester resin fibers, polyimide resin fibers, and fluororesin fibers selected from polyamide resin fibers, polyester resin fibers, aromatic polyester resin fibers, wholly aromatic polyester resin fibers, and the like. Synthetic fiber base materials, kraft paper, cotton linter paper, mixed paper of linter and kraft pulp, and the like, and organic fiber base materials such as paper base materials mainly containing at least one kind. Among these, a glass fiber substrate is particularly preferable from the viewpoint of strength and water absorption. Moreover, the thermal expansion coefficient of the resin layer can be further reduced by using glass cloth.
  • the glass constituting the glass fiber substrate examples include one or more of E glass, C glass, A glass, S glass, D glass, NE glass, T glass, H glass, and the like. Among these, S glass or T glass is preferable. Thereby, the thermal expansion coefficient of a glass fiber base material can be made small, and, thereby, the thermal expansion coefficient of a prepreg can be made small.
  • the thickness of the fiber base material is usually the thickness of the fiber base material 108.
  • the thickness of the fiber base material 108 is not specifically limited, It is preferable that they are 5 micrometers or more and 60 micrometers or less, More preferably, they are 10 micrometers or more and 35 micrometers or less, More preferably, they are 14 micrometers or more and 20 micrometers or less.
  • the fiber base material 108 may be composed of a single fiber base material, but may be composed of a plurality of laminated fiber base materials. In addition, when using a plurality of fiber base materials in piles, the total thickness only needs to satisfy the above range. By using the fiber base material having such a thickness, the handling property at the time of manufacturing the prepreg is further improved, and the warp reduction effect is particularly remarkable.
  • the fiber base material used in this embodiment preferably has a dielectric constant at 1 MHz of 3.8 to 7.0, more preferably 4.7 to 7.0, and even more preferably 5.4. It is above 6.8.
  • a glass fiber substrate having such a dielectric constant the dielectric constant of the laminate can be further reduced, which is suitable for a semiconductor package using a high-speed signal.
  • E glass, S glass, NE glass, or T glass is suitably used as the glass fiber base material having the linear expansion coefficient, Young's modulus, and dielectric constant as described above.
  • the obtained asymmetric prepreg is laminated by heating and pressing in a configuration in which the metal foil layer 112 is arranged on one side or both sides (here, one side or both sides of the resin layer 106). Thereby, the laminated body 110 is obtained.
  • Carrier foil may be provided on the surface of the metal foil layer 112.
  • the thickness of the metal foil layer 112 is preferably 1 ⁇ m or more and 18 ⁇ m or less, more preferably 2 ⁇ m or more and 12 ⁇ m or less. When the thickness of the metal foil layer 112 is within the above range, a fine pattern can be formed, and the warpage can be further reduced by controlling the misalignment degree.
  • Examples of the metal constituting the metal foil layer 112 include copper and copper alloys, aluminum and aluminum alloys, silver and silver alloys, gold and gold alloys, zinc and zinc alloys, nickel and nickel alloys, tin, and the like. Examples thereof include at least one of tin-based alloys, iron, iron-based alloys, and the like. Further, as the metal foil layer 112, an electrolytic copper foil with a carrier or the like may be used.
  • the stacked body 110 is disposed on one surface of the substrate 102.
  • the stacked body 110 is formed on the substrate 102 by heat and pressure.
  • the stacked body 110 is formed only on one surface of the substrate 102, but the present invention is not limited to this, and the stacked body 110 may be formed on both surfaces of the substrate 102.
  • the asymmetric prepreg having the metal foil layer 112 formed thereon is formed on the substrate 102.
  • the present invention is not limited to this. After the asymmetric prepreg is formed on the substrate 102, the asymmetric prepreg is formed on the asymmetric prepreg.
  • a metal foil layer may be formed.
  • a resist (not shown) is formed on the metal foil layer 112.
  • the metal foil layer 112 is selectively etched using the resist as a mask.
  • the metal foil layer 114 having a predetermined pattern is formed.
  • the metal foil layer 114 functions as a circuit pattern or a rectangular pad extending in a predetermined direction in a plan view.
  • the resin layer 106 is selectively removed using a laser or the like. As a result, an opening 116 is formed in the resin layer 106.
  • the opening 116 is formed to be a through hole penetrating from the first surface 10 to the second surface 20 of the resin layer 106.
  • the opening 116 is formed by removing the resin layer 106 in one direction from the first surface 10 side. That is, the resin layer 106 is not removed from the second surface 20 side.
  • a part of the upper surface of the internal circuit 104 is exposed from the bottom surface (opening surface) of the opening 116.
  • a part of the fiber base material 108 protrudes from the side wall of the opening 116.
  • the printed wiring board of the present embodiment can suppress the detachment of the via inside the opening by causing the fiber base material to protrude from the side wall at the top of the via hole and embedded in the via. is there. Therefore, as a result of studies by the present inventors, the fiber base material can be protruded from the side wall on the upper side of the via hole (opening) by appropriately selecting the material of the resin layer and the fiber base material and the laser conditions. It turned out to be.
  • the length of the fiber substrate protruding from the upper side wall of the opening of the present embodiment is increased. can do.
  • the length of the fiber substrate protruding from the upper side wall of the opening of the present embodiment by using conditions such as shortening the pulse width and / or (v) reducing the reference energy and increasing the number of shots.
  • the length can be shortened.
  • the size of the opening diameter L1 and the opening diameter L2 of the opening can be adjusted by appropriately selecting the laser irradiation energy, the pulse width, the number of times of irradiation, and the like.
  • desmear treatment is performed on the inside of the opening 116 of the resin layer 106.
  • smear or the like is removed to clean the surface.
  • the desmear treatment is not particularly limited, and is a wet method using an oxidant solution having an organic substance decomposing action, and an organic substance by irradiating a target object with an active species (plasma, radical, etc.) having a strong oxidizing action directly.
  • a known method such as a dry method such as a plasma method for removing the residue can be used.
  • the desmear treatment with a chemical solution specifically includes a method of performing a swelling treatment on the resin surface, etching with an alkali treatment, and subsequently performing a neutralization treatment.
  • the desmear process by the plasma process is performed by discharging with a high frequency power source of about several kHz to several tens MHz in a gas atmosphere of several mTorr to several Torr, for example.
  • a reactive gas such as oxygen or an inert gas such as nitrogen or argon can be used.
  • the gas component activated by the plasma may cause a chemical reaction, a physical reaction caused by collision (bombing) of the gas molecules themselves, or both, resulting in residual or low-level residues in the via hole.
  • Surface fouling due to molecules can be removed.
  • Cleaning by plasma treatment can be performed by, for example, a parallel plate method.
  • Residue of a strong resin composition that cannot be removed by cleaning with a chemical solution can be removed by a desmear treatment using plasma. Moreover, it is not necessary to use a chemical. By not using the chemical solution, for example, it is possible to reliably prevent the chemical solution from permeating into the wiring layer of the internal circuit 104 or the interface of the fiber base material 108 and entering the ions. Further, the first surface 10 of the resin layer 106 can be modified by generating plasma on the exposed surface of the resin layer 106. Thereby, the adhesiveness of the 1st surface 10 and a conductor film can be improved. As described above, various desmear treatment methods are appropriately employed depending on the state of the first surface 10 of the resin layer 106 or the surface of the inner wall of the opening 116.
  • a base film 118 is formed on the metal foil layer 114, the bottom surface of the opening 116 (the internal circuit 104 exposed from the opening 116), and the sidewall.
  • the base film 118 may be formed by ion plating, sputtering, vacuum deposition, PVD (physical vapor deposition), or CVD (chemical vapor deposition). Further, the base film 118 may be formed using an electroless plating method. An example of the electroless plating method will be described.
  • catalyst nuclei are provided on at least the bottom surface of the opening 116 (the upper surface of the internal circuit 104) and the side wall.
  • the catalyst nucleus is not particularly limited.
  • a noble metal ion or palladium colloid can be used.
  • a thin electroless plating layer is formed by electroless plating using the catalyst core as a core.
  • electroless plating for example, one containing copper sulfate, formalin, complexing agent, sodium hydroxide or the like can be used.
  • a heat treatment at 120 to 180 ° C. is particularly preferable in that a film capable of suppressing oxidation can be formed.
  • the average thickness of the electroless plating layer may be a thickness that allows the next electroplating to be performed, and for example, about 0.1 to 1 ⁇ m is sufficient.
  • the tip of the protruding portion 109 is not covered with the base film 118 and protrudes from the base film 118. By not forming the base film 118 at the tip of the protrusion 109, it is possible to prevent the gap between the opposing protrusions 109 from being filled with the base film 118 in the cross section along the thickness direction of the resin layer 106.
  • a resist layer 120 having a predetermined opening pattern is formed on the base film 118.
  • This opening pattern corresponds to, for example, a circuit pattern.
  • the resist layer 120 is not particularly limited, and a known material can be used, but liquid and dry films can be used.
  • a photosensitive dry film or the like As the resist layer 120.
  • An example using a photosensitive dry film will be described. For example, a photosensitive dry film is laminated on the base film 118, a non-circuit formation region is exposed and photocured, and an unexposed portion is dissolved and removed with a developer.
  • the resist layer 120 is formed by leaving the cured photosensitive dry film.
  • a plating layer 122 is formed by electroplating at least inside the opening pattern of the resist layer 120 and on the electroless plating layer.
  • the base film 118 serves as a power feeding layer.
  • the base film 118 is formed on the inner wall of the opening 116.
  • the plating layer 122 is embedded in the opening 116.
  • the well-known method used with a normal printed wiring board can be used, For example, an electric current is sent through a plating solution in the state immersed in plating solutions, such as copper sulfate. Etc. can be used.
  • the plating layer 122 may be a single layer or may have a multilayer structure.
  • the material for the plating layer 122 is not particularly limited, and for example, one or more of copper, copper alloy, 42 alloy, nickel, iron, chromium, tungsten, gold, and solder can be used.
  • the resist layer 120 is removed using an alkaline stripping solution, sulfuric acid, a commercially available resist stripping solution, or the like.
  • the base film 118 and the metal foil layer 114 other than the region where the plating layer 122 is formed are removed.
  • the base film 118 and the metal foil layer 114 can be removed by using soft etching (flash etching) or the like.
  • the soft etching treatment can be performed by etching using an etchant containing sulfuric acid and hydrogen peroxide, for example.
  • the via 124 and the conductive circuit 126 can be formed.
  • the via 124 is composed of the base film 118 and the plating layer 122.
  • the conductive circuit 126 is configured by laminating a metal foil layer 114 and a metal layer (a base film 118 and a plating layer 122 of an electroless plating layer).
  • the first buildup layer 128 can be formed by forming the via 124 in the stacked body 110.
  • the printed wiring board 100 of this embodiment is obtained by the above. Further, the printed wiring board 100 obtained in the first embodiment may be used as an inner layer circuit board, and a buildup layer may be further formed on the inner layer circuit board.
  • FIG. 2 is a cross-sectional view showing the structure of the semiconductor device 150.
  • a semiconductor device 150 can be obtained by mounting a semiconductor chip (not shown) on the printed wiring board 100 of the first embodiment.
  • the semiconductor device 150 includes a printed wiring board 100, a semiconductor element 138 mounted on the printed wiring board 100, and a bump 134 that electrically connects the printed wiring board 100 and the semiconductor element 138.
  • a solder resist layer 130 is formed between the printed wiring board 100 and the semiconductor element 138.
  • the via 124 is electrically connected to the semiconductor element 138 through the wiring layer 132 and the bump 134. That is, the solder resist layer 130 is formed on the via 124, around the wiring layer 132 and the bump 134.
  • the semiconductor element 138 is packaged with an underfill 136 formed around it.
  • the wiring layer 132 is produced by, for example, a subtractive construction method.
  • a printed wiring board may be formed by laminating an arbitrary buildup layer and repeating the steps of interlayer connection and circuit formation by an additive method.
  • the method for laminating the solder resist layer 130 is not particularly limited, but may be the same method as the laminating method of the laminate 110 or the first buildup layer 128, or may be another method.
  • the material used for the solder resist layer 130 is not particularly limited, but the material used for the stacked body 110 or the first buildup layer 128 may be used as appropriate, or another material may be used.
  • the solder resist material is preferably a fiber base material contained in a resin composition.
  • a method for producing the solder resist layer 130 is not particularly limited, but may be a production method similar to that for the resin layer 106 in the present embodiment, or may be another production method.
  • the via 124 is embedded in the opening 116 whose opening diameter gradually decreases from the first surface 10 to the second surface 20 of the resin layer 106.
  • a via embedded in such an opening is likely to come out of the resin layer due to a load applied to the resin layer from the second surface toward the first surface. . Therefore, further investigation has made it possible to adopt a structure in which a part of the fiber base material 108 (projecting portion 109) protrudes from the resin layer 106 and bites into the via 124 at the top of the via 124. It was found that detachment was prevented.
  • the fiber base material 108 is embedded in the resin layer 106 and embedded in the via 124. For this reason, the fiber base material 108 can suppress the shift
  • the cross-sectional shape of the opening 116 is a structure that spreads from the bottom to the top.
  • the following has been clarified by the present inventors.
  • the protruding portion 109 fixes the position of the via 124, the via 124 is suppressed from being detached from the opening 116.
  • the conventional printed wiring board manufacturing method of Patent Document 2 is as follows. First, a resin layer having a reinforcing material as an intermediate layer is prepared as a core layer. Laser irradiation is performed from the upper surface of the resin layer toward the central portion, and laser irradiation is performed from the lower surface toward the central portion. Thereby, two openings are formed from both sides to form a via hole having a double-sided taper. In the via hole, a reinforcing material protrudes at the center where these openings intersect. Next, a desmear process is performed on such a via hole, and a metal film is embedded by plating.
  • Patent Document 2 a reinforcing material protrudes from a portion having a minimum opening diameter of a via hole. In this portion, the reinforcing material closes the opening of the via hole. For this reason, the wraparound property of the plating solution to the lower part of the via hole may be deteriorated, or the desmear process in the lower part of the via hole may be insufficient. For this reason, in the conventional printed wiring board, the yield fell. Moreover, it is difficult to accurately control the tolerance positions of the two openings and the positions of the reinforcing members in a cross-sectional view.
  • the protruding portion 109 of the fiber base material 108 is formed on a portion of the side wall of the opening 116 that has an opening diameter larger than the minimum opening diameter.
  • the protrusion 109 is formed on the upper part of the opening 116 having a relatively large opening diameter. For this reason, it does not prevent the plating solution from flowing into the lower portion of the opening 116, and does not prevent the desmear process on the bottom of the opening 116. Therefore, the printed wiring board 100 excellent in yield can be obtained.
  • the opening 116 is formed from one direction from the first surface 10 side to the second surface 20 side.
  • the opening 116 has a simpler structure than the opening formed from two opposing directions.
  • alignment of the two openings is not necessary.
  • the protrusion 109 may be unevenly distributed at any position on the upper side of the opening 116, the manufacturing margin is high. Therefore, according to this embodiment, it is possible to obtain the printed wiring board 100 having a high manufacturing margin and high manufacturing stability.
  • the fiber base material 108 is unevenly distributed on the semiconductor chip mounting surface side of the printed wiring board, the difference in linear expansion coefficient between the semiconductor chip side portion of the printed wiring board and the semiconductor chip can be reduced. Thereby, peeling of a semiconductor chip etc. can be prevented.
  • FIG. 7 and 8 show a modification of the printed wiring board 100 of the first embodiment.
  • buildup layers may be formed on both surfaces of the substrate 102. That is, the first buildup layer 128 may be formed on one surface of the substrate 102, and the second buildup layer 128 may be formed on the other surface of the substrate 102.
  • Each buildup layer may use the same type of material, but may use different types of materials. In each layer, the number of vias and the number of wirings can be set appropriately.
  • a through hole 142 may be formed in the substrate 102.
  • a plating film 144 is formed on the inner wall of the through hole 142.
  • the plating film 144 can electrically connect a wiring formed on one surface of the substrate 102 and a wiring formed on the other surface.
  • the through hole 142 is formed in the substrate 102 after the step shown in FIG. Thereafter, a plating film 144 is formed on the through hole 142. Thereafter, the same steps as those shown in FIG. Thereby, the printed wiring board shown in FIG. 8 is obtained.
  • the laminate 110 may be used not only for the buildup layer but also for the core layer. Further, in the in-plane direction of the first buildup layer 128, it is only necessary that the protruding portion 109 is embedded in at least one via 124, but it is preferable that the protruding portion 109 is embedded in all the vias 124. . Further, when the build-up layer is a multilayer, it is sufficient that the protruding portion 109 is embedded in the via 124 in at least one layer. However, the protruding portion 109 may be embedded in the via 124 in each layer. preferable. 6 may be replaced with each other.
  • the resist layer 120 is formed.
  • the step of removing the resist layer 120 may be performed after the plating layer 122 is formed on the metal foil layer 114, the resist layer 120 is formed on the plating layer 122 and etched.
  • FIG. 10 shows an enlarged cross-sectional view in which a part of the printed wiring board 200 is enlarged.
  • an opening 204A including an opening 208A and a gap 208 is formed, and a conductor (via 124) is embedded in the opening 204A, except that a conductor (via 124) is embedded. This is the same as in the first embodiment.
  • a gap 208 is formed between the resin layer 106 and the internal circuit 104 in a region closer to the second surface 20 than the portion having the minimum diameter of the opening 116.
  • the gap 208 is formed in at least one of the resin layer 106 and the internal circuit 104 and communicates with the opening 116 through the opening 208A.
  • a gap 208 is formed by missing the peripheral wall of the opening 116 or the surface of the internal circuit 104. Further, in the plan view from the first surface 10 side, the gap 208 is located outside the opening 116 with respect to the side wall constituting the portion having the smallest opening diameter of the opening 116, and is located between the gap 208 and the opening 116.
  • a via 124 is filled.
  • the internal circuit 104 is provided in direct contact with the second surface 20 of the resin layer 106 and is electrically connected to the via 124.
  • the upper portion of the via 124 is located above the opening end of the opening 116 having the maximum opening diameter L1.
  • the middle portion of the via 124 is located between the opening end of the opening 116 having the maximum opening diameter L1 and the portion forming the minimum opening diameter L2.
  • the lower portion of the via 124 is located below the portion of the opening 116 having the smallest opening diameter L2.
  • the upper, middle and lower portions of these vias 124 are formed continuously and integrally. Among these, the lower portion of the via 124 has a function of preventing dropping.
  • the via 124 has an area having a lateral width (width dimension in a direction perpendicular to the thickness direction of the printed wiring board) larger than the opening diameter L2 below the portion of the opening 116 having the minimum opening diameter L2.
  • This region is configured by a portion filled in the opening 204A. That is, in a plan view from the first surface 10 side, the side wall of the opening 204A is located on the outer side of the opening 116 with respect to the side wall constituting the portion having the smallest opening diameter of the opening 116.
  • the lower portion of the via 124 is not symmetrical with the upper portion of the via 124 and has a different structure. That is, in cross-sectional view, the via 124 preferably has a lateral width below the opening having the smallest opening diameter L2 smaller than the lateral width above the opening having the largest opening diameter L1.
  • the via 124 is formed along the second surface 20 from the side wall of the opening 202.
  • a constriction is formed between the middle part and the lower part of the via 124.
  • the side wall of the resin layer 106 is formed along the constriction of the via 124.
  • the cross-sectional shape of the resin layer 106 is an acute-angled shape (here, the acute angle is sufficient if the angle formed between the side wall of the opening 202 formed along the via 124 and the second surface 20 is an acute angle, Part of its tip may be rounded).
  • the opening 202 includes an opening 116 and an opening 204 ⁇ / b> A communicating with the opening 116.
  • the opening 202 is configured such that the opening diameter decreases continuously or discontinuously from the first surface 10 toward the second surface 20 in a cross-sectional view, and more preferably continuously decreases. It is configured.
  • a part of the lower portion of the opening 202 (below the position where the fiber base material 108 is formed) has an opening 204A wider than the minimum opening diameter L2 of the opening 116. .
  • the fiber base material does not protrude from the portion of the opening 116 having the minimum opening diameter.
  • the opening 204A communicates with the opening 208A formed by lacking the surface of the internal circuit 104 exposed from the opening 116, and extends in a direction perpendicular to the thickness direction of the printed wiring board.
  • the gap 208 is provided.
  • the opening 208A has the same diameter from the opening 116 side to the internal circuit 104 side, and has a cylindrical shape.
  • the gap 208 is configured to be surrounded by the bottom surface 204, the side wall 206, and the second surface 20 of the resin layer 106 of the internal circuit 104.
  • the gap 208 is formed by lacking the surface of the internal circuit 104.
  • the cross-sectional shape of the gap 208 is not particularly limited, and examples include a U-shape and a U-shape.
  • the gap 208 only needs to be formed outside the portion of the opening 116 having the minimum opening diameter L2 in plan view.
  • the gap 208 may be formed on a part of the periphery of the opening 208A, or may be formed in a ring shape around the entire periphery of the opening 208A.
  • a via 124 is embedded in the opening 208 ⁇ / b> A and the gap 208.
  • the gap 208 is not particularly limited as long as the via 124 is embedded, and both the base film 118 and the plating layer 122 may be embedded, or only one of the base film 118 and the plating layer 122 is embedded. It may be.
  • Such vias 124 are preferably in contact with the second surface 20 of the resin layer 106, the bottom surface 204 of the internal circuit 104, and the side walls 206, for example. As described above, in the second embodiment, the contact area between the via 124 and the internal circuit 104 is improved as compared with the first embodiment, so that the impact resistance and thermal shock resistance of the printed wiring board 200 are improved. Can do.
  • the via 124 is embedded up to the inside of the opening 204A wider than the minimum opening diameter L2.
  • the lower portion of the via 124 (the buried portion of the conductor buried in the opening 204A) has a width that is wider than the opening diameter L2.
  • the lower portion of the via 124 prevents the entire via 124 from passing through the opening having the opening diameter L2 and detaching from the opening having the opening diameter L1. Therefore, the via 124 is suppressed from being detached from the opening 202. Therefore, the printed wiring board 200 excellent in connection reliability can be obtained.
  • the contact area between the via 124 and the internal circuit 104 is increased as compared with the case where the via 124 is not embedded in the gap 208. For this reason, poor connection between the via 124 and the internal circuit 104 is reduced. Therefore, in this embodiment, the heat cycle resistance is improved.
  • 11 to 12 are process cross-sectional views illustrating process steps of the method for manufacturing the printed wiring board 200 of the second embodiment.
  • the manufacturing method of the printed wiring board 200 of the second embodiment is the same as that of the first embodiment except that after the opening is formed, soft etching is performed on the opening. Description of the manufacturing method common to the first embodiment will be omitted as appropriate.
  • the structure shown in the drawing is obtained through the steps of FIGS. 3A to 4B of the first embodiment.
  • the surface of the internal circuit 104 is exposed at the bottom surface (opening end on the second surface side) of the opening 116.
  • the surface of the conductive layer (internal circuit 104) is soft-etched. For example, soft etching is performed so that a film thickness of about 0.2 to 2 ⁇ m is removed.
  • an opening 204 ⁇ / b> A is formed that is hollowed out in the depth direction and the horizontal direction (the thickness direction of the internal circuit 104 and the horizontal direction orthogonal to the thickness direction).
  • an opening portion 202 is defined as a gap portion in which the opening portion 116 and the opening portion 204 ⁇ / b> A are continuously formed.
  • a part of the resin layer 106 inside the opening 202 may be side-etched in the side wall direction by soft etching. For example, as shown in FIG. 13, a portion that is wider than the portion having the minimum opening diameter may be formed in the region on the second surface 20 side of the opening 116.
  • the opening 116 includes an opening 116A having a diameter that decreases from the first surface side toward the second surface side, and an opening 116B that communicates with the opening 116A.
  • the opening 116B has the same diameter from the opening 116A side to the opening 208A side, and the opening 116B has a cylindrical shape.
  • the portion formed outside the minimum diameter portion of the opening 116A of the opening 116B corresponds to the gap.
  • the opening 116 and the gap 208 are filled with vias. Even when the opening 116 as shown in FIG. 13 is formed, the resin layer 106 is removed from the first surface side from the first surface to the second surface of the resin layer 106. Furthermore, in FIG. 13, the opening 204A may not be formed.
  • a base film 118 is formed on the bottom surface (on the internal circuit 104) and the side wall of the opening 202 and on the first surface 10 of the resin layer 106, as in the first embodiment.
  • a resist layer 120 having a predetermined pattern is formed on the base film 118 disposed on the first surface 10.
  • a plating layer 122 is formed so as to fill the inside of the opening 202 and the separated portion of the resist layer 120.
  • the base film 118 and the metal foil layer 114 other than the region where the plating layer 122 is formed are removed.
  • a printed wiring board 200 as shown in FIG. 12C can be obtained.
  • the printed wiring board 200 of the second embodiment can achieve the same effects as those of the first embodiment.
  • FIG. 14 is a cross-sectional view illustrating a configuration of a printed wiring board 300 according to the third embodiment.
  • the printed wiring board 300 of this embodiment is different from that of the first embodiment in that the fiber base material 108 is unevenly distributed on the second surface 20 side with respect to the central portion of the resin layer 106.
  • the fiber base material is not disposed on the first surface 10 side with respect to the central portion (the center position of the thickness) of the resin layer 106.
  • a part (projecting portion 109) of the fiber base material 108 projects from the side wall of the opening 116 on the second surface 20 side with respect to the central portion of the resin layer 106.
  • Other points are the same as in the first embodiment.
  • L4 shown in FIG. 14 indicates a separation distance from the tip of the protrusion 109 to the tip of the other protrusion 109 in the cross section along the thickness direction of the printed wiring board.
  • the fiber base material 108 is unevenly distributed on the second surface 20 side of the resin layer 106. That the fiber base material 108 is unevenly distributed means that the entire fiber base material 108 is buried between the center line M2 of the resin layer 106 and the second surface 20, that is, the distance D1 is larger than the distance D2. .
  • D1 / D2 is preferably 6/4 or more and 9/1 or less, more preferably 7/3 or more and 8/2 or less.
  • the protruding portion 109 of the fiber base material 108 is located between the second surface 20 and the center line M2 in a cross-sectional view and bites into the via 124. In other words, the protruding portion 109 is not disposed between the first surface 10 and the center line M2.
  • the protruding portion 109 is coupled to the via 124 (in other words, the protruding portion 109 is fitted in the via 124).
  • the distance L4 / opening diameter L2 between the tips of the protruding portions 109 facing each other is preferably 1/5 or more and 9/10 or less, more preferably 1 / 2 or more and 4/5 or less.
  • the length L3 of the protrusion 109 and the protrusion 109 are not particularly limited as long as the protrusion 109 is embedded in the via 124 inside the opening 116, it is specified that the distance L4 / opening diameter L2 is within the above range. preferable. By setting the distance L4 / opening diameter L2 within the above range, the length L3 is appropriate, so that the connection reliability of the via 124 can be improved along with the wraparound property of the plating solution.
  • 16 to 19 are process cross-sectional views showing the steps of the manufacturing process of the printed wiring board 300.
  • the manufacturing method of the printed wiring board 300 of this embodiment includes the following steps. A step of forming a core layer (substrate 102), a step of forming a laminate 110A composed of asymmetric prepregs, and a step of forming vias 124. Hereinafter, each step will be described.
  • a substrate 102 having a metal foil attached on one surface is prepared.
  • a protective film (not shown) is formed on the metal foil. Subsequently, the protective film is patterned into a predetermined shape. Using this protective film, the metal foil is selectively etched. As a result, as shown in FIG. 16A, an internal circuit 104 having a predetermined pattern shape is formed on the substrate 102. In this step, an etching resist or a photosensitive resist can be used as the protective film.
  • a stacked body 110A is prepared.
  • the laminated body 110A differs from the laminated body 110 of the first embodiment only in that the position of the fiber base material 108 is unevenly distributed on the second surface 20 side of the resin layer 106.
  • the other points are the same.
  • the laminated body 110A is not particularly limited, and for example, a laminate in which the metal foil layer 112 is laminated on at least one surface of the resin layer 106 containing a fiber base material can be used. That is, the laminate 110 is formed by forming a metal foil on a prepreg impregnated with a base material. For example, copper foil is preferably used as the metal foil.
  • the laminate 110 for example, a laminate of a plurality of prepregs can be used.
  • a laminated body what superposed
  • the thing of the same material as a core layer may be used for the interlayer insulation layer of a buildup layer, a base material or a resin composition may differ.
  • the manufacturing method of the prepreg is the same as that of the first embodiment, and an asymmetric prepreg 3 is obtained.
  • the resin base 106 has the fiber base material 108 unevenly distributed in the thickness direction of the resin layer 106.
  • Such a prepreg is called an asymmetric prepreg.
  • the obtained asymmetric prepreg (resin layer 106) is laminated by heating and pressing in a configuration in which the metal foil layer 112 is arranged on one side or both sides. Thereby, the stacked body 110A is obtained.
  • Carrier foil may be provided on the surface of the metal foil layer 112.
  • the stacked body 110 ⁇ / b> A is disposed on one surface of the substrate 102.
  • the stacked body 110A is formed on the substrate 102 by heat and pressure.
  • the stacked body 110 ⁇ / b> A is formed only on one side of the substrate 102.
  • the present invention is not limited to this, and the stacked body 110 ⁇ / b> A may be formed on both surfaces of the substrate 102.
  • the asymmetric prepreg having the metal foil layer 112 formed thereon is formed on the substrate 102.
  • the present invention is not limited to this. After the asymmetric prepreg is formed on the substrate 102, the asymmetric prepreg is formed on the asymmetric prepreg.
  • a metal foil layer may be formed.
  • a resist (not shown) is formed on the metal foil layer 112. Subsequently, as shown in FIG. 17A, selective etching is performed using the resist as a mask. Thereby, the metal foil layer 114 having a predetermined pattern is formed.
  • the resin layer 106 is selectively removed using a laser or the like. As a result, an opening 116 is formed in the resin layer 106.
  • the opening 116 is formed to be a through hole penetrating from the first surface 10 to the second surface 20 of the resin layer 106.
  • a part of the fiber base material 108 protrudes on the side wall of the opening 116.
  • a base film 118 is formed on the metal foil layer 114 and on the bottom surface and the side wall of the opening 116.
  • the base film 118 may be formed by ion plating, sputtering, vacuum deposition, PVD method (physical vapor deposition), or CVD method (chemical vapor deposition).
  • the base film 118 is formed using an electroless plating method.
  • a resist layer 120 having a predetermined opening pattern is formed on the base film 118.
  • a plating layer 122 is formed by electroplating at least inside the opening pattern of the resist layer 120 and on the electroless plating layer.
  • the base film 118 serves as a power feeding layer.
  • the base film 118 is a thin film formed on the inner wall of the opening 116.
  • the plating layer 122 is an embedded body embedded in the opening 116.
  • electroplating The well-known method used with a normal printed wiring board can be used, For example, an electric current is sent through a plating solution in the state immersed in plating solutions, such as copper sulfate. Etc. can be used.
  • the plating layer 122 may be a single layer or may have a multilayer structure.
  • the material of the plating layer 122 is not particularly limited, and for example, copper, copper alloy, 42 alloy, nickel, iron, chromium, tungsten, gold, solder, or the like can be used.
  • the resist layer 120 is removed using an alkaline stripping solution, sulfuric acid, a commercially available resist stripping solution, or the like.
  • the base film 118 and the metal foil layer 114 other than the region where the plating layer 122 is formed are removed.
  • the base film 118 and the metal foil layer 114 can be removed by using soft etching (flash etching) or the like.
  • the soft etching treatment can be performed by etching using an etchant containing sulfuric acid and hydrogen peroxide, for example.
  • the via 124 and the conductive circuit 126 can be formed.
  • the via 124 is composed of the base film 118 and the plating layer 122.
  • the conductive circuit 126 is configured by laminating a metal foil layer 114 and a metal layer (a base film 118 and a plating layer 122 of an electroless plating layer).
  • the first buildup layer 128 can be formed by forming the via 124 in the stacked body 110.
  • the printed wiring board 300 of the present embodiment is obtained. Further, the printed wiring board 300 obtained in the first embodiment may be used as an inner layer circuit board, and a buildup layer may be further formed on the inner layer circuit board.
  • FIG. 15 is a cross-sectional view showing the structure of a semiconductor device having a printed wiring board 300.
  • the semiconductor device 150 can be obtained by mounting a semiconductor chip (not shown) on the printed wiring board 300 of this embodiment.
  • the semiconductor device includes a printed wiring board 300, a semiconductor element 138 mounted on the printed wiring board 300, and a bump 134 that electrically connects the printed wiring board 300 and the semiconductor element 138.
  • a solder resist layer 130 is formed between the printed wiring board 300 and the semiconductor element 138.
  • the via 124 is electrically connected to the semiconductor element 138 through the wiring layer 132 and the bump 134. That is, the solder resist layer 130 is formed on the via 124, around the wiring layer 132 and the bump 134.
  • the semiconductor element 138 is packaged with an underfill 136 formed around it.
  • the effect of this embodiment is demonstrated. According to this embodiment, the same effects as those of the first embodiment can be obtained, and the following effects can be obtained. Since the fiber base material 108 is unevenly distributed on the substrate 102 side, the difference in linear expansion coefficient between the substrate 102 side region of the resin layer 106 and the substrate 102 can be reduced. Thereby, film peeling in the vicinity of the bonding surface between the resin layer 106 and the substrate 102 hardly occurs, and the printed wiring board 300 excellent in yield can be obtained.
  • the protrusion 109 of the fiber base material 108 is not formed near the opening on the upper surface. For this reason, it does not prevent the plating solution from flowing from the upper surface opening of the opening 116. Therefore, the printed wiring board 300 excellent in yield can be obtained.
  • 20 and 21 show a modification of the printed wiring board 300 of this embodiment.
  • buildup layers may be formed on both surfaces of the substrate 102. That is, the first buildup layer 128 may be formed on one surface of the substrate 102, and the second buildup layer 128 may be formed on the other surface of the substrate 102.
  • Each buildup layer may use the same type of material, but may use different types of materials. In each layer, the number of vias and the number of wirings can be set appropriately.
  • a through hole 142 may be formed in the substrate 102.
  • a plating film 144 is formed on the inner wall of the through hole 142.
  • the plating film 144 can electrically connect a wiring formed on one surface of the substrate 102 and a wiring formed on the other surface.
  • the through hole 142 is formed in the substrate 102 after the step shown in FIG. Thereafter, a plating film 144 is formed on the through hole 142. Thereafter, the same steps as those shown in FIG. Thereby, the printed wiring board shown in FIG. 21 is obtained.
  • the laminate 110A may be used not only for the build-up layer but also for the core layer. Further, in the in-plane direction of the first buildup layer 128, it is only necessary that the protruding portion 109 is embedded in at least one via 124, and it is preferable that the protruding portion 109 is embedded in all the vias 124. Further, when the build-up layer is a multilayer, it is only necessary that at least one of the vias 124 is embedded in each layer, and the protrusions 109 are embedded in all the vias 124 over the entire layer. It is preferable that 18 may be replaced with each other.
  • the resist layer 120 is formed.
  • the step of removing the resist layer 120 may be performed after the plating layer 122 is formed on the metal foil layer 114, the resist layer 120 is formed on the plating layer 122 and etched.
  • the printed wiring board 400 of this embodiment will be described with reference to FIGS. 22 and 23 are cross sections showing the configuration of the printed wiring board 400 according to the fourth embodiment.
  • the printed wiring board 400 of the present embodiment is different from the second embodiment in that the fiber base material 108 is unevenly distributed on the second surface 20 side with respect to the central portion of the resin layer 106.
  • a part (projecting portion 109) of the fiber base material 108 projects from the side wall of the opening 116 on the second surface 20 side with respect to the central portion of the resin layer 106.
  • Other points are the same as in the second embodiment.
  • the protruding portion 109 of the fiber base material 108 is located between the second surface 20 and the center line M2 in a cross-sectional view, and is configured to bite into the via 124.
  • the protrusion 109 is not formed in the via 124 between the first surface 10 and the center line M2.
  • the protrusion 109 is connected to the via 124.
  • the front end portion of the protruding portion 109 is not continuous with the front end portion facing the cross section along the thickness direction of the printed wiring board, and is configured to be separated.
  • the fiber base material 108 may be spaced apart in a plurality of stacking directions.
  • a plurality of protrusions 109 may protrude from one side wall surface of the opening 116, but only one protrusion 109 has a good balance between connection reliability and plating solution wraparound. It is preferable that it protrudes.
  • L4 / opening diameter L2 from the front end portion of the projecting portion 109 to the opposing front end portion in a sectional view is preferably 1/5 or more and 9/10 or less, more preferably 1/2 or more and 4/5 or less. is there.
  • the length L3 of the protrusion 109 and the protrusion 109 are not particularly limited as long as the protrusion 109 is embedded in the via 124 inside the opening 116, it is specified that the distance L4 / opening diameter L2 is within the above range. preferable. By setting the distance L4 / opening diameter L2 within the above range, the length L3 is appropriate, so that the connection reliability of the via 124 can be improved along with the wraparound property of the plating solution.
  • the manufacturing method of the printed wiring board 400 of this embodiment includes the following steps.
  • each step will be described.
  • a substrate 102 having a metal foil attached on one surface is prepared.
  • a protective film (not shown) is formed on the metal foil. Subsequently, the protective film is patterned into a predetermined shape. Using this protective film, the metal foil is selectively etched. As a result, an internal circuit 104 having a predetermined pattern shape is formed on the substrate 102 as shown in FIG. In this step, an etching resist or a photosensitive resist can be used as the protective film.
  • a stacked body 110A is prepared.
  • the stacked body 110 ⁇ / b> A is disposed on one surface of the substrate 102.
  • a resist (not shown) is formed on the metal foil layer 112. Subsequently, selective etching is performed using the resist as a mask. Thereby, the metal foil layer 114 having a predetermined pattern is formed.
  • the resin layer 106 is selectively removed using a laser or the like. As a result, an opening 116 is formed in the resin layer 106.
  • the opening 116 is formed to be a through hole penetrating from the first surface 10 to the second surface 20 of the resin layer 106.
  • a part of the upper surface of the internal circuit 104 is exposed at the bottom surface of the opening 116.
  • a part of the fiber base material 108 protrudes from the side wall of the opening 116.
  • the opening 116 is formed by removing the resin layer from the first surface 10 side from the first surface 10 to the second surface 20.
  • the surface of the internal circuit 104 is soft-etched as in the second embodiment.
  • soft etching is performed so that a film thickness of about 0.2 to 2 ⁇ m is removed.
  • the internal circuit 104 is formed with an opening 204 ⁇ / b> A that is pierced in the depth direction and the lateral direction.
  • a chemical solution made of a mixed solution of sulfuric acid and hydrogen peroxide solution can be used.
  • an opening portion 202 is defined as a gap portion in which the opening portion 116 and the opening portion 204 ⁇ / b> A are continuously formed.
  • a part of the resin layer 106 inside the opening 202 may be side-etched in the side wall direction by soft etching.
  • a portion that is wider than the portion that has the minimum opening diameter is formed on the second surface side of the opening 116 as shown in FIG. Good.
  • the opening 116 includes an opening 116A having a diameter that decreases from the first surface side toward the second surface side, and an opening 116B that communicates with the opening 116A.
  • the opening 116B has the same diameter from the opening 116A side to the opening 208A side, and the opening 116B has a cylindrical shape.
  • the opening 204A may not be formed in FIG.
  • a base film 118 is formed on the metal foil layer 114, on the bottom surface (internal circuit 104) of the opening 202, and on the side wall.
  • a resist layer 120 having a predetermined opening pattern is formed on the base film 118.
  • a plating layer 122 is formed by electroplating at least inside the opening pattern of the resist layer 120 and on the electroless plating layer.
  • the resist layer 120 is removed using an alkaline stripping solution, sulfuric acid, a commercially available resist stripping solution, or the like.
  • the base film 118 and the metal foil layer 114 other than the region where the plating layer 122 is formed are removed.
  • the base film 118 and the metal foil layer 114 can be removed by using soft etching (flash etching) or the like.
  • the first buildup layer 128 can be formed by forming the via 124 in the stacked body 110.
  • the printed wiring board 400 of the present embodiment is obtained. Further, the printed wiring board 400 may be used as an inner layer circuit board, and a buildup layer may be further formed on the inner layer circuit board.
  • FIG. 24 is a cross-sectional view showing the structure of a semiconductor device having a printed wiring board 400.
  • a semiconductor device (not shown) can be mounted on the printed wiring board 400 of this embodiment to obtain a semiconductor device.
  • the semiconductor device includes a printed wiring board 400, a semiconductor element 138 mounted on the printed wiring board 400, and a bump 134 that electrically connects the printed wiring board 100 and the semiconductor element 138.
  • a solder resist layer 130 is formed between the printed wiring board 400 and the semiconductor element 138.
  • the via 124 is electrically connected to the semiconductor element 138 through the wiring layer 132 and the bump 134. That is, the solder resist layer 130 is formed on the via 124, around the wiring layer 132 and the bump 134.
  • the semiconductor element 138 is packaged with an underfill 136 formed around it.
  • the wiring layer 132 is produced by, for example, a subtractive construction method. Alternatively, a printed wiring board may be formed by laminating an arbitrary buildup layer and repeating the steps of interlayer connection and circuit formation by an additive method.
  • the method for laminating the solder resist layer 130 is not particularly limited, and may be the same method as the laminating method of the laminate 110A or the first buildup layer 128, or may be another method.
  • the material used for the solder resist layer 130 is not particularly limited, but the material used for the stacked body 110A or the first buildup layer 128 may be used as appropriate, or another material may be used.
  • the solder resist material is preferably a fiber base material contained in a resin composition.
  • a method for producing the solder resist layer 130 is not particularly limited, but may be a production method similar to that for the resin layer 106 in the present embodiment, or may be another production method.
  • the resin layer 106 may be side-etched by soft etching.
  • the volume of the resin layer 106 having a relatively large linear expansion coefficient is reduced, and the via 124 having a relatively small linear expansion coefficient. Increases in volume. Accordingly, the heat cycle resistance is improved.
  • 29 and 30 show a modification of the printed wiring board 400 of the present embodiment.
  • build-up layers may be formed on both surfaces of the substrate 102. That is, the first buildup layer 128 may be formed on one surface of the substrate 102, and the second buildup layer 128 may be formed on the other surface of the substrate 102.
  • Each buildup layer may use the same type of material, but may use different types of materials. In each layer, the number of vias and the number of wirings can be set appropriately.
  • a through hole 142 may be formed in the substrate 102.
  • a plating film 144 is formed on the inner wall of the through hole 142.
  • the plating film 144 can electrically connect a wiring formed on one surface of the substrate 102 and a wiring formed on the other surface.
  • the through hole 142 is formed in the substrate 102 after the step shown in FIG. Thereafter, a plating film 144 is formed on the through hole 142. Thereafter, the same steps as those shown in FIG. Thereby, the printed wiring board shown in FIG. 30 is obtained.
  • the laminate 110A may be used not only for the build-up layer but also for the core layer. Further, in the in-plane direction of the first buildup layer 128, it is only necessary that the protruding portion 109 is embedded in at least one via 124, and it is preferable that the protruding portion 109 is embedded in all the vias 124. Further, when the build-up layer is a multilayer, it is only necessary that at least one of the vias 124 is embedded in each layer, and the protrusions 109 are embedded in all the vias 124 over the entire layer. It is preferable that 26 may be replaced with each other.
  • the resist layer 120 is formed.
  • the step of removing the resist layer 120 may be performed after the plating layer 122 is formed on the metal foil layer 114, the resist layer 120 is formed on the plating layer 122 and etched.
  • FIG. 31 is a cross-sectional view illustrating a configuration of a printed wiring board 500 according to the fifth embodiment.
  • the first buildup layer 128 of the printed wiring board 500 of the present embodiment has an adhesion layer (second resin layer) 146.
  • the printed wiring board 500 includes a resin layer (first resin layer) 106, a fiber base material 108, a conductor (via 124), a terminal (internal circuit 104), and an adhesion layer 146.
  • the fiber base material 108 is located inside the resin layer 106.
  • the via 124 (conductor) is embedded in the illustrated opening 116.
  • the resin layer 106 ′ is composed of a resin layer 106 that is a first resin layer and an adhesion layer 146 that is a second resin layer, and the opening 116 is an opening formed in the resin layer 106.
  • the opening 146A and the opening 116A communicate with each other.
  • the opening 116A and the opening 146A form one opening 116, and this opening 116 is contracted from the first surface side of the resin layer 106 toward the surface of the adhesion layer 146 on the internal circuit 104 side. It has a diameter.
  • the opening 116 extends from the first surface 10 side of the resin layer 106 to the surface of the adhesive layer 146 on the internal circuit 104 side. This is obtained by removing the resin layer 106 and the adhesion layer 146.
  • the via 124 integrally fills the opening 116A and the opening 146A and is electrically connected to the internal circuit 104 exposed from the opening 146A. In other words, the via 124 passes through the opening 116A and the opening 146A.
  • the opening 116 is configured such that the opening diameter decreases from the first surface 10 to the second surface 20 of the resin layer 106 in a cross-sectional view along the thickness direction of the printed wiring board 500.
  • the conductive portion (internal circuit 104) is provided on the second surface 20 of the resin layer 106 and is electrically connected to the conductor (via 124).
  • the adhesion layer 146 is provided between the fiber base material 108 and the internal circuit 104 and contains a thermoplastic resin that is a thermoplastic component. No fiber substrate is disposed inside the adhesion layer 146, and no other fiber substrate exists between the fiber substrate 108 and the internal circuit 104. Further, the adhesion layer 146 is not impregnated in the fiber base material 108. In such a printed wiring board 500, the fiber base material 108 protrudes from the side wall of the opening 116. The end of the protruding fiber substrate 108 is located inside the conductor (via 124).
  • the fiber base material 108 has a protruding portion 109 embedded in the via 124.
  • the term “formed above” includes both an aspect formed above in a direct contact state and an aspect formed indirectly above via a third member.
  • the fiber base material 108 is unevenly distributed on the second surface side with respect to the center portion of the resin layer 106 inside the resin layer 106, and on the second surface side with respect to the center portion. Although it may protrude from the side wall of the opening, it is not limited to this aspect, and may be unevenly distributed on the center of the resin layer 106 or on the first surface 10 side. Among these, it is preferable that the fiber base material 108 is unevenly distributed on the second surface side with respect to the central portion of the resin layer 106.
  • M1, M2, D1 to D4, and L1 to L4 shown in FIG. 31 are the same as those in the above embodiment, and their preferred ranges are also the same as those in the third embodiment.
  • the printed wiring board 500 of the present embodiment is the same as that of the third embodiment except that the adhesion layer 146 is provided.
  • the adhesion layer 146 is formed between the fiber base material 108 and the internal circuit 104 except for the bonding region of the via 124 and the internal circuit 104.
  • the adhesion layer 146 may be formed so as to cover the entire lower surface of the fiber base material 108 excluding the lower surface of the protruding portion, but may be patterned only in a region corresponding to the internal circuit 104.
  • the film thickness of the adhesion layer 146 is, for example, as follows.
  • adherence layer 146 is not specifically limited, For example, Preferably it is 2 micrometers or more, More preferably, it is 5 micrometers or more.
  • the upper limit of the film thickness of the adhesion layer 146 is not particularly limited, but is, for example, 20 ⁇ m or less, and more preferably 10 ⁇ m or less. By setting the thickness of the adhesion layer 146 within the above range, the connection reliability between vias and the yield are excellently balanced.
  • the adhesion layer 146 contains a thermoplastic resin as a thermoplastic component.
  • the weight average molecular weight of this thermoplastic resin is 10,000 or more.
  • the upper limit of the weight average molecular weight of a thermoplastic resin is 1 million or less, for example.
  • the weight average molecular weight of a thermoplastic resin is 30,000 or more from a viewpoint of preventing the contact with the fiber base material 108 and the internal circuit 104, Furthermore, it is 90,000 or more. It is particularly preferred.
  • thermoplastic resins include phenoxy resin, polyimide resin, polyamideimide resin, polyamide resin, polyphenylene oxide resin, polyethersulfone resin, polyester resin, polyethylene resin, polystyrene resin, styrene-butadiene copolymer, styrene- Polystyrene thermoplastic elastomers such as isoprene copolymers, thermoplastic elastomers such as polyolefin thermoplastic elastomers, polyamide elastomers, and polyester elastomers, and diene elastomers such as polybutadiene, epoxy-modified polybutadiene, acrylic-modified polybutadiene, and methacryl-modified polybutadiene.
  • the adhesion layer 146 contains a thermoplastic component, so that deformation during heating is facilitated in the heating and pressing step in the lamination step of the printed wiring board.
  • the adhesion layer 146 preferably contains a thermoplastic resin as a base polymer.
  • the content of the thermoplastic resin is preferably 20% by mass or more with respect to the total value of all resin composition components, More preferably, it is 30 mass% or more, More preferably, it is 50 mass% or more.
  • the upper limit of the content of the thermoplastic resin is not particularly limited, but the resin component may be composed only of the thermoplastic resin, or may be 90% by mass or less with respect to the total value of the resin composition components. .
  • adherence layer 146 is higher than the resin layer 106, for example, can also be made into 2 times or more of the said content rate of the resin layer 106.
  • the content of the thermoplastic resin having a weight average molecular weight of 10,000 or more in the adhesion layer 146 higher than that of the resin layer 106 the adhesion layer 146 is hardly impregnated inside the fiber base material 108. Since such an adhesion layer 146 exists between the fiber base material 108 and the internal circuit 104, the fiber base material 108 becomes difficult to contact the internal circuit 104.
  • the thermoplastic resin contained in the adhesion layer 146 has a glass transition point (Tg) of 25 ° C. or higher and 320 ° C. or lower.
  • Tg glass transition point
  • the adhesion layer 146 is less likely to be impregnated inside the fiber base material.
  • a thermoplastic resin a resin having an aromatic ring or an alicyclic hydrocarbon in a repeating unit is preferable.
  • the resin is composed of polyamideimide, polyamide, polyphenylene ether, polyetherimide, polyethersulfone, or phenoxy resin. One or more selected from the group can be used. By using these, heat resistance and chemical resistance can be further enhanced.
  • FIG. 33 to 36 are process cross-sectional views showing the steps of the process for manufacturing the printed wiring board 500.
  • the method for manufacturing the printed wiring board 500 of the present embodiment includes the following steps. A step of forming a core layer (substrate 102), a step of forming a laminate 110 composed of asymmetric prepregs, and a step of forming vias 124. Hereinafter, each step will be described.
  • a substrate 102 having a metal foil attached on one surface is prepared.
  • a protective film (not shown) is formed on the metal foil. Subsequently, the protective film is patterned into a predetermined shape. Using this protective film, the metal foil is selectively etched. As a result, an internal circuit 104 having a predetermined pattern shape is formed on the substrate 102 as shown in FIG. In this step, an etching resist or a photosensitive resist can be used as the protective film.
  • a stacked body 110B is prepared.
  • the stacked body 110B is obtained by adding an adhesion layer 146 to the stacked body 110A of the third embodiment.
  • Other points are the same as those of the stacked body 110A.
  • the laminate 110B includes the resin layer 106, the fiber base material 108, the adhesion layer 146, and the metal foil layer 112.
  • the metal foil layer 112 is stacked on the first surface 10 of the resin layer 106.
  • a copper foil is preferably used as the metal foil.
  • the laminate 110 may have one layer of prepreg or may have a plurality of layers. Although the same material as that of the core layer may be used for the buildup layer of the laminate 110B, the fiber base material or the resin composition may be different.
  • the laminate 110B can be manufactured as follows.
  • the adhesion layer 146 is directly laminated on the resin layer 106 (the first resin layer 106a and the second resin layer 106b) impregnated with the fiber base material 108.
  • the following method may be adopted.
  • an adhesion layer 146 containing a thermoplastic component is formed on the release film S1.
  • a solution containing the resin composition constituting the adhesion layer 146 is applied to the release film to form a film.
  • a resin layer is formed on the release film S2.
  • a solution containing a resin composition constituting the resin layer 106 is applied onto the release film to form a film.
  • the fiber base material 108 is disposed between the adhesion layer 146 and the resin layer 106, and the adhesion layer 146 with a release film and the resin layer 106 with the release film are stacked and pressure-bonded. At this time, the fiber base material 108 can be disposed inside the resin layer 106 by appropriately adjusting conditions such as the pressure bonding force, and the adhesion layer 146 can be pressure bonded to the first resin layer 106a.
  • PET etc. can be used as a 1st and 2nd peeling film, it is not limited to this. Thereby, a structure can be formed collectively. Then, it heat-presses and laminates
  • FIG. 39 shows a stacked structure of a part of the stacked body 110B (the metal foil layer 112 is omitted), the internal circuit 104, and the substrate 102.
  • the laminated structure shown in FIG. 39A can be used as the laminated structure shown in FIG.
  • the laminated structure shown in FIG. 39A has a structure in which the resin layer 106a, the fiber base material 108, the resin layer 106b, and the metal foil layer 114 are laminated in this order.
  • the resin layer 106 is configured by the resin layers 106a and 106b.
  • the film thickness of the adhesion layer 146 may be larger than the film thickness of the internal circuit 104 as shown in FIG.
  • the film thickness of the adhesion layer 146 may be larger than the film thickness of the resin layer 106b under the fiber substrate 108.
  • the surface of the adhesion layer 146 on the resin layer 106 side is flat.
  • the resin layer of the adhesion layer 146 The surface on the 106 side may not be flat.
  • the film thickness of the adhesion layer 146 is the same as or thinner than the film thickness of the internal circuit 104.
  • the film thickness of the adhesion layer 146 may be smaller than the film thickness of the resin layer 106b under the fiber substrate 108.
  • the adhesion layer 146 is provided with unevenness corresponding to the pattern of the circuit 104.
  • the adhesion layer 146 follows the shape of the internal circuit 104, and the shape of the outer surface thereof may be, for example, a step type or a bell type.
  • the laminated structure shown in FIG. 40A is a structure in which the resin layer 106a, the fiber base material 108, the adhesion layer 146, and the resin layer 106b are laminated in this order.
  • the resin layer 106 is configured by the resin layers 106a and 106b.
  • the laminated structure shown in FIG. 40B is a structure in which the resin layer 106a, the fiber base material 108, the resin layer 106b, the adhesion layer 146, and the resin layer 106c are laminated in this order.
  • the resin layer 106 is configured by the resin layers 106a, 106b, and 106c.
  • the laminated structure shown in FIG. 40C is a structure in which the resin layer 106, the fiber base material 108, and the adhesion layer 146 are laminated in this order.
  • the adhesion layer 146 may be in contact with the fiber base material 108, but it is preferable that the fiber base material 108 is not impregnated.
  • Such an adhesion layer 146 is preferably formed on the entire lower surface of the fiber base material 108, but may be selectively formed on a portion corresponding to the position where the internal circuit 104 is formed. In other words, it is only necessary that the adhesion layer 146 is disposed between the internal circuit 104 and the fiber base material 108 in the step of pressure-bonding the laminate 110 and the substrate 102 in the steps described later.
  • the stacked body 110B is formed only on one side of the substrate 102, but the present invention is not limited to this, and the stacked body 110B may be formed on both surfaces of the substrate 102.
  • the adhesion layer 146 is preferably disposed on both sides between the stacked body 110B and the substrate 102, but may be disposed only on one surface.
  • the adhesion layer 146 is formed on the lower portion of the stacked body 110B.
  • the adhesive layer 146 is not limited to this mode, and a copper foil is provided on the substrate 102 in a state of being formed on the upper surface of the substrate 102.
  • a prepreg may be laminated.
  • the metal foil layer 112 may be formed on the resin layer 106 after the resin layer 106 having the adhesion layer 146 is disposed on the substrate 102.
  • the asymmetric prepreg having the metal foil layer 112 formed thereon is formed on the substrate 102.
  • the present invention is not limited to this. After the asymmetric prepreg is formed on the substrate 102, the asymmetric prepreg is formed on the asymmetric prepreg.
  • a metal foil layer may be formed.
  • a resist (not shown) is formed on the metal foil layer 112. Subsequently, as shown in FIG. 34A, selective etching is performed using the resist as a mask. Thereby, the metal foil layer 114 having a predetermined pattern is formed.
  • the resin layer 106 and the adhesion layer 146 are selectively removed using a laser or the like.
  • the opening 116A is formed in the resin layer 106
  • the opening 146A is formed in the adhesion layer 146, thereby forming the opening 116.
  • the resin layer 106 and the adhesion layer 146 are selectively removed from the first surface 10 side from the first surface 10 of the resin layer 106 to the surface of the adhesion layer 146 on the internal circuit 104 side.
  • the adhesion layer 146 and the resin layer 106 are not removed from the adhesion layer 146 side toward the resin layer 106 side.
  • the opening 116 ⁇ / b> A penetrates from the first surface 10 to the second surface 20 of the resin layer 106.
  • the opening 146A penetrates the adhesion layer 146.
  • a part of the upper surface of the internal circuit 104 is exposed from the opening 146A.
  • a part of the fiber base material 108 protrudes from the side wall of the opening 116.
  • desmear processing is performed on the inside of the opening 116.
  • a base film 118 is formed on 104.
  • the base film 118 is an electroless plating film.
  • a resist layer 120 having a predetermined opening pattern is formed on the base film 118 as in the third embodiment.
  • This opening pattern corresponds to, for example, a circuit pattern.
  • a plating layer 122 is formed by electroplating at least inside the opening pattern of the resist layer 120 and on the base film 118.
  • the resist layer 120 is removed using an alkaline stripping solution, sulfuric acid, a commercially available resist stripping solution, or the like, as in the third embodiment.
  • the base film 118 and the metal foil layer 114 other than the region where the plating layer 122 is formed are removed.
  • the printed wiring board 500 of the present embodiment is obtained. Further, the printed wiring board 500 obtained in the fifth embodiment may be used as an inner layer circuit board, and a buildup layer may be further formed on the inner layer circuit board.
  • FIG. 32 is a cross-sectional view showing the structure of a semiconductor device having a printed wiring board 500.
  • a semiconductor device 150 can be obtained by mounting a semiconductor chip (not shown) on the printed wiring board 500 of the present embodiment.
  • the semiconductor device includes a printed wiring board 500, a semiconductor element 138 mounted on the printed wiring board 500, and a bump 134 that electrically connects the printed wiring board 500 and the semiconductor element 138.
  • a solder resist layer 130 is formed between the printed wiring board 500 and the semiconductor element 138.
  • the via 124 is electrically connected to the semiconductor element 138 through the wiring layer 132 and the bump 134. That is, the solder resist layer 130 is formed on the via 124, around the wiring layer 132 and the bump 134.
  • the semiconductor element 138 is packaged with an underfill 136 formed around it.
  • the wiring layer 132 is produced by, for example, a subtractive construction method. Alternatively, a printed wiring board may be formed by laminating an arbitrary buildup layer and repeating the steps of interlayer connection and circuit formation by an additive method.
  • the method for laminating the solder resist layer 130 is not particularly limited, and may be the same method as the laminating body 110B or the first buildup layer 128, or another method.
  • the material used for the solder resist layer 130 is not particularly limited, but the material used for the stacked body 110B or the first buildup layer 128 may be used as appropriate, or another material may be used.
  • the solder resist material is preferably a fiber base material contained in a resin composition.
  • a method for producing the solder resist layer 130 is not particularly limited, but may be a production method similar to that for the resin layer 106 in the present embodiment, or may be another production method.
  • the adhesion layer 146 has a higher content of a thermoplastic resin having a weight average molecular weight of 10,000 or more than the resin layer 106 and has a characteristic that the fiber base material 108 is less likely to be impregnated than the resin layer 106. I have it.
  • a thermoplastic resin having a weight average molecular weight of 10,000 or more tends to be impregnated in the fiber base material 108 because the molecular chain becomes long and the entanglement between the molecular chains tends to occur.
  • thermoplastic resin having a weight average molecular weight of 10,000 or more does not move easily, the viscosity does not easily decrease even when heated. Therefore, it is difficult to impregnate the fiber base material 108 even in a heated state. Since such an adhesion layer 146 exists between the fiber base material 108 and the internal circuit 104, the fiber base material 108 becomes difficult to contact the internal circuit 104. Thereby, the reliability of the printed wiring board 500 can be improved. Particularly, when the content of the thermoplastic resin having a weight average molecular weight of 10,000 or more in the adhesion layer 146 is set to 20% by mass or more of the entire resin component, the adhesion layer 146 is hardly impregnated inside the fiber base material 108.
  • the thickness of the internal circuit 104 varies in the in-plane direction. Therefore, when the adhesion layer 146 is not provided, in the process of heat-pressing the resin layer containing the fiber base material 108 to the internal circuit 104, the thick portion of the internal circuit 104 and the fiber base material 108 may come into contact. In this case, there is a concern that the metal element of the internal circuit 104 migrates to the fiber base material 108 and affects the insulation reliability between vias. On the other hand, providing the adhesion layer 146 makes it difficult for the fiber base material 108 to come into contact with the internal circuit 104, thereby ensuring insulation reliability between vias.
  • FIG. 37 and 38 show a modification of the printed wiring board 500 of the present embodiment.
  • buildup layers may be formed on both surfaces of the substrate 102. That is, the first buildup layer 128 may be formed on one surface of the substrate 102, and the second buildup layer 128 may be formed on the other surface of the substrate 102.
  • Each buildup layer may use the same type of material, but may use different types of materials. In each layer, the number of vias and the number of wirings can be set appropriately.
  • a through hole 142 may be formed in the substrate 102.
  • a plating film 144 is formed on the inner wall of the through hole 142.
  • the plating film 144 can electrically connect a wiring formed on one surface of the substrate 102 and a wiring formed on the other surface.
  • the through hole 142 is formed in the substrate 102 after the step shown in FIG. Thereafter, a plating film 144 is formed on the through hole 142. Thereafter, the same steps as those shown in FIG. Thereby, the printed wiring board shown in FIG. 38 is obtained.
  • the laminate 110B may be used not only for the build-up layer but also for the core layer.
  • the protruding portion 109 is embedded in at least one via 124, and it is preferable that the protruding portion 109 is embedded in all the vias 124.
  • the build-up layer is a multilayer, it is only necessary that at least one of the vias 124 is embedded in each layer, and the protrusions 109 are embedded in all the vias 124 over the entire layer. It is preferable that 35 may be replaced with each other.
  • the resist layer 120 is formed.
  • the step of removing the resist layer 120 may be performed after the plating layer 122 is formed on the metal foil layer 114, the resist layer 120 is formed on the plating layer 122 and etched.
  • this invention includes the following aspects.
  • An opening having a small opening diameter is provided, and a conductor embedded in the opening, and the fiber base is from the side wall of the opening on the first surface side than the center portion.
  • the printed wiring board which protrudes and the edge part of the protruding said fiber base material is located in the said conductor inside.
  • L1 is a printed wiring board which is 1.1 times or more of L2 and 3 times or less of L2.
  • the conductor is a metal film composed of at least an electroless plating film and an electrolytic plating film. .
  • the resin layer is a build-up layer.
  • the conductive part is provided on the second surface of the resin layer and is electrically connected to the conductor.
  • a printed wiring board with embedded conductors (9) The printed wiring board according to (8), wherein the gap is formed by soft etching the surface of the conductive layer. (10) The printed wiring board according to (8) or (9), wherein the gap is formed by side-etching the resin layer inside the opening in a side wall direction. . (11) The printed wiring board according to any one of (1) to (10), wherein the fiber base material is T glass or S glass.
  • the maximum opening diameter of the opening is L1 and the minimum opening diameter of the opening is L2 in a cross-sectional view.
  • L1 is a printed wiring board which is 1.1 times or more of L2 and 3 times or less of L2.
  • (18) The printed wiring board according to any one of (12) to (17), wherein the conductor is a metal film composed of at least an electroless plating film and an electrolytic plating film. .
  • the printed wiring board according to any one of (12) to (19), wherein the fiber base material is T glass or S glass.
  • a resin base material a fiber base material that is unevenly distributed on the second surface side with respect to the center portion of the resin layer inside the resin layer, and from the first surface to the second surface of the resin layer.
  • An opening having a smaller opening diameter is provided, a conductor embedded in the opening, a conductive portion provided on the second surface of the resin layer, and electrically connected to the conductor;
  • the fiber base material protrudes from the side wall of the opening on the second surface side with respect to the central portion, and the protruding end portion of the fiber base material is located inside the conductor.
  • the conductor is embedded in a gap formed between the resin layer and the conductive portion and formed outward from the side wall of the opening having a minimum opening diameter in a cross-sectional view.
  • the printed wiring board (22) The printed wiring board according to (21), wherein the gap is formed by soft etching the surface of the conductive layer.
  • (23) The printed wiring board according to (21) or (22), wherein the gap is formed by side-etching the resin layer inside the opening in a side wall direction. .
  • a resin layer, a fiber base located inside the resin layer, and an opening having an opening diameter that decreases from the first surface to the second surface of the resin layer are provided.
  • a printed wiring board comprising: an adhesive layer containing a thermoplastic component, wherein the fiber base material protrudes from a side wall of the opening, and an end portion of the protruding fiber base material is located inside the conductor. .

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

La présente invention concerne une carte de câblage imprimé (100), comprenant une couche de résine (106), et un matériau de base de fibre (108) positionné dans la couche de résine (106). Une ouverture (116) est formée dans la couche de résine (106), ladite ouverture comportant une région où le diamètre d'ouverture se réduit d'une première surface à une seconde surface, ladite ouverture pénétrant dans la couche de résine (106). La carte de câblage imprimé (100) comporte un conducteur (124) qui remplit l'ouverture (116), et un circuit interne (104) connecté électriquement au conducteur (124). Le circuit interne (104) est en contact avec la seconde surface de la couche de résine (106), et recouvre, à partir du côté de seconde surface, le plan ouvert de l'ouverture (116), ledit plan ouvert se trouvant sur le côté de seconde surface. Le circuit interne (104) est séparé du conducteur (124). Le matériau de base de fibre (108) comporte une partie saillante (109) qui dépasse d'une paroi latérale de l'ouverture (116), et la partie saillante (109) est positionnée à l'intérieur du conducteur (124).
PCT/JP2012/003844 2011-06-17 2012-06-13 Carte de câblage imprimé, et procédé de fabrication associé WO2012172792A1 (fr)

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JP6075187B2 (ja) * 2013-04-26 2017-02-08 株式会社デンソー 多層基板およびこれを用いた電子装置
CN105247972A (zh) * 2013-04-26 2016-01-13 株式会社电装 多层基板、使用多层基板的电子装置、多层基板的制造方法、基板以及使用基板的电子装置
JP6389782B2 (ja) * 2014-03-13 2018-09-12 積水化学工業株式会社 多層絶縁フィルム、多層基板の製造方法及び多層基板
JP6532750B2 (ja) * 2015-02-10 2019-06-19 新光電気工業株式会社 配線基板及びその製造方法
CN105899003B (zh) 2015-11-06 2019-11-26 武汉光谷创元电子有限公司 单层电路板、多层电路板以及它们的制造方法
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TWI565374B (zh) 2017-01-01

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