WO2011091709A1 - 铁电阻变存储器及其操作方法、制备方法 - Google Patents
铁电阻变存储器及其操作方法、制备方法 Download PDFInfo
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- WO2011091709A1 WO2011091709A1 PCT/CN2011/000050 CN2011000050W WO2011091709A1 WO 2011091709 A1 WO2011091709 A1 WO 2011091709A1 CN 2011000050 W CN2011000050 W CN 2011000050W WO 2011091709 A1 WO2011091709 A1 WO 2011091709A1
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/003—Cell access
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of the switching material, e.g. layer deposition
- H10N70/026—Formation of the switching material, e.g. layer deposition by physical vapor deposition, e.g. sputtering
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
- H10N70/8836—Complex metal oxides, e.g. perovskites, spinels
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
- G11C2013/0073—Write using bi-directional cell biasing
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/70—Resistive array aspects
- G11C2213/72—Array wherein the access device being a diode
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/70—Resistive array aspects
- G11C2213/73—Array where access device function, e.g. diode function, being merged with memorizing function of memory element
Definitions
- Iron resistance variable memory and its operation method and preparation method
- the present invention relates to the field of memory technologies, and in particular, to a Ferro-Resistive Random Access Memory (Ferro-RRAM) based on a ferroelectric semiconductor film layer, an operation method and a preparation method of the ferroelectric resistance memory.
- Ferro-RRAM Ferro-Resistive Random Access Memory
- Nonvolatile memory is an information memory that can still be stored in the event of a power outage, which is widely used in portable electronic devices and the like, and has an increasing market share in the entire memory market.
- non-volatile memory on the market is still dominated by flash memory (FLASH).
- FLASH floating gates cannot be unrestrictedly thinned with the development of technology. It is reported that the limit of FLASH technology is around 32 nm, which forces people to look for new non-volatile properties with superior performance. Memory.
- ferroelectric memories there are mainly ferroelectric memories.
- phase change memory FeRAM
- MRAM Magnetic Random Access Memory
- PRAM Phase Change Random Access Memory
- RRAM Resistive Random Access Memory
- the phase change memory and the resistive memory all distinguish the information state by the magnitude of the current read when the read voltage is biased. Therefore, the industry generally refers to the two as a resistor-based memory.
- the traditional ferroelectric memory mainly uses the iron polarization in the ferroelectric capacitor to store information.
- the ferroelectric memory cell has a 1T1C and 2T2C structure (where T is a strobe tube and C is a ferroelectric capacitor). ).
- a ferroelectric material is used as an insulating dielectric layer of a capacitor, and a ferroelectric memory stores information based on a change in charge of the capacitor. Therefore, the area of the capacitor unit of the conventional ferroelectric memory is too large, the reference capacitor unit cannot be shrunk at the same speed as the ferroelectric capacitor, it is difficult to form a high-density memory, and the severe destructive readout causes the reliability of the device to be lowered. Summary of the invention
- a ferroelectric resistance memory including an upper electrode, a lower electrode, and a ferroelectric semiconductor thin film layer serving as a memory functional layer disposed between the upper electrode and the lower electrode is provided ;
- the ferroelectric semiconductor thin film layer is operatively capable of generating a diode conduction characteristic through a domain, and operatively modulating a diode conduction characteristic by a variation of the electrical domain;
- the modulation change of the diode conduction characteristic stores information.
- the upper electrode is a metal layer of Pt, Au, Ir, Ti or TaN, or a metal composite layer composed of the above metal layer, or a metal oxide of SrRu0 3 , Ir0 2 , LaNi0 3 electrode.
- the lower electrode is a metal layer of Pt, Au, Ir, Ti or TaN, or a metal composite layer composed of the above metal layer, or a metal oxide electrode of SrRu0 3 , lrO 2 LaNi0 3 .
- the ferroelectric semiconductor film layer is BiFe0 3 , BaTi0 3 , SrBi 2 Ta 2 0 9 , (Ba, Sr) Ti0 3 , Pb (Zr, Ti ) 0 3 or Bi 3 . 25 La 0 .7 5 Ti 3 Oi2.
- the iron composite structure film layer According to still another embodiment of the iron resistance change memory of the present invention, the iron composite structure film layer.
- the ferroelectric oxide is BiFe0 3 , BaTiO 3 , SrBi 2 Ta 2 0 9 ⁇ (Ba,
- the semiconductor nanocrystals are metal oxide semiconductors formed by corresponding excess components in the ferroelectric oxide, or ITO or Zinc oxide.
- the ferroelectric semiconductor film layer has a thickness ranging from 5 nm to 500 nm.
- a method of fabricating the above-described iron resistance variable memory comprising the steps of:
- step (2) it is formed by pulsed laser deposition, sol-gel, molecular beam epitaxy, metal organic chemical vapor deposition, atomic layer deposition or magnetron sputtering growth.
- a negative pulse electrical signal is biased between the upper electrode and the lower electrode to effect generation of a negative electric domain in the ferroelectric semiconductor film layer, thereby generating a negative conduction Diode conduction characteristics
- a forward pulse electrical signal is biased between the upper electrode and the lower electrode to achieve a forward domain in the ferroelectric semiconductor film layer, thereby generating a forward conduction diode conduction.
- the read voltage signal is biased between the upper and lower electrodes, and the magnitude of the current flowing through the ferroelectric semiconductor thin film layer is read to effect reading of the stored information.
- the electrical signal is a voltage pulse signal.
- the voltage of the voltage pulse signal is greater than a coercive voltage that inverts the domain; the read voltage of the read voltage signal is less than a coercive voltage that inverts the domain.
- the write voltage of the voltage pulse signal is proportional to the thickness of the ferroelectric semiconductor film layer.
- the technical effect of the present invention is that the ferroelectric resistance memory provided by the present invention is different from the storage mechanism of the conventional FeRAM, and is also different from the storage mechanism of the RRAM, and has the advantages of simple structure, simple preparation method, non-destructive readout, and The characteristics of non-volatile storage.
- FIG. 1 is a schematic diagram showing the basic structure of a ferroelectric resistance memory according to an embodiment of the present invention
- FIG. 2 is a schematic view showing an embodiment of a method for preparing the ferroelectric resistance memory shown in FIG. 1;
- FIG. 3 is a schematic diagram showing electrical characteristics of the ferroelectric resistance memory shown in FIG.
- Figure 4 is a schematic diagram showing the comparison of the polarization-voltage (P-V) hysteresis curve and the diode current of the ferroelectric resistance memory;
- Figure 5 is a schematic diagram of data retention characteristics of a ferroelectric resistance memory
- Fig. 6 is an equivalent circuit diagram of the ferroelectric resistance memory shown in Fig. 1. detailed description
- forward and negative are defined relative to the upper electrode.
- a positive voltage when biased on the upper electrode, it is defined as a “forward” voltage, the direction of polarization, and electricity.
- the direction of the domain, the direction of the current, and the like are also defined accordingly.
- FIG. 1 is a view showing the basic configuration of a ferroelectric resistance memory according to an example of the present invention.
- the iron resistance change memory 100 of the invention example will be specifically described below with reference to Fig. 1 .
- the iron resistance change memory 100 includes a lower electrode 103, a ferroelectric semiconductor thin film layer 102, and an upper electrode 101.
- the lower electrode 103 may specifically be selected as a metal layer such as platinum (Pt), gold Au, iridium (Ir), titanium (Ti), or TaN, or may be selected as a metal composite layer composed of the above metal layers, or may be selected as Ir0. 2 , LaNi0 3 or strontium ruthenate (SrRu0 3 );
- the lower electrode 103 is a single crystal strontium ruthenate (SrRu0 3 ).
- the lower electrode may be grown on the substrate, for example, in the case of single crystal strontium ruthenate (SrRu0 3 ) as the lower electrode, preferably, the growth substrate of the lower electrode 103 is crystal orientation ( 100 ) barium titanate ( SrTi0 ) 3 ).
- the lower electrode 103 can also be grown on the substrate of the Si substrate or the Si/SiO 2 composite layer.
- the upper electrode 101 may specifically be selected from platinum (Pt), gold Au, iridium (Ir), titanium (Ti),
- a metal layer such as TaN, or may be selected as a metal composite layer composed of the above metal layers, and may also be selected as Ir0 2 , LaNiO 3 or strontium ruthenate (SrRu0 3 ); in this example, the upper electrode 101 is a metal layer of Pt .
- the ferroelectric semiconductor thin film layer 102 is interposed between the upper electrode 101 and the lower electrode 103, and the ferroelectric semiconductor thin film layer 102 may be BiFe0 3 , BaTi0 3 , SrBi 2 Ta 2 0 9 , Pb(Zr,Ti)0 3 , (Ba,Sr ) Ti0 3 , or Bi 3 . 25 La.
- a single-layer film of a perovskite-structured semiconductor ferroelectric material such as 75 Ti 3 0 12 . It should be noted that a certain functional trace element (doping) may be incorporated into the single-layer film of the above ferroelectric material, and the types of the trace elements to be incorporated are not listed here.
- the thickness of the electrical semiconductor thin film layer 102 may range from 5 to 500 nanometers, and specific selection factors of the thickness thereof will be disclosed below.
- the ferroelectric semiconductor thin film layer 102 first has iron polarization characteristics. In addition, it has semiconductor characteristics at the same time, therefore, on the upper electrode and off After the bias voltage signal (e.g., voltage pulse signal) between the poles polarizes the ferroelectric semiconductor thin film layer 102, the charge induced on the surface of the ferroelectric semiconductor thin film layer 102 will redistribute carriers in the ferroelectric semiconductor thin film layer 102.
- the accumulation of carriers in the ferroelectric semiconductor thin film layer 102 makes it possible to generate a potential difference in the body, thereby forming a diode conduction characteristic, that is, a domain causes the ferroelectric semiconductor thin film layer 102 to generate a diode guide. Pass feature.
- the ferroelectric semiconductor thin film layer 102 can be equivalent to a diode that is turned on in a certain direction.
- the polarization direction of the ferroelectric semiconductor thin film layer 102 changes, that is, the domain changes.
- the carriers in the ferroelectric semiconductor thin film layer 102 are redistributed again, and the barrier distribution in the ferroelectric semiconductor thin film layer 102 also changes, thereby changing the conduction direction of the diode.
- the ferroelectric semiconductor thin film layer 102 It can be equivalent to a diode that is turned on in the other direction.
- the specific storage mechanism of the ferroelectric resistance memory 100 will be described in further detail in the examples that follow.
- Fig. 2 is a schematic view showing an embodiment of a method for preparing the ferroelectric resistance memory shown in Fig. 1. The preparation method examples will be described in detail in conjunction with Figs. 1 and 2.
- step S110 a single crystal of barium titanate is provided as a bottom electrode.
- the crystal orientation of the single crystal barium titanate is (100), and a thin film layer (for example, bismuth ruthenate) may be additionally grown on the single crystal barium titanate, so that the lower electrode 103 of the ferroelectric resistance memory can be formed. Therefore, single crystal barium titanate is used as a bottom electrode.
- other materials may be selected for use as the substrate for the lower electrode, for example, Si, or a composite structure substrate (Si/Si0 2 ) in which Si0 2 is grown on Si.
- step S120 bismuth ruthenate is epitaxially grown to form a lower electrode.
- the ruthenium ruthenate thin film layer is epitaxially grown on the single crystal barium titanate to form the lower electrode 103, and the specific thickness of the bismuth ruthenate thin film layer may be in the range of 50-150 nm, but this is not restrictive. of.
- the growth method of the bismuth ruthenate film layer is not limited to the epitaxial growth method. In other examples, it may also be pulsed laser deposition, sol-gel method, MBE (molecular beam epitaxy), MOCVD (metal organic chemical vapor deposition). Growth of physical and chemical thin film preparation methods suitable for growing oxides, such as ALD (atomic layer deposition) or magnetron sputtering.
- the material type of the lower electrode is also not limited to bismuth ruthenate. In other embodiments, the lower electrode material grown on the single crystal strontium titanate may also be a strontium nickelate or metal thin film layer.
- a pulsed laser deposition (PLD) grown barium ferrite thin film layer is used as a storage functional layer.
- the barium ferrite thin film layer is a semiconductor thin film layer having a thickness ranging from 5 to 500 nm.
- the conditions for growing the PLD may be: an oxygen pressure of 10 to 30 Pa and a laser amount of 1 to 1.5 J/cm 2 .
- the specific growth method of the barium ferrite thin film layer is also not limited. For example, in other examples, pulsed laser deposition, sol-gel method, MBE, MOCVD, ALD or magnetron sputtering may be used to grow oxides.
- the barium ferrite thin film layer is a ferroelectric semiconductor thin film layer 102 having both iron polarization characteristics and semiconductor characteristics, and functions as a memory functional layer.
- the specific material type of the ferroelectric semiconductor film layer 102 is not limited by this embodiment.
- the ferroelectric semiconductor film layer 102 may also be barium ferrite (BiFe0 3 ) or barium titanate (BaTi0 3 ). Or SrBi 2 Ta 2 0 9 , Pb(Zr, Ti) 0 3 , ( Ba., Sr ) Ti0 3 , or Bi 3 . 25 La Q . 75 Ti 3 0 12 ferroelectric semiconductor material.
- step S140 a platinum metal upper electrode is sputter grown.
- a platinum metal of a single layer structure is selected as the upper electrode 101, specifically, a platinum metal layer is grown by DC magnetron sputtering, and the thickness of the platinum metal ranges from 100 to 150 nm.
- the material type of the upper electrode and its growth method are not limited by the embodiment of the present invention.
- the upper electrode 101 may also be a metal layer of Au, Ir, Ti, or TaN, or a metal composite layer composed of the above and a metal layer, and the upper electrode 101 may also be SrRu0 3 , Ir0 2 , Metal oxide electrode of LaNi0 3 .
- FIG. 3 is a schematic view showing the electrical characteristics of the ferroelectric resistance memory shown in FIG. 1.
- the electrical properties of the iron resistance change memory formed by the method shown in Fig. 2 were measured. As shown in FIG.
- the ferroelectric semiconductor thin film layer 102 (for example, barium ferrite thin film) will be positively polarized to form a positive domain, and carriers in the ferroelectric semiconductor thin film layer 102 form a forward conducting diode characteristic under the action of its domain; conversely, at the upper electrode
- a negative voltage pulse is biased between 101 and the lower electrode 103 (for example, a pulse height of -18 V and a pulse time of 5 ⁇ sec)
- the ferroelectric semiconductor thin film layer 102 (for example, a barium ferrite film) is negatively polarized.
- the current information is used as the storage information.
- the upper electrode 101 when the upper electrode 101 is biased by +4 V as the read voltage, after the forward polarization
- the current density is about 1mA/cm 2 ; it can be defined as the storage state "1"("on", low resistance state); meanwhile, the current density after negative polarization is l (T 2 mA/cm 2 , It can be defined as the storage state "0"("off, high-impedance state”. Therefore, at +4V, its storage state "0" and " ⁇ have a resistance ratio of 100: 1.
- the forward polarization operation and the negative polarization operation are defined as writing a "1" operation and writing a "0" operation, respectively, in which the write voltages for writing "0" and writing " are -18V and +18V, respectively.
- the iron resistance change memory 100 can change the ferroelectric bistable polarization state by a voltage pulse signal to implement a write operation, and can bias the read voltage to read the current signal to realize information reading. Therefore, the iron resistance change memory 100 is based on resistance. Memory, and is non-volatile storage, its reading is non-destructive (n
- the voltage pulse signal of the write operation is greater than the coercive voltage for inverting the domain.
- the read voltage of the iron resistance change memory 100 is not limited by the above examples.
- Those skilled in the art can 1 "The current ratio (on/off ratio) of the "0" state, read power, etc. select the read voltage.
- the read voltage can also be selected in the range of -0.1 to -4V.
- the current drawn is greater than the current read after forward polarization, and is therefore defined as the storage state "1" and "0" respectively.
- the general read voltage is relatively smaller than that of flipping the power. The coercive voltage.
- the write operation voltage is proportional to the thickness of the barium ferrite film, for example, the write operation voltage decreases as the thickness of the barium ferrite film decreases, and those skilled in the art can This factor is used to specifically select the thickness of the barium titanate film.
- Figure 4 shows the polarization-voltage (PV) hysteresis curve and diode current of the ferroelectric resistance memory.
- Figure 4 (a ) is a schematic diagram of the hysteresis loop curve
- Figure 4 (b) is a plot of the current density-voltage (JV) hysteresis curve.
- the P-V hysteresis curve is substantially symmetrical at 0 volts.
- the residual polarization P r is substantially ⁇ 60 C/cm 2 . Comparing Fig. 4 (a) with Fig. 4 (b), it can be found that the current of the ferroelectric semiconductor film layer changes with voltage substantially with the domain with voltage. The changing steps are consistent, reflecting that the change in the domain of the ferroelectric semiconductor film layer can modulate the change in the current of the diode, that is, the change in the conduction characteristics of the diode as described above is caused by the change in the domain.
- the storage mechanism of the iron resistance change memory 100 of the invention is completely Different from the storage mechanism of conventional RRAM (for example, the electromigration of oxygen vacancies or the establishment or break of the conduction path), it is also completely different from the storage mechanism of other ferroelectric resistance memories (in other ferroelectric resistance memories, ferroelectric thin films)
- the material is used as a dielectric layer instead of a semiconductor thin film layer, the read current is achieved by the tunneling effect of the dielectric layer, the read current is modulated by the change of the barrier, and other existing ferroelectric resistance memories are
- the information is read by the tunneling current of the ferroelectric layer, and usually the current is small (for example, 3 mA/cm 2 ), and the stored information is difficult to read.
- the read current can be further increased by reducing the thickness of the barium ferrite thin film (for example, to 270 nm) (for example, 5.4 A/cm 2 can be achieved, but at this time on/off) Than reduction).
- Figure 5 is a schematic diagram showing the data retention characteristics of the ferroelectric resistance memory.
- Figure 5(a) shows the data retention characteristics of the "on” and "off” states
- Figure 5 (b) corresponds to the domain residual polarization with the write operation.
- the voltage signal for writing "off” is a voltage pulse of -lOV/ls
- the voltage signal for writing "on” is The voltage pulse of +10V/ls has a read voltage of -2.0 V.
- the ferroelectric resistance memory 100 has good data retention characteristics, and further reflects the above-mentioned electric power from FIG. 5(b).
- the change of the domain modulates the conduction characteristics of the diode.
- Figure 6 shows the equivalent circuit diagram of the ferroelectric resistance memory shown in Figure 1.
- the ferroelectric semiconductor film layer 102 can be equivalent to a diode in the remanent polarization state, the diode guide
- the pass direction changes with the direction of polarization, that is, with the change of the domain.
- the ferroelectric semiconductor film layer 102 is equivalent to Reverse conducting diode
- the ferroelectric semiconductor film layer 102 is equivalent to a forward conducting diode. Therefore, in summary, the iron resistor shown in FIG.
- the variable memory is similar to the RRAM, which is a sandwich-like structure, and therefore has the characteristics of a structural single tube with RRAIV. Therefore, its preparation method is relatively simple.
- a ferroelectric variable resistance memory 100 is connected in series with a gate.
- a memory cell can be formed together, and a plurality of memory cells can be arranged in the form of rows and columns to form a memory array.
- the following method can be used for operation. When writing "1" operation, a write voltage of +18V/5 s is biased on the upper electrode 101, and forward polarization occurs in the ferroelectric semiconductor film layer 102, generating a forward domain, thereby generating a forward conduction.
- Diode conduction characteristics when writing "0", a write voltage of -18V/5 s is biased on the upper electrode 101, and a negative polarization occurs in the ferroelectric semiconductor film layer 102, thereby generating a negative domain, and further A diode conduction characteristic that generates a negative conduction; in the read operation, a read voltage of about IV is biased on the upper electrode 101, and a current flowing through the ferroelectric semiconductor thin film layer 102 is different in a state in which different diodes are turned on.
- the ferroelectric semiconductor thin film layer 102 is equivalent to a forward conducting diode, and the forward conduction current when biased IV is read; in the "0" state, the ferroelectric semiconductor thin film layer 102 is equivalent to The negatively conducting diode, the reverse current when biased IV is read; the sensed current is compared with a predetermined current to distinguish its storage state.
- the ferroelectric semiconductor thin film layer 102 may be a composite structural film mainly composed of a ferroelectric oxide and a semiconductor nanocrystal, and the ferroelectric oxide may be one or two of the following ferroelectric oxides.
- the combination of the above ferroelectric oxides includes BiFe0 3 , BaTi0 3 , SrBi 2 Ta 2 0 9 , (Ba, Sr ) Ti0 3 , Pb(Zr, Ti) 0 3 or Bi 3 .
- the semiconductor nanocrystal is composed of a corresponding excess component of the ferroelectric oxide such as ferric oxide or the like (for example, the corresponding excess component of BiFe0 3 is ferric oxide, and the corresponding excess component of barium titanate is The oxide of germanium, so the oxide of germanium is a metal oxide semiconductor formed by its semiconductor nanocrystals, so that the semiconductor nanocrystals are relatively easy to prepare and form. Further, the semiconductor nanocrystal may be a semiconductor corresponding to a non-ferroelectric oxide component element such as ITO (Indium Tin Oxide) or zinc oxide.
- ITO Indium Tin Oxide
- the composite structural film may be BiFe0 3 /Fe 2 0 3
- the Fe 2 0 3 nanocrystals may be vertically distributed in the BiFe0 3 nanocolumn to form nanowires connecting the upper and lower electrodes.
- the BiFe0 3 /Fe 2 O 3 composite film structure is similar to the embodiment shown in Fig.
Description
Claims
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US13/266,752 US8687401B2 (en) | 2010-01-28 | 2011-01-12 | Ferro-resistive random access memory (Ferro-RRAM), operation method and manufacturing method thereof |
CN2011800017399A CN102439724B (zh) | 2010-01-28 | 2011-01-12 | 铁电阻变存储器及其操作方法、制备方法 |
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CN201010102118.7 | 2010-01-28 | ||
CN2010101021187A CN101789490B (zh) | 2010-01-28 | 2010-01-28 | 一种铁电氧化物/半导体复合薄膜二极管阻变存储器 |
CN201010175142.3 | 2010-05-13 | ||
CN 201010175142 CN101859779B (zh) | 2010-05-13 | 2010-05-13 | 一种极化调谐铁电薄膜二极管存储器 |
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US9503656B2 (en) * | 2013-12-11 | 2016-11-22 | Seiko Epson Corporation | Solid state imaging device and image acquisition method using solid state imaging elements having a PN junction |
CN103811473B (zh) * | 2014-01-28 | 2017-01-18 | 天津师范大学 | 一种多层膜结构的多源调控的阻变存储器及其制备方法 |
CN104880577B (zh) * | 2015-05-22 | 2018-09-14 | 重庆科技学院 | 原位观察铁电材料在电场作用前后电畴结构的装置及方法 |
UA115716C2 (uk) * | 2016-04-18 | 2017-12-11 | Генрік Генрікович Шумінський | Генератор електроенергії |
EP3542402A4 (en) * | 2016-11-21 | 2020-07-22 | The Government of the United States of America, as represented by the Secretary of the Navy | TWO-DIMENSIONAL MATERIALS INTEGRATED WITH MULTIFERROIC LAYERS |
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KR20180136304A (ko) * | 2017-06-14 | 2018-12-24 | 포항공과대학교 산학협력단 | 문턱 스위칭 소자 |
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CN110277493A (zh) * | 2018-03-14 | 2019-09-24 | 山东建筑大学 | 一种新型的具有较低漏电的多层结构 |
DE102018212736B4 (de) * | 2018-07-31 | 2022-05-12 | Christian-Albrechts-Universität Zu Kiel | Ferroelektrische Halbleitervorrichtung mit einer einen Mischkristall aufweisenden ferroelektrischen Speicherschicht und Verfahren zu deren Herstellung |
CN109599486B (zh) * | 2018-11-30 | 2020-08-28 | 中国科学技术大学 | 一种基于多铁异质结构的阻变存储器 |
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US8687401B2 (en) | 2014-04-01 |
CN102439724B (zh) | 2013-12-04 |
US20120281451A1 (en) | 2012-11-08 |
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