WO2011030735A1 - Procédé de fabrication d'un dispositif à base de semi-conducteur et dispositif à base de semi-conducteur - Google Patents

Procédé de fabrication d'un dispositif à base de semi-conducteur et dispositif à base de semi-conducteur Download PDF

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Publication number
WO2011030735A1
WO2011030735A1 PCT/JP2010/065253 JP2010065253W WO2011030735A1 WO 2011030735 A1 WO2011030735 A1 WO 2011030735A1 JP 2010065253 W JP2010065253 W JP 2010065253W WO 2011030735 A1 WO2011030735 A1 WO 2011030735A1
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Prior art keywords
resistor
oxide film
semiconductor device
polysilicon film
manufacturing
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PCT/JP2010/065253
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English (en)
Japanese (ja)
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正樹 笠原
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ミツミ電機株式会社
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Publication of WO2011030735A1 publication Critical patent/WO2011030735A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/0802—Resistors only

Definitions

  • the present disclosure relates to a semiconductor device manufacturing method and a semiconductor device, and more particularly to a semiconductor device manufacturing method and a semiconductor device in which a resistor is formed on the surface of a semiconductor substrate having a LOCOS (LOCal Oxidation of Silicon) oxide film.
  • LOCOS LOCal Oxidation of Silicon
  • a substrate for impurity diffusion a field oxide film formed on the substrate, and an interlayer insulating film on the substrate or field oxide film are provided. And a pair of contacts provided at both ends of the diffusion resistor, and a diffusion resistor formed by ion implantation using the field oxide film and the gate as a mask.
  • MOS Metal Oxide Semiconductor
  • a semiconductor diffused resistor can be formed in a region surrounded by the field oxide film and sandwiched on both sides by the gate in the central region. There is a problem that a semiconductor diffusion resistor cannot be formed in the boundary region with the oxide film.
  • FIG. 13 is an enlarged view of a boundary region between a field oxide film and a semiconductor substrate of a conventional semiconductor diffusion resistor.
  • the lateral position of the LOCOS oxide film 120 which is a field oxide film, may vary depending on the processing accuracy.
  • the end portion of the LOCOS oxide film 120 has a cross-sectional shape with a sharp tip such as the apex of a triangle in which the film thickness decreases toward the outside. With such a shape, the film thickness slightly changes depending on the position of the end portion of the LOCOS oxide film 120 in the lateral direction, and the lateral size of the diffusion resistor 150 is affected and fluctuates accordingly.
  • a method of manufacturing a semiconductor device in which a resistor is formed on a surface of a semiconductor substrate having a LOCOS oxide film has a boundary at the boundary so as to cover the boundary between the LOCOS oxide film and the semiconductor substrate.
  • a highly accurate resistor can be formed also in the boundary region with the LOCOS oxide film, and a semiconductor device having an accurate resistance value can be manufactured.
  • FIGS. 1A and 1B to FIGS. 6A and 6B are diagrams showing an example of a series of manufacturing steps of a method for manufacturing a semiconductor device.
  • FIG. 1A and 1B are diagrams showing an example of a LOCOS forming step of the method for manufacturing a semiconductor device according to the present embodiment.
  • FIG. 1A is a plan view
  • FIG. 1B is a cross-sectional view.
  • a LOCOS oxide film 20 is formed in a square frame shape on the surface of a semiconductor substrate 10.
  • a region surrounded by the LOCOS oxide film 20 on the semiconductor substrate 10 is the active area 11 and is a region where a device is formed.
  • the semiconductor substrate 10 has an active area 11 of an N-type layer on the surface.
  • the active area 11 of the N layer may be formed as a well layer or an epitaxially grown layer.
  • a LOCOS oxide film 20 is formed on the surface of the semiconductor substrate 10 so as to surround the active area 11, and element isolation is performed.
  • the inner side in the horizontal direction of the LOCOS oxide film 20 has a triangular cross-sectional shape with a sharp tip, and the thickness varies depending on the position.
  • layers below the active area 11 of the semiconductor substrate 10 are omitted, various layers may be formed.
  • the semiconductor substrate 10 may be made of a semiconductor material such as silicon or gallium arsenide.
  • FIGS. 2A and 2B are diagrams showing an example of an oxide film forming process of the method for manufacturing a semiconductor device according to the present embodiment.
  • 2A is a plan view and
  • FIG. 2B is a cross-sectional view.
  • the plan view is the same as the LOCOS forming step of FIG. 1A, but the oxide film 30 is formed on the active area 11 and the surface in the active area 11 becomes the oxide film 30 as in FIG. 1A. Is different.
  • FIG. 2B shows a state in which the oxide film 30 is thinly formed on the surface of the active area 11 of the N layer.
  • various oxide films 30 can be used.
  • a gate oxide film used as a gate of a MOS transistor may be used.
  • the semiconductor device manufactured in the manufacturing method of the semiconductor device according to the present embodiment may include a MOS transistor in addition to the resistor.
  • a part of the gate oxide film formed for the MOS transistor Is used for the oxide film 30, the oxide film 30 can be formed at the same time in the step of forming the gate oxide film.
  • the oxide film 30 may be made of, for example, SiO 2 (silicon dioxide).
  • 3A and 3B are diagrams illustrating an example of a polysilicon forming process of the method for manufacturing a semiconductor device according to the present embodiment.
  • 3A is a plan view and FIG. 3B is a cross-sectional view.
  • a polysilicon film (Poly-Si) 40 covers the boundary between the LOCOS oxide film 20 and the active area of the semiconductor substrate 10 on which the oxide film 30 is formed.
  • the boundary polysilicon film 40 extends along the boundary between the LOCOS oxide film 20 and the semiconductor substrate 10 and has a shape extending in the horizontal longitudinal (Y) direction. Further, since the LOCOS oxide film 20 is formed in a frame shape so as to surround a quadrangle, there are two opposing boundaries between the LOCOS oxide film 20 and the semiconductor substrate 10 in the horizontal and vertical directions.
  • the polysilicon film 40 covers the boundary between the active area 11 and the LOCOS oxide film 20 in both of the two opposing positions.
  • the polysilicon film 40 can be formed with high accuracy, the polysilicon film 40 can be processed with higher accuracy than the LOCOS oxide film 20.
  • the pointed portion of the LOCOS oxide film 20 is unstable in shape and film thickness, and thus cannot be formed with high accuracy.
  • the polysilicon film 40 may be formed together with the polysilicon film formed for the gate of the MOS transistor, and the gate length thereof is formed with particularly high accuracy. Therefore, by covering the tip of the LOCOS oxide film 20 having an unstable shape with the polysilicon film 40, the polysilicon film 40 can function as a mask, and the boundary portion of the active area 11 is also highly accurate. Mask formation can be performed.
  • a plurality of polysilicon films 41 are formed in the center of the active area 11 in parallel with the end polysilicon film 40 so as to straddle the LOCOS oxide film 20 on the surface of the semiconductor substrate 40 in the vertical direction. ing.
  • the polysilicon film 41 also on the inner side from both side ends of the active area 11, the polysilicon films 40 and 41 are sandwiched and opposed from both sides in the horizontal direction, and the LOCOS oxide films 20 are arranged in the vertical direction.
  • a rectangular opening sandwiched between the two can be formed.
  • a desired mask shape can be formed by using the polysilicon films 40 and 41 in the horizontal and horizontal directions and the LOCOS oxide film 20 in the horizontal and vertical directions. Since the polysilicon films 40 and 41 are used in the horizontal and horizontal directions, a highly accurate mask shape can be obtained with respect to the horizontal width.
  • the polysilicon film 40 that covers the boundary with the LOCOS oxide film 20 that defines the outer periphery of the active area 11 is referred to as a boundary polysilicon film 40, and the LOCOS oxide film 41 is formed at the horizontal lateral center of the active area 11.
  • the polysilicon film 41 formed so as to straddle may be referred to as a central polysilicon film 41, and both are distinguished as necessary.
  • FIG. 3B a cross-sectional view is shown, but the boundary polysilicon film 40 covers a portion where the thickness of the LOCOS oxide film 20 is thin and the tip is pointed.
  • a central polysilicon film 41 is independently formed on the active area 11 at the center.
  • the boundary polysilicon film 40 is also formed at the boundary between the LOCOS oxide film 20 and the active area 11, a mask shape capable of forming a highly accurate resistor also at the end of the active area 11. It has become.
  • the polysilicon films 40 and 41 may be formed simultaneously in the gate forming step of the MOS transistor.
  • the resistor can be formed without increasing the number of steps.
  • FIGS. 4A and 4B are diagrams showing an example of a resistor forming step of the method for manufacturing a semiconductor device according to the present embodiment.
  • 4A is a plan view and FIG. 4B is a cross-sectional view.
  • the resistor forming process may be called an ion implantation process.
  • ions are implanted into openings in the active area 11 that are not surrounded by the polysilicon films 40 and 41 and the LOCOS oxide film 20, and a resistor 50 is formed.
  • the resistor 50 is an impurity region in which impurities are implanted into the active area 11 of the semiconductor substrate 10.
  • the oxide film 30 is formed on the resistor 50. However, for easy understanding of the process, the oxide film 30 is not considered in FIG. The layer immediately below will be illustrated.
  • the LOCOS oxide film 20 functions as a mask in the horizontal and vertical directions, but the boundary polysilicon film 40 functions as a mask at the boundary with the active area 11 in the horizontal and horizontal directions. is doing.
  • the high-precision resistor 50 can be formed at the boundary with the LOCOS oxide film 20 at both ends of the active area 11, and a semiconductor device having no dead space in the active area can be manufactured.
  • the resistor 50 sandwiched between the central polysilicon films 41 is formed in a highly accurate shape in the horizontal and lateral directions. In this manner, a plurality of highly accurate resistors can be formed in the active area 11.
  • FIG. 4B shows a cross-sectional view of the resistor forming step, showing a state in which the resistor 50 is formed on the surface of the active area 11 using the boundary polysilicon film 40 and the central polysilicon film 40 as a mask.
  • the boundary polysilicon film 40 only needs to be formed so as to reliably cover the tip portion of the LOCOS oxide film 20 whose thickness changes.
  • the thick portion where the thickness of the LOCOS oxide film 20 is constant can sufficiently function as a mask. Therefore, even if the boundary polysilicon film 40 is not formed in that region, there is no problem in processing accuracy. This is because no problem occurs.
  • the ions implanted by implantation into the active area 11 of the semiconductor substrate 10 may be various ions.
  • the active area 11 when the active area 11 is N-type, it may be B (boron). .
  • the resistor 50 is formed as a P-type impurity region.
  • the ions to be implanted when the active area 11 is P-type, the ions to be implanted may be phosphorus. In this case, the resistor 50 is formed as an N-type impurity region.
  • ions of an appropriate substance may be appropriately selected as the ions to be implanted.
  • the magnitude of the ion implantation energy is set to an energy level that penetrates the surface oxide film 30 and does not pass through the LOCOS oxide film 20.
  • 5A and 5B are diagrams showing an example of the oxidation heat treatment step of the method for manufacturing a semiconductor device according to the present embodiment.
  • 5A is a plan view and
  • FIG. 5B is a cross-sectional view.
  • the resistor 50 is present in an enlarged manner downward and sideward compared to the resistor 50 of FIG. 4B.
  • the semiconductor substrate 10 is heated in air and oxidized.
  • the impurities in the resistor 50 implanted in the ion implantation process are diffused by the heat treatment, the concentration is made uniform in the resistor 50, and the resistor 50 itself expands downward and laterally. It becomes a diffusion region. Thereby, the resistor 50 can fully have a function as an electrical resistance.
  • an oxide film 60 is formed around the polysilicon films 40 and 41.
  • the polysilicon films 40 and 41 are oxidized, the polysilicon films 40 and 41 are covered with the oxide film 60, and the polysilicon films 40 and 41 are covered with an insulator.
  • the surface of the active area 11 including the polysilicon films 40 and 41 formed on the surface is entirely covered with the insulator, and the subsequent wiring becomes easy.
  • the oxidation heat treatment step is a necessary step even when forming with a MOS transistor, when forming a MOS transistor on the semiconductor substrate 10 in addition to the resistor 50, the oxidation after the gate formation of the MOS transistor is performed. This step can be performed simultaneously by heat treatment. Therefore, the MOS transistor and the resistor can be simultaneously formed on the semiconductor substrate 10 without adding a new process.
  • FIG. 5A a plan view of the oxidation heat treatment step is shown, but no surface change from FIG. 4A occurs except that the oxide film 60 is formed on the surfaces of the polysilicon films 40 and 41. Similarly to the oxide film 30, the oxide film 60 is not shown in FIG. 5A. Therefore, FIG. 5A shows the same configuration as FIG. 4A.
  • 6A and 6B are diagrams showing an example of an etching process and a contact formation process of the method for manufacturing a semiconductor device according to the present embodiment.
  • 6A is a plan view and FIG. 6B is a cross-sectional view.
  • the contact hole 71 is formed on the region of the resistor 50 by removing the oxide film 30 by etching.
  • Two contact holes 71 are formed on the region of each resistor 50.
  • two wiring layers 70 made of a metal film are formed so as to cover the contact hole 71 and extend in the horizontal horizontal direction independently.
  • the two wiring layers 70 are not electrically connected directly to each other.
  • a voltage can be applied to the resistor 50 from the two wiring layers 70 through the contact holes 71.
  • “not being directly electrically connected” means that, for example, a wiring that connects the two wiring layers 70 to the same potential is not provided.
  • each resistance is applied between the two contact holes 71 by applying a first potential to one wiring layer 70 and applying a second potential different from the first potential to the other wiring layer 70.
  • a voltage can be applied to the body 50.
  • the upper wiring layer 70 connects all of the upper contact holes 71, and the lower wiring layer 70 connects all of the lower contact holes 71.
  • the resistors 50 are connected in parallel.
  • the resistors 50 can be connected in parallel to form a resistor having a small resistance value as a whole.
  • FIG. 6A shows an example in which the resistors 50 are connected in parallel
  • the wiring layer 70 may be formed so that the resistors 50 are used independently or connected in series.
  • the wiring layer 70 and the contact hole 71 can be appropriately configured in an appropriate shape according to the use of the semiconductor device.
  • FIG. 6A shows an example in which two contact holes 71 are provided in each resistor 50, but three or more contact holes 71 may be provided if necessary.
  • a contact hole 72 between the polysilicon films 40 and 41 and the low potential side wiring layer 70 is shown. This is provided to stabilize the potential, and may be provided as necessary.
  • FIG. 6B shows a cross-sectional view of the contact formation process, but shows a state where the surface of the semiconductor substrate 10 is covered with a wiring layer 70 of a metal film.
  • the oxide film 30 on the resistor 50 is removed by etching to form a contact hole 71.
  • FIG. 6B shows a cross-sectional configuration in which the contact hole 71 of FIG. 6A exists.
  • the etching of the oxide film 30 may be performed by dry etching or wet etching using a resist. After the acid heat treatment step shown in FIGS. 5A and 5B, the contact hole 71 forming portion of the oxide film 30 is removed by an etching step.
  • the contact formation process shown in FIGS. 6A and 6B is also a process necessary when forming the source and drain contacts in the MOS transistor manufacturing process, so that the MOS transistor is formed together with the semiconductor substrate 10. This step can be performed simultaneously with the MOS transistor contact formation step.
  • the boundary polysilicon film 40 is covered along the boundary between the semiconductor substrate 10 and the LOCOS oxide film 20 which are the outer periphery of the active area 11.
  • the highly accurate resistor 50 can be formed.
  • FIG. 7 is an example of a cross-sectional view showing an enlarged boundary portion of the resistor 50 manufactured by using the method for manufacturing a semiconductor device according to the present embodiment.
  • the outside of the resistor 50 is defined by the boundary polysilicon film 40. Since the boundary polysilicon film 40 covers the triangular portion of the LOCOS oxide film 20, even if the shape of the LOCOS oxide film 20 changes, the function as a mask is secured by the boundary polysilicon film 40, and the boundary polysilicon film 40 has high accuracy.
  • the resistor 50 can be formed.
  • the impurity distribution at the end of the LOCOS oxide film 20 is blurred, but the boundary polysilicon film 40 is used as a mask.
  • the impurity distribution becomes sharp and the dimensional accuracy of the resistor 50 in the width direction is good.
  • FIG. 8 is a diagram showing an example of a conventional LOCOS forming process.
  • 8A is a plan view and FIG. 8B is a cross-sectional view.
  • a LOCOS oxide film 120 is formed in the active area 111 of the semiconductor substrate 110 leaving an opening.
  • the LOCOS oxide film 120 performs all mask functions. Note that an example in which the active area 111 is configured as an N type is shown.
  • FIGS. 9A and 9B are diagrams showing an example of a conventional oxide film forming process.
  • 9A is a plan view
  • FIG. 9B is a cross-sectional view.
  • a thin oxide film 130 is formed in the opening area of the active area 111 where the LOCOS oxide film 120 is not formed.
  • FIGS. 10A and 10B are diagrams showing an example of a conventional resistor forming process.
  • 10A is a plan view and FIG. 10B is a cross-sectional view.
  • ions are implanted using the LOCOS oxide film 120 as a mask to form a resistor 150 made of an impurity region.
  • boron may be used as the ion.
  • the resistor 150 since all the masks are the LOCOS oxide film 120, the resistor 150 has the problem described with reference to FIG. In the example shown in FIGS. 10A and 10B, since all four resistors 150 have boundaries with the LOCOS oxide film 120, all boundaries of the resistors 150 are formed with reduced accuracy.
  • FIGS. 11A and 11B are diagrams showing an example of a conventional oxidation heat treatment process.
  • 11A is a plan view and FIG. 11B is a cross-sectional view.
  • 11A and 11B when the heat treatment is performed in a state where the boundary of the resistor 150 is poor, the boundary of the resistor 150 is formed in a blurred state.
  • FIGS. 12A and 12B are diagrams showing an example of a conventional contact formation process.
  • 12A is a plan view
  • FIG. 12B is a cross-sectional view.
  • the oxide film 130 is etched to form a contact hole 171, and a metal film wiring layer 170 is formed so as to cover the LOCOS oxide film 120.
  • the lateral width of the resistor 150 is defined by the LOCOS oxide film 120, which is affected by the film thickness and processing accuracy of the LOCOS oxide film 120. Further, the processing accuracy of the LOCOS oxide film 120 is generally lower than the processing accuracy of the polysilicon films 40 and 41. Further, the impurity distribution at the end of the LOCOS oxide film 120 has a problem that the LOCOS oxide film 120 is gradually thinned, so that it is difficult to have a steep distribution.
  • the masks are formed by the polysilicon films 40 and 41 in all lateral directions including the end of the active area 11 where the LOCOS oxide film 20 exists. Since it comprises, the resistor 50 can be formed with high precision.
  • the MOS transistor and the resistor 50 are simultaneously formed without increasing the number of steps. be able to.
  • the MOS transistor may be configured as a single MOS transistor or may be configured as a CMOS (Complementary Metal Oxide Semiconductor).
  • the resistor 50 is described as an example of the P-type diffusion region.
  • the N-type resistor 50 is provided in the P-type active area 11 so as to be an N-type diffusion region. N-type resistor 50 may be obtained.
  • the technology disclosed in the present application can be used for a semiconductor device in which a device including a resistor is formed on a semiconductor substrate, and a semiconductor integrated circuit device in which a circuit is formed using these devices and packaged.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

La présente invention se rapporte à un procédé de fabrication d'un dispositif à base de semi-conducteur. Dans le procédé selon l'invention, une résistance est formée sur la surface d'un substrat semi-conducteur comprenant une couche mince d'oxyde LOCOS. Le procédé selon l'invention comprend : une étape de formation de couche mince de polysilicium consistant à former une première couche mince de polysilicium le long de la limite entre la couche d'oxyde LOCOS et le substrat semi-conducteur de telle sorte que la première couche mince de polysilicium recouvre la limite ; une étape de formation de résistance consistant à doper une impureté dans la surface du substrat semi-conducteur en utilisant la première couche mince de polysilicium comme un masque pour former la résistance ; et une étape de formation de contact consistant à former deux trous de contact ou plus sur la résistance et consistant à former une couche d'interconnexion qui est connectée aux trous de contact et ne peut pas connecter les trous de contact directement les uns aux autres.
PCT/JP2010/065253 2009-09-14 2010-09-06 Procédé de fabrication d'un dispositif à base de semi-conducteur et dispositif à base de semi-conducteur WO2011030735A1 (fr)

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JP2009211188A JP2011061101A (ja) 2009-09-14 2009-09-14 半導体装置の製造方法
JP2009-211188 2009-09-14

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6195562A (ja) * 1984-10-17 1986-05-14 Hitachi Ltd 半導体装置の製造方法
JPH02119244A (ja) * 1988-10-28 1990-05-07 Nec Corp 半導体集積回路の製造方法
JPH0964286A (ja) * 1995-08-21 1997-03-07 Yamaha Corp 半導体装置
JPH11297935A (ja) * 1998-04-08 1999-10-29 Matsushita Electron Corp 半導体装置及びその製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6195562A (ja) * 1984-10-17 1986-05-14 Hitachi Ltd 半導体装置の製造方法
JPH02119244A (ja) * 1988-10-28 1990-05-07 Nec Corp 半導体集積回路の製造方法
JPH0964286A (ja) * 1995-08-21 1997-03-07 Yamaha Corp 半導体装置
JPH11297935A (ja) * 1998-04-08 1999-10-29 Matsushita Electron Corp 半導体装置及びその製造方法

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