WO2010087302A1 - アンテナ共用モジュール - Google Patents
アンテナ共用モジュール Download PDFInfo
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- WO2010087302A1 WO2010087302A1 PCT/JP2010/050898 JP2010050898W WO2010087302A1 WO 2010087302 A1 WO2010087302 A1 WO 2010087302A1 JP 2010050898 W JP2010050898 W JP 2010050898W WO 2010087302 A1 WO2010087302 A1 WO 2010087302A1
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- line
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
- H04B1/44—Transmit/receive switching
- H04B1/48—Transmit/receive switching in circuits for connecting transmitter and receiver to a common transmission path, e.g. by energy of transmitter
Definitions
- This invention relates to an antenna sharing module in which a diplexer, a duplexer, a switchplexer, etc. are provided on a multilayer substrate.
- An antenna sharing module that converts an antenna sharing signal and a plurality of individual signals is adopted in the front end of a mobile phone or the like.
- Some antenna sharing modules include a multilayer substrate, and the mounting surface of the multilayer substrate includes a mounting electrode for antenna sharing signals and a mounting electrode for individual signals.
- a matching circuit is connected to an antenna shared line through which an antenna shared signal flows, and an inductor of the matching circuit may be formed in a multilayer substrate (see, for example, Patent Document 1).
- the individual signal line through which the individual signal flows and the inductor of the matching circuit are arranged in the multilayer substrate, so that they are easily coupled, and the isolation between the lines is deteriorated and the communication performance such as reception sensitivity is lowered.
- the isolation between the lines is deteriorated and the communication performance such as reception sensitivity is lowered.
- an object of the present invention is to provide an antenna sharing module that can improve the isolation between lines and the communication performance by suppressing the coupling between the inductors in the multilayer substrate provided in the matching circuit and the individual signal lines.
- the present invention is an antenna sharing module that converts an antenna sharing signal and a plurality of individual signals, and includes a plurality of individual signal lines, an antenna sharing line, a ground line, and an inductance element.
- Individual signals pass through the individual signal lines.
- the antenna shared line passes through the antenna shared line.
- the ground line becomes the ground potential.
- the inductance element grounds the antenna sharing line.
- the individual signal line, the antenna common line, and the inductance element are configured by wiring electrodes formed on the substrate surface and / or substrate interface and via electrodes formed inside the substrate.
- One end of the inductance element is connected to a grounding mounting electrode formed on one main surface of the substrate, and the inductance element is arranged so as to be wound around a via electrode constituting the antenna shared line.
- a ground line is disposed between the individual signal line, the antenna shared line, and the inductance element.
- the inductance element is disposed apart from the individual signal line by the ground line, the isolation between the inductance element and the individual signal line can be improved. Further, since the inductance element is disposed so as to wind around the outside of the via electrode of the antenna shared line, the isolation between the antenna shared line and the individual signal line is also improved. As a result, communication performance such as reception sensitivity can be improved. In addition, since the via electrode of the antenna shared line is passed through the inductance element formation region, the arrangement space of the antenna shared line can be reduced, and the miniaturization of the module can be promoted.
- the mounting electrode for grounding is disposed between the arrangement of the mounting electrode conducting to the antenna sharing line and the mounting electrode conducting to the individual signal line. Thereby, the isolation between the inductance element and the individual signal line and between the antenna shared line and the individual signal line can be further improved.
- the antenna sharing module of the present invention may include an antenna sharing device.
- the antenna duplexer includes an individual signal terminal and an antenna common terminal, and converts a plurality of individual signals and antenna common signals.
- the individual signal terminal is connected to a surface electrode conducting to the individual signal line among the surface electrodes formed on the other main surface of the substrate.
- the antenna shared terminal is connected to a surface electrode that conducts to the antenna shared line.
- a grounding surface electrode is disposed between the surface electrode conducting to the antenna sharing line and the surface electrode conducting to the individual signal line.
- grounding mounting electrode and the grounding surface electrode of the present invention are connected via via electrodes. Thereby, the isolation between the inductance element and the individual signal line and between the antenna shared line and the individual signal line can be further improved.
- the mounting electrode and the surface electrode are connected only by the via electrode.
- the antenna duplexer according to the present invention is preferably a surface acoustic wave antenna duplexer having a grounding terminal connected to the grounding surface electrode. Thereby, the isolation between the matching line and the individual signal line and between the antenna shared line and the individual signal line can be further improved.
- the ground line is arranged between the pattern electrode for the inductor and the individual signal line, and the pattern electrode for the inductor is wound around the outside of the via electrode of the antenna shared line.
- communication performance such as reception sensitivity can be improved.
- FIG. 2 is a stacking diagram of multilayer boards provided in the antenna sharing module of FIG. 1.
- FIG. 1 is a diagram illustrating a configuration example of an antenna sharing module according to an embodiment of the present invention.
- 1A is a top view of the antenna sharing module as viewed from above
- FIG. 1B is a bottom view of the antenna sharing module as viewed from below
- FIG. 1C is a schematic equivalent of the antenna sharing module. It is a circuit diagram.
- the antenna sharing module 1 includes a multilayer substrate 2 formed by laminating a plurality of substrates.
- the top surface of the multilayer substrate 2 is a chip mounting surface, and includes a plurality of surface electrodes on which discrete components are mounted.
- the bottom surface of the multilayer substrate 2 is a module mounting surface, and includes a plurality of mounting electrodes that serve as external connection ports of the antenna sharing module 1.
- the surface electrode and the mounting electrode are connected by a wiring electrode or a via electrode provided inside the multilayer substrate 2.
- the equivalent circuit of the antenna sharing module 1 includes an antenna sharing line 3, a reception signal line 4, a transmission signal line 5, a matching line 6, and a ground line 7.
- the reception signal line 4 and the transmission signal line 5 correspond to individual signal lines of the present invention.
- the circuit element includes a duplexer DUP, a power amplifier PA, a surface acoustic wave filter SAW, inductors L1 to L5, CL, and capacitors C1 to C3.
- an antenna port ANT, a reception port RX, a transmission port RFin, a ground port GND, and power supply ports Vcc1 and Vcc2 are provided as external connection ports.
- the duplexer DUP is a discrete part of an antenna duplexer using a surface acoustic wave resonator provided with an IDT electrode, and corresponds to the antenna duplexer of the present invention.
- the duplexer DUP includes a transmission filter and a reception filter, and converts a reception signal and a transmission signal, which are individual signals, and an antenna shared signal.
- the duplexer DUP includes, on the bottom surface, an antenna shared terminal Ant, a reception signal terminal Rx, a transmission signal terminal Tx, and a ground terminal Gnd indicated by a broken line in FIG.
- the reception signal terminal Rx and the transmission signal terminal Tx correspond to the individual signal terminals of the present invention. These terminals are connected to the surface electrodes of the multilayer substrate 2 by solder or the like.
- the antenna sharing line 3 is a line for connecting the surface electrode on which the antenna sharing terminal Ant of the duplexer DUP is mounted and the mounting electrode to be the antenna port ANT.
- the matching line 6 is a line branched from the antenna shared line 3 and connected to the mounting electrode serving as the ground port GND.
- An inductor L4 is inserted in the matching line 6.
- the inductor L4 corresponds to the inductance element of the present invention, and is a circuit element formed by wiring electrodes formed between layers of the multilayer substrate 2 and via electrodes formed in the layers.
- the reception line 4 is a line for connecting the surface electrode on which the reception signal terminal Rx of the duplexer DUP is mounted and the mounting electrode to be the reception port RX.
- the ground line 7 is a line for connecting a surface electrode on which the ground terminal Gnd of the duplexer DUP is mounted and a mounting electrode to be the ground port GND.
- the ground line 7 is a line for connecting a surface electrode on which the ground terminal Gnd of the duplexer DUP is mounted and a mounting electrode to be the ground port GND.
- the transmission line 5 is a line that connects the surface electrode on which the transmission signal terminal Tx of the duplexer DUP is mounted and the mounting electrode that is to be the transmission port RFin.
- a surface acoustic wave filter SAW, an inductor L5, a power amplifier PA, an inductor L3, and an inductor CL are inserted.
- the connection point between the inductor CL and the inductor L3 is grounded by a capacitor C3 arranged in parallel.
- the surface acoustic wave filter SAW removes out-of-band noise from the transmission signal input from the transmission port RFin.
- the inductor L5 matches between the surface acoustic wave filter SAW and the power amplifier PA.
- the power amplifier PA amplifies the transmission signal.
- Inductor L3 and capacitor C3 are matched between power amplifier PA and coupler CPL.
- the coupler CPL includes a coupling line CPL1 inserted into the transmission line 5 and a coupling line CPL2 inserted into the monitor line 8, and extracts a part of the power of the transmission signal passing through the transmission line 5 from the monitor line 8.
- the circuit elements of the capacitors C1, C2, and C3 are mounted on the chip mounting surface of the multilayer substrate 2 as discrete components.
- Power is supplied to the power amplifier PA from a first power supply line connected to the mounting electrode serving as the power supply port Vcc1 and a second power supply line connected to the mounting electrode serving as the power supply port Vcc2.
- Inductor L1 (or inductor L2) is inserted in each power line, and grounded by capacitor C1 (or capacitor C2) arranged in parallel. Power port Vcc1 (or power port Vcc2) and power amplifier PA Is consistent between.
- FIG. 2 is a stacking diagram of the multilayer substrate 2.
- FIGS. 2A to 2J are plan views of the substrates (A) to (J) as viewed from above in order from the uppermost layer to the lowermost layer.
- FIG. 2K is a plan view of the bottom surface of the lowermost layer of the multilayer substrate 2 as viewed from above.
- the via electrodes in the substrates (A) to (J) are indicated by circles in the drawing.
- the substrate (A) is laminated on the uppermost layer of the multilayer substrate 2 and has a surface electrode for mounting discrete components on the surface thereof.
- the broken line in the figure indicates the outer shape of the discrete component mounted on the surface electrode, and the arrow in the figure indicates the terminal of the duplexer mounted on the surface electrode.
- the substrate (B) is laminated on the second layer from the chip mounting surface of the multilayer substrate 2.
- a via electrode of the antenna shared line 3 is formed at a position surrounded by the ground region 17 and the substrate edge.
- a via electrode of the reception signal line 4 is formed between the ground region 17 and the transmission signal region 15.
- a pattern electrode of the ground line 7 serving as an inner layer ground is provided on the upper surface of the ground region 17, and via electrodes of the ground line 7 serving as a ground potential are densely arranged in the substrate of the ground region 17.
- the transmission signal region 15 is a region where the via electrode and the pattern electrode of the transmission signal line 5 are formed, and a pattern electrode that becomes the inductor L3, a pattern electrode that becomes the inductor CL, and a pattern electrode that becomes the inductor L5 are formed. ing.
- the substrate (C) is laminated on the third layer from the chip mounting surface of the multilayer substrate 2.
- a via electrode of the antenna shared line 3 is formed at a position surrounded by the ground region 17 and the substrate edge.
- a via electrode of the reception signal line 4 is formed between the ground region 17 and the transmission signal region 15.
- the via electrodes of the ground line 7 having a ground potential are densely arranged.
- via electrodes and pattern electrodes of the transmission signal line 5 are formed.
- the substrate (D) is laminated on the fourth layer from the chip mounting surface of the multilayer substrate 2.
- a via electrode of the antenna shared line 3 is formed at a position surrounded by the ground region 17 and the substrate edge.
- a via electrode of the reception signal line 4 is formed between the ground region 17 and the transmission signal region 15.
- the via electrodes of the ground line 7 having a ground potential are densely arranged.
- the transmission signal region 15 forms a via electrode and a pattern electrode of the transmission signal line 5.
- the substrate (E) is laminated on the fifth layer from the chip mounting surface of the multilayer substrate 2.
- a via electrode of the antenna sharing line 3 and a wiring electrode and a via electrode serving as the inductor L4 of the matching line 6 are formed at a position surrounded by the ground region 17 and the substrate edge.
- a via electrode of the reception signal line 4 is formed between the ground region 17 and the transmission signal region 15.
- the via electrodes of the ground line 7 having a ground potential are densely arranged.
- the transmission signal region 15 is a region where the via electrode and the pattern electrode of the transmission signal line 5 are formed, and forms a pattern electrode serving as the inductor L2.
- the substrate (F) is laminated on the sixth layer from the chip mounting surface of the multilayer substrate 2.
- a via electrode of the antenna sharing line 3 and a wiring electrode and a via electrode serving as the inductor L4 of the matching line 6 are formed at a position surrounded by the ground region 17 and the substrate edge.
- a via electrode of the reception signal line 4 is formed between the ground region 17 and the transmission signal region 15.
- the via electrodes of the ground line 7 having a ground potential are densely arranged.
- the transmission signal region 15 is a region where the via electrode and the pattern electrode of the transmission signal line 5 are formed, and forms a pattern electrode serving as the inductor L2.
- the substrate (G) is laminated on the seventh layer from the chip mounting surface of the multilayer substrate 2.
- a via electrode of the antenna sharing line 3 and a wiring electrode and a via electrode serving as the inductor L4 of the matching line 6 are formed at a position surrounded by the ground region 17 and the substrate edge.
- a via electrode of the reception signal line 4 is formed between the ground region 17 and the transmission signal region 15.
- the via electrodes of the ground line 7 having a ground potential are densely arranged.
- the transmission signal region 15 is a region where the via electrode and the pattern electrode of the transmission signal line 5 are formed, and forms a pattern electrode that becomes the inductor L1.
- the substrate (H) is laminated on the eighth layer from the chip mounting surface of the multilayer substrate 2.
- a via electrode of the antenna sharing line 3 and a via electrode of the matching line 6 are formed at a position surrounded by the ground region 17 and the substrate edge.
- a via electrode of the reception signal line 4 is formed between the ground region 17 and the transmission signal region 15.
- the via electrodes of the ground line 7 having a ground potential are densely arranged.
- the transmission signal region 15 forms a via electrode and a pattern electrode of the transmission signal line 5.
- the substrate (I) is laminated on the ninth layer from the chip mounting surface of the multilayer substrate 2.
- a via electrode of the antenna sharing line 3 and a via electrode of the matching line 6 are formed at a position surrounded by the ground region 17 and the substrate edge.
- a via electrode of the reception signal line 4 is formed between the ground region 17 and the transmission signal region 15.
- the via electrodes of the ground line 7 having a ground potential are densely arranged.
- the transmission signal region 15 forms a via electrode and a pattern electrode of the transmission signal line 5.
- the substrate (J) is laminated on the tenth layer from the chip mounting surface of the multilayer substrate 2.
- a via electrode of the antenna sharing line 3 and a via electrode of the matching line 6 are formed at a position surrounded by the ground region 17 and the substrate edge.
- a via electrode of the reception signal line 4 is formed between the ground region 17 and the transmission signal region 15.
- a pattern electrode of the ground line 7 serving as an inner layer ground is provided on the upper surface of the ground region 17, and via electrodes of the ground line 7 serving as a ground potential are densely arranged in the substrate of the ground region 17.
- the transmission signal region 15 forms a via electrode and a pattern electrode of the transmission signal line 5.
- a plurality of mounting electrodes shown in FIG. 2K are formed on the back surface of the substrate (J).
- the matching line 6 is formed so that the wiring electrode wraps around the via electrode of the antenna sharing line 3 over the substrates (E) to (G), and only the via electrode is extended over the substrates (H) to (J). Connected and formed. Therefore, the arrangement space of the antenna shared line 3 can be reduced. Furthermore, signal leakage from the antenna sharing line 3 can be suppressed. Further, a ground line 7 is provided in the ground region 17 so as to connect the surface electrode to the mounting electrode with the via electrode as short as possible, and the matching line 6 and the antenna common line 3, the transmission signal line 5 and the reception signal line 4, , A ground region 17 is disposed between them.
- the matching line 6 and the antenna shared line 3 are separated from the transmission signal line 5 and the reception signal line 4 with the ground potential interposed therebetween in the multilayer substrate 2, and coupling exceeding the ground region 17 hardly occurs. . Thereby, the isolation between the matching line 6 and the antenna shared line 3 and the transmission signal line 5 and the reception signal line 4 can be improved.
- the surface electrode to which the antenna shared terminal Ant of the duplexer DUP is connected is surrounded by the surface electrode to which the ground terminal Gnd is connected. ing.
- the mounting electrode serving as the antenna port ANT is surrounded by the mounting electrode serving as the ground port GND.
- the duplexer is used as the antenna duplexer.
- the present invention can also be applied to a multiplexer such as a diplexer or a switchplexer.
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- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Transceivers (AREA)
- Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
Abstract
Description
表面弾性波フィルタSAWは送信ポートRFinから入力される送信信号から帯域外のノイズを除去する。インダクタL5は表面弾性波フィルタSAWとパワーアンプPAとの間の整合をとる。パワーアンプPAは送信信号を増幅する。インダクタL3とコンデンサC3とはパワーアンプPAとカプラCPLとの間の整合をとる。カプラCPLは送信ライン5に挿入された結合線路CPL1とモニタライン8に挿入された結合線路CPL2とを備え、送信ライン5を通過する送信信号の電力の一部をモニタライン8からとりだす。コンデンサC1,C2,C3の回路素子は、多層基板2のチップ搭載面にディスクリート部品として搭載している。
2…多層基板
3…アンテナ共用ライン
4…受信信号ライン
5…送信信号ライン
6…整合ライン
7…グランドライン
15…送信信号領域
17…グランド領域
C1,C2,C3…コンデンサ
DUP…デュプレクサ
L,L1,L2,L3,L5,CL…インダクタ
SAW…表面弾性波フィルタ
PA…パワーアンプ
Vcc1,Vcc2…電源ポート
ANT…アンテナポート
GND…グランドポート
RFin…送信ポート
RX…受信ポート
Ant…アンテナ共用端子
Gnd…グランド端子
Rx…受信信号端子
Tx…送信信号端子
Claims (7)
- アンテナ共用信号と複数の個別信号とを変換するアンテナ共用モジュールであって、
それぞれ前記個別信号が通過する複数の個別信号ラインと、
前記アンテナ共用信号が通過するアンテナ共用ラインと、
グランド電位になるグランドラインと、
前記アンテナ共用ラインを接地するインダクタンス素子と、を備え、
前記個別信号ライン、前記アンテナ共用ライン、および前記インダクタンス素子は、基板表面および/または基板界面に形成した配線電極および基板内部に形成したビア電極で構成され、
前記インダクタンス素子は、前記基板の一方主面に形成された接地用の実装電極に一方端が接続され、前記アンテナ共用ラインを構成するビア電極に巻き回すように配置され、
前記個別信号ラインと前記アンテナ共用ラインおよび前記インダクタンス素子との間に前記グランドラインが配置される、アンテナ共用モジュール。 - 前記アンテナ共用ラインに導通する実装電極と前記個別信号ラインに導通する実装電極との配列間に、接地用実装電極を配置した、請求項1に記載のアンテナ共用モジュール。
- 前記複数の個別信号と前記アンテナ共用信号とを変換するアンテナ共用器を備え、
前記基板の前記一方主面に対向する他方主面には複数の表面電極が形成され、
前記アンテナ共用器は、前記複数の表面電極のうち、前記個別信号ラインに導通する表面電極に接続される個別信号端子と、前記アンテナ共用ラインに導通する表面電極に接続されるアンテナ共用端子とを備える、請求項1または2に記載のアンテナ共用モジュール。 - 前記アンテナ共用ラインに導通する表面電極と前記個別信号ラインに導通する表面電極との間に、接地用表面電極を配置した、請求項3に記載のアンテナ共用モジュール。
- 前記接地用実装電極と前記接地用表面電極とはビア電極を介して接続されている、請求項4に記載のアンテナ共用モジュール。
- 前記アンテナ共用ラインは、前記実装電極と前記表面電極との間をビア電極のみで接続した、請求項3~5のいずれかに記載のアンテナ共用モジュール。
- 前記アンテナ共用器は、前記接地用表面電極に接続される接地用端子を備える表面弾性波型アンテナ共用器である、請求項3~6のいずれかに記載のアンテナ共用モジュール。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
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JP2010548493A JP5218569B2 (ja) | 2009-01-28 | 2010-01-25 | アンテナ共用モジュール |
CN201080006312.3A CN102301610B (zh) | 2009-01-28 | 2010-01-25 | 天线共用模块 |
US13/191,643 US8422972B2 (en) | 2009-01-28 | 2011-07-27 | Antenna combining module |
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JP2009016088 | 2009-01-28 | ||
JP2009-016088 | 2009-01-28 |
Related Child Applications (1)
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US13/191,643 Continuation US8422972B2 (en) | 2009-01-28 | 2011-07-27 | Antenna combining module |
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WO2010087302A1 true WO2010087302A1 (ja) | 2010-08-05 |
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PCT/JP2010/050898 WO2010087302A1 (ja) | 2009-01-28 | 2010-01-25 | アンテナ共用モジュール |
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US (1) | US8422972B2 (ja) |
JP (1) | JP5218569B2 (ja) |
CN (1) | CN102301610B (ja) |
WO (1) | WO2010087302A1 (ja) |
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JP2012080160A (ja) * | 2010-09-30 | 2012-04-19 | Hitachi Metals Ltd | 高周波回路部品、及び通信装置 |
US11139231B2 (en) | 2017-04-04 | 2021-10-05 | Murata Manufacturing Co., Ltd. | Radio frequency module and communication device |
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US9344140B2 (en) * | 2014-02-25 | 2016-05-17 | Skyworks Solutions, Inc. | Systems, devices and methods related to improved radio-frequency modules |
US11770115B2 (en) * | 2020-10-16 | 2023-09-26 | Qualcomm Incorporated | Tunable circuit including integrated filter circuit coupled to variable capacitance, and related integrated circuit (IC) packages and fabrication methods |
JP2022092959A (ja) * | 2020-12-11 | 2022-06-23 | 株式会社村田製作所 | 高周波モジュール |
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- 2010-01-25 JP JP2010548493A patent/JP5218569B2/ja not_active Expired - Fee Related
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2011
- 2011-07-27 US US13/191,643 patent/US8422972B2/en active Active
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JP2012080160A (ja) * | 2010-09-30 | 2012-04-19 | Hitachi Metals Ltd | 高周波回路部品、及び通信装置 |
US11139231B2 (en) | 2017-04-04 | 2021-10-05 | Murata Manufacturing Co., Ltd. | Radio frequency module and communication device |
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JPWO2010087302A1 (ja) | 2012-08-02 |
US8422972B2 (en) | 2013-04-16 |
CN102301610A (zh) | 2011-12-28 |
US20110281540A1 (en) | 2011-11-17 |
JP5218569B2 (ja) | 2013-06-26 |
CN102301610B (zh) | 2014-02-12 |
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