WO2009072213A1 - 抵抗変化型メモリ装置、不揮発性メモリ装置、およびその製造方法 - Google Patents

抵抗変化型メモリ装置、不揮発性メモリ装置、およびその製造方法 Download PDF

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Publication number
WO2009072213A1
WO2009072213A1 PCT/JP2007/073708 JP2007073708W WO2009072213A1 WO 2009072213 A1 WO2009072213 A1 WO 2009072213A1 JP 2007073708 W JP2007073708 W JP 2007073708W WO 2009072213 A1 WO2009072213 A1 WO 2009072213A1
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Prior art keywords
memory device
resistance change
type memory
manufacturing
oxide film
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PCT/JP2007/073708
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English (en)
French (fr)
Inventor
Koji Tsunoda
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Fujitsu Limited
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Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to JP2009544546A priority Critical patent/JP5170107B2/ja
Priority to PCT/JP2007/073708 priority patent/WO2009072213A1/ja
Publication of WO2009072213A1 publication Critical patent/WO2009072213A1/ja
Priority to US12/793,270 priority patent/US8338814B2/en

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0007Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/101Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including resistors or capacitors only
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0009RRAM elements whose operation depends upon chemical change
    • G11C13/0011RRAM elements whose operation depends upon chemical change comprising conductive bridging RAM [CBRAM] or programming metallization cells [PMCs]
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0069Writing or programming circuits or methods
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B63/00Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/30Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011Manufacture or treatment of multistable switching devices
    • H10N70/021Formation of switching materials, e.g. deposition of layers
    • H10N70/026Formation of switching materials, e.g. deposition of layers by physical vapor deposition, e.g. sputtering
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011Manufacture or treatment of multistable switching devices
    • H10N70/041Modification of switching materials after formation, e.g. doping
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011Manufacture or treatment of multistable switching devices
    • H10N70/061Shaping switching materials
    • H10N70/063Shaping switching materials by etching of pre-deposited switching material layers, e.g. lithography
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20Multistable switching devices, e.g. memristors
    • H10N70/24Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/821Device geometry
    • H10N70/826Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/881Switching materials
    • H10N70/883Oxides or nitrides
    • H10N70/8833Binary metal oxides, e.g. TaOx
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0069Writing or programming circuits or methods
    • G11C2013/0083Write to perform initialising, forming process, electro forming or conditioning
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021Auxiliary circuits
    • G11C13/0069Writing or programming circuits or methods
    • G11C2013/009Write using potential difference applied between cell electrodes
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2213/00Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/30Resistive cell, memory material aspects
    • G11C2213/32Material having simple binary metal oxide structure
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2213/00Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/30Resistive cell, memory material aspects
    • G11C2213/34Material includes an oxide or a nitride
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2213/00Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/50Resistive cell structure aspects
    • G11C2213/56Structure including two electrodes, a memory active layer and a so called passive or source or reservoir layer which is NOT an electrode, wherein the passive or source or reservoir layer is a source of ions which migrate afterwards in the memory active layer to be only trapped there, to form conductive filaments there or to react with the material of the memory active layer in redox way

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  • Materials Engineering (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)

Abstract

 抵抗変化型メモリ装置は、下部電極と、前記下部電極上に形成され、抵抗値を変化させうる金属酸化物膜と、前記金属酸化物膜上に形成された上部電極と、 を備え、前記金属酸化物膜は、該金属酸化物膜を構成する金属元素を含む第1の部位と、該第1の部位より酸素を多く含む第2の部位を有する。
PCT/JP2007/073708 2007-12-07 2007-12-07 抵抗変化型メモリ装置、不揮発性メモリ装置、およびその製造方法 WO2009072213A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2009544546A JP5170107B2 (ja) 2007-12-07 2007-12-07 抵抗変化型メモリ装置、不揮発性メモリ装置、およびその製造方法
PCT/JP2007/073708 WO2009072213A1 (ja) 2007-12-07 2007-12-07 抵抗変化型メモリ装置、不揮発性メモリ装置、およびその製造方法
US12/793,270 US8338814B2 (en) 2007-12-07 2010-06-03 Resistive random access memory, nonvolatile memory, and method of manufacturing resistive random access memory

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PCT/JP2007/073708 WO2009072213A1 (ja) 2007-12-07 2007-12-07 抵抗変化型メモリ装置、不揮発性メモリ装置、およびその製造方法

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US12/793,270 Continuation US8338814B2 (en) 2007-12-07 2010-06-03 Resistive random access memory, nonvolatile memory, and method of manufacturing resistive random access memory

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WO2009125777A1 (ja) * 2008-04-07 2009-10-15 日本電気株式会社 抵抗変化素子及びその製造方法
WO2010021134A1 (ja) * 2008-08-20 2010-02-25 パナソニック株式会社 抵抗変化型不揮発性記憶装置およびメモリセルの形成方法
JP2010135541A (ja) * 2008-12-04 2010-06-17 Sharp Corp 可変抵抗素子並びにその製造方法
WO2010109876A1 (ja) * 2009-03-25 2010-09-30 パナソニック株式会社 抵抗変化素子の駆動方法及び不揮発性記憶装置
JP2011066285A (ja) * 2009-09-18 2011-03-31 Toshiba Corp 不揮発性記憶素子および不揮発性記憶装置
WO2011052239A1 (ja) * 2009-11-02 2011-05-05 パナソニック株式会社 抵抗変化型不揮発性記憶装置およびメモリセルの形成方法
CN102214790A (zh) * 2011-06-10 2011-10-12 清华大学 一种具有自整流效应的阻变存储器
JP2012507856A (ja) * 2008-10-29 2012-03-29 ヒューレット−パッカード デベロップメント カンパニー エル.ピー. 電気的に作動するデバイス及びそのデバイスにおけるドーパントの形成を制御する方法
WO2012042897A1 (ja) * 2010-10-01 2012-04-05 パナソニック株式会社 不揮発性記憶素子の製造方法および不揮発性記憶素子
JP5459515B2 (ja) * 2009-02-20 2014-04-02 株式会社村田製作所 抵抗記憶素子およびその使用方法
US9018083B2 (en) 2011-05-04 2015-04-28 Hewlett-Packard Development Company, L.P. Electrically actuated device and method of controlling the formation of dopants therein
KR20150047562A (ko) * 2012-08-21 2015-05-04 마이크론 테크놀로지, 인크. 단극성 메모리 디바이스들
US10453523B2 (en) 2016-04-21 2019-10-22 Tdk Corporation Magnetic wall utilization-analog memory element and magnetic wall utilization analog memory
US10482987B2 (en) 2016-04-21 2019-11-19 Tdk Corporation Magnetic wall utilization spin MOSFET and magnetic wall utilization analog memory
US10553299B2 (en) 2017-04-14 2020-02-04 Tdk Corporation Magnetic domain wall type analog memory element, magnetic domain wall type analog memory, nonvolatile logic circuit, and magnetic neuro-element
US10672446B2 (en) 2016-06-10 2020-06-02 Tdk Corporation Exchange bias utilization type magnetization rotational element, exchange bias utilization type magnetoresistance effect element, exchange bias utilization type magnetic memory, non-volatile logic circuit, and magnetic neuron element
US10916480B2 (en) 2017-04-14 2021-02-09 Tdk Corporation Magnetic wall utilization type analog memory device, magnetic wall utilization type analog memory, nonvolatile logic circuit, and magnetic neuro device

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JP6021688B2 (ja) * 2013-02-25 2016-11-09 ルネサスエレクトロニクス株式会社 半導体装置およびその制御方法
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Cited By (31)

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WO2009125777A1 (ja) * 2008-04-07 2009-10-15 日本電気株式会社 抵抗変化素子及びその製造方法
US8373149B2 (en) 2008-04-07 2013-02-12 Nec Corporation Resistance change element and manufacturing method thereof
JPWO2010021134A1 (ja) * 2008-08-20 2012-01-26 パナソニック株式会社 抵抗変化型不揮発性記憶装置
JP4555397B2 (ja) * 2008-08-20 2010-09-29 パナソニック株式会社 抵抗変化型不揮発性記憶装置
US8553444B2 (en) 2008-08-20 2013-10-08 Panasonic Corporation Variable resistance nonvolatile storage device and method of forming memory cell
WO2010021134A1 (ja) * 2008-08-20 2010-02-25 パナソニック株式会社 抵抗変化型不揮発性記憶装置およびメモリセルの形成方法
US8830730B2 (en) 2008-08-20 2014-09-09 Panasonic Corporation Variable resistance nonvolatile storage device and method of forming memory cell
JP2012507856A (ja) * 2008-10-29 2012-03-29 ヒューレット−パッカード デベロップメント カンパニー エル.ピー. 電気的に作動するデバイス及びそのデバイスにおけるドーパントの形成を制御する方法
US8766228B2 (en) 2008-10-29 2014-07-01 Hewlett-Packard Development Company, L.P. Electrically actuated device and method of controlling the formation of dopants therein
JP2010135541A (ja) * 2008-12-04 2010-06-17 Sharp Corp 可変抵抗素子並びにその製造方法
JP5459515B2 (ja) * 2009-02-20 2014-04-02 株式会社村田製作所 抵抗記憶素子およびその使用方法
US8279658B2 (en) 2009-03-25 2012-10-02 Panasonic Corporation Method of programming variable resistance element and nonvolatile storage device
US8395930B2 (en) 2009-03-25 2013-03-12 Panasonic Corporation Method of programming variable resistance element and nonvolatile storage device
WO2010109876A1 (ja) * 2009-03-25 2010-09-30 パナソニック株式会社 抵抗変化素子の駆動方法及び不揮発性記憶装置
JP2011066285A (ja) * 2009-09-18 2011-03-31 Toshiba Corp 不揮発性記憶素子および不揮発性記憶装置
US8450715B2 (en) 2009-09-18 2013-05-28 Kabushiki Kaisha Toshiba Nonvolatile metal oxide memory element and nonvolatile memory device
WO2011052239A1 (ja) * 2009-11-02 2011-05-05 パナソニック株式会社 抵抗変化型不揮発性記憶装置およびメモリセルの形成方法
WO2012042897A1 (ja) * 2010-10-01 2012-04-05 パナソニック株式会社 不揮発性記憶素子の製造方法および不揮発性記憶素子
JP5270044B2 (ja) * 2010-10-01 2013-08-21 パナソニック株式会社 不揮発性記憶素子の製造方法および不揮発性記憶素子
US9018083B2 (en) 2011-05-04 2015-04-28 Hewlett-Packard Development Company, L.P. Electrically actuated device and method of controlling the formation of dopants therein
CN102214790A (zh) * 2011-06-10 2011-10-12 清华大学 一种具有自整流效应的阻变存储器
KR20150047562A (ko) * 2012-08-21 2015-05-04 마이크론 테크놀로지, 인크. 단극성 메모리 디바이스들
JP2015534259A (ja) * 2012-08-21 2015-11-26 マイクロン テクノロジー, インク. 単極メモリデバイス
KR102165139B1 (ko) * 2012-08-21 2020-10-15 마이크론 테크놀로지, 인크. 단극성 메모리 디바이스들
US10453523B2 (en) 2016-04-21 2019-10-22 Tdk Corporation Magnetic wall utilization-analog memory element and magnetic wall utilization analog memory
US10482987B2 (en) 2016-04-21 2019-11-19 Tdk Corporation Magnetic wall utilization spin MOSFET and magnetic wall utilization analog memory
US10892009B2 (en) 2016-04-21 2021-01-12 Tdk Corporation Magnetic wall utilization-analog memory element and magnetic wall utilization analog memory
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