WO2009016739A1 - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

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Publication number
WO2009016739A1
WO2009016739A1 PCT/JP2007/064998 JP2007064998W WO2009016739A1 WO 2009016739 A1 WO2009016739 A1 WO 2009016739A1 JP 2007064998 W JP2007064998 W JP 2007064998W WO 2009016739 A1 WO2009016739 A1 WO 2009016739A1
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WO
WIPO (PCT)
Prior art keywords
insulation film
gate sidewall
sidewall insulation
voltage operation
transistor
Prior art date
Application number
PCT/JP2007/064998
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English (en)
French (fr)
Inventor
Akihiro Usujima
Junichi Ariyoshi
Taiji Ema
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Fujitsu Microelectronics Limited
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Filing date
Publication date
Application filed by Fujitsu Microelectronics Limited filed Critical Fujitsu Microelectronics Limited
Priority to PCT/JP2007/064998 priority Critical patent/WO2009016739A1/ja
Priority to JP2009525231A priority patent/JP5278320B2/ja
Priority to KR1020097024631A priority patent/KR101191818B1/ko
Publication of WO2009016739A1 publication Critical patent/WO2009016739A1/ja
Priority to US12/599,431 priority patent/US8907430B2/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823418MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823437MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
    • H01L21/823456MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different shapes, lengths or dimensions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823462MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823468MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401Multistep manufacturing processes
    • H01L29/4011Multistep manufacturing processes for data storage electrodes
    • H01L29/40114Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
    • HELECTRICITY
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66825Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation
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    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42Simultaneous manufacture of periphery and memory cells
    • H10B41/49Simultaneous manufacture of periphery and memory cells comprising different types of peripheral transistor

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Drying Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

 同一基板上に、メモリトランジスタと、高電圧動作トランジスタと、低電圧動作トランジスタを有する半導体装置において、前記メモリトランジスタは、第1のゲート側壁絶縁膜(10M)と、当該第1のゲート側壁絶縁膜の外側に位置する第2のゲート側壁絶縁膜(20M)とを有し、前記高電圧動作トランジスタは、前記第1のゲート側壁絶縁膜と同一組成の第3のゲート側壁絶縁膜(10H)と、当該第3のゲート側壁絶縁膜の外側に位置し、前記第2のゲート側壁絶縁膜と同一組成の第4のゲート側壁絶縁膜(20H)とを有し、前記低電圧動作トランジスタは、前記第2及び第4のゲート側壁絶縁膜と同一組成の第5のゲート側壁絶縁膜(20L)を有する。前記低電圧動作トランジスタのトータルの側壁スペーサの幅は、前記高電圧動作トランジスタのトータルの側壁スペーサの幅よりも、前記第3のゲート側壁絶縁膜(10H)の膜厚分だけ狭い。
PCT/JP2007/064998 2007-07-31 2007-07-31 半導体装置及びその製造方法 WO2009016739A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
PCT/JP2007/064998 WO2009016739A1 (ja) 2007-07-31 2007-07-31 半導体装置及びその製造方法
JP2009525231A JP5278320B2 (ja) 2007-07-31 2007-07-31 半導体装置及びその製造方法
KR1020097024631A KR101191818B1 (ko) 2007-07-31 2007-07-31 반도체 장치 및 그 제조 방법
US12/599,431 US8907430B2 (en) 2007-07-31 2009-11-09 Semiconductor device and manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/064998 WO2009016739A1 (ja) 2007-07-31 2007-07-31 半導体装置及びその製造方法

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JP (1) JP5278320B2 (ja)
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Families Citing this family (11)

* Cited by examiner, † Cited by third party
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US9153960B2 (en) 2004-01-15 2015-10-06 Comarco Wireless Technologies, Inc. Power supply equipment utilizing interchangeable tips to provide power and a data signal to electronic devices
US8767482B2 (en) * 2011-08-18 2014-07-01 Micron Technology, Inc. Apparatuses, devices and methods for sensing a snapback event in a circuit
CN103187368B (zh) * 2011-12-31 2015-06-03 中芯国际集成电路制造(上海)有限公司 嵌入式闪存中晶体管的形成方法
US20140210012A1 (en) * 2013-01-31 2014-07-31 Spansion Llc Manufacturing of FET Devices Having Lightly Doped Drain and Source Regions
KR102008738B1 (ko) * 2013-03-15 2019-08-08 삼성전자주식회사 반도체 장치 및 그 제조 방법
CN106129009A (zh) * 2016-08-30 2016-11-16 上海华力微电子有限公司 利用侧墙结构提高存储区可靠性的方法以及闪存存储器
JP6790808B2 (ja) 2016-12-26 2020-11-25 株式会社デンソー 半導体装置およびその製造方法
US10242996B2 (en) * 2017-07-19 2019-03-26 Cypress Semiconductor Corporation Method of forming high-voltage transistor with thin gate poly
TWI685085B (zh) * 2019-02-26 2020-02-11 華邦電子股份有限公司 記憶元件及其製造方法
TWI704648B (zh) * 2019-11-20 2020-09-11 華邦電子股份有限公司 記憶體裝置的製造方法
CN113097138B (zh) * 2021-03-27 2023-04-18 长江存储科技有限责任公司 半导体器件及其制造方法

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JP2001093984A (ja) * 1999-09-20 2001-04-06 Matsushita Electronics Industry Corp 半導体装置およびその製造方法
JP2003124338A (ja) * 2001-10-09 2003-04-25 Sharp Corp 半導体装置及びその製造方法
WO2005041307A1 (ja) * 2003-10-23 2005-05-06 Fujitsu Limited 半導体装置と半導体装置の製造方法
JP2006286675A (ja) * 2005-03-31 2006-10-19 Fujitsu Ltd 不揮発性半導体記憶装置とその製造方法

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JP2001093984A (ja) * 1999-09-20 2001-04-06 Matsushita Electronics Industry Corp 半導体装置およびその製造方法
JP2003124338A (ja) * 2001-10-09 2003-04-25 Sharp Corp 半導体装置及びその製造方法
WO2005041307A1 (ja) * 2003-10-23 2005-05-06 Fujitsu Limited 半導体装置と半導体装置の製造方法
JP2006286675A (ja) * 2005-03-31 2006-10-19 Fujitsu Ltd 不揮発性半導体記憶装置とその製造方法

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Publication number Publication date
KR20100008784A (ko) 2010-01-26
KR101191818B1 (ko) 2012-10-16
US8907430B2 (en) 2014-12-09
JPWO2009016739A1 (ja) 2010-10-07
JP5278320B2 (ja) 2013-09-04
US20100308420A1 (en) 2010-12-09

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