WO2009008458A1 - 補正回路及び試験装置 - Google Patents

補正回路及び試験装置 Download PDF

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Publication number
WO2009008458A1
WO2009008458A1 PCT/JP2008/062427 JP2008062427W WO2009008458A1 WO 2009008458 A1 WO2009008458 A1 WO 2009008458A1 JP 2008062427 W JP2008062427 W JP 2008062427W WO 2009008458 A1 WO2009008458 A1 WO 2009008458A1
Authority
WO
WIPO (PCT)
Prior art keywords
waveform
signal
reversed
correction
input signal
Prior art date
Application number
PCT/JP2008/062427
Other languages
English (en)
French (fr)
Inventor
Yuji Kuwana
Naoki Matsumoto
Original Assignee
Advantest Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corporation filed Critical Advantest Corporation
Priority to KR1020107002206A priority Critical patent/KR101123825B1/ko
Priority to JP2009522663A priority patent/JP4776724B2/ja
Priority to CN2008800239119A priority patent/CN101689886B/zh
Publication of WO2009008458A1 publication Critical patent/WO2009008458A1/ja
Priority to US12/652,550 priority patent/US8531187B2/en

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31917Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31924Voltage or current aspects, e.g. driver, receiver
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31903Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31908Tester set-up, e.g. configuring the tester to the device under test [DUT], down loading test patterns
    • G01R31/3191Calibration

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Amplifiers (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

 入力信号の波形を検出する第1の検出部と、第1の検出部が検出した波形を増幅する増幅部と、増幅部が増幅した波形の交流成分を抽出して補正信号を生成する補正信号生成部と、入力信号の波形に、補正信号を重畳して、出力信号を生成する出力信号生成部とを備える補正回路を提供する。第1の検出部は、入力信号の波形及び反転波形を検出し、増幅部は、入力信号の波形及び反転波形を増幅し、補正信号生成部は、増幅部が増幅した入力信号の波形及び反転波形の交流成分をそれぞれ抽出して、補正信号及び反転補正信号を生成し、出力信号生成部は、入力信号の波形に補正信号を重畳し、入力信号の反転波形に反転補正信号を重畳して、出力信号の差動信号対を生成してよい。
PCT/JP2008/062427 2007-07-09 2008-07-09 補正回路及び試験装置 WO2009008458A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1020107002206A KR101123825B1 (ko) 2007-07-09 2008-07-09 보정 회로 및 시험 장치
JP2009522663A JP4776724B2 (ja) 2007-07-09 2008-07-09 補正回路及び試験装置
CN2008800239119A CN101689886B (zh) 2007-07-09 2008-07-09 修正电路以及测试装置
US12/652,550 US8531187B2 (en) 2007-07-09 2010-01-05 Compensation circuit and test apparatus

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007180058 2007-07-09
JP2007-180058 2007-07-09

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/652,550 Continuation US8531187B2 (en) 2007-07-09 2010-01-05 Compensation circuit and test apparatus

Publications (1)

Publication Number Publication Date
WO2009008458A1 true WO2009008458A1 (ja) 2009-01-15

Family

ID=40228629

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/062427 WO2009008458A1 (ja) 2007-07-09 2008-07-09 補正回路及び試験装置

Country Status (6)

Country Link
US (1) US8531187B2 (ja)
JP (1) JP4776724B2 (ja)
KR (1) KR101123825B1 (ja)
CN (1) CN101689886B (ja)
TW (1) TWI377353B (ja)
WO (1) WO2009008458A1 (ja)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102456592A (zh) 2010-10-15 2012-05-16 北京京东方光电科技有限公司 测试阵列基板上薄膜晶体管特性的方法和装置
FR2969426B1 (fr) * 2010-12-15 2013-08-30 St Microelectronics Sa Circuit de dephasage
US20130120010A1 (en) * 2011-11-10 2013-05-16 Qualcomm Incorporated Power Measurement System for Battery Powered Microelectronic Chipsets
CN105738789B (zh) * 2016-02-23 2018-09-28 工业和信息化部电子第五研究所 Mos管参数退化的失效预警电路
US11184091B2 (en) * 2018-03-29 2021-11-23 Rohde & Schwarz Gmbh & Co. Kg Signal generation device, spectrum analyzing device and corresponding methods with correction parameter
US11686773B1 (en) * 2022-01-25 2023-06-27 Analog Devices, Inc. Path loss compensation for comparator

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1168624A (ja) * 1997-08-08 1999-03-09 Sony Corp 等化回路
JP2001016141A (ja) * 1999-04-30 2001-01-19 General Electric Co <Ge> ビデオ画像作成システム用の可変ケーブル長補償装置
JP2004120468A (ja) * 2002-09-27 2004-04-15 Kawasaki Microelectronics Kk インプットイコライザ
WO2006028288A1 (ja) * 2004-09-09 2006-03-16 Nec Corporation 等化フィルタ回路
WO2007049674A1 (ja) * 2005-10-28 2007-05-03 Advantest Corporation ドライバ回路、試験装置及び調整方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1029875C (zh) * 1992-04-01 1995-09-27 欧林巴斯光学工业株式会社 自动增益控制回路
US7005904B2 (en) * 2004-04-30 2006-02-28 Infineon Technologies Ag Duty cycle correction
JP4772382B2 (ja) 2005-06-01 2011-09-14 株式会社アドバンテスト 任意波形発生器、試験装置、任意波形発生方法、及びプログラム

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1168624A (ja) * 1997-08-08 1999-03-09 Sony Corp 等化回路
JP2001016141A (ja) * 1999-04-30 2001-01-19 General Electric Co <Ge> ビデオ画像作成システム用の可変ケーブル長補償装置
JP2004120468A (ja) * 2002-09-27 2004-04-15 Kawasaki Microelectronics Kk インプットイコライザ
WO2006028288A1 (ja) * 2004-09-09 2006-03-16 Nec Corporation 等化フィルタ回路
WO2007049674A1 (ja) * 2005-10-28 2007-05-03 Advantest Corporation ドライバ回路、試験装置及び調整方法

Also Published As

Publication number Publication date
US8531187B2 (en) 2013-09-10
US20100190448A1 (en) 2010-07-29
TW200903000A (en) 2009-01-16
CN101689886A (zh) 2010-03-31
KR101123825B1 (ko) 2012-03-16
JPWO2009008458A1 (ja) 2010-09-09
CN101689886B (zh) 2012-12-12
JP4776724B2 (ja) 2011-09-21
TWI377353B (en) 2012-11-21
KR20100039377A (ko) 2010-04-15

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