WO2008078529A1 - 試験装置および試験方法 - Google Patents

試験装置および試験方法 Download PDF

Info

Publication number
WO2008078529A1
WO2008078529A1 PCT/JP2007/073601 JP2007073601W WO2008078529A1 WO 2008078529 A1 WO2008078529 A1 WO 2008078529A1 JP 2007073601 W JP2007073601 W JP 2007073601W WO 2008078529 A1 WO2008078529 A1 WO 2008078529A1
Authority
WO
WIPO (PCT)
Prior art keywords
failure
test
sequence
test equipment
block
Prior art date
Application number
PCT/JP2007/073601
Other languages
English (en)
French (fr)
Inventor
Satoshi Kameda
Masaru Doi
Shinya Sato
Original Assignee
Advantest Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corporation filed Critical Advantest Corporation
Priority to JP2008551019A priority Critical patent/JP5100663B2/ja
Priority to KR1020097015591A priority patent/KR101095639B1/ko
Publication of WO2008078529A1 publication Critical patent/WO2008078529A1/ja
Priority to US12/487,615 priority patent/US7945826B2/en

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/16Protection against loss of memory contents
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G11C29/56008Error analysis, representation of errors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G11C2029/5606Error catch memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

 本発明に係る試験装置は、被試験メモリの各ブロックに対応付けて、当該ブロックに不良が発生したか否かをそれぞれ示す複数のフェイル情報を記憶する不良ブロックメモリを有する。そして、被試験メモリの試験対象のページに、試験用のデータ列を書き込み、試験対象のページに書き込まれた試験用のデータ列を読み出し、読み出されたデータ列を、書き込まれたデータ列と比較する。試験装置は、また、複数のフェイル情報のそれぞれに対し、試験対象のページに不良が発生したか否かを判定する複数のフェイル条件のいずれを割り当てるかを設定する割当情報を記憶する割当レジスタを有する。そして、複数のフェイル条件のそれぞれに対応する不良が発生したか否かを検出し、検出結果をフェイル信号として出力し、試験対象のページを含むブロックに対応付けられた複数のフェイル情報のそれぞれを、割り当てられたフェイル条件に応じたフェイル信号により更新する。
PCT/JP2007/073601 2006-12-26 2007-12-06 試験装置および試験方法 WO2008078529A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2008551019A JP5100663B2 (ja) 2006-12-26 2007-12-06 試験装置および試験方法
KR1020097015591A KR101095639B1 (ko) 2006-12-26 2007-12-06 시험 장치 및 시험 방법
US12/487,615 US7945826B2 (en) 2006-12-26 2009-06-18 Test apparatus and test method

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2006-350625 2006-12-26
JP2006350625 2006-12-26

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/487,615 Continuation US7945826B2 (en) 2006-12-26 2009-06-18 Test apparatus and test method

Publications (1)

Publication Number Publication Date
WO2008078529A1 true WO2008078529A1 (ja) 2008-07-03

Family

ID=39562323

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/073601 WO2008078529A1 (ja) 2006-12-26 2007-12-06 試験装置および試験方法

Country Status (5)

Country Link
US (1) US7945826B2 (ja)
JP (1) JP5100663B2 (ja)
KR (1) KR101095639B1 (ja)
TW (1) TWI353607B (ja)
WO (1) WO2008078529A1 (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010033626A (ja) * 2008-07-25 2010-02-12 Renesas Technology Corp 半導体装置
KR20150057155A (ko) * 2013-11-18 2015-05-28 삼성전자주식회사 메모리 시스템 및 그에 따른 반도체 메모리의 결함 메모리 셀 관리방법
CN111798915A (zh) * 2019-04-02 2020-10-20 爱思开海力士有限公司 存储器***及其操作方法
CN116340191A (zh) * 2023-05-31 2023-06-27 合肥康芯威存储技术有限公司 一种存储器固件的测试方法、装置、设备及介质

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009272028A (ja) * 2008-04-07 2009-11-19 Renesas Technology Corp 半導体集積回路およびその動作方法
TW200947450A (en) * 2008-05-09 2009-11-16 A Data Technology Co Ltd Storage system capable of data recovery and method thereof
TWI395226B (zh) * 2008-11-07 2013-05-01 Silicon Motion Inc 測試儲存裝置的方法及其系統
KR20100115970A (ko) * 2009-04-21 2010-10-29 삼성전자주식회사 배드 셀 관리 방법과 그 장치
US8683456B2 (en) * 2009-07-13 2014-03-25 Apple Inc. Test partitioning for a non-volatile memory
US8650446B2 (en) * 2010-03-24 2014-02-11 Apple Inc. Management of a non-volatile memory based on test quality
US8645776B2 (en) * 2010-03-24 2014-02-04 Apple Inc. Run-time testing of memory locations in a non-volatile memory
US8411519B2 (en) * 2010-06-04 2013-04-02 Apple Inc. Selective retirement of blocks
US8751903B2 (en) 2010-07-26 2014-06-10 Apple Inc. Methods and systems for monitoring write operations of non-volatile memory
TWI459393B (zh) * 2011-01-19 2014-11-01 Phison Electronics Corp 用於非揮發性記憶體的資料寫入方法、控制器與儲存裝置
KR20150029402A (ko) 2013-09-10 2015-03-18 에스케이하이닉스 주식회사 데이터 저장 시스템 및 그것의 동작 방법
KR102070729B1 (ko) 2013-11-12 2020-03-02 삼성전자주식회사 반도체 메모리 장치 및 그것을 포함하는 메모리 시스템
CN106909318B (zh) * 2013-12-23 2020-05-08 华为技术有限公司 固态硬盘使用方法及装置
US10593421B2 (en) * 2015-12-01 2020-03-17 Cnex Labs, Inc. Method and apparatus for logically removing defective pages in non-volatile memory storage device
TWI601148B (zh) * 2016-05-05 2017-10-01 慧榮科技股份有限公司 損壞資料行的篩選方法與具有損壞資料行總表的資料儲存裝置
CN112309481B (zh) * 2019-08-02 2024-07-16 神讯电脑(昆山)有限公司 Eeprom读写检测***及其方法
US11397635B2 (en) * 2019-12-09 2022-07-26 Sandisk Technologies Llc Block quality classification at testing for non-volatile memory, and multiple bad block flags for product diversity

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08315597A (ja) * 1995-05-17 1996-11-29 Hitachi Electron Eng Co Ltd Ic試験装置
JPH10312340A (ja) * 1997-05-12 1998-11-24 Kofu Nippon Denki Kk 半導体記憶装置におけるエラー検出,訂正方式
JP2002140899A (ja) * 2000-11-01 2002-05-17 Toshiba Corp 半導体記憶装置
JP2003178600A (ja) * 2001-12-11 2003-06-27 Toshiba Corp 半導体集積回路
JP3490403B2 (ja) * 2000-03-14 2004-01-26 インターナショナル・ビジネス・マシーンズ・コーポレーション クロック周波数を設定する方法
JP2004220068A (ja) * 2003-01-09 2004-08-05 Matsushita Electric Ind Co Ltd メモリカード及びメモリへのデータ書き込み方法
JP2006139892A (ja) * 2004-11-15 2006-06-01 Advantest Corp 試験装置及び試験方法
JP3842238B2 (ja) * 2002-04-30 2006-11-08 インターナショナル・ビジネス・マシーンズ・コーポレーション メモリ・システム及びこれのテスト方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5623620A (en) 1993-06-30 1997-04-22 Intel Corporation Special test modes for a page buffer shared resource in a memory device
US5353256A (en) 1993-06-30 1994-10-04 Intel Corporation Block specific status information in a memory device
US5956473A (en) 1996-11-25 1999-09-21 Macronix International Co., Ltd. Method and system for managing a flash memory mass storage system
US6085334A (en) * 1998-04-17 2000-07-04 Motorola, Inc. Method and apparatus for testing an integrated memory device
JP4601119B2 (ja) 2000-05-02 2010-12-22 株式会社アドバンテスト メモリ試験方法・メモリ試験装置
JP2003194891A (ja) * 2001-12-28 2003-07-09 Ando Electric Co Ltd 半導体集積回路試験装置及び方法
JP4260434B2 (ja) * 2002-07-16 2009-04-30 富士通マイクロエレクトロニクス株式会社 不揮発性半導体メモリ及びその動作方法
JP2005267761A (ja) * 2004-03-19 2005-09-29 Meidensha Corp フラッシュメモリの劣化監視方法
TW200622275A (en) 2004-09-06 2006-07-01 Mentor Graphics Corp Integrated circuit yield and quality analysis methods and systems
DE112005002581T5 (de) * 2004-10-14 2007-08-30 Advantest Corp. Testvorrichtung und Testverfahren

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08315597A (ja) * 1995-05-17 1996-11-29 Hitachi Electron Eng Co Ltd Ic試験装置
JPH10312340A (ja) * 1997-05-12 1998-11-24 Kofu Nippon Denki Kk 半導体記憶装置におけるエラー検出,訂正方式
JP3490403B2 (ja) * 2000-03-14 2004-01-26 インターナショナル・ビジネス・マシーンズ・コーポレーション クロック周波数を設定する方法
JP2002140899A (ja) * 2000-11-01 2002-05-17 Toshiba Corp 半導体記憶装置
JP2003178600A (ja) * 2001-12-11 2003-06-27 Toshiba Corp 半導体集積回路
JP3842238B2 (ja) * 2002-04-30 2006-11-08 インターナショナル・ビジネス・マシーンズ・コーポレーション メモリ・システム及びこれのテスト方法
JP2004220068A (ja) * 2003-01-09 2004-08-05 Matsushita Electric Ind Co Ltd メモリカード及びメモリへのデータ書き込み方法
JP2006139892A (ja) * 2004-11-15 2006-06-01 Advantest Corp 試験装置及び試験方法

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010033626A (ja) * 2008-07-25 2010-02-12 Renesas Technology Corp 半導体装置
KR20150057155A (ko) * 2013-11-18 2015-05-28 삼성전자주식회사 메모리 시스템 및 그에 따른 반도체 메모리의 결함 메모리 셀 관리방법
KR102116364B1 (ko) * 2013-11-18 2020-05-28 삼성전자주식회사 메모리 시스템 및 그에 따른 반도체 메모리의 결함 메모리 셀 관리방법
CN111798915A (zh) * 2019-04-02 2020-10-20 爱思开海力士有限公司 存储器***及其操作方法
CN111798915B (zh) * 2019-04-02 2023-09-15 爱思开海力士有限公司 存储器***及其操作方法
CN116340191A (zh) * 2023-05-31 2023-06-27 合肥康芯威存储技术有限公司 一种存储器固件的测试方法、装置、设备及介质
CN116340191B (zh) * 2023-05-31 2023-08-08 合肥康芯威存储技术有限公司 一种存储器固件的测试方法、装置、设备及介质

Also Published As

Publication number Publication date
US7945826B2 (en) 2011-05-17
TW200839777A (en) 2008-10-01
US20090327822A1 (en) 2009-12-31
TWI353607B (en) 2011-12-01
KR101095639B1 (ko) 2011-12-19
JP5100663B2 (ja) 2012-12-19
JPWO2008078529A1 (ja) 2010-04-22
KR20090103923A (ko) 2009-10-01

Similar Documents

Publication Publication Date Title
WO2008078529A1 (ja) 試験装置および試験方法
EP2447849A3 (en) Memory system
US20080244340A1 (en) Test apparatus and selection apparatus
WO2009129174A3 (en) Apparatus and method for identifying disk drives with unreported data corruption
WO2012074554A3 (en) Transaction log recovery
WO2009095902A3 (en) Systems and methods for handling immediate data errors in flash memory
WO2009088816A3 (en) Systems and methods for well data analysis
CN101692351B (zh) 存储器测试方法及装置
TW200746155A (en) Semiconductor memory and method for testing the same
MY113861A (en) Memory testing apparatus
ATE476741T1 (de) Testvorrichtung und testverfahren
WO2007134253A3 (en) Use of alternative value in cell detection
ATE504920T1 (de) Systeme, verfahren und vorrichtungen zur verwendung desselben speichertyps zur unterstützung eines fehlerprüfungsmodus und nicht-fehlerprüfungsmodus
ATE306099T1 (de) Verfahren zur feststellung böswilligen rechnerkodes
MX2009010934A (es) Deteccion y rechazo de error para un sistema de prueba de diagnostico.
WO2008030377A3 (en) Defective block isolation in a non-volatile memory system
WO2008097617A3 (en) Mlc selected multi-program for system management
WO2002103706A3 (en) System and method for identification of faulty or weak memory cells under simulated extreme operating conditions
ATE484834T1 (de) Testapparat
CN103367189A (zh) 测试***及其测试方法
CN102700257A (zh) 墨盒墨量提示和预警方法、墨盒芯片、墨盒及成像装置
TW200743113A (en) Dynamic management method of portable data storage device
WO2008099861A1 (ja) 試験装置および試験方法
WO2008107996A1 (ja) 試験装置
CN104198921A (zh) 一种印刷电路板的测试方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 07850210

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 2008551019

Country of ref document: JP

NENP Non-entry into the national phase

Ref country code: DE

WWE Wipo information: entry into national phase

Ref document number: 1020097015591

Country of ref document: KR

122 Ep: pct application non-entry in european phase

Ref document number: 07850210

Country of ref document: EP

Kind code of ref document: A1