WO2007114033A1 - 発光素子の製造方法、化合物半導体ウェーハ及び発光素子 - Google Patents
発光素子の製造方法、化合物半導体ウェーハ及び発光素子 Download PDFInfo
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02395—Arsenides
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02433—Crystal orientation
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02461—Phosphides
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02463—Arsenides
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
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- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
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- H01L21/02365—Forming inorganic semiconducting materials on a substrate
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
Definitions
- Light emitting device manufacturing method compound semiconductor wafer, and light emitting device
- the present invention relates to a method for manufacturing a light emitting device, a compound semiconductor wafer, and a light emitting device.
- Patent Document 1 US Patent No. 5,008,718
- Patent Document 2 Japanese Patent Laid-Open No. 2004-128452
- AlGa InP mixed crystal
- AlGalnP mixed crystal where 0 ⁇ x ⁇ l, 0 ⁇ y ⁇ l; hereinafter referred to as AlGalnP mixed crystal or simply AlGalnP
- the device employs a double heterostructure in which a thin A1 GalnP active layer is sandwiched between an n-type AlGalnP cladding layer and a p-type A1 GalnP cladding layer.
- a luminance element can be realized.
- an n-type GaAs buffer layer, an n-type AlGalnP cladding layer, an AlGalnP active layer, and a p-type AlGa InP cladding layer are formed in a heterogeneous form on an n-type GaAs substrate.
- a light emitting layer portion having a double hetero structure is formed.
- Energization of the light emitting layer portion is performed through a metal electrode formed on the element surface.
- the metal electrode functions as a light shield, it is formed, for example, so as to cover only the central portion of the main surface of the light emitting layer portion, and light is extracted from the surrounding electrode non-formation region.
- MOVPE method Metal Organic Vapor Phase Epitaxy: hereinafter also referred to as MOVPE method
- HVPE method hydride vapor phase growth method
- the present invention is a method for manufacturing a light-emitting element capable of suppressing the occurrence of hillocks when forming a thick current diffusion layer using a hydride vapor phase growth method, and is used for manufacturing the light-emitting element. It is an object of the present invention to provide a compound semiconductor wafer and a light-emitting element obtained by the method for manufacturing the light-emitting element and capable of keeping the forward voltage relatively low.
- a first method of manufacturing a light-emitting device of the present invention is:
- a metal organic chemical vapor deposition process in which a light emitting layer is epitaxially grown on a single crystal substrate for growth by metal organic chemical vapor deposition
- a hydride vapor phase growth process in which a current diffusion layer is epitaxially grown on the light emitting layer portion by a hydride vapor phase growth method in this order,
- a low-speed growth layer positioned near the light-emitting layer portion of the current spreading layer and a high level following the low-speed growth layer It grows as what has a quick growth layer.
- a light-emitting element of the present invention for example, it is composed of (AI Ga) In P (where 0 ⁇ x ⁇ l, 0 ⁇ y ⁇ 1) containing two or more group III elements Single layer of light emitting layer 1 1
- MOVPE metal organic vapor phase epitaxy
- MOVPE metal organic vapor phase epitaxy
- HVPE method in a quartz reactor substituted with hydrogen gas, the vapor pressure is low, Ga (gallium) is easily vaporized by reaction with hydrogen chloride, and converted to GaCl. In this way, a group V element source gas and Ga are reacted to perform vapor phase growth of a II I-V compound semiconductor layer.
- the layer growth rate by the MOVPE method is about 1 ⁇ m / hour, while that by the HVPE method is about 20 ⁇ m / hour.
- the HVPE method can increase the layer growth rate compared to the MOVPE method, and can increase the thickness to some extent.
- the required current spreading layer can also be formed with very high efficiency, so the cost of raw materials can be kept much lower than that of the MOVPE method.
- the HVPE method does not use expensive organic metal as the group III element source, and the mixing ratio of the group V element source (AsH, PH, etc.) to the group III element source is much smaller.
- the low-growth layer of the present invention is desirably formed at a low speed enough to generate pits on the surface.
- This pit has a size that can be observed with an optical microscope or the like when the formation of the low-speed growth layer is completed.
- observation from the surface of the high-speed growth layer becomes difficult.
- the current spreading layer is made of GaP
- GaP is obtained from AlGalnP. Since it has a wide band gap, light absorption hardly occurs.
- the current spreading layer is made of GaP and the light emitting layer part is made of AlGalnP
- the lattice constant difference between GaP and AlGalnP is large, so that the HVPE method is directly applied on the light emitting layer part.
- the current diffusion layer is formed, the crystallinity of the current diffusion layer is lowered, and the light emission performance may be lowered.
- a GaP connection layer formed by a metal organic vapor phase growth method is grown as a layer following the light emitting layer, and then a GaP current diffusion layer is grown by a hydride vapor phase growth method, The crystallinity of the current spreading layer is improved, and as a result, a light emitting device having good light emitting characteristics can be obtained.
- the GaP current spreading layer is grown as a GaP slow growth layer and a GaP fast growth layer, and three layers of GaP layers with different growth methods including the connection layer are stacked to suppress hillock generation and crystallinity. Both improvement can be achieved.
- the GaP low-speed growth layer is grown as a low-speed growth layer in the hydride vapor phase growth process
- the GaP high-speed growth layer is grown as a high-speed growth layer.
- the GaP high-speed growth layer is It is desirable to grow at a higher temperature than the slow growth layer.
- a large amount of silicon impurities is substantially observed only at the interface between the GaP connection layer and the GaP slow growth layer, which is the region where the growth of the GaP layer in the HVPE method begins, and the GaP slow growth layer and the GaP fast growth layer are observed. Since almost no silicon impurities are observed at the interface of the growth layer, the gas layer growth of the GaP high-speed growth layer may be performed at a temperature higher than 800 ° C.
- a luminescent layer is grown by the MOVPE method
- group III atoms are not randomly distributed in the luminescent layer, and the atomic ordering and distribution of atoms are not desired. May cause a bias.
- Such a region in which ordering or bias occurs has a value different from the band gap energy that is originally expected, and as a result, a distribution occurs in the band gap energy of the entire light emitting layer part, and the light emitting band is not generated.
- the pectinore profile causes variations in the center wavelength.
- the ordering and bias of group III elements as described above can be greatly reduced, and a light emitting device with a uniform emission spectrum profile and center wavelength can be obtained. can get.
- a single crystal substrate to which phantomole is applied is used as the single crystal substrate for growth, there is almost no facet on the surface of the finally obtained current diffusion layer, and as a result, a current diffusion layer with good smoothness is obtained. can get.
- the growth single crystal substrate is ⁇ 100
- a GaAs single crystal substrate having a major axis with an off angle with respect to the reference direction of not less than 10 ° and not more than 20 ° with the> direction or 111> direction as a reference direction can be obtained. If a GaAs single crystal having such a high off-angle is used, the effect of smoothing the surface of the GaP current diffusion layer finally obtained by the hydride vapor phase growth process is further enhanced. When a single crystal substrate with an off-angle of 1 ° or more and less than 10 ° is used, the formation of uniform irregularities with a small facet-like amplitude is effectively prevented on the surface of the GaP current diffusion layer. Large protrusion-like crystal defects may remain, which may lead to problems such as false detection in the wire bonding process. However, if the offering is increased to a range of 10 ° or more and 20 ° or less, the occurrence of such crystal defects can be effectively suppressed.
- the electric power by the HVPE method is used.
- the growth temperature of the current diffusion layer can be greatly reduced, and the growth rate of the current diffusion layer can be further increased.
- hillocks are likely to occur as the growth rate increases, it is desirable to grow the GaP fast growth layer at a high speed after the GaP slow growth layer is formed by slow growth.
- a current diffusion layer of 100 zm or more which is difficult to grow within a realistic time range with MOVPE, has the advantage that it can be obtained relatively efficiently.
- the formation thickness of the current spreading layer (formed in the second vapor phase growth process) Is preferably 250 ⁇ m or less.
- the second method for manufacturing a light-emitting device of the present invention includes two types on a GaAs single crystal substrate having a main axis with an off angle of 10 ° or more and 20 ° or less with the ⁇ 100> direction as a reference direction. It is composed of (Al Ga) In P (where 0 ⁇ x ⁇ 1 and 0 ⁇ y ⁇ 1) containing the above group III elements
- a GaP low-speed growth layer is grown in contact with the GaP connection layer, and a GaP high-speed growth layer is subsequently grown at a higher speed than the GaP low-speed growth layer.
- the thickness from the GaP connection layer to the GaP high-speed growth layer is 100 ⁇ m or more and 250 ⁇ m or less.
- the compound semiconductor wafer of the present invention that can be used in the above production method is:
- the Ga As single crystal substrate having a main axis with an off angle of 10 ° or more and 20 ° or less with the 100> direction as the reference direction, it contains two or more group III elements (Al Ga) In P (where 0 ⁇ x
- GaP connection layer by metal organic chemical vapor deposition a GaP slow growth layer by hydride vapor deposition
- GaP slow growth layer a GaP slow growth layer by hydride vapor deposition
- the GaP high-speed growth layer grown at a high speed is laminated in this order, and the thickness from the GaP connection layer to the GaP high-speed growth layer is 100 ⁇ m or more and 250 ⁇ m or less.
- the compound semiconductor wafer of the present invention is a (Al Ga) In P (where 0 ⁇ x ⁇ 1 and 0 ⁇ y ⁇ 1) containing two or more Group III elements on a GaAs single crystal substrate with a main axis of 10 ° to 20 °
- the light-emitting layer composed of
- the surface of the GaP current diffusion layer is smooth and the generation of crystal defects with large amplitude is suppressed, and the GaP connection layer formed by metalorganic vapor phase epitaxy and the hydride vapor phase are formed.
- the GaP slow growth layer and the GaP fast growth layer are stacked in this order by the growth method, even if the GaP connection layer force has a thickness of 100 ⁇ m to 250 ⁇ m, It is possible to have a GaP current spreading layer that is excellent in performance and in which the generation of hillocks is suppressed. In this case, it is desirable that pits are formed on the surface of the GaP slow growth layer.
- the thickness of the GaP high-speed growth layer is preferably 100 x m or more.
- the light emitting device of the present invention is a light emitting layer composed of (AlGa) InP (where 0 ⁇ x ⁇ l, 0 ⁇ y ⁇ l) containing two or more group III elements
- the thickness from the GaP connection layer to the GaP high-speed growth layer is 100 ⁇ m or more and 250 ⁇ m or less.
- the crystallinity in the vicinity of the interface between the GaP connection layer and the GaP current spreading layer can be improved. Impurity uptake concentration at the interface between GaN and GaP current diffusion layer can also be reduced. As a result, the forward voltage of the light emitting element can be reduced.
- the thickness of the GaP slow growth layer is preferably 5 ⁇ m or more and 50 ⁇ m or less.
- the GaP slow growth layer thickness is less than 5 ⁇ m, the forward voltage reduction effect may not be fully achieved. On the other hand, even if the thickness of the GaP slow growth layer is increased beyond 50 x m, the effect is saturated and unnecessary cost increases may occur.
- FIG. 1 is a schematic diagram showing an example of a light emitting element of the present invention in a laminated structure.
- FIG. 2 is an explanatory view showing a manufacturing process of the compound semiconductor wafer of the present invention.
- FIG. 3 is an explanatory diagram following FIG.
- FIG. 1 is a conceptual diagram showing an example of a light emitting device 100 that can be manufactured by the manufacturing method of the present invention.
- a light emitting layer portion 24 is formed on a first main surface of an n-type GaAs single crystal substrate (hereinafter also simply referred to as a substrate) 1 as a growth single crystal substrate.
- the substrate 1 has a main axis A with a ⁇ 100> direction as a reference direction and an off-angle with respect to the reference direction of 10 ° or more and 20 ° or less (the main axis A is similar in terms of the 111> direction). It may have an off-hand nore).
- An n-type Ga As buffer layer 2 is formed in contact with the first main surface of the substrate 1, and a light emitting layer portion 24 is formed on the buffer layer 2. Then, a GaP connection layer 7p and a current diffusion layer 7 are formed on the light emitting layer portion 24, and a first light application voltage for applying a light emission driving voltage to the light emitting layer portion 24 is formed on the current spreading layer 7. Electrode 9 is formed. Similarly, the second electrode 20 is formed on the entire surface of the substrate 1 on the second main surface side. The first electrode 9 is formed substantially at the center of the first main surface, and the area around the first electrode 9 is a light extraction area from the light emitting layer portion 24. A bonding pad 16 made of Au or the like for bonding the electrode wire 17 is disposed at the center of the first electrode 9.
- the light emitting layer portion 24 is non-doped (AlGa) InP (where 0 ⁇ x ⁇ 0.55, 0.45 ⁇ y
- Active layer 5 made of mixed crystal is made of p-type (AlGa) InP (where x ⁇ z ⁇ 1).
- non-dope as used herein means “do not actively add dopant”, and it contains a dopant component inevitably mixed in the normal manufacturing process (for example, 10 13 to: 10 16 / cm 3 to a maximum extent) is not excluded also.
- the current spreading layer 7 is formed as a p-type GaP layer in which the dopant is Zn.
- the thickness of the current spreading layer 7 is, for example, lOO xm or more and 250 xm or less.
- the current diffusion layer 7 is formed by stacking a GaP slow growth layer 7a and a GaP fast growth layer 7b in this order by a hydride vapor phase growth method.
- the thickness of the GaP slow growth layer 7a is, for example, 5 ⁇ m or more and 50 ⁇ m or less, and G
- the thickness of the aP high-speed growth layer 7b is, for example, 100 ⁇ m or more.
- the Zn content concentration was made higher than the remaining portion in the current diffusion layer 7 by additional diffusion of Zn.
- a high-concentration doping layer 8 is formed (see Fig. 3).
- the Zn carrier concentration in the current spreading layer 7 is, for example, 2 X 10 18 / cm 3 or more and 5 X 10 19 / cm 3 or less in the high-concentration doping layer 8, and 1 X 10 in portions other than the high-concentration doping layer 8. 17 Zcm 3 or more 2 X 10 18 Zcm 3 or less However, the high-concentration doping layer 8 can be omitted.
- the dopant-containing concentration and the H concentration in each layer are those measured by secondary ion mass spectrometry (SIMS).
- SIMS secondary ion mass spectrometry
- the carrier concentration can be specified by well-known conductivity measurement.
- the GaP connection layer 7p, the GaP slow growth layer 7a, and the GaP fast growth layer 7b are formed of the same compound semiconductor (specifically, GaP), but they are different from each other. It can also be formed of a compound semiconductor.
- the first layer 7p is GaAsP (the band gap energy is larger than the light energy corresponding to the peak emission wavelength of the light emitting layer), and the second layer 7a and the third layer 7b are GaP. It is also possible.
- a p-type dopant is added to each of the GaP connection layer 7p, the GaP slow growth layer 7a, and the GaP fast growth layer 7b.
- Zn can be used for all of 7p, 7a, and 7b as in this embodiment.
- the dopant of the first layer 7p formed by MOVPE is applied to the p-type cladding layer 6 side. Even if Mg and / or C is less likely to cause diffusion, and the dopant of the second layer 7a and the third layer 7b formed by HVPE is Zn.
- a GaAs single crystal substrate 1 having a main axis with an off angle of 10 ° or more and 20 ° or less with the 100> direction as a reference direction is prepared.
- the n-type GaAs buffer layer 2 is, for example, 0.5 ⁇ m on the first main surface of the substrate 1, and then the light emitting layer portion 24 is made of (AlGa) InP. 1 ⁇ m ⁇ -type cladding layer
- n-type dopant is Si
- 0.6 ⁇ m active layer non-doped
- 1 ⁇ m ⁇ -type cladding layer 6 ⁇ -type GaP connection layer 7 ⁇
- ⁇ -type dopant is Mg: from organometallic molecules C can also contribute as a ⁇ -type dopant) in this order (organic metal vapor phase epitaxy).
- MOVPE method The epitaxial growth of each of these layers is performed by a known MOVPE method.
- the following materials can be used as source gases for Al, Ga, In (indium), and P (phosphorus) component sources;
- A1 source gas trimethylaluminum (TMA1), triethylaluminum (TEA1), etc.
- Ga source gas trimethylgallium (TMGa), triethylgallium (TEGa), etc.
- In source gas trimethylindium (TMIn), trie Chill indium (TEIn) etc.
- P source gas trimethyl phosphor (TMP), triethyl phosphor (TEP), phosphine (PH), etc.
- a p-type GaP slow growth layer 7a and a GaP fast growth layer 7b are grown by the HVPE method directly on the p-type GaP connection layer 7p (hydride vapor phase growth step).
- the growth rate of the GaP low-speed growth layer 7a is set lower than that of the GaP high-speed growth layer 7b. More specifically, the GaP slow growth layer 7a is formed at a growth rate of not less than lZlO and not more than 1/2 of the GaP fast growth layer 7b. Since the GaP slow growth layer 7a is formed at a considerably low speed, the supply amount of the raw material is greatly suppressed than usual, and pits are observed on the surface of the grown layer.
- the substrate 1 is not taken out from the hydride vapor phase growth apparatus between the GaP slow growth layer 7a and the GaP fast growth layer 7b, but once the substrate 1 is taken out from the hydride vapor growth apparatus, this pit can be observed. it can.
- the GaP slow growth layer 7a grows at a temperature of 700 ° C or higher and 800 ° C or lower.
- the GaP fast growth layer 7b grows at a higher temperature than the GaP slow growth layer 7a, so that a higher growth rate can be easily secured.
- the thickness from GaP connection layer 7p to GaP fast growth layer 7b is 100 ⁇ m or more and 250 ⁇ m or less
- GaP slow growth layer 7a is 5 ⁇ m or more and 50 ⁇ m or less
- GaP fast growth A compound semiconductor wafer 200 having a surface state in which the thickness of the layer 7b is 100 ⁇ or more and the generation of hillocks and pits is suppressed can be obtained.
- Step 4 the compound semiconductor wafer 200 is transferred to another container and heated at, for example, 650 to 750 ° C (eg, 700 ° C), and the Group V element A vapor of a compound (Zn As, Zn P, etc.) is circulated and vacuum diffusion is performed. Then Z
- the n component is additionally diffused in the electrode forming side portion of the GaP high-speed growth layer 7b, and the high-concentration doping layer 8 is formed.
- the first electrode 9 and the second electrode 20 are formed by vacuum deposition. Further, a bonding pad 16 is disposed on the first electrode 9, and baking for electrode fixing is performed at an appropriate temperature. Then, the second electrode 20 is fixed to a terminal electrode (not shown) that also serves as a support by using a conductive paste such as an Ag paste, while the Au wire 17 is formed so as to straddle the bonding pad 16 and another terminal electrode.
- the light emitting device 100 is obtained by bonding and further forming a resin mold.
- the GaP connection layer 7p may be omitted.
- the GaAs single crystal substrate 1 on the second main surface side of the light emitting layer portion 24 may be removed by etching or grinding (for example, after step 3 in FIG. 3), and a transparent conductive substrate such as GaP may be bonded.
- a current diffusion layer (and connection layer) similar to the first main surface side may be grown. As the growth process, it is possible to adopt the same process as that on the first main surface side.
- a compound semiconductor wafer 200 shown in FIG. 3 is formed so that each layer has the following thickness.
- a GaAs single crystal substrate having a ⁇ 100> direction as a reference direction and an off-angle with respect to the reference direction set to about 15 ° is used.
- n-type AlGalnP clad layer 4, A1G alnP active layer 5, p-type AlGalnP clad layer 6, GaP connection layer 7p are formed using MOVPE equipment (metal organic vapor phase growth process), GaP slow growth layer 7a and GaP fast growth
- the layer 7b is formed in a hydrogen atmosphere at about 760 ° C. using a halide vapor phase growth apparatus (hydride vapor phase growth step) to obtain the compound semiconductor wafer 200.
- the GaP slow growth layer 7a is formed at a growth rate of about 6 ⁇ m / hour
- the GaP fast growth layer 7b is formed at a growth rate of about 20 ⁇ m / hour.
- the thickness of each layer is as follows.
- n-type AlGalnP cladding layer 4 1 ⁇ m
- AlGalnP active layer 5 0.6 ⁇ m (emission wavelength 650 nm);
- GaP slow growth layer 7a 10 / i m
- GaP high-speed growth layer 7b 150 im
- a compound semiconductor wafer was manufactured by carrying out the organometallic vapor phase growth step and the hydride vapor phase growth step in the same manner as in Example 1 except that the GaP slow growth layer 7a was changed to 2 ⁇ m. .
- the GaP slow growth layer 7a was changed to 2 ⁇ m.
- the forward voltage Vf at 20 mA was about 1% higher than that in Example 1.
- a compound semiconductor wafer subjected to a metal organic vapor phase growth step and a hydride vapor phase growth step was manufactured under the same conditions as in Example 1 except that the GaP slow growth layer 7a was not formed.
- the main surface of the obtained GaP current diffusion layer was visually observed under a fluorescent lamp, hillock force S was generated on the entire surface.
- the forward voltage Vf at 20 mA was about 1% higher than that in Example 1.
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Abstract
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Priority Applications (5)
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EP07738921.1A EP2009706B1 (en) | 2006-03-31 | 2007-03-19 | Method for manufacturing light emitting element, compound semiconductor wafer |
KR1020087024044A KR101288064B1 (ko) | 2006-03-31 | 2007-03-19 | 발광소자의 제조방법, 화합물 반도체 웨이퍼 및 발광소자 |
JP2008508495A JP4873381B2 (ja) | 2006-03-31 | 2007-03-19 | 発光素子の製造方法、化合物半導体ウェーハ及び発光素子 |
CN2007800111801A CN101410996B (zh) | 2006-03-31 | 2007-03-19 | 发光元件的制造方法、化合物半导体晶圆及发光元件 |
US12/295,522 US7867803B2 (en) | 2006-03-31 | 2007-03-19 | Method of fabricating light emitting device and compound semiconductor wafer and light emitting device |
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JP2006099231 | 2006-03-31 | ||
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EP (1) | EP2009706B1 (ja) |
JP (1) | JP4873381B2 (ja) |
KR (1) | KR101288064B1 (ja) |
CN (1) | CN101410996B (ja) |
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WO (1) | WO2007114033A1 (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
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WO2009048056A1 (ja) * | 2007-10-10 | 2009-04-16 | Shin-Etsu Handotai Co., Ltd. | 化合物半導体エピタキシャルウェーハおよびその製造方法 |
JP2010109283A (ja) * | 2008-10-31 | 2010-05-13 | Shin Etsu Handotai Co Ltd | 化合物半導体エピタキシャルウェーハの製造方法、化合物半導体エピタキシャルウェーハ及び発光素子 |
JP2012253388A (ja) * | 2012-09-14 | 2012-12-20 | Toshiba Corp | 半導体発光素子 |
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DE102017104719A1 (de) * | 2017-03-07 | 2018-09-13 | Osram Opto Semiconductors Gmbh | Strahlungsemittierender Halbleiterkörper und Halbleiterchip |
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- 2007-03-19 WO PCT/JP2007/055476 patent/WO2007114033A1/ja active Application Filing
- 2007-03-19 EP EP07738921.1A patent/EP2009706B1/en not_active Expired - Fee Related
- 2007-03-19 CN CN2007800111801A patent/CN101410996B/zh not_active Expired - Fee Related
- 2007-03-19 KR KR1020087024044A patent/KR101288064B1/ko not_active IP Right Cessation
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Publication number | Publication date |
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EP2009706A4 (en) | 2013-01-23 |
JPWO2007114033A1 (ja) | 2009-08-13 |
US7867803B2 (en) | 2011-01-11 |
JP4873381B2 (ja) | 2012-02-08 |
KR101288064B1 (ko) | 2013-07-22 |
CN101410996A (zh) | 2009-04-15 |
CN101410996B (zh) | 2010-12-29 |
EP2009706A1 (en) | 2008-12-31 |
US20090302335A1 (en) | 2009-12-10 |
TWI389338B (zh) | 2013-03-11 |
TW200805709A (en) | 2008-01-16 |
EP2009706B1 (en) | 2015-12-30 |
KR20090018778A (ko) | 2009-02-23 |
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