TW200541115A - Group Ⅲ nitride semiconductor light-emitting device - Google Patents

Group Ⅲ nitride semiconductor light-emitting device Download PDF

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TW200541115A
TW200541115A TW94113603A TW94113603A TW200541115A TW 200541115 A TW200541115 A TW 200541115A TW 94113603 A TW94113603 A TW 94113603A TW 94113603 A TW94113603 A TW 94113603A TW 200541115 A TW200541115 A TW 200541115A
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germanium
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TWI263361B (en
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Hisayuki Miki
Akira Bando
Takashi Udagawa
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Showa Denko Kk
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Abstract

A Group III nitride semiconductor light-emitting device provided on a crystal substrate with an n-type and p-type Group III nitride semiconductor of AlXGaYInZN1-aMa, wherein 0≤X≤1, 0≤Y≤1, 0≤Z≤1, X+Y+Z=1, M denotes a Group V element other than N and 0≤a<1, includes an n-type electrode contact layer of Group III nitride semiconductor including a region doped with Ge and a light-emitting layer including a region undoped or doped with at least one element selected from the group consisting of Si, C, Sn and Pb.

Description

200541115 ‘ 九、發明說明: 【發明所屬之技術領域】 本發明係有關η型接觸層設有摻鍺區的瓜族氮化物半導 體發光裝置。 【先前技術】 m族氮化物半導體向來係作爲用於形成諸如發出短波 長可見光之發光二極體(LED )與雷射二極體(LD )之pn 接面結構之m族氮化物半導體發光裝置的功能材料(參考 φ 諸如JP-A 2000-332364)。在於近紫外光帶、藍光帶或綠光 帶發光之LED的結構中,諸如n型或p型氮化鋁鎵 (AhGa、'N: OSX,YS 1,X+Y=l)係用於形成發光裝置的 覆層(參考諸如JP-A 2003-229645)。其次,氮化鎵銦 (GaYInzN: 0SY,ZS1,Y+Z=l)係用於形成發光裝置的 主動層(發光層)(參考諸如JP-BSH0 55-3834)。 在習用的m族氮化物半導體發光裝置中,其發光層通常 具有η型或P型瓜族氮化物半導體接合於其上。爲達獲高 $ 強度發光的目的,希冀將這些薄層以異質接面結構形成發 光部位。爲以雙異質(DH )接面結構形成發光部位,向來 係慣於形成諸如GaYInzN(0SY,ZSl,Y+Z=l)發光層’ 並具有作爲覆層的η型或ρ型1Π族氮化物半導體接合於其 上(參考諸如IsamuAkasaki所著並由Baifukan(K.K.)發 行之 “Group ΠΙ-V Compound Semiconductors” ,5 月 2〇 曰,1995,第 13 章)。 希冀形成η型電極的接觸層向來由諸如摻有矽的m族氮 化物半導體所單獨形成。已可使用諸如藉由調整矽摻雜纛 200541115 而控制電阻率的η型AlxGaYN(0SX,YSl,X+Y=l)層 (參考諸如日本專利Ν 〇 · 3 3 8 3 2 4 2 )。 相似地,亦使用矽作爲摻雜主動層的供體元素。使用比 較上爲厚膜之InGaN層作爲發光層之所謂的共摻雜結構係 摻有形成發光中心的鋅及額外摻入的矽(參考諸如]P-A Η EI 8 - 3 1 6 5 2 8 )。此外,在使用量子井結構的狀況中,已提 出將井層摻雜並將阻障層摻雜。在這些文獻所提及的裝置 中,矽主要作爲發光層的摻質(參考諸如JP-A ΗΕΙ 8-26483 1 φ 及JP-A HEI 9-3 6423 )。然而,矽向來係作爲η型電極接觸 層(或稱爲“ η型接觸層”)的摻質,而迄今尙未有使用 矽摻雜主動層於摻鍺η型接觸層上的狀況。 鍺(Ge)向來爲熟知的η型摻質(參考諸如:[Ρ-Α ΗΕΙ 4- 1 703 97 )。然而,相較於矽,鍺的摻雜效率不佳(參考 諸如 Jpn· J. Appl. Phys·,31(9Α)( 1 992),2 8 8 3 ),因而被評 比爲不利於製造低電阻率η型]I[族氮化物半導體層。此 外,當η型m族氮化物半導體層摻至高濃度的鍺時便保有 φ 該狀態,該摻雜使得薄層表面具有會損傷平坦度的坑洞(參 考諸如 “Group HI Nitride Semiconductor Compounds,” Clarendon Press ( Oxford),1998,第 104 頁)。 在m族氮化物半導體中,摻入時具有n型導電性之諸如 矽與鍺的IV族元素被認爲可以置換晶體中之ΠΙ族元素的方 式存在。在諸如氮化鎵中,其可置換鎵(Ga)。因爲鍺原子 半徑大,與通常作爲η型摻質的矽相比,並幾近於鎵,所 以縱使當鍺摻入晶體時,也不會造成瓜族氮化物半導體晶 體的晶格常數的變化。此舉確信爲有助益的,因爲形成於 200541115 η型接觸層上之主動層(發光層)的結晶度不會下降。 本發明人已發現當η型電極接觸層包含作爲摻質的鍺, 且發光層摻有元素Si、C、 Sn、 Pb之一時,HI族氮化物 半導體發光裝置的發光輸出會增加。本發明已根據該見解 而完成。 本發明之目的在於提供具鍺作爲摻質之HI族氮化物半 導體的發光裝置,該發光裝置具極佳發光輸出且未損及發 光層平坦度及結晶度。 【發明內容】 -發明之揭示 根據本發明的m族氮化物半導體發光裝置設於具有η型 與Ρ型1[族氮化物半導體AlxGaylnzNhMa(其中0SXS1, 0SYS1,0SZS1,Χ+Υ+Ζ=1,Μ代表氮以外的V族元 素,以及OS a&lt; 1 )的結晶基板上,以及包含具摻鍺(Ge) 區之瓜族氮化物半導體的η型電極接觸層與具未摻雜或摻 入選自Si、C、Sn及Pb所組成之族群中之至少一種元素的 區域的發光層。 在該ΠΙ族氮化物半導體發光裝置中,ΠΙ族氮化物半導體 的η型電極接觸層設有低鍺原子濃度層及摻鍺原子的高鍺 原子濃度層。 在該瓜族氮化物半導體發光裝置中,低鍺原子濃度層爲 摻鍺原子的低鍺原子濃度層或未摻雜層。 在該m族氮化物半導體發光裝置中,η型電極接觸層由 低鍺原子濃度層與高鍺原子濃度層交錯堆疊的結構形成。 在該ΠΙ族氮化物半導體發光裝置中,高鍺原子濃度層的 200541115 厚度小於低鍺原子濃度層。 在該m族氮化物半導體發光裝置中’高鍺原子濃度層具 有含凹面坑洞的表面。 在該Μ族氮化物半導體發光裝置中’當厚度爲l〇nm或 更大時,高鍺原子濃度層表面具有lxl〇5至lxl〇1()/cm2範圍 的坑洞數。 本發明包含低鍺原子濃度層表面具有1 〇埃或更小(以 Ra計算)之平坦度的事實。 本發明包含前揭摻鍺瓜族氮化物半導體層中之鍺原子 濃度不少於lxl017cnT3但不超過lxl〇2°cm_3的事實。 在該ΠΙ族氮化物半導體發光裝置中,發光層具有多量子 井結構。 在該m族氮化物半導體發光裝置中,發光層區域摻有 矽,並爲多量子井結構的阻障層。 在該瓜族氮化物半導體發光裝置中,發光層區域摻有 矽,並真有5xl016cm·3或更多至lxl019cm_3或更少的矽原子 濃度。 根據本發明,藉由使m族氮化物半導體發光裝置的η型 電極接觸層含鍺作爲摻質並使發光層摻入Si、C、Sn及 Pb 中之至少一種元素,便得以獲得具極佳結晶度與發光輸出 強度且未損及半導體層平坦度的發光裝置。 相較於摻入濃度無變化之鍺所形成的薄膜,使用本發明 所揭技術而製造的η型m族氮化物半導體層具有低電阻率 及極佳表面平坦度’並可避免形成於其上之發光層的結晶 度。藉由形成微細坑洞於經乾式蝕刻的表面上便得以與電 200541115 構縱 結 C 。 置面性 裝界特 爲變的 作遽整 鍺成完 用形變 使間遽 , 層面 Ifct雜界 因摻持 I未保 散與有 。 擴 層具 率d雜仍 阻體摻置 電ABHH在裝 觸K以該 接1得,1 的不便化式 好⑸質老方 良較摻生施 有錯的發實 極 中使 ί 執行本發明的最佳模式 本發明的發光裝置爲m族氮化物半導體發光裝置設於 具有AlxGaYlnzNi.aMa之η型與p型]Π族氮化物半導體(其 鲁中 0SXS 卜 〇SY$l,〇SZ$ 卜 Χ+Υ+Ζ=1,Μ 代表氮(Ν) 以外的V族元素,以及0 S a &lt; 1 )的結晶基板上,以及包含 具摻鍺區之m族氮化物半導體的η型電極接觸層與具未摻 雜或摻入選自S i、C、S η及Pb所組成之族群中之至少一種 元素的區域的發光層。 η型電極接觸層最好具有週期性變化的鍺濃度或具有週 期性堆疊的摻鍺區與未摻雜區。 在前揭本發明發光裝置中,含鍺原子於本發明η型接觸 層中及兀素Si、C、Sn及Pb中之至少一種於發光層中的瓜 族氮化物半導體裝置係形成於由藍寶石(α -Al2〇3單晶)、 氧化鋅(ZnO)或氧化鎵鋰(GaLiOO、或諸如矽單晶或立方或 六方碳化矽(SiC)之IV族半導體單晶所組成的基板上。於基 板之材料’ m - v族化合物半導體單晶材料,如磷化鎵(Gap) 及砷化鎵(GaAs)亦可取得。由氮化鎵晶體形成的單晶基板 係包含於其中。可爲發光層的光所穿透的透光單晶材料可 有效作用爲基板。 爲將氮化鎵系化合物半導體堆疊於非與GaN系化合物 200541115 ^ 晶格失配且非GaN基板的前揭基板上,可使用曰本專利200541115 ‘Nine, description of the invention: [Technical field to which the invention belongs] The present invention relates to a guar nitride semiconductor light-emitting device having a germanium-doped region in an n-type contact layer. [Prior art] The m-type nitride semiconductor has been used as a m-type nitride semiconductor light-emitting device for forming a pn junction structure such as a light emitting diode (LED) and a laser diode (LD) emitting short-wavelength visible light. Functional materials (refer to φ such as JP-A 2000-332364). In the structure of LEDs emitting light in the near-ultraviolet band, blue band, or green band, such as n-type or p-type aluminum gallium nitride (AhGa, 'N: OSX, YS 1, X + Y = 1) is used to form Coating of a light emitting device (refer to, for example, JP-A 2003-229645). Secondly, indium gallium nitride (GaYInzN: 0SY, ZS1, Y + Z = 1) is used to form an active layer (light emitting layer) of a light emitting device (refer to, for example, JP-BSH0 55-3834). In a conventional m-type nitride semiconductor light-emitting device, the light-emitting layer usually has an n-type or P-type melons nitride semiconductor bonded thereto. In order to achieve the purpose of high-intensity light emission, it is hoped that these thin layers will form light-emitting sites with a heterojunction structure. In order to form a light-emitting site with a double heterostructure (DH) junction structure, it has always been used to form a light-emitting layer such as GaYInzN (0SY, ZSl, Y + Z = 1), and it has a η-type or ρ-type 1Π nitride as a coating. Semiconductors are bonded thereto (refer to, for example, "Group II-V Compound Semiconductors" by Isamu Akasaki and issued by Baifukan (KK), May 20, 1995, Chapter 13). It is hoped that the contact layer for forming the n-type electrode is conventionally formed of, for example, a m-type nitride semiconductor doped with silicon. It has been possible to use an n-type AlxGaYN (OSX, YSl, X + Y = 1) layer such as controlling resistivity by adjusting silicon doped 纛 200541115 (refer to, for example, Japanese Patent No. 3 · 3 3 3 2 4 2). Similarly, silicon is also used as the donor element of the doped active layer. A so-called co-doped structure using a thicker InGaN layer as the light-emitting layer is doped with zinc that forms a light-emitting center and additionally doped silicon (refer to, for example, P-A Η EI 8-3 1 6 5 2 8). In addition, in the case where a quantum well structure is used, it has been proposed to dope a well layer and a barrier layer. In the devices mentioned in these documents, silicon is mainly used as a dopant for the light emitting layer (refer to, for example, JP-A ΕΕ 8-26483 1 φ and JP-A HEI 9-3 6423). However, silicon has always been used as a dopant for the n-type electrode contact layer (also referred to as "n-type contact layer"). So far, no active silicon-doped layer has been used on the germanium-doped n-type contact layer. Germanium (Ge) has always been a well-known n-type dopant (refer to, for example, [P-Α ΗΕΙ 4- 1 703 97). However, compared to silicon, the doping efficiency of germanium is poor (refer to, for example, Jpn · J. Appl. Phys ·, 31 (9A) (1 992), 2 8 8 3), so it is evaluated as not good for manufacturing low resistance Rate n-type] I [group nitride semiconductor layer. In addition, when the n-type m group nitride semiconductor layer is doped with high concentration of germanium, the state of φ is maintained. This doping makes the surface of the thin layer have pits that can damage flatness (refer to, for example, "Group HI Nitride Semiconductor Compounds," Clarendon Press (Oxford), 1998, p. 104). In a group m nitride semiconductor, a group IV element such as silicon and germanium, which has n-type conductivity when doped, is considered to exist in a manner that can replace a group III element in the crystal. In, for example, gallium nitride, it can replace gallium (Ga). Because the germanium atom has a large radius, it is almost gallium compared to silicon usually used as an n-type dopant. Therefore, even when germanium is doped into the crystal, the lattice constant of the cucurbit nitride semiconductor crystal does not change. This is believed to be helpful because the crystallinity of the active layer (light-emitting layer) formed on the 200541115 n-type contact layer will not decrease. The present inventors have found that when the n-type electrode contact layer contains germanium as a dopant and the light emitting layer is doped with one of the elements Si, C, Sn, and Pb, the light output of the HI group nitride semiconductor light emitting device increases. The present invention has been completed based on this knowledge. An object of the present invention is to provide a light-emitting device having germanium as a doped HI group nitride semiconductor, the light-emitting device having excellent light output without impairing the flatness and crystallinity of the light-emitting layer. [Summary of the Invention]-Disclosure of the invention The m-nitride semiconductor light-emitting device according to the present invention is provided with n-type and P-type 1 [group nitride semiconductor AlxGaylnzNhMa (where 0SXS1, 0SYS1, 0SZS1, χ + Υ + Z = 1, M represents a group V element other than nitrogen, and on a crystalline substrate of OS a &lt; 1), and an n-type electrode contact layer containing a cucurbit nitride semiconductor with a germanium (Ge) doped region and an undoped or doped selective A light-emitting layer from a region of at least one element in a group consisting of Si, C, Sn, and Pb. In this III-nitride semiconductor light-emitting device, the n-type electrode contact layer of the III-nitride semiconductor is provided with a low germanium atom concentration layer and a germanium atom-doped high germanium atom concentration layer. In this melon nitride semiconductor light-emitting device, the low germanium atomic concentration layer is a germanium doped low germanium atomic concentration layer or an undoped layer. In this m-type nitride semiconductor light emitting device, the n-type electrode contact layer is formed by a structure in which a low germanium atomic concentration layer and a high germanium atomic concentration layer are staggered. In this III-nitride semiconductor light-emitting device, the 200541115 thickness of the high germanium atomic concentration layer is smaller than that of the low germanium atomic concentration layer. In this m-nitride semiconductor light-emitting device, the 'high germanium atomic concentration layer has a surface containing concave pits. In this group M nitride semiconductor light emitting device, when the thickness is 10 nm or more, the surface of the high germanium atomic concentration layer has a number of pits in the range of 1x105 to 1x101 () / cm2. The present invention includes the fact that the surface of the low germanium atomic concentration layer has a flatness of 10 angstroms or less (calculated as Ra). The invention includes the fact that the concentration of germanium atoms in the germanium-doped melons nitride semiconductor layer is not less than lxl017cnT3 but not more than lxl02 ° cm_3. In this III-nitride semiconductor light-emitting device, the light-emitting layer has a multiple quantum well structure. In this m-type nitride semiconductor light-emitting device, the light-emitting layer region is doped with silicon and is a barrier layer with a multiple quantum well structure. In this melon nitride semiconductor light-emitting device, the light-emitting layer region is doped with silicon and really has a silicon atom concentration of 5xl016cm · 3 or more to lxl019cm_3 or less. According to the present invention, by making the n-type electrode contact layer of the m-type nitride semiconductor light-emitting device contain germanium as a dopant and doping the light-emitting layer with at least one element of Si, C, Sn, and Pb, excellent performance can be obtained A light-emitting device having crystallinity and light-emitting output intensity without impairing the flatness of a semiconductor layer. Compared with a thin film formed by doping germanium with no change in concentration, the n-type m group nitride semiconductor layer manufactured using the disclosed technology has low resistivity and excellent surface flatness, and can be prevented from being formed thereon. The crystallinity of the light-emitting layer. By forming fine pits on the dry-etched surface, it is possible to form a junction C with electricity 200541115. Facetability The installation boundary is specially changed. The germanium is completed. The deformation is used to make the boundary. The Ifct boundary on the surface is not kept due to the inclusion of I. The expansion rate is d, the resistance is still mixed with the resistor, and the ABHH is used to contact K to obtain 1 and 1 inconvenience. The quality of the old Fang Liang is better than that of the founder that is incorrect. Best Mode The light-emitting device of the present invention is a m-type nitride semiconductor light-emitting device provided with η-type and p-type AlxGaYlnzNi.aMa] group III-nitride semiconductors (which are 0SXS, SY $ 1, 〇SZ $, etc. X + Υ + Z = 1, where M represents a Group V element other than nitrogen (N), and a n-type electrode contact including a m-type nitride semiconductor with a germanium-doped region on a crystalline substrate of 0 S a &lt; 1) A layer and a light emitting layer having a region which is undoped or doped with at least one element selected from the group consisting of Si, C, Sη, and Pb. The n-type electrode contact layer preferably has a periodically varying germanium concentration or has a germanium-doped region and an undoped region that are periodically stacked. In the light-emitting device of the present invention, a melon nitride semiconductor device containing germanium atoms in the n-type contact layer of the present invention and at least one of Si, C, Sn, and Pb in the light-emitting layer is formed of sapphire (Α-Al203 single crystal), zinc oxide (ZnO) or lithium gallium oxide (GaLiOO), or a group IV semiconductor single crystal such as silicon single crystal or cubic or hexagonal silicon carbide (SiC). On the substrate The materials of the m-v group compound semiconductor single crystal materials, such as gallium phosphide (Gap) and gallium arsenide (GaAs), are also available. Single crystal substrates made of gallium nitride crystals are included. It can be a light emitting layer The light-transmitting single-crystal material penetrated by light can effectively function as a substrate. In order to stack a gallium nitride-based compound semiconductor on a front-uncovered substrate that does not match the GaN-based compound 200541115 ^ and has a non-GaN substrate, it can be used Japanese patent

No. 3 0260 8 7與JP_ A HEI 4- 297 02 3所揭示的低溫緩衝法,及 JP-A 2 003 -24 3 3 02所揭示之稱爲種子製程(SP )的晶格失 配晶體磊晶成長技術。特別地是’由提高生產力的觀點, 在足以製造GaN系晶體之高溫製造A1N晶體膜的SP製程 係爲極佳的晶格失配晶體磊晶成長技術。當使用諸如低溫 緩衝法或S P法的晶格失配晶體磊晶成長技術時,作爲底層 的GaN系化合物半導體最好爲未摻雜或些微摻雜約5x φ 10wcm·3的GaN。底層膜厚最好爲1-20微米,且5-15微米 爲更佳。 可藉由蒸氣相成長法形成設有含鍺原子於本發明η型接 觸層中及前揭Si於發光層AlxGaYlnzNuMa(其中0SXS卜 0SYS1,0SZS1,Χ+Υ+Ζ=1,Μ代表氮以外的V族元 素,以及0Sa&lt;l)中之ΠΙ族氮化物半導體的發光裝置,諸 如金屬有機蒸氣沈積法(簡稱爲MOCVD、MOVPE或 OMVPE)、分子束磊晶(MBE )法、鹵素氣相成長法及氫 φ 化物氣相成長法。可使用諸如鍺烷(GeH〇、四甲鍺烷 ((CH3)4Ge)及四乙鍺烷((C2H5)4Ge)之有機鍺化合物作爲所添 加的鍺源。Μ B E法可使用鍺元素作爲摻雜源。例如,μ 0 C V D 法使用四甲鍺烷形成η型氮化鎵層於藍寶石基板上。 有關η型接觸層結構方面,其係使用製造平面的技術來 製造鍺原子濃度週期性變化的結構。藉由在瓜族氮化物半 導體層蒸氣相成長期間,隨時間而週期性改變供應至蒸氣 相成長反應系統的摻質源數量,便可形成該區域。例如, 藉由暫停供應摻鍺源至蒸氣相成長區而形成未摻雜薄層, •10- 200541115 並立即供應大量摻鍺源至氣相成長區便可形成含高鍺 濃度的薄層。藉由改變供應至蒸氣相成長反應系統的 源數量,便可形成鍺原子濃度週期性變化的區域。藉 長低鍺原子濃度薄層,並隨後暫停成長直至諸如V/瓜 的成長條件調整到適於添加高濃度的鍺爲止,以使含 度鍺原子的薄層鄰接於其。在本發明中,低鍺原子濃 層意指摻有低鍺原子濃度的薄層與未摻雜層。這些薄 共存。當低與高鍺原子濃度層週期***錯變化時,各 φ 間的鍺濃度無須固定。 在形成鍺原子濃度週期性變化區的狀況中,鍺原子 週期性變化之整個區域的層厚以0.1 -1 0微米爲適當, 微米爲更佳,且0.5 - 3微米爲最佳。倘若層厚小於0.1卷 此短缺將無法形成低電阻率的η型ΙΠ族氮化物半導體 倘若層厚超過10微米,不會由於增加而得到成正比序 含高鍺濃度之η型ΕΙ族氮化物半導體層及含低鍺濃 I η型m族氮化物半導體層的總膜厚(亦即週期性薄膜丨 以l-1000nm爲適當,4-400nm爲較佳,且6-100nm爲| 倘若總膜厚小於1 nm,此短缺則難以獲得週期性堆疊 層的效果。反之,倘若總膜厚大於lOOOnm,此多出將 坑洞發生之抑制或導致電阻率增加。 亦即,當一週期中的高鍺濃度層較低鍺濃度層爲I 便無法抑制坑洞的形成,而無法輕易獲得表面平坦度 低鍺濃度層厚度等於或大於摻高鍺濃度層時,平坦度 好。因此,低鍺濃度層厚度最好較鍺薄層爲厚。當低 原子 摻鍺 由成 比例 高濃 度薄 層可 週期 濃度 0.3-5 玫米, 層。 3效 度之 享) ί佳。 摻鍺 阻礙 [時, 。當 良 鍺濃 -11- 200541115 度層由未摻雜η型m族氮化物半導體薄層形成時,其將更 進一步提高含高濃度鍺原子之η型m族氮化物半導體薄層 表面中的坑洞塡充效果,以提高製造具平坦表面之摻鍺m 族氮化物半導體薄膜的效果。然而,過度增加低濃度層厚 度會具有電阻率上升及η型電極接觸電阻率增加的不良影 響。 當低濃度層厚度過大時,將不利於製造具低正向電壓 (所謂的Vf)或閥電壓(所謂的vth)的m族氮化物半導 φ 體發光裝置。因此,低鍺原子濃度之η型皿族氮化物半導 體薄層的厚度以500nm或以下爲佳。該層厚最好隨低濃度 層的鍺濃度降低及載體濃度降低而成比例降低。 堆疊循環數以1 - 1 0000爲適當的,1 0- 1 000爲較佳,且 20-200爲更佳。例如,選用10nm厚高鍺濃度摻雜GaN薄 層與10nm厚低鍺濃度摻雜GaN薄層的複合物作爲一週 期,並堆疊該複合物達100個週期,便得以形成總厚2微 米且鍺原子濃度週期性變化的區域。 I 高鍺濃度η型Π族氮化物半導體層的膜厚以0.5 -5 00nm 爲適當,2-200nm爲較佳,且3-50nm爲更佳。倘若膜厚小 於0.5 urn,則無法具有充分鍺摻雜,而使電鑛率大幅增加。 反之,倘若膜厚大於500nm,則將使低濃度層無法完全塡 充坑洞;以及當低濃度層具有足以完成塡充的厚度時,將 發生類似的電鍍率大幅增加。 其次,低鍺濃度η型m族氮化物半導體層的膜厚以 0.5-500nm爲適當,2-200nm爲較佳,且3-50nm爲更佳。倘 若膜厚小於0.5nm,則無法完全塡充形成於鍺摻雜層中的坑 -12- 200541115 洞’而降低表面平坦度。因此,該膜厚最好大於高鍺濃度 η型m族氮化物半導體層的膜厚。然而,倘若膜厚大於 5 OOnm,則發生電鍍率大幅增加的缺點。 含高鍺濃度之η型m族氮化物半導體層內部的鍺原子濃 度於 lxlOl7cm·3 至 lxi〇2Qcm·3 爲適當的,於 ixl〇18cm·3 至 5x 1019crrT3 爲較佳,且 3xl018cm·3 至 2xl019cm·3 爲更佳。含高 鍺濃度之η型HI族氮化物半導體層內部的鍺原子濃度無須 固定’而可連續或不連續地改變。 含低鍺濃度,之η型ΠΙ族氮化物半導體層內部的鍺原子濃 度低於含高鍺濃度之η型瓜族氮化物半導體層內部的鍺原 子濃度’並適合爲高於下列分析法所獲的測定値下限至2χ 10l9cnT3,最好爲高於測定値下限至ixi〇19cnr3,且高於測 定値下限至5x1 018cm·3爲更佳。該薄層最好不進行摻雜, 亦即未摻雜。其次,含低鍺濃度之η型ΙΠ族氮化物半導體 層內部的鍺原子濃度無須均勻,而可連續或不連續地改 變。倘若鍺原子濃度超過2x10 19cm·3,則會有表面坑洞密度 遽增的缺點。 藉由諸如二次離子質譜儀(簡稱爲”SIMS”)的方法可判 斷鍺原子濃度。該方法的技術包含以一次離子照射試樣表 面,藉此將相關元素離子化,排出離子並將離子進行質量 分析。其得以觀察並判斷試樣深度方向上的特定元素濃度 分佈。該技術對於m族氮化物半導體層中的鍺元素爲有效 的。 高鍺濃度層中的鍺濃度增加至lxl017cm_3可提供具低正 向電壓的LED結構。當高鍺濃度層中的鍺濃度上限設爲i -13- 200541115 xl02()cm·3時,鍺原子濃度週期性改變之整個含鍺區中的載 體濃度約爲(3至4 ) xl019cm·3。倘若摻雜過量原子濃度的 鍺,則會有表面坑洞密度遽增的缺點。 摻鍺層中的載體濃度可由高濃度層與低濃度層交錯堆 疊爲單一層的整個結構進行量測。該狀況中的載體濃度約 爲摻雜高濃度層與低濃度層中之鍺量與薄層膜厚比例的乘 積。可藉由普通的Van de Paw法或C-V法而由霍爾效應量 測載體濃度。 鍺原子濃度週期性變化的區域可配置於η型瓜族氮化物 半導體層內的任一位置。例如,其可直接配置於設在結晶 基板表面上之緩衝層的上表面上方。當鍺原子濃度週期性 變化的區域配置於靠近結晶基板或緩衝層的η型ΙΠ族氮化 物半導體層下方時,可獲結晶性極佳的η型Π[族氮化物半 導體層。因此,藉由配置鍺原子濃度週期性變化的區域便 得以避免將因與結晶基板晶格失配所造成的失配轉置於相 關薄層以外的部位。在該狀況中,週期性層厚可由〇·5微 米增加至5微米。 在鍺原子濃度週期性變化的區域中,可避免來自下方的 螺旋差排(threading dislocation)滲入上層。因此,當鍺原子 濃度週期性變化的區域作爲η型m族氮化物半導體層上之 發光層結構的基層時,其對於形成具極佳結晶度的發光層 爲有效的。該沈積因而有助益於製造具高發光強度的皿族 氮化物半導體發光裝置。 使用本發明所揭技術而製造的η型II[族氮化物半導體接 觸層得以爲具極低電阻率的η型半導體晶體膜,因爲雖其 -14- 200541115 具有本質上會引發表面坑洞的高摻質濃度,但其可形成均 勻表面。 本發明技術所使用的高濃度層具有該高濃度,以使當使 用鍺作爲摻質時,該層本質上會引發表面坑洞。相較於使 用習用方法摻雜高鍺濃度的薄層’使用低濃度層塡充坑洞 便可使該薄層具有均勻表面。具體地說,藉由本發明’在 高鍺濃度層與低鍺濃度層間的界面中,高濃度層端的表面 含有凹面坑洞,且低濃度層端的表面具有均勻表面。 技職人員所認爲之使用低鍺濃度層4b塡充高鍺濃度層 4a中的坑洞所形成之層結構的剖面圖示於第6圖中。 本發明高鍺濃度層4a中的坑洞被認爲是形成在所謂螺 旋差排(源自基板與氮化物基化合物半導體層間的界面) 的位置。高濃度層中的坑洞密度往往約等於基材中的螺旋 差排密度。在藍寶石基板上的GaN晶體中,基材中的螺旋 差排密度落於lxl〇Mxl〇l()/cm2的範圍。目前尙無坑洞密度 小於lxl 07/cm2的製品。當作爲電子裝置的基板時,坑洞密 度大於1x10 |°/cm2的製品無法呈現令人滿意的功能。 雖依據基材中的螺旋差排密度而定,惟坑洞密度仍落於 lxl05-lxl01Q/cm2 的範圍。通常爲 ixi〇6-ixi〇9/cm2 的範圍。 當僅形成約1 〇 n m以上膜厚的高濃度層時,這些坑洞形成於 表面上。可使用諸如原子力顯微鏡(AFM )之裝置觀察這 些坑洞。當膜厚增加至約5 00nm時,可使用光學顯微鏡觀 察坑洞。本發明的低濃度層表面最好爲平坦的。表面平坦 度(Ra値)最好爲約1 0埃或以下且約5埃或以上爲更佳。 當應用在使用低濃度層塡充形成於高濃度層中之坑洞 -15-No. 3 0260 8 7 and JP_ A HEI 4- 297 02 3 disclosed the low temperature buffer method, and JP-A 2 003 -24 3 3 02 disclosed the lattice mismatched crystal process known as the seed process (SP) Crystal Growth Technology. In particular, from the viewpoint of improving productivity, the SP process system for producing an A1N crystal film at a high temperature sufficient to produce a GaN-based crystal is an excellent lattice mismatched crystal epitaxial growth technique. When a lattice mismatched crystal epitaxial growth technique such as a low-temperature buffer method or an SP method is used, the GaN-based compound semiconductor as the underlying layer is preferably GaN that is undoped or slightly doped with about 5 x φ 10 wcm · 3. The bottom film thickness is preferably 1-20 microns, and more preferably 5-15 microns. AlxGaYlnzNuMa (where 0SXS and 0SYS1, 0SZS1, X + Υ + Z = 1, where M represents a component other than nitrogen) can be formed by a vapor phase growth method and provided with germanium atoms in the n-type contact layer of the invention Group V elements and light emitting devices of Group III nitride semiconductors in 0Sa &lt; l), such as metal organic vapor deposition (MOCVD, MOVPE or OMVPE for short), molecular beam epitaxy (MBE) method, halogen vapor phase growth method And hydrogen φ compounds vapor phase growth method. Organic germanium compounds such as germane (GeH0, tetramethyl germane ((CH3) 4Ge), and tetraethylgermane ((C2H5) 4Ge)) can be used as the source of germanium added. The M BE method can use germanium as a dopant Miscellaneous sources. For example, the μ 0 CVD method uses tetramethylgermane to form an n-type gallium nitride layer on a sapphire substrate. Regarding the structure of the n-type contact layer, it uses a planar manufacturing technique to produce periodic changes in the concentration of germanium atoms. Structure. This region can be formed by periodically changing the number of dopant sources supplied to the vapor phase growth reaction system with time during the vapor phase growth of the melons nitride semiconductor layer. For example, by temporarily stopping the supply of germanium doped sources Form an undoped thin layer to the vapor phase growth zone, • 10-200541115 and immediately supply a large amount of germanium doped source to the vapor phase growth zone to form a thin layer with high germanium concentration. By changing the supply to the vapor phase growth reaction system The number of sources can form a region with periodic changes in germanium atomic concentration. By growing a thin layer of low germanium atomic concentration, and then suspending the growth until the growth conditions such as V / melon are adjusted to be suitable for adding high concentrations of germanium In order to make a thin layer containing germanium atoms adjacent to it. In the present invention, a low germanium atom rich layer means a thin layer and an undoped layer doped with a low germanium atom concentration. These thin coexist. When low and high germanium atoms coexist. When the concentration layer is periodically and alternately changed, the germanium concentration between each φ does not need to be fixed. In the situation where the periodic variation region of the germanium atom concentration is formed, the layer thickness of the entire region where the germanium atom is periodically changed is appropriate to be 0.1 to 10 microns, Micron is more preferred, and 0.5-3 microns is the best. If the layer thickness is less than 0.1 volume, this shortage will not form a low-resistance η-type ΠΠ nitride semiconductor. If the layer thickness exceeds 10 microns, it will not be obtained as a result of increase. Proportionally the total film thickness of the η-type EI-type nitride semiconductor layer containing a high germanium concentration and the low-germanium-concentrated η-type m-group nitride semiconductor layer (that is, a periodic thin film 丨 appropriate l-1000nm, 4-400nm It is better, and 6-100nm is | If the total film thickness is less than 1 nm, this shortage makes it difficult to obtain the effect of periodic stacking layers. On the contrary, if the total film thickness is greater than 100 nm, this excess will inhibit or cause pitting. Resistivity increases. That is, when one week The high germanium concentration layer in the middle and the lower germanium concentration layer can not inhibit the formation of pits, and it is not easy to obtain the surface flatness. When the thickness of the low germanium concentration layer is equal to or greater than the high germanium doped layer, the flatness is good. Therefore, the low The thickness of the germanium concentration layer is preferably thicker than that of the thin germanium layer. When the low-atom germanium-doped germanium is formed by a proportionally high-concentration thin layer, the periodic concentration can be 0.3-5 rose, layer. 3 Validity) Very good. When the good germanium-enriched -11-200541115 degree layer is formed of an undoped n-type m-type nitride semiconductor thin layer, it will further improve the surface of the n-type m-type nitride semiconductor thin layer containing a high concentration of germanium atoms. To enhance the effect of fabricating a germanium-doped m-group nitride semiconductor film with a flat surface. However, excessively increasing the thickness of the low-concentration layer has the adverse effects of increasing the resistivity and increasing the contact resistivity of the n-type electrode. When the thickness of the low-concentration layer is too large, it will be detrimental to the manufacture of a group m nitride semiconductor φ bulk light-emitting device having a low forward voltage (so-called Vf) or a valve voltage (so-called vth). Therefore, the thickness of the n-type dish nitride semiconductor thin layer with a low germanium atom concentration is preferably 500 nm or less. This layer thickness is preferably proportionally reduced as the germanium concentration of the low-concentration layer decreases and the carrier concentration decreases. The number of stacking cycles is suitably from 1 to 10,000, more preferably from 10 to 1,000, and even more preferably from 20 to 200. For example, a composite of 10 nm thick high germanium doped GaN thin layer and 10 nm thick low germanium doped GaN thin layer is selected as one cycle, and the composite is stacked for 100 cycles to form a total thickness of 2 microns and germanium. A region where the atomic concentration changes periodically. The film thickness of the high-germanium-concentration n-type group III nitride semiconductor layer is preferably 0.5-500 nm, more preferably 2-200 nm, and more preferably 3-50 nm. If the film thickness is less than 0.5 urn, it is impossible to have sufficient germanium doping, so that the rate of electrical ore increase significantly. Conversely, if the film thickness is greater than 500 nm, the low-concentration layer will not completely fill the pits; and when the low-concentration layer has a thickness sufficient to complete the filling, a similar increase in the plating rate will occur. Secondly, the film thickness of the low-germanium-concentration n-type m-type nitride semiconductor layer is suitably 0.5-500 nm, more preferably 2-200 nm, and more preferably 3-50 nm. If the film thickness is less than 0.5 nm, the pits -12-200541115 formed in the germanium-doped layer cannot be completely filled and the surface flatness is reduced. Therefore, the film thickness is preferably larger than the film thickness of the high germanium concentration n-type m group nitride semiconductor layer. However, if the film thickness is more than 500 nm, there is a disadvantage that the plating rate is greatly increased. The germanium atom concentration inside the n-type m-type nitride semiconductor layer containing a high germanium concentration is suitable in the range of lxl10l7cm · 3 to lxio2Qcm · 3, more preferably in the range of ix1018cm · 3 to 5x 1019crrT3, and 3xl018cm · 3 to 2xl019cm · 3 is more preferable. The concentration of germanium atoms in the n-type HI group nitride semiconductor layer containing a high germanium concentration can be changed continuously or discontinuously without being fixed. The concentration of germanium atoms in the n-type III nitride semiconductor layer containing a low germanium concentration is lower than the concentration of germanium atoms in the n-type melons nitride semiconductor layer containing a high germanium concentration, and is suitable to be higher than that obtained by the following analysis method The lower limit of determination is 2χ 10l9cnT3, preferably it is higher than the lower limit of determination, to ixi019cnr3, and it is more preferably higher than the lower limit of determination, to 5x1 018cm · 3. The thin layer is preferably not doped, that is, undoped. Secondly, the concentration of germanium atoms inside the n-type group III nitride semiconductor layer containing a low germanium concentration need not be uniform, but may be changed continuously or discontinuously. If the concentration of germanium atoms exceeds 2 × 10 19 cm · 3, there is a disadvantage that the surface pit density increases. The concentration of germanium atoms can be determined by a method such as a secondary ion mass spectrometer (abbreviated as "SIMS"). The technique of this method involves irradiating the sample surface with a single ion, thereby ionizing related elements, removing the ions, and performing mass analysis on the ions. It can observe and judge the specific element concentration distribution in the depth direction of the sample. This technique is effective for the germanium element in the m-group nitride semiconductor layer. Increasing the germanium concentration in the high germanium concentration layer to lxl017cm_3 can provide an LED structure with a low forward voltage. When the upper limit of the germanium concentration in the high germanium concentration layer is set to i -13- 200541115 xl02 () cm · 3, the carrier concentration in the entire germanium-containing region where the germanium atom concentration is periodically changed is about (3 to 4) xl019cm · 3 . If germanium is doped with an excessive atomic concentration, there is a disadvantage that the surface pit density increases. The carrier concentration in the germanium-doped layer can be measured from the entire structure in which the high-concentration layer and the low-concentration layer are alternately stacked into a single layer. The carrier concentration in this case is approximately the product of the amount of germanium in the doped high-concentration layer and the low-concentration layer and the thin film thickness ratio. The carrier concentration can be measured by the Hall effect by the ordinary Van de Paw method or the C-V method. The region where the germanium atom concentration is periodically changed may be arranged at any position in the n-type melon nitride semiconductor layer. For example, it can be disposed directly above the upper surface of the buffer layer provided on the surface of the crystalline substrate. When a region where the concentration of germanium atoms changes periodically is disposed under the n-type III nitride semiconductor layer near the crystal substrate or the buffer layer, an n-type II [group nitride semiconductor layer having excellent crystallinity can be obtained. Therefore, by arranging regions where the concentration of germanium atoms periodically changes, it is possible to avoid transferring mismatches caused by lattice mismatch with the crystalline substrate to locations other than the relevant thin layer. In this case, the periodic layer thickness can be increased from 0.5 micrometers to 5 micrometers. In areas where the concentration of germanium atoms changes periodically, threading dislocations from below can be prevented from penetrating into the upper layer. Therefore, when a region where the germanium atom concentration changes periodically is used as a base layer of the light-emitting layer structure on the n-type m-group nitride semiconductor layer, it is effective for forming a light-emitting layer having excellent crystallinity. This deposition is thus helpful for manufacturing a high-luminescence semiconductor nitride semiconductor light-emitting device. The η-type II [group nitride semiconductor contact layer manufactured using the technology disclosed in the present invention can be an η-type semiconductor crystal film with extremely low resistivity, because although its -14-200541115 has a high level that will essentially cause surface pits Dopant concentration, but it can form a uniform surface. The high-concentration layer used in the technology of the present invention has this high concentration so that when germanium is used as a dopant, the layer essentially causes surface pits. Compared with the conventional method of doping a thin layer with a high germanium concentration, a low concentration layer can be used to fill the pits so that the thin layer has a uniform surface. Specifically, according to the present invention, in the interface between the high germanium concentration layer and the low germanium concentration layer, the surface of the end of the high concentration layer contains concave pits, and the surface of the end of the low concentration layer has a uniform surface. The cross-sectional view of the layer structure formed by the technicians using the low germanium concentration layer 4b to fill the pits in the high germanium concentration layer 4a is shown in FIG. The pits in the high-germanium-concentration layer 4a of the present invention are considered to be formed at positions called so-called spiral differential rows (derived from the interface between the substrate and the nitride-based compound semiconductor layer). The pit density in the high-concentration layer tends to be approximately equal to the helical differential row density in the substrate. In the GaN crystal on a sapphire substrate, the spiral differential density in the base material falls in the range of lx10MxlOl () / cm2. At present, products with no pothole density less than lxl 07 / cm2. When used as a substrate for electronic devices, products with a pit density greater than 1x10 | ° / cm2 cannot exhibit satisfactory functions. Although it depends on the density of the spiral differential row in the substrate, the pit density still falls in the range of lxl05-lxl01Q / cm2. It is usually in the range of ixi〇6-ixi〇9 / cm2. When only a high-concentration layer having a film thickness of about 10 nm or more is formed, these pits are formed on the surface. These pits can be observed using a device such as an atomic force microscope (AFM). When the film thickness increases to about 500 nm, the pits can be observed using an optical microscope. The surface of the low-concentration layer of the present invention is preferably flat. The surface flatness (Ra 値) is preferably about 10 angstroms or less and more preferably about 5 angstroms or more. When applied to pits formed in high-concentration layers using low-concentration layers -15-

200541115 所組成的堆疊層時,本發明的技術對接觸 在氮化鎵基化合物半導體中,使用乾式蝕亥ϋ 助於η型電極的製造。該乾式蝕刻處理會侵 冀之堆疊層上的凹面坑洞。凹面可將特定丨 抑制至低水平,因爲其會增加電極金屬表j 效應(anchor effect )降低接觸電阻率。 主動層可爲諸如InGaN單層或量子井結 井結構時,本發明的效果特別顯著。量子; 薄層所形成的單量子井結構。具有主動層! 錯堆疊數次之井層的多量子井層爲較佳,因 光輸出。重複次數最好爲約3-10次,且約 在多量子井結構的狀況中,所有井層(主丨 H膜部位與薄膜部位。厚膜部位與薄膜部· Θ寸與表面比例。相似地,在多量子井結; 層(主動層)與阻障層整體在本專利說明 &amp; ” 暦 〇 阻障層膜厚最好爲70埃以上且140埃以 層膜厚相當小,其將造成阻障層上表面平廷 光效率與老化特性降低。倘若膜厚相當大, 電壓上升且發光降低。因此,阻障層膜厚最 下。200541115 When the stacked layer is composed, the technology of the present invention uses a dry etching method to contact the gallium nitride-based compound semiconductor to facilitate the manufacture of n-type electrodes. This dry etch process can invade concave pits on the stacked layers. The concave surface can suppress the specific 丨 to a low level, because it will increase the electrode metal surface j effect (anchor effect) and reduce the contact resistivity. The effect of the present invention is particularly significant when the active layer can be a single-layered structure such as InGaN or a quantum well well structure. Quantum; a single quantum well structure formed by a thin layer. With active layer! Multi-quantum well layers staggered several times are preferred because of light output. The number of repetitions is preferably about 3-10 times, and in the condition of a multi-quantum well structure, all well layers (the main film portion and the film portion. The thick film portion and the film portion · Θ inch and surface ratio. Similarly In the multi-quantum well junction; the layer (active layer) and the barrier layer as a whole are described in this patent &amp; "" The barrier film thickness is preferably 70 angstroms or more and 140 angstroms and the film thickness is relatively small, which will cause On the top surface of the barrier layer, the light efficiency and aging characteristics of the barrier layer are reduced. If the film thickness is quite large, the voltage increases and the light emission decreases. Therefore, the barrier layer film thickness is the lowest.

主動層最好由含銦氮化鎵基化合物半導 氮化鎵基化合物半導體可發出高強度之藍' 在多量子井結構的狀況中,可由銦比例小: 動層)(除GaN與AlGaN以外)之InGaN 爲有助益的。 移除薄膜係有 蝕本發明所希 置的驅動電壓 積並藉由固著 奪。當採用量子 結構可爲單一 阻障層重複交 爲其可提高發 3-6次爲更佳。 層)無須設有 可具有不同的 的狀況中,井 中稱爲“發光 下。倘若阻障 性不佳,且發 其將造成驅動 好爲5 0 0埃以 豊所形成。含銦 波長區的光。 形成井層(主 J InGaN形成阻 -16- 200541115 障層。在前揭材料當中,GaN特別較佳。 當主動層由未摻雜形式的多量子井結構形成時,井層可 由含有大膜厚與小膜厚之區域的結構所形成。形成具有該 結構的井層便可降低驅動電壓。該結構的形成可藉由在 6 00 _ 900 °C範圍的相對低溫下成長井層,並接著於暫停成長 的狀態下進行升溫步驟。 當主動層摻矽時,除熟知的摻質源矽烷(SiH4)與二矽烷 (Si 2HO外,可使用有機矽材料。雖然矽烷與二矽烷可以100 • %氣體形式供應,但由安全觀點,其最好以稀釋狀態而由 容有其之鋼瓶供應之。 當主動層摻矽時,可整個區域摻雜或僅部分區域摻雜。 特別地是’當量子井結構的阻障層摻入η型摻質時,阻障 層摻矽爲較佳,因爲η型摻質具有降低裝置驅動電壓的效 果。在該狀況中,可於整個阻障層或僅部分區域進行摻雜。 特別地是’藉由選擇性地摻雜井層正下方的區域便可同時 獲得高輸出與低驅動電壓。摻矽濃度最好爲5x1 016-lx φ 1〇19cm_3。倘若該濃度落於該範圍下限外,則將無法降低驅 動電壓。倘若超過該範圍上限,則將使結晶度與表面平坦 度降低。lxl017-5xl〇18cm·3的濃度爲更佳,且lxl〇iMx 10j8cnT3的濃度爲最佳。主動層最好摻矽,亦可摻入c、Sll 或Pb。其係使用諸如甲烷(CH4)、四甲錫烷(TMSn)或四甲鉛 烷(TMPb)之原料作爲這些摻質。 η型覆層最好夾合於接觸層與發光層間。所夾合的^型 覆層可補償η型接觸層之最外表面的平坦度劣化。η型覆 層可由AlGaN,GaN或InGaN所形成。當由InGaN形成時, -17- 200541115 無庸置疑地是其具有能隙大於主動層中之〗n G a N的組成 物。n型覆層中的載體濃度可等於或大於或小於n型接觸 層。爲提高形成於其上之主動層的結晶度,最好藉由適當 調整諸如成長速率、成長溫度、成長壓力及摻質量之成長 條件而提供高平坦度表面。藉由數次交錯堆疊具不同組成 物與晶格常數的二個薄層便可形成η型覆層。在該狀況 中’依據所堆疊薄層而定’除組成物以外,該二個薄層可 具有不同摻質量與膜厚。 Ρ型層通常具有0.01-1微米範圍的厚度,並由接觸於主 動層的ρ型覆層與形成正電極的ρ型接觸層所形成。ρ型覆 層與Ρ型接觸層可同時作業。ρ型覆層係使用GaN或AlGaN 等形成,並摻有作爲ρ摻質的鎂。爲輕易接觸電極,該層 最外表面最好形成爲高載體濃度層。然而,多數薄層可容 忍高電阻率。可安全地降低摻質量,並可安全地包含用於 降低摻質活性的氫。這些動作爲有助益的,因爲當該相關 薄層倂入所完成的裝置時,其可提高逆電壓。 藉由數次交錯堆疊具不同組成物與晶格常數的二個薄 層便可形成P型覆層。除組成物以外,本狀況中所使用的 組成薄層可具有不同摻質量與膜厚。 可使用GaN,AlGaN或InGaN形成ρ型接觸層。該薄層 可摻入作爲雜質的鎂。摻鎂的氮化鎵基化合物半導體在未 接觸反應爐前通常具有高電阻率。在諸如退火處理、電子 束照射處理及微波照射處理的活化處理後便具有P型導電 率。然而,該半導體無須進行前揭活化處理便可使用。 可使用摻P型雜質的磷化硼(BP )作爲ρ型接觸層。縱 -18- 200541115 使未進行用於轉化成P型的前揭處理,摻 硼仍具P型電阻率。 用於成長形成η型層、主動層與p型層 物半導體的方法並未特別受限。就該成長 條件下使用諸如MBE、MOCVD及HVPE等 揭方法中,Μ〇C V D法特別較佳。 可使用氨、聯氨及疊氮化物等原料作爲 甲鎵烷(TMGa )、三乙鎵烷(TEGa )、三 Φ 及三甲鋁烷(TMA1 )等作爲m族有機金屬 矽烷、二矽烷、鍺烷、有機鍺原料及雙環 作爲摻質源。可使用氮與氫作爲載體氣體 含銦主動層的成長最好在基板溫度維拷 圍中進行。倘若溫度低於該範圍下限,則 良好結晶度。倘若溫度高於該範圍上限, 主動層中的銦量減少,而無法製造發出希| 當主動層具多量子井結構時,最好在基 # (主動層)成長溫度下進行部分阻障層區 約爲700-l,000°C的範圍。 熟知的負電極具各種組成物與各種結榍 知負電極中的任一個,而無任何特別限制 及Au以外,亦可使用Cr, W, V作爲接觸: 負電極的接觸材料。無庸置疑地是其係藉 的負電極而賦予接合性質。特別地是,使 最外表面係有助於接合。熟知的正電極亦 結構。可使用這些熟知正電極中的任一個 P型雜質之磷化 之氮化鎵基化合 而言,可於熟知 :熟知方法。在前 ,氮源。可使用三 三甲銦烷(TMIn ) 。其次,可使用 戊二烯鎂(Cp2Mg) 〇 卜於650-900°C範 主動層無法獲得 則可能造成摻入 i波長光的裝置。 板溫度高於井層 的成長。該溫度 I。可使用這些熟 。除 Al,Ti,Ni 於η型接觸層之 由形成多層結構 用金塗佈負電極 具各種組成物與 ,而無任何限制。 -19- 200541115 透明正電極的原料可包含Pt,Pd,Au,Cr,Ni,Cu與Co 等。已知使正電極具有部分氧化結構便可提高透光性。除 前揭原料外,可使用諸如R h,A g , A1等作爲反射正電極的 原料。 藉由諸如濺鍍與真空蒸鍍法便可形成這些正電極。特別 地是,採用濺鍍法爲較佳,因爲藉由適當控制濺鍍條件便 可獲得歐姆接觸(形成電極膜後無須進行退火處理)。 發光裝置可爲設有反射正電極的覆晶,或者設有透光正 φ 電極的格狀結構或設有梳狀正電極的面朝上結構。 本發明將參考其實例而說明如下。然而,應注意地是, 本發明非僅限於這些實例。 實例1 首先,本發明將引用形成m族氮化物半導體發光二極體 的實例做具體說明,其中該發光二極體係藉由將未摻雜發 光層堆疊於鍺濃度週期性變化的摻鍺GaN層上而形成。說 明中的摻質濃度皆以前揭S IM S法量測。藉由使用白光反射 φ 率光譜的方法及剖面穿透式電子顯微鏡(TEM )的觀察量 測膜厚。這些量測適用於實例2及後續實例。 第1圖爲用於本實例LED結構之磊晶堆疊結構1 1的示 意剖面結構。本實例所形成之LED晶片的示意剖面圖示於 第2圖中。 藉由使用普通減壓M0CVD法的下列步驟形成磊晶堆疊 結構。首先,將(000 1 )藍寶石基板101安裝於半導體級 高純度石墨所製成的基座上,並以射頻(RF )感應式加熱 器加熱至膜形成溫度。在完成安裝後,將不銹鋼製成之蒸 -20- 200541115 氣相成長反應爐的內部以氮氣流進行置換’直至徹底沖洗 爲止。 持續供應氮氣至蒸氣相成長反應爐內部達8分鐘。其 次,感應式加熱器已準備作業,以在1 〇分鐘內將基板1 0 1 溫度由室溫升高至600 °C。當基板101溫度維持在600 °C 時,藉由供應氫氣與氮氣而將蒸氣相成長反應爐內的壓力 增加至1. 5 X 1 04 p a s c a 1 ( P a )。所形成的混合物在前揭溫度 與壓力下保持2分鐘,以完成基板1 0 1表面的熱清洗。在 φ 完成熱清洗後,便終止供應氮氣至蒸氣相成長反應爐內 部。持續供應氫氣。 其次,在氫氣氣氛中,將基板101溫度提高至1 120°C。 在確認溫度穩定於1120°C後,將攜帶三甲鋁烷(TMA1)蒸 氣的氫氣供應至蒸氣相成長反應爐內8分30秒。因此,含 有蒸氣的氫氣會與先前黏著於蒸氣相成長反應爐內壁之含 氮沈積物分解所產生的氮原子發生反應,並將厚度數nm的 氮化鋁(A1N )薄膜(未圖示)沈積於藍寶石基板1〇1上。 φ 在停止供應攜帶TMA1蒸氣之氫氣於蒸氣相成長反應爐內 而終止A1N成長後,爐體保持4分鐘,以完成由蒸氣相成 長反應爐內部完全排出殘留的TMA1。 其次,開始供應氨氣(NH3 )至蒸氣相成長反應爐內。 在開始供應的4分鐘後,基座溫度降低至1〇40 °C,惟氨氣 持續供應。在確認基座溫度到達1 040 °C後,等待一段時間 直至溫度穩定’開始供應二甲鎵院(TMGa)至蒸氣相成長 反應爐內,而使未摻雜GaN層102得以持續成長4小時。 未摻雜GaN層102膜厚爲8微米。 -21- 200541115 其次,爲形成厚度2.0微米且鍺濃度週期性變化的摻鍺 G a Ν層1 〇 3結構,執行包含下列步驟的的循環達1 〇 〇次: 晶圓溫度升高至1 1 4 0 °C,得以穩定該溫度,將四甲鍺烷(以 下簡稱爲(CH3) 4Ge)供入爐體內,以及終止供入四甲鍺 烷。 在該接觸層中,高鍺濃度層中的鍺濃度約爲ΐ·2χ 1019CirT3,且低鍺濃度層中的鍺濃度約爲lxl〇18cm_3。高鍺 濃度層的厚度約爲8nm,而低鍺濃度層的厚度約爲l〇nm。 順帶一提,在一個別的膜形成實驗中,當層厚1 〇nm時, 本實例之高濃度膜表面上的坑洞數爲2x1 〇7/cm2。 在堆疊摻鍺GaN層後,將未摻雜η型Ino.o6Gao.94N覆層 104堆疊於其上。覆層104膜厚爲12.5nm。 其次,基板101溫度設定爲7 3 0 °C,並將含GaN阻障層 與InmGamN井層之五個循環結構的多量子井結構發光 層105形成於未摻雜η型In〇.〇6Ga〇.94N覆層104上。在發光 層105中,首先將GaN阻障層鄰接沈積於未摻雜η型’ Irio.oaGao.wN 覆層 104 上。 使用三乙鎵院(TEGa)作爲鎵源而成長GaN阻障層。層 厚爲16nm且未摻雜。 使用三乙鎵烷(TEGa )作爲鎵源及三甲銦烷(TMIn )作 爲銦源而成長InmGamN井層。層厚爲2.5nm且未摻雜。 將摻鎂的P型Alo.^GamN覆層106形成於多量子井結 構發光層105上。層厚爲l〇nm。將摻鎂的p型GaN接觸層 107形成於P型Alo.uGamN覆層106上。雙(環戊二嫌)鎂 (bis-Cp2Mg )作爲摻鎂源。依此方式添加鎂源,以使P型 -22- 200541115The active layer is preferably composed of an indium-containing gallium nitride-based compound and a semiconducting gallium nitride-based compound semiconductor can emit a high intensity blue. In the case of a multi-quantum well structure, the ratio of indium can be small: moving layer) (except GaN and AlGaN ) Of InGaN is helpful. The removal of the thin film is to etch the driving voltage product required by the present invention and to fix it by fixing. When the quantum structure is used, a single barrier layer can be repeatedly interspersed, and it can increase the hair emission 3-6 times. Layer) is not required to have different conditions, which are called "emission under light. If the barrier is not good, and it will cause the drive to be formed by 500 angstroms to 豊. Light containing indium wavelength region Forming a well layer (the main J InGaN forms a barrier-16-200541115 barrier layer. Among the previously revealed materials, GaN is particularly preferred. When the active layer is formed of an undoped multi-quantum well structure, the well layer may be composed of a large film Thick and small film thickness regions are formed. The formation of a well layer with this structure can reduce the driving voltage. The formation of this structure can be achieved by growing the well layer at a relatively low temperature in the range of 6 00 _ 900 ° C, and then The heating step is performed under a state of suspended growth. When the active layer is doped with silicon, in addition to the well-known dopant source silanes (SiH4) and disilanes (Si 2HO), organosilicon materials can be used. Although silanes and disilanes can be 100% It is supplied in the form of gas, but from a safety point of view, it is preferably supplied in a diluted state by a cylinder containing it. When the active layer is doped with silicon, it can be doped in the entire region or only in a part of the region. Obstruction of well structure When the n-type dopant is doped, the barrier layer is doped with silicon, because the n-type dopant has the effect of reducing the driving voltage of the device. In this state, doping can be performed on the entire barrier layer or only a part of the region. Special The ground is' By selectively doping the area directly below the well layer, high output and low driving voltage can be obtained at the same time. The doped silicon concentration is preferably 5x1 016-lx φ 1010cm_3. If the concentration falls below the lower limit of the range In addition, the driving voltage cannot be reduced. If the upper limit of the range is exceeded, the crystallinity and surface flatness will be reduced. The concentration of lxl017-5x1018cm · 3 is more preferable, and the concentration of lx10iMx 10j8cnT3 is the best. The active layer is preferably doped with silicon, and can also be doped with c, Sll, or Pb. It uses materials such as methane (CH4), tetramethylstannane (TMSn), or tetramethylleadane (TMPb) as these dopants. Η type The cladding layer is preferably sandwiched between the contact layer and the light emitting layer. The sandwiched cladding layer can compensate for the flatness deterioration of the outermost surface of the η-type contact layer. The η-type cladding layer can be formed of AlGaN, GaN or InGaN. When formed from InGaN, -17- 200541115 undoubtedly has an energy gap The composition of n G a N in the active layer. The carrier concentration in the n-type cladding layer may be equal to or greater than or less than the n-type contact layer. In order to improve the crystallinity of the active layer formed thereon, it is best to use Appropriately adjust the growth conditions such as growth rate, growth temperature, growth pressure, and doping quality to provide a high flatness surface. The η-type coating can be formed by stacking two thin layers with different compositions and lattice constants several times. In this condition, 'depending on the stacked thin layers', in addition to the composition, the two thin layers may have different doped masses and film thicknesses. The P-type layer usually has a thickness in the range of 0.01-1 micrometers and is contacted by The p-type cladding layer of the active layer and the p-type contact layer forming the positive electrode are formed. The p-type coating and the p-type contact layer can be operated simultaneously. The p-type cladding layer is formed using GaN, AlGaN, or the like, and is doped with magnesium as a p-dopant. For easy contact with the electrodes, the outermost surface of this layer is preferably formed as a high carrier concentration layer. However, most thin layers can tolerate high resistivity. The doping mass can be safely reduced, and hydrogen for reducing dopant activity can be safely contained. These actions are helpful because as the relevant thin layer penetrates the completed device, it can increase the reverse voltage. The P-type cladding layer can be formed by stacking two thin layers with different compositions and lattice constants several times. In addition to the composition, the composition thin layers used in this case may have different blending qualities and film thicknesses. The p-type contact layer can be formed using GaN, AlGaN, or InGaN. This thin layer may be doped with magnesium as an impurity. Magnesium-doped gallium nitride-based compound semiconductors typically have high resistivity before contacting the reactor. It has P-type conductivity after activation treatments such as annealing treatment, electron beam irradiation treatment, and microwave irradiation treatment. However, the semiconductor can be used without a pre-exposure activation process. As the p-type contact layer, boron phosphide (BP) doped with a P-type impurity may be used. The vertical -18- 200541115 enables boron-doped P-type resistivity to be obtained without performing a front peeling treatment for conversion to P-type. The method for growing an n-type layer, an active layer, and a p-type layer semiconductor is not particularly limited. Among the growth methods using MBE, MOCVD, and HVPE under this growth condition, the MOC V D method is particularly preferred. Raw materials such as ammonia, hydrazine, and azide can be used as gallium ethane (TMGa), triethylgallane (TEGa), triΦ and trimethylalumane (TMA1), etc. as m group organometallic silanes, disilanes, and germanes , Organic germanium raw materials and bicyclic as the dopant source. Nitrogen and hydrogen can be used as the carrier gas. The growth of the indium-containing active layer is preferably performed in the temperature range of the substrate. If the temperature is lower than the lower limit of this range, good crystallinity is obtained. If the temperature is higher than the upper limit of the range, the amount of indium in the active layer is reduced, and it is impossible to produce a silicon oxide. When the active layer has a multiple quantum well structure, it is best to perform a partial barrier layer region at the base # (active layer) growth temperature. The range is about 700-1,000 ° C. The well-known negative electrode has various compositions and various structures. Any particular negative electrode can be used without any restrictions. Besides Au, Cr, W, V can also be used as the contact: the contact material of the negative electrode. There is no doubt that it is a negative electrode that imparts bonding properties. In particular, the outermost surface is made to facilitate joining. The well-known positive electrode is also structured. Any of these well-known positive electrode P-type impurity-type gallium nitride based compounds can be used in well-known: well-known methods. Previously, the nitrogen source. Tritrimethylene indium (TMIn) can be used. Secondly, magnesium pentadiene (Cp2Mg) can be used. The 650-900 ° C range of the active layer is not available, which may cause a device doped with i-wavelength light. Plate temperature is higher than well growth.该 温度 I。 The temperature I. You can use these cooked. Except for Al, Ti, and Ni in the η-type contact layer, a multilayer structure is formed, and the negative electrode is coated with gold with various compositions and without any restrictions. -19- 200541115 The raw material of the transparent positive electrode may include Pt, Pd, Au, Cr, Ni, Cu and Co. It is known that the light-transmitting property can be improved by providing the positive electrode with a partially oxidized structure. In addition to the raw materials, such as Rh, Ag, A1 can be used as the raw materials of the reflective positive electrode. These positive electrodes can be formed by methods such as sputtering and vacuum evaporation. In particular, the sputtering method is preferable because ohmic contact can be obtained by appropriately controlling the sputtering conditions (there is no need to perform an annealing treatment after the electrode film is formed). The light-emitting device may be a flip chip provided with a reflective positive electrode, or a lattice structure provided with a light-transmissive positive φ electrode, or a face-up structure provided with a comb-shaped positive electrode. The present invention will be described below with reference to examples thereof. It should be noted, however, that the present invention is not limited to these examples. Example 1 First, the present invention will be described specifically by citing an example of forming an m-group nitride semiconductor light-emitting diode, in which the light-emitting diode system stacks an undoped light-emitting layer on a germanium-doped GaN layer whose germanium concentration changes periodically. On top. The dopant concentrations in the instructions were previously measured by S IM S method. The film thickness was measured by a method using a white light reflection φ rate spectrum and observation by a cross-section transmission electron microscope (TEM). These measurements apply to Example 2 and subsequent examples. Fig. 1 is a schematic cross-sectional structure of an epitaxial stacked structure 11 used in the LED structure of this example. A schematic cross-sectional view of the LED wafer formed in this example is shown in FIG. An epitaxial stacked structure is formed by the following steps using a general reduced pressure CVD method. First, a (000 1) sapphire substrate 101 is mounted on a base made of semiconductor-grade high-purity graphite, and heated to a film formation temperature by a radio frequency (RF) induction heater. After the installation is completed, the inside of the stainless steel steaming reactor -20- 200541115 is replaced with a nitrogen stream ’until thoroughly flushed. Continuous supply of nitrogen to the interior of the vapor phase growth reactor for 8 minutes. Secondly, the induction heater has been prepared to raise the substrate 101 temperature from room temperature to 600 ° C in 10 minutes. When the temperature of the substrate 101 was maintained at 600 ° C, the pressure in the vapor phase growth reactor was increased to 1.5 X 1 04 p s c a 1 (P a) by supplying hydrogen and nitrogen. The resulting mixture is held at the front peel temperature and pressure for 2 minutes to complete the thermal cleaning of the substrate 101 surface. After φ completes the thermal cleaning, the supply of nitrogen to the interior of the vapor phase growth reactor is terminated. Continuous supply of hydrogen. Next, in a hydrogen atmosphere, the temperature of the substrate 101 was increased to 1 120 ° C. After confirming that the temperature was stable at 1120 ° C, hydrogen gas carrying trimethylalumane (TMA1) vapor was supplied to the vapor phase growth reactor for 8 minutes and 30 seconds. Therefore, the hydrogen gas containing vapor will react with the nitrogen atoms generated by the decomposition of the nitrogen-containing deposits that were previously adhered to the inner wall of the vapor phase growth reactor, and will form a thin film of aluminum nitride (A1N) with a thickness of several nm (not shown). Deposited on the sapphire substrate 101. φ After stopping the supply of hydrogen carrying TMA1 vapor in the vapor phase growth reactor and terminating the A1N growth, the furnace body is held for 4 minutes to complete the exhaustion of the remaining TMA1 from the vapor phase growth reactor. Next, supply of ammonia gas (NH3) into the vapor phase growth reactor was started. After 4 minutes from the start of supply, the temperature of the base was reduced to 1040 ° C, but ammonia gas was continuously supplied. After confirming that the temperature of the pedestal reaches 1 040 ° C, wait for a period of time until the temperature stabilizes and start supplying dimethylgallium (TMGa) to the vapor phase growth reactor, so that the undoped GaN layer 102 can continue to grow for 4 hours. The film thickness of the undoped GaN layer 102 is 8 micrometers. -21- 200541115 Secondly, in order to form a germanium-doped G a N layer structure with a thickness of 2.0 micrometers and a periodic variation in germanium concentration, a cycle including the following steps is performed 1,000 times: the wafer temperature is increased to 1 1 At 40 ° C, the temperature can be stabilized, tetramethylgermane (hereinafter referred to as (CH3) 4Ge) is fed into the furnace, and the supply of tetramethylgermane is terminated. In this contact layer, the germanium concentration in the high germanium concentration layer is about ΐ · 2 × 1019CirT3, and the germanium concentration in the low germanium concentration layer is about 1 × 1018 cm_3. The thickness of the high germanium concentration layer is about 8 nm, and the thickness of the low germanium concentration layer is about 10 nm. Incidentally, in another film formation experiment, when the layer thickness is 10 nm, the number of pits on the surface of the high-concentration film of this example is 2 × 107 / cm 2. After stacking the germanium-doped GaN layer, an undoped n-type Ino.o6Gao.94N cladding layer 104 is stacked thereon. The cladding layer 104 has a film thickness of 12.5 nm. Secondly, the temperature of the substrate 101 is set to be 73 ° C, and a multi-quantum well structure light emitting layer 105 including a five-cycle structure of a GaN barrier layer and an InmGamN well layer is formed in an undoped n-type In.06Ga. .94N overlay 104. In the light emitting layer 105, a GaN barrier layer is first deposited adjacently on the undoped n-type 'Irio.oaGao.wN cladding layer 104. A GaN barrier layer is grown using triethyl gallium compound (TEGa) as a gallium source. The layer thickness is 16 nm and is undoped. InmGamN wells were grown using triethylgallane (TEGa) as a gallium source and trimethylindium alkane (TMIn) as an indium source. The layer thickness is 2.5 nm and is undoped. A magnesium-doped P-type Alo. ^ GamN cladding layer 106 is formed on the multiple quantum well structure light emitting layer 105. The layer thickness was 10 nm. A magnesium-doped p-type GaN contact layer 107 is formed on the P-type Alo.uGamN cladding layer 106. Bis (Cyclopentadiene) magnesium (bis-Cp2Mg) was used as the source of magnesium. Add magnesium source in this way to make P type -22- 200541115

GaN接觸層107具有電洞濃度8xl017cm·3。?型GaN接觸層 107厚度爲100nm。 在完成P型GaN接觸層107成長後,終止感應式加熱器 的電源,而使基板1 0 1溫度於約20分鐘內降低至室溫。在 降溫期間,蒸氣相成長反應爐內的氣氛僅有氮氣,並降低 氨氣流量。其次,終止供應氨氣。在確認基板1 0 1溫度降 至室溫後,由蒸氣相成長反應爐取出堆疊結構1 1。此時, 無須進行電氣活化P型載體(Mg )的退火處理便可使p型 φ GaN接觸層107具有p型導電性。 其次,使用熟知的光微影技術與普通的乾式蝕刻技術, 而在希冀形成η型歐姆電極108的區域中單獨暴露出摻高 鍺濃度的GaN層103表面。將表面堆疊有Ci·,Au的η型歐 姆電極108形成於摻鍺η型GaN層103的暴露表面上。使 用普通的濺鍍法與熟知的光微影法將具有Pt,Ag,Au依序 堆疊於表面上的反射P型歐姆電極1 09形成於形成剩餘堆 疊結構1 1表面的整個P型GaN接觸層107表面上。 ^ 其次,由堆疊結構將LED晶片10切割成3 50微米的正 方形(平面圖視之),並接合於稱爲“次載具”的導線連 接輔助組件。晶片與所接合的載具係安裝於引腳架(未圖 示)上,以使連接至引腳架的金線(未圖示)可將裝置驅 動電流由引腳架傳送至LED晶片10。 藉由引腳架便可將裝置驅動電流在η型與p型歐姆電極 108,109間的正向上進行傳送。當正向電流設定爲20mA 時,正向電壓爲3.5V。當20mA的正向電流流動時,藍帶 光發出的中心波長爲4 6 0 n m。使用普通積分球所測得的發 -23- 200541115 光強度達12mW。獲得可產生高發光強度的瓜族氮化物半導 體 LED。 實例2 : 首先,本發明將引用形成m族氮化物半導體發光二極體 的狀況做說明,其中該發光二極體係藉由將具有僅摻矽阻 障層之多量子井結構的發光層1 1 1經由η型覆層1 〇4堆疊 於鍺濃度週期性變化的摻鍺η型GaN接觸層1 〇3上而形成。 第2圖爲用於形成本實例LED結構之磊晶堆疊結構1 2 ^ 的示意剖面圖。 直至形成未摻雜基層102爲止的製造皆同實例1的步 驟。其次,爲形成厚度2.0微米且鍺濃度週期性變化的摻 鍺GaN層103,執行包含下列步驟的的循環達1〇〇次:晶 圓溫度升高至1 150°C,等待該溫度穩定,供應四乙鍺烷(以 下簡稱爲(C2H6 ) 4Ge ),以及終止供應四甲鍺烷。摻鍺GaN 層1 03的濃度與厚度約略同於實例1。 在堆疊摻鍺GaN層103後,將摻矽η型In〇:〇6Ga〇.MN覆 ^ 層104沈積於其上。摻矽量爲lxl〇18CnT3且覆層104厚度爲 2 5 n m 〇 其次,基板101溫度設定爲730 °C,並將含有摻矽GaN 阻障層與未摻雜In().25Ga().75N井層之五個循環多量子井結 構的發光層1 1 1形成於摻矽η型Ino.o6Gao.MN覆層104上。 在該多量子井結構的發光層1 1 1中,首先將GaN阻障層鄰 接沈積於摻矽η型Ino.o6Gao.MN覆層104上。 使用三乙鎵烷(TEGa )作爲鎵源而成長GaN阻障層。薄 層厚度爲16nm並摻入矽。摻矽量設定爲5xl017cnT3。 -24 - 200541115 使用三乙鎵烷(TEGa )作爲鎵源及三甲 爲銦源而成長InmGamN井層。薄層厚虔 雜。 其次,使用實例1的步驟堆疊P型接觸 將晶圓1 2取出反應器。 其次,使用熟知的光微影技術與普通纪 而在希冀形成η型歐姆電極108的區域中 鍺濃度的GaN層103表面。將表面堆疊有 φ 姆電極108形成於摻鍺η型GaN層103的 具有Pt,Au依序堆疊於表面上的透明p型 接合用的電極1 1 0形成於形成剩餘堆疊結 p型GaN接觸層107表面上。 其次,由堆疊結構將LED晶片20切割 方形(平面圖視之),並安裝於引腳架( 使連接至引腳架的金線(未圖示)得以將 引腳架傳送至LED晶片20。 φ 藉由引腳架便可將裝置驅動電流在η塑 108,109間的正向上進行傳送。當正向電 時,正向電壓爲2.9V。當20mA的正向電 光發出的中心波長爲460nm。使用普通積 光強度達5.5mW。完成具高發光強度與低 氮化物半導體LED。 比較實例1 堆疊作爲η型接觸層之均勻摻有7X101 GaN層1 1 3 ’以取代鍺濃度週期性變化的j 1銦烷(TMIn )作 ;爲2.5nm且未摻 3層1 0 7。之後再 J乾式蝕刻技術, 單獨暴露出摻高 Ti,Au的η型歐 暴露表面上。將 歐姆電極109及 構1 2表面的整個 成3 5 0微米的正 未圖示)上,以 裝置驅動電流由 !與ρ型歐姆電極 流設定爲20mA 流流動時,藍帶 分球所測得的發 驅動電壓的ΙΠ族 8cnT3濃度矽的 參鍺GaN層103 ° -25- 200541115 其次,藉由在實例1的相同條件下將電極形成於堆疊結構 1 3上,安裝所形成之經塗佈堆疊結構於次載具上,配置於 引腳架上,及藉由線路連接進行接合,便可製造LED ;其 中堆疊結構1 3係於實例1的相同條件下而由未摻雜In GaN 層104、未摻雜多量子井結構的發光層105、p型Alo.07Gao.93N 覆層106與p型GaN接觸層107所形成。因此,當正向電 流設定爲20mA時,正向電壓爲3.5V。當20mA的正向電流 流動時,藍帶光發出的中心波長爲460nm。有關20mA正向 ^ 電流流動期間的特性部分,使用普通積分球所測得的發光 強度達7mW,該發光輸出小於使用摻鍺GaN層103時。 工業應用性 由經濟的觀點,使用根據本發明之氮化鎵基化合物半導 體堆疊結構所獲得的發光裝置具極高利用價値,因爲其呈 現理想的發光輸出。 【圖式簡要說明】 第1圖爲實例1之堆疊結構的示意剖面圖。 第2圖爲實例1之LED的示意平面圖。 ® 第3圖爲實例2之堆疊結構的示意剖面圖。 第4圖爲實例2之LED的示意平面圖。 第5圖爲比較實例1之堆疊結構的示意剖面圖。 第6圖爲技職人員所認爲之使用低鍺濃度層塡充高鍺濃 度層中的坑洞所形成之層結構的剖面圖。 -26-The GaN contact layer 107 has a hole concentration of 8 × 1017 cm · 3. ? The type GaN contact layer 107 has a thickness of 100 nm. After the growth of the P-type GaN contact layer 107 is completed, the power of the induction heater is terminated, and the substrate 101 temperature is lowered to room temperature in about 20 minutes. During the cooling period, the atmosphere in the vapor phase growth reactor is only nitrogen, and the ammonia flow is reduced. Second, stop supplying ammonia. After confirming that the temperature of the substrate 101 was reduced to room temperature, the stacked structure 11 was taken out from the vapor phase growth furnace. At this time, the p-type φ GaN contact layer 107 can be made to have p-type conductivity without performing an annealing process on the electrically activated P-type carrier (Mg). Secondly, using the well-known photolithography technology and ordinary dry etching technology, the surface of the GaN layer 103 doped with a high germanium concentration is separately exposed in the region where the n-type ohmic electrode 108 is to be formed. An n-type ohmic electrode 108 having Ci ·, Au stacked on its surface is formed on the exposed surface of the germanium-doped n-type GaN layer 103. Reflective P-type ohmic electrodes 1 09 having Pt, Ag, and Au sequentially stacked on the surface are formed using a common sputtering method and a well-known photolithography method to form the entire P-type GaN contact layer on the surface of the remaining stacked structure 1 1 107 on the surface. ^ Secondly, the LED chip 10 is cut into a 3 50 micron square (plan view) from a stacked structure and bonded to a wire connection auxiliary component called a “sub-carrier”. The chip and the bonded carrier are mounted on a lead frame (not shown) so that a gold wire (not shown) connected to the lead frame can transmit the device driving current from the lead frame to the LED chip 10. Through the lead frame, the device driving current can be transmitted in the forward direction between the n-type and p-type ohmic electrodes 108 and 109. When the forward current is set to 20mA, the forward voltage is 3.5V. When a 20 mA forward current flows, the center wavelength of the blue-band light emission is 460 nm. The light intensity measured with an ordinary integrating sphere is -23- 200541115 and the light intensity reaches 12mW. A guar-nitride semiconductor LED capable of producing a high luminous intensity is obtained. Example 2: First, the present invention will be described by citing the formation of a group m nitride semiconductor light emitting diode, in which the light emitting diode system uses a light emitting layer having a multiple quantum well structure with only a silicon-doped barrier layer 1 1 1 is formed by stacking an n-type cladding layer 104 on a germanium-doped n-type GaN contact layer 100 having a periodic variation in germanium concentration. FIG. 2 is a schematic cross-sectional view of the epitaxial stacked structure 1 2 ^ used to form the LED structure of this example. The steps up to the formation of the undoped base layer 102 are the same as those in Example 1. Secondly, in order to form a germanium-doped GaN layer 103 with a thickness of 2.0 micrometers and a periodic variation in germanium concentration, a cycle including the following steps was performed up to 100 times: the wafer temperature was raised to 1 150 ° C, waiting for the temperature to stabilize, and supplying Tetraethylgermane (hereinafter referred to as (C2H6) 4Ge), and the termination of supply of tetramethylgermane. The concentration and thickness of the germanium-doped GaN layer 103 are approximately the same as in Example 1. After the germanium-doped GaN layer 103 is stacked, a silicon-doped n-type InO: 〇6Ga〇MN overlay layer 104 is deposited thereon. The amount of silicon doped is 1 × 1018CnT3 and the thickness of the cladding layer 104 is 25 nm. Secondly, the temperature of the substrate 101 is set to 730 ° C, and a silicon-doped GaN barrier layer and an undoped In (). 25Ga (). 75N The light-emitting layers 1 1 1 of five circulating multiple quantum well structures of the well layer are formed on the silicon-doped n-type Ino.o6Gao.MN cladding layer 104. In the light emitting layer 1 1 1 of the multiple quantum well structure, a GaN barrier layer is first deposited adjacently on the silicon-doped n-type Ino.o6Gao.MN cladding layer 104. A GaN barrier layer is grown using triethylgallane (TEGa) as a gallium source. The thin layer is 16nm thick and is doped with silicon. The amount of silicon doped was set to 5xl017cnT3. -24-200541115 InmGamN is grown using triethylgallane (TEGa) as the gallium source and trimethyl for the indium source. Thin layers are thick and miscellaneous. Next, the P-type contacts were stacked using the procedure of Example 1 and the wafer 12 was taken out of the reactor. Next, the surface of the GaN layer 103 having a germanium concentration in the region where the n-type ohmic electrode 108 is to be formed is well-known using the photolithography technique and the common era. A transparent p-type bonding electrode having a Pt and Au layer stacked on the surface and having a φm electrode 108 formed on the germanium-doped n-type GaN layer 103 is sequentially formed on the remaining p-type GaN contact layer. 107 on the surface. Secondly, the LED chip 20 is cut into a square shape (viewed in a plan view) by a stacked structure, and is mounted on a lead frame (so that a gold wire (not shown) connected to the lead frame can transfer the lead frame to the LED chip 20. φ Through the lead frame, the device driving current can be transmitted in the forward direction between η 108 and 109. When the forward voltage is applied, the forward voltage is 2.9V. When the forward wavelength of 20mA is 460nm, the center wavelength is 460nm. Using ordinary accumulated light intensity up to 5.5mW. Complete with high luminous intensity and low nitride semiconductor LED. Comparative Example 1 Stacked as a η-type contact layer uniformly doped with 7X101 GaN layer 1 1 3 'to replace the periodic variation of germanium concentration j 1 indium alkane (TMIn); 2.5 nm without doping with 3 layers of 107. Afterwards, the dry etching technique was used to expose the n-type European doped surface with high Ti and Au alone. The ohmic electrode 109 and the structure 1 were exposed. The entire surface of the 2 surface is 350 μm (not shown), and the device driving current is set by the! And ρ-type ohmic electrode currents to 20 mA. 8cnT3 concentration of silicon-doped germanium GaN layer 103 ° -25- 200541115 By forming electrodes on the stack structure 13 under the same conditions as in Example 1, installing the formed coated stack structure on a sub-vehicle, disposing on a lead frame, and bonding by wiring connection, The LED can be manufactured; the stacked structure 13 is under the same conditions as in Example 1 and consists of an undoped In GaN layer 104, an undoped multi-quantum well structure light-emitting layer 105, and a p-type Alo.07Gao.93N cladding layer 106 Formed with a p-type GaN contact layer 107. Therefore, when the forward current is set to 20mA, the forward voltage is 3.5V. When a forward current of 20 mA flows, the center wavelength of the blue-band light emission is 460 nm. Regarding the characteristic part during a 20 mA forward current flow, the luminous intensity measured using a normal integrating sphere was 7 mW, and the luminous output was smaller than that when the germanium-doped GaN layer 103 was used. Industrial Applicability From the economic point of view, the light emitting device obtained using the gallium nitride-based compound semiconductor stacked structure according to the present invention has extremely high utilization cost because it exhibits an ideal light emitting output. [Brief Description of the Drawings] FIG. 1 is a schematic cross-sectional view of the stacked structure of Example 1. FIG. FIG. 2 is a schematic plan view of the LED of Example 1. FIG. ® Figure 3 is a schematic cross-sectional view of the stacked structure of Example 2. FIG. 4 is a schematic plan view of the LED of Example 2. FIG. FIG. 5 is a schematic sectional view of a stacked structure of Comparative Example 1. FIG. Fig. 6 is a cross-sectional view of a layer structure formed by a technician who uses a low germanium concentration layer to fill a pit in a high germanium concentration layer. -26-

Claims (1)

200541115 _ 十、申請專利範圍: 1. 一種m族氮化物半導體發光裝置,設於具有η型與P型 m族氮化物半導體AlxGavInzN^Ma (其中0€X€l,〇SY $1,0SZS1,X+Y+Z=l,Μ代表氮以外的V族元素, 以及0 S a &lt; 1 )的結晶基板上,包含具摻鍺區之瓜族氮化 物半導體的η型電極接觸層與具未摻雜或摻入選自Si、 C、Sn及Pb所組成之族群中之至少一種元素的區域的發 光層。 Γ、 2.如申請專利範圍第1項的裝置,其中該瓜族氮化物半導 體的η型電極接觸層設有低鍺原子濃度層及摻鍺原子的 高鍺原子濃度層。 3 .如申請專利範圍第2項的裝置,其中該低鍺原子濃度層 爲摻鍺原子的低鍺原子濃度層或未摻雜層。 4.如申請專利範圍第1至3項中任一項的裝置,其中該η 型電極接觸層由低鍺原子濃度層與高鍺原子濃度層周期 ***錯堆疊的結構形成。 ^丨5 .如申請專利範圍第2至4項中任一項的裝置,其中該高 / 鍺原子濃度層的厚度小於低鍺原子濃度層。 6.如申請專利範圍第2至5項中任一項的裝置’其中該高 鍺原子濃度層具有含凹面坑洞的表面。 7 .如申請專利範圍第2至6項中任一項的裝置’其中當厚 度爲1 On m或更大時,高鍺原子濃度層表面具有lxl〇5至 lxlO’cm2範圍的坑洞數。 8.如申請專利範圍第2至7項中之任一項的裝置,其中該 低鍺原子濃度層表面具有1 0埃或更小(以R a計算)的 -27- 200541115 平坦度。 9 ·如申請專利範圍第1至8項中之任一項的裝置,其中該 摻鍺區之鍺原子濃度爲lxl〇17cni·3或以上至lxl〇2°cm·3或以 下。 1 0 ·如申請專利範圍第1至9項中之任一項的裝置,其中該 發光層具有多量子井結構。 1 1 ·如申請專利範圍第1至1 〇項中之任一項的裝置,其中 該發光層區域摻有矽,並爲多量子井結構的阻障層。 Γ '、 1 2 ·如申請專利範圍第丨至1丨項中之任一項的裝置,其中 該發光層區域摻有矽,並具有5x1 016cm·3或以上至lx 1019cnT3或以下的矽原子濃度。 -28-200541115 _ 10. Scope of patent application: 1. An m-type nitride semiconductor light-emitting device, which is provided in an n-type and P-type m-type nitride semiconductor AlxGavInzN ^ Ma (of which 0 € X € 1, 0SY $ 1, 0SZS1, X + Y + Z = 1, where M represents a Group V element other than nitrogen, and an n-type electrode contact layer containing a cucurbit nitride semiconductor with a germanium-doped region and a non-doped crystalline substrate on a crystalline substrate of 0 S a &lt; 1) A light-emitting layer doped or doped with a region of at least one element selected from the group consisting of Si, C, Sn, and Pb. Γ, 2. The device according to item 1 of the patent application range, wherein the n-type electrode contact layer of the melon nitride semiconductor is provided with a low germanium atom concentration layer and a germanium atom-doped high germanium atom concentration layer. 3. The device according to item 2 of the patent application, wherein the low germanium atomic concentration layer is a germanium atom-doped low germanium atomic concentration layer or an undoped layer. 4. The device according to any one of claims 1 to 3, wherein the n-type electrode contact layer is formed by a structure in which a low germanium atomic concentration layer and a high germanium atomic concentration layer are periodically staggered and stacked. ^ 丨 5. The device according to any one of claims 2 to 4, wherein the thickness of the high / germanium atomic concentration layer is smaller than that of the low germanium atomic concentration layer. 6. The device according to any one of claims 2 to 5, wherein the high germanium atomic concentration layer has a surface containing concave pits. 7. The device according to any one of claims 2 to 6 of the patent application range, wherein when the thickness is 1 On m or more, the surface of the high germanium atomic concentration layer has a number of pits in the range of 1x105 to 1x10 'cm2. 8. The device according to any one of claims 2 to 7, wherein the surface of the low germanium atomic concentration layer has a flatness of -27 to 200541115 of 10 angstroms or less (calculated as Ra). 9. The device according to any one of claims 1 to 8, wherein the germanium atom concentration of the germanium-doped region is lx1017cni · 3 or more to lx102 ° cm · 3 or less. 1 0. The device according to any one of claims 1 to 9, wherein the light emitting layer has a multiple quantum well structure. 1 1. The device according to any one of claims 1 to 10, wherein the light emitting layer region is doped with silicon and is a barrier layer with a multiple quantum well structure. Γ ', 1 2 · The device according to any one of claims 丨 to 1 丨, wherein the light-emitting layer region is doped with silicon and has a silicon atom concentration of 5x1 016cm · 3 or more to lx 1019cnT3 or less . -28-
TW94113603A 2004-04-28 2005-04-28 Group III nitride semiconductor light-emitting device TWI263361B (en)

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