US20040194888A1 - Processing apparatus and method - Google Patents

Processing apparatus and method Download PDF

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Publication number
US20040194888A1
US20040194888A1 US10/814,258 US81425804A US2004194888A1 US 20040194888 A1 US20040194888 A1 US 20040194888A1 US 81425804 A US81425804 A US 81425804A US 2004194888 A1 US2004194888 A1 US 2004194888A1
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Prior art keywords
processing
chamber
substrate
electrostatic chuck
processed
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English (en)
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Takashi Ito
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Publication of US20040194888A1 publication Critical patent/US20040194888A1/en
Priority to US12/238,066 priority Critical patent/US8017525B2/en
Abandoned legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67063Apparatus for fluid treatment for etching
    • H01L21/67069Apparatus for fluid treatment for etching for drying etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67155Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67161Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
    • H01L21/67167Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers surrounding a central transfer chamber
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67155Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67207Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67155Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67236Apparatus for manufacturing or treating in a plurality of work-stations the substrates being processed being not semiconductor wafers, e.g. leadframes or chips
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/76808Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving intermediate temporary filling with material

Definitions

  • the present invention relates to a multichamber-type processing apparatus having an arrangement in which a transfer chamber is coupled to a plurality of processing chambers for etching or ashing a substrate to be processed, and a processing method using same.
  • a multichamber-type processing apparatus which includes a transfer chamber provided with a transfer arm and coupled to a plurality of processing chambers via gate valves, is known as a processing apparatus for performing etching, ashing, and deposition processes on a plurality of substrates, such as semiconductor wafers or glass substrates, producing high throughput.
  • a processing apparatus for performing etching, ashing, and deposition processes on a plurality of substrates, such as semiconductor wafers or glass substrates, producing high throughput.
  • An electrostatic chuck is frequently used as a jig to electrostatically adsorb a substrate to be processed, such as a semiconductor wafer in a processing chamber.
  • Such electrostatic chuck incorporates therein an electrode embedded in a dielectric member, and by applying a direct current to the electrode the substrate is electrostatically adsorbed to a surface of the dielectric member by an electrostatic force, such as a Johnsen-Rahbek force or a Coulomb force.
  • the charge on the substrate needs to be neutralized.
  • a method of applying a current having an opposite polarity to the current applied to an electrode when a substrate is electrostatically adsorbed to an electrostatic chuck as disclosed in Japanese Patent Laid-open Publication 1997-213780 and a method of neutralizing charge on an object to be processed which is electrostatically adsorbed to an electrostatic chuck, by supplying ionized processing gas thereto as disclosed in Japanese Patent Laid-open Publication No. 1994-275546.
  • a processing apparatus including: a transfer chamber; a plurality of processing chambers for processing therein a substrate to be processed, the processing chambers being coupled to the transfer chamber; a number of electrostatic chucks which are provided in the processing chambers, to electrostatically adsorb the substrate to be processed thereto; a transfer mechanism installed in the transfer chamber to transfer the substrate to be processed between the processing chambers and the transfer chamber; and a monatomic nitrogen atom supply unit for supplying dissociated monatomic nitrogen N (hereinafter N) atoms into the processing chambers.
  • N dissociated monatomic nitrogen N
  • a processing apparatus including: a transfer chamber; a first processing chamber coupled to the transfer chamber, the first processing chamber performing therein a first process on a substrate to be processed; a second processing chamber coupled to the transfer chamber, the second processing chamber performing therein a second process on the substrate to be processed; a transfer mechanism installed in the transfer chamber for sequentially transferring the substrate to be processed into the first and second processing chamber; electrostatic chucks provided in the first and the second processing chambers, the electrostatic chucks electrostatically adsorbing thereto the substrate to be processed; and a monatomic nitrogen atom supply unit for supplying dissociated monatomic N atoms into the first and second processing chamber.
  • a processing method employing a processing apparatus, which includes a transfer chamber, a plurality of processing chambers coupled to the transfer chamber, to process therein a target substrate, and a number of electrostatic chucks provided in the processing chambers to electrostatically adsorb the target substrate thereto, including the steps of: transferring the target substrate from the transfer chamber into one of the processing chambers by using a transfer mechanism; placing the target substrate on an electrostatic chuck displaced in said one processing chamber; applying a direct current to an electrode embedded in the electrostatic chuck to electrostatically absorb the target substrate to the electrostatic chuck; processing the target substrate in said one processing chamber, to thereby obtain a processed substrate; terminating the application of the direct current to the electrostatic chuck; supplying dissociated monatomic N atoms into said one processing chamber to remove charge on the electrostatic chuck; and transferring the processed substrate into the transfer chamber using the transfer mechanism.
  • a processing method using a processing apparatus which includes a transfer chamber, a first processing chamber coupled to the transfer chamber, for performing a first process on a target substrate therein, a second processing chamber coupled to the transfer chamber for performing a second process on the target substrate therein, and a first and second electrostatic chucks provided in the first and second processing chambers, respectively, to electrostatically adsorb the substrate thereto, including the steps of: transferring the target substrate from the transfer chamber into the first processing chamber using a transfer mechanism; placing the target substrate on the first electrostatic chuck in the first processing chamber; applying a direct current to an electrode of the first electrostatic chuck to electrostatically adsorb the target substrate to the first electrostatic chuck; performing a first process on the target substrate in the first processing chamber to thereby obtain a processed substrate; terminating the application of the direct current to the first electrostatic chuck; supplying dissociated monatomic N atoms into the first processing chamber to remove charge on
  • N was employed, however, there are elements such as F, O, and Cl that have the electronegativity greater than or equivalent to that of N. Since, however, F reacts with SiO 2 formed on the substrate; O reacts with a resist; and Cl reacts with Si, N is preferred over F, O, and Cl. Furthermore, N is a non-toxic, non-explosive, incombustible, and relatively cheap substance. Moreover, its treatment is relatively easy, which makes N more of a preferred choice over the other elements.
  • the dissociated monatomic N atoms be supplied near the electrostatic chuck, thereby reliably removing a charge on a substrate adsorbed to the electrostatic chuck.
  • a charge on a substrate supporting unit of a transfer mechanism or on the substrate mounted thereon may be removed by supplying the dissociated monatomic N atoms into the transfer chamber, thereby further preventing ill effects of electric charge.
  • a charge on the substrate is removed at a desired time by controlling a supply timing of the dissociated monatomic N atoms, to effectively remove charge on the substrate.
  • the energy supply unit may include an ultraviolet irradiation unit for irradiating ultraviolet ray to the N 2 gas.
  • a portion of a pipe may be made of a dielectric material, and an induction coil as the energy supply unit may be wound around the dielectric portion of the pipe, wherein a high frequency source applies a high frequency to the induction coil.
  • the dissociated monatomic N atoms may be effectively generated by applying energy, higher than dissociation energy of the N 2 gas and lower than ionization energy of the N 2 gas, to the N 2 gas.
  • energy higher than dissociation energy of the N 2 gas and lower than ionization energy of the N 2 gas
  • the energy applied to the N 2 gas is lower than the dissociation energy
  • the N 2 gas is not dissociated into the monatomic N atoms.
  • the energy applied to the N 2 gas is higher than the ionization energy, more N ions are generated than the dissociated monatomic N atoms, which damages the substrate.
  • FIG. 1 schematically illustrates a multichamber-type processing apparatus in accordance with the first embodiment of the present invention
  • FIG. 2 sets forth an etching chamber provided in the multichamber-type processing apparatus shown in FIG. 1;
  • FIGS. 3A to 3 C are cross sectional views illustrating the etching and ashing of a substrate using the multichamber-type processing apparatus shown in FIG. 1;
  • FIG. 4 is a flow chart describing the etching and ashing of the substrate using the multichamber-type processing apparatus shown in FIG. 1;
  • FIGS. 5A and 5B are cross sectional views illustrating states in which trench-etching, ashing, and liner-removal of the substrate shown in FIG. 3 are performed;
  • FIG. 6 is a cross sectional view of a transfer chamber capable of being neutralized
  • FIG. 7 is a cross sectional view illustrating part of another etching chamber using a monatomic nitrogen atom supply unit.
  • FIG. 1 There is schematically illustrated in FIG. 1 a vacuum processing apparatus in accordance with a first embodiment of the present invention.
  • the vacuum processing apparatus is a multichamber-type processing apparatus used in etching and ashing processes, for etching and ashing an object to be processed, such as a semiconductor wafer (hereinafter, referred to as “wafer”) under a predetermined level of vacuum.
  • wafer semiconductor wafer
  • the multichamber-type processing apparatus 100 includes two etching chambers 1 a, 1 b for etching the wafer W, and two ashing chambers 2 a, 2 b for ashing the wafer W, wherein the etching and ashing chambers 1 a, 1 b, 2 a, 2 b are mounted on four sides of a hexagonal transfer chamber 3 , respectively.
  • the two remaining sides of the hexagonal transfer chamber 3 are provided with wafer cassette chambers 4 a, 4 b, respectively, which accommodate therein a cassette 5 having a plurality of wafers W mounted therein.
  • Each of the etching chambers 1 a, 1 b and the ashing chambers 2 a, 2 b includes a susceptor 15 on which the wafers W mounted.
  • the etching chambers 1 a, 1 b, ashing chambers 2 a, 2 b, and wafer cassette chambers 4 a, 4 b are connected to the respective sides of the transfer chamber 3 via respective gate valves G as shown in FIG. 1 such that by opening the gate valve G the corresponding chamber communicates with the transfer chamber 3 , and by shutting the gate valve G, the corresponding chamber becomes isolated.
  • a wafer transfer mechanism 6 is installed in the transfer chamber 3 to take the object to be processed, e.g., wafer W, out of and into the etching chambers 1 a, 1 b, ashing chambers 2 a, 2 b, and wafer cassette chambers 4 a, 4 b.
  • the wafer transfer mechanism 6 is positioned at a substantially center portion of the transfer chamber 3 , and has a multi-joint arm structure.
  • a hand 7 at an end portion thereof on which the wafer W is mounted to carry the wafer W.
  • an aligning unit 8 is installed near the wafer cassette chambers 4 a, 4 b in the transfer chamber 3 to align the wafers W.
  • the etching chambers 1 a, 1 b, the ashing chambers 2 a, 2 b, and the transfer chamber 3 are all maintained under predetermined vacuum conditions.
  • the wafer cassette chambers 4 a, 4 b when cassettes 5 are transferred into and from the wafer cassette chambers 4 a, 4 b through openings (not shown) provided at the wafer cassette chambers 4 a, 4 b, an atmospheric pressure is established therein, however when the cassettes 5 are loaded in the cassette chambers 4 a, 4 b for processing, the cassette chambers 4 a, 4 b are under a predetermined level of vacuum.
  • FIG. 2 illustrates an etching chamber 1 a.
  • the etching chamber 1 a includes a chamber 12 made of a metal, such as aluminum having a surface thereof oxidized, wherein the chamber 12 is frame-grounded.
  • a susceptor 15 serving as a lower electrode of a plate electrode is provided on the floor of the chamber 12 via an insulator 13 . Further, the susceptor 15 is connected to a high pass filter 16 (HPF).
  • HPF high pass filter
  • An electrostatic chuck 21 having the wafer W mounted thereon is provided on the susceptor 15 , and electrostatically adsorbs the wafer W thereto, to thereby prevent the wafer W from being moved on the electrostatic chuck 21 .
  • the electrostatic chuck 21 is structured such that an electrode 22 is embedded in a dielectric member 21 a.
  • a direct current is applied to the electrode 22 from a direct current (DC) power supply 23 connected to the electrode 22
  • the wafer W is electrostatically adsorbed to the electrostatic chuck 21 by an electrostatic force, such as a Johnsen-Rahbek force or a Coulomb force.
  • a focus ring 25 made of Si is provided to surround the wafer W, to thereby enhance uniformity in etching of the wafer W.
  • lift pins 24 are elevatably installed in the susceptor 15 to be penetrated through a surface of the electrostatic chuck 21 , and are vertically moved by a cylinder 26 .
  • a shower head 31 facing the susceptor 15 is installed thereabove to supply a gas into the chamber 12 .
  • the shower head 31 serves as an upper electrode, and is supported in an upper part of the chamber 12 through the insulator 32 .
  • the shower head 31 includes an electrode plate 34 having a plurality of holes and a supporting member 35 for supporting the electrode plate 34 .
  • a gas inlet 36 is formed at a substantially center portion of an upper part of the supporting member 35 , and is connected to one of two ends of a gas supply line 37 , whereas the other end of the gas supply line 37 is connected to an etching gas source 40 via a mass flow controller 38 .
  • Valves 39 are positioned at both an inlet and outlet side of the mass flow controller 38 installed at the gas supply line 37 .
  • An etching gas including, for example, a halogen element F, is supplied from the etching gas source 40 to the chamber 12 through the shower head 31 .
  • An exhaust line 41 connected to a gas exhaust unit 45 is provided at a bottom portion of the chamber 12 . Additionally, a gate valve G is installed at a sidewall of the chamber 12 so that the wafer W can be transferred between the chamber 12 and the neighboring transfer chamber 3 .
  • the shower head 31 serving as the upper electrode is connected to a low pass filter (LPF) 52 and a high frequency power supply 50 via a matching unit 51 .
  • the susceptor 15 serving as the lower electrode is connected to a high frequency power supply 60 via a matching unit 61 .
  • One end of a gas line 71 is connected to the gas supply line 37 , and the other end thereof is connected to a N 2 gas supply source 70 for supplying an N 2 gas used as a charge removal gas into the chamber 12 .
  • a valve 72 is installed at the gas line 71 .
  • an ultraviolet irradiation unit 75 including an ultraviolet irradiation lamp is provided at the sidewall of the chamber 12 such that the ultraviolet irradiation unit 75 is positioned close to the electrostatic chuck 21 , and is connected to an ultraviolet irradiation power supply 76 .
  • the valve 72 and ultraviolet irradiation power supply 76 are controlled by a charge removal controller 80 .
  • the charge removal controller 80 signals the valve 72 to be opened at a predetermined timing to supply the N 2 gas from the N 2 gas supply source 70 through the shower head 31 into the chamber 12 .
  • the charge removal controller 80 signals the ultraviolet irradiation power supply 76 to be turned on at a predetermined timing to irradiate ultraviolet ray from the ultraviolet irradiation unit 75 to the N 2 gas, thereby dissociating and converting the N 2 gas to monatomic N atoms in the chamber 12 .
  • the monatomic N atoms contribute to charge removal of the wafers W electrically charged on the electrostatic chuck 21 .
  • An etching chamber 1 b has the same structure as the etching chamber 1 a. Furthermore, the ashing chambers 2 a, 2 b each have the same structure as the etching chamber 1 a with a minor exception of, e.g., using O 2 gas as an ashing gas and a processing pressure different from that of the etching chamber 1 a.
  • a liner layer 82 made of SiN or SiC is formed on a bottom layer, i.e., Cu wire 81 , and a low-k film 83 is formed thereon.
  • a via hole 86 is formed in the low-k film 83 by employing a resist film 85 as a mask.
  • the first resist film 85 is removed from the structure by an ashing process and a sacrificial film 87 is formed, as shown in FIG. 3B.
  • a resist film 88 to be used in a trench etching process is formed on the sacrificial film 87 .
  • the cassette 5 is loaded into one or both of the wafer cassette chambers 4 a, 4 b of the multichamber-type processing apparatus 100 (step 1 ).
  • the wafers W may be mounted in both cassettes 5 of the wafer cassette chambers 4 a, 4 b, or in just one cassette 5 of the wafer cassette chambers 4 a, 4 b, leaving the other cassette 5 empty.
  • ambient pressures of the transfer chamber 3 , etching chambers 1 a, 1 b, and ashing chambers 2 a, 2 b are under predetermined vacuum levels.
  • the ambient pressure of the wafer cassette chambers 4 a, 4 b becomes atmospheric, but prior to processing of the wafer W, the wafer cassette chambers 4 a, 4 b are evacuated, thereby establishing predetermined vacuum levels therein.
  • the hand 7 of the wafer transfer mechanism 6 of the transfer chamber 3 enters one of the wafer cassette chambers 4 a or 4 b, and a single wafer W is placed on the hand 7 (step 2 ).
  • the wafer transfer mechanism 6 transfers the wafer W to a position in the transfer chamber 3 adjacent to the etching chamber 1 a while carrying the wafer W on the hand 7 , the gate valve G between the etching chamber 1 a and the transfer chamber 3 is opened, and the wafer W is transferred into the etching chamber 1 a (step 3 ).
  • the wafer W is then mounted on an electrostatic chuck 21 in the etching chamber 1 a (step 4 ).
  • the hand 7 transfers the wafer W onto the lift pin 24 protruding from the electrostatic chuck 21 , and after the hand 7 is retracted from the etching chamber 1 a out to the transfer chamber 3 the lift pin 24 is then lowered, to place the wafer W on the electrostatic chuck 21 .
  • the direct current is applied to the electrode 22 embedded in the electrostatic chuck 21 from the DC power supply 23 to electrostatically adsorb the wafer W to the electrostatic chuck 21 by the electrostatic force, such as the Coulomb force or the Johnsen-Rahbek force (step 5 ).
  • the etching chamber 1 a is preset to have a lower ambient pressure than that of the transfer chamber 3 , thereby preventing small amounts of residual gas containing F from flowing from the etching chamber 1 a into the transfer chamber 3 when the gate valve G is opened.
  • valves 39 are opened to supply an etching gas of a predetermined flow rate from the etching gas source 40 through the shower head 31 into the chamber 12 , and the gas exhaust unit 45 is controlled to maintain an ambient pressure of the chamber 12 ranging from about 1 to about 10 Pa.
  • the high frequency power is applied from the high frequency power supply 50 and the high frequency power supply 60 to the shower head 31 serving as the upper electrode and the susceptor 15 serving as the lower electrode, respectively, enabling a generation of a plasma with the etching gas in order to etch the low-k film 83 of the wafer W to form the trench 89 on the wafer W (step 6 ), as shown in FIG. 5A.
  • step 7 the supplying of the etching gas into the chamber 12 along with the application of the direct current to the electrostatic chuck 21 is stopped.
  • the chamber 12 is then purged using a purge gas (step 8 ).
  • the N 2 gas is supplied from the N 2 gas supply source 70 through the shower head 31 into the chamber 12 , while the ultraviolet ray is irradiated from the ultraviolet irradiation unit 75 to the N 2 gas to convert the N 2 gas into the monatomic N atoms.
  • the monatomic N atoms are supplied into the chamber 12 to remove the charge on the wafer W on the electrostatic chuck 21 (step 9 ).
  • a pressure of the chamber 12 is adjusted; the gate valve G is opened; and the lift pin 24 emerges from the electrostatic chuck 21 to lift the wafer W from the electrostatic chuck 21 .
  • the hand 7 of the wafer transfer mechanism 6 is inserted into the chamber 12 to receive the wafer W (step 10 ).
  • the wafer W is transferred from the etching chamber 1 a into the transfer chamber 3 , and is placed on the aligning unit 8 to be aligned. Thereafter, the wafer W is transferred using the wafer transfer mechanism 6 to a position in the transfer chamber 3 adjacent to an ashing chamber 2 a, a gate valve G between the ashing chamber 2 a and the transfer chamber 3 is opened, and the wafer W is transferred into the ashing chamber 2 a (step 11 ).
  • the wafer W is placed on an electrostatic chuck in the ashing chamber 2 a (step 12 ). Similar to the case of etching chamber 1 a, the wafer W is electrostatically adsorbed to the electrostatic chuck (step 13 ).
  • the ashing gas such as O 2 gas
  • O 2 gas is used in the ashing process. Because the ashing process is conducted at higher pressure than in the case of the etching process, the ashing chamber 2 a has higher ambient pressure than the transfer chamber 3 , thereby preventing the compounds, containing F, from flowing from the transfer chamber 3 into the ashing chamber 2 a.
  • the ashing gas of a predetermined flow rate is supplied from an ashing gas source (not shown) through the shower head 31 into the chamber 12 , and the gas exhaust unit 45 is controlled to maintain an ambient pressure of the chamber 12 ranging from 10 to 20 Pa. Additionally, the ashing gas is converted into a plasma to remove the sacrificial film 87 and a resist film 88 through the ashing process and to simultaneously remove an exposed portion of the liner layer 82 (step 14 ), as shown in FIG. 5B.
  • step 15 the supplying of the ashing gas into the chamber 12 is stopped and the application of the direct current to the electrostatic chuck 21 is simultaneously stopped.
  • the chamber 12 of the ashing chamber 2 a is then purged using the purge gas (step 16 ).
  • charge on the wafer W adsorbed to the electrostatic chuck 21 is subject to charge removal(step 17 ), similar to the etching process.
  • a wafer W is transferred by use of the wafer transfer mechanism 6 into the etching chamber 1 b to be etched and then transferred from the etching chamber 1 b into the ashing chamber 2 b to be ashed.
  • the etching and ashing processes are conducted using the two sets of etching chambers and ashing chambers, thereby ensuring a relatively high throughput.
  • the dissociated monatomic N atoms are used to remove the charge on the wafer W.
  • the monatomic N atoms do not incur damages to the wafer W unlike nitrogen ions and plasmas, while quickly and reliably capturing electrons from the wafer W by merely supplying same to the wafer W.
  • the dissociated monatomic N atoms have lower energy than the nitrogen ions and plasmas, damage to the wafer W by the monatomic N atoms is relatively small.
  • the multichamber-type processing apparatus 100 ensures excellent accuracy and throughput.
  • energy of the ultraviolet ray required to produce the dissociated monatomic N atoms is controlled to be higher than the dissociation energy of N 2 and less than ionization energy of N 2 , so as to effectively convert the N 2 gas into the monatomic N atoms without ionizing the N 2 gas.
  • the dissociation energy of N 2 is about 9.8 eV at 0 K and the ionization energy of N 2 is about 15.6 eV at 0 K
  • the energy of the ultraviolet ray irradiated to the N 2 gas be about 9.8 to about 15.6 eV at a temperature of 0 K.
  • the etching chambers 1 a, 1 b each have lower ambient pressure than the transfer chamber 3 and the ashing chambers 2 a, 2 b each have higher ambient pressure than the transfer chamber 3 , even a small amount of residual etching gas in etching chambers 1 a, 1 b, which contains halogen gas is prevented from flowing into the transfer chamber 3 . Additionally, even in a case of the etching gas leaking from the etching chambers 1 a, 1 b into the transfer chamber 3 , the flow of the etching gas from the transfer chamber 3 into the ashing chambers 2 a, 2 b is substantially prevented.
  • the aligning unit 8 is installed in the transfer chamber 3 to align the wafer W with the hand 7 , thereby further improving accuracy in aligning the wafer W with the hand 7 .
  • charge on the hand 7 may be preferably removed before or after the wafer W is loaded from the hand 7 to the electrostatic chuck 21 ; at the time when the wafer W is loaded from the hand 7 to the electrostatic chuck 21 ; before or after the hand 7 receives the wafer W from the electrostatic chuck 21 ; or at the time when the hand 7 receives the wafer W from the electrostatic chuck 21 . As shown in FIG.
  • an N 2 gas inlet 91 and an ultraviolet irradiation unit 92 may be installed in the transfer chamber 3 to remove the charge on the hand 7 and wafer W in the transfer chamber 3 .
  • the N 2 gas supply source 70 and the etching gas source 40 are separately installed in the processing apparatus 100 , but the etching gas may be supplied through the N 2 gas supply source 70 into the chamber 12 in the case of using the N 2 gas as the etching gas.
  • FIG. 7 there is illustrated another etching chamber using a monatomic nitrogen atom supply unit.
  • the same reference numerals refer to the same elements throughout, and description thereof is omitted.
  • an end of a gas pipe 93 made of a dielectric material communicates with the inside of the chamber 12 through a sidewall of the chamber 12 , and the other end of the gas pipe 93 is connected to a N 2 gas supply source 94 .
  • the wafer W in the chamber 12 is positioned close to the gas pipe 93 .
  • an induction coil 96 is wound around the gas pipe 93 , and the high frequency power is applied from a high frequency power supply 97 to the induction coil 96 .
  • a valve 95 is installed at the gas pipe 93 .
  • the valve 95 is opened to supply the N 2 gas from the N 2 gas supply source 94 through the gas pipe 93 into the etching chamber 12 , and the high frequency is simultaneously applied from the high frequency power supply 97 to the induction coil 96 .
  • the N 2 gas passing through the gas pipe 93 is dissociated to the monatomic N atoms due to an electromagnetic induction, and thus the monatomic N atoms are supplied into the chamber 12 . Accordingly, the wafer W is effectively neutralized without being damaged.
  • energy applied from the high frequency power supply 97 to the induction coil 96 is higher than the dissociation energy of N 2 and less than the ionization energy of N 2 .
  • the processing apparatus is described to include the two etching chambers and the two ashing chambers, however, it may only include one etching chamber and one ashing chamber, or the three or more etching chambers and the three or more ashing chambers.
  • the present invention only the trench etching and ashing processes according to the dual damascene structure are disclosed. However, the present invention may be applied to etching and ashing processes for other structures. Further, the present invention may be applied to a repeating processing of different types of etching processes. Furthermore, the present invention may be applied to a film-formation process as well as the etching and ashing processes. Moreover, a unit for supplying the dissociated monatomic N atoms into the chamber can be variously modified within the scope of the appended claims.
  • the semiconductor wafer is used as a substrate, but the present invention may be applied to the other substrates, such as glass substrates for LCD.
  • the present invention provides a multichamber-type processing apparatus, which includes the transfer chamber and the processing chambers connected thereto, in which dissociated monatomic N atoms are supplied into the processing chambers. Accordingly, the substrate electrostatically adsorbed to an electrostatic chuck is quickly and reliably neutralized by relatively low energy without being damaged, thereby ensuring excellent accuracy and throughput.

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  • Condensed Matter Physics & Semiconductors (AREA)
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US20050287813A1 (en) * 2004-06-29 2005-12-29 Takeshi Kikawa Manufacturing method of semiconductor device and semiconductor manufacturing apparatus
US20060137988A1 (en) * 2004-12-28 2006-06-29 Kabushiki Kaisha Toshiba Semiconductor manufacturing apparatus and manufacturing method of semiconductor device
US20100166980A1 (en) * 2008-12-26 2010-07-01 Canon Anelva Corporation Inline vacuum processing apparatus, method of controlling the same, and information recording medium manufacturing method
US20110171830A1 (en) * 2004-11-01 2011-07-14 Tokyo Electron Limited Substrate processing method, system and program
US20120031330A1 (en) * 2010-08-04 2012-02-09 Toshiro Tsumori Semiconductor substrate manufacturing apparatus

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JP4688764B2 (ja) * 2006-09-19 2011-05-25 東京エレクトロン株式会社 基板処理装置の載置台除電方法
US20080247114A1 (en) * 2007-04-06 2008-10-09 Yeo Jong-Mo Method for removing static electricity from a plate
JP2012181445A (ja) 2011-03-02 2012-09-20 Seiko Epson Corp 電気装置
JP6770428B2 (ja) * 2016-12-28 2020-10-14 株式会社Screenホールディングス 除電装置および除電方法
KR20210119203A (ko) * 2020-03-24 2021-10-05 (주)선재하이테크 진공자외선을 이용한 정전기제거장치의 온오프 제어 시스템
KR20230085050A (ko) * 2021-12-06 2023-06-13 (주)선재하이테크 진공 챔버용 플렉시블 진공자외선 이오나이저

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US20050287813A1 (en) * 2004-06-29 2005-12-29 Takeshi Kikawa Manufacturing method of semiconductor device and semiconductor manufacturing apparatus
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US8257601B2 (en) * 2004-11-01 2012-09-04 Tokyo Electron Limited Substrate processing method, system and program
US8475623B2 (en) 2004-11-01 2013-07-02 Tokyo Electron Limited Substrate processing method, system and program
US20060137988A1 (en) * 2004-12-28 2006-06-29 Kabushiki Kaisha Toshiba Semiconductor manufacturing apparatus and manufacturing method of semiconductor device
US20100166980A1 (en) * 2008-12-26 2010-07-01 Canon Anelva Corporation Inline vacuum processing apparatus, method of controlling the same, and information recording medium manufacturing method
US8900363B2 (en) * 2008-12-26 2014-12-02 Canon Anelva Corporation Inline vacuum processing apparatus, method of controlling the same, and information recording medium manufacturing method
US20120031330A1 (en) * 2010-08-04 2012-02-09 Toshiro Tsumori Semiconductor substrate manufacturing apparatus
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US8017525B2 (en) 2011-09-13
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JP4372443B2 (ja) 2009-11-25

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