TWI826692B - 晶圓之製造方法以及層積元件晶片之製造方法 - Google Patents
晶圓之製造方法以及層積元件晶片之製造方法 Download PDFInfo
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Abstract
[課題] 提供一種晶圓之製造方法,可抑制層積元件晶片的良率下降。[解決手段] 一種晶圓之製造方法,其具備:晶圓準備步驟,準備晶圓,所述晶圓在藉由互相交叉之多條切割道所劃分的多個區域分別形成有半導體元件;挖空步驟,判別形成於晶圓的多個半導體元件分別是良品或不良品,並將包含已被判別為不良品之半導體元件的不良元件區域從晶圓挖空;及嵌入步驟,將元件晶片嵌入藉由不良元件區域的挖空而形成之空隙,該元件晶片具備與已被判別為不良品的半導體元件具有相同的功能之良品的半導體元件,且為可嵌入空隙之尺寸。
Description
本發明是關於一種具備多個半導體元件的晶圓之製造方法,以及一種具備經層積之多個半導體元件的層積元件晶片之製造方法。
將在藉由切割道(分割預定線)所劃分之區域的正面側分別形成有IC(Integrated Circuit,積體電路)、LSI(Large Scale Integration,大型積體電路)等之半導體元件的晶圓,沿著切割道進行分割,藉此製造具備半導體元件的多個元件晶片。此外,藉由將多個元件晶片封裝化,製造具備預定功能的封裝晶片。此封裝晶片裝配在諸如行動電話或個人電腦等的各種電子設備。
近年來,製造具備經層積的多個半導體元件之元件晶片(層積元件晶片)的技術正在實用化。例如,藉由層積多個元件晶片,並且以貫通元件晶片上下的貫通電極(TSV:Through-Silicon Via,矽通孔)連接半導體元件彼此,而得到層積元件晶片。將使用此貫通電極與使用引線接合等之情況進行比較,因為可以縮短連接半導體元件彼此的配線,所以能夠謀求層積元件晶片的小型化及提升處理速度。
此外,作為層積元件晶片之製造方法,也有提出一種稱為晶圓堆疊(WoW, Wafer on Wafer)的方法。在此方法中,藉由層積多片晶圓,並且以貫穿被層積之晶圓的方式而形成的電極連接各晶圓具備的半導體元件彼此,而形成層積晶圓。藉由沿著切割道分割此層積晶圓,而製造層積元件晶片。
另外,有時在用於製造層積元件晶片的晶圓會包含有半導體元件的不良品(不良元件)。然後,若使用包含此不良元件的晶圓,則會製造出包含不良元件的層積元件晶片。若層積元件晶片所包含之部分的半導體元件是不良品,則即使其他的半導體元件是良品,作為層積元件晶片整體也會被判別成不良品(不良晶片)。因此,在層積元件晶片的製造中,因為不良晶片而導致良率下降的影響很大。
於是,在層積多片晶圓前,有時要實施判別各晶圓所包含之半導體元件分別為良品或不良品的檢查。然後,例如基於晶圓所包含之不良元件的數目或配置,決定用於製造層積元件晶片之晶圓的最適當的組合(例如,參照專利文獻1)。藉此,將包含不良元件之層積元件晶片的數目壓至最小限度,抑制良率的下降。
[習知技術文獻]
[專利文獻]
[專利文獻1] 日本特開2012-134334號公報
[發明所欲解決的課題]
如上述,即使晶圓包含有不良元件,也會基於半導體元件的檢查結果而決定晶圓的組合,藉此能夠將包含不良元件之層積元件晶片(不良晶片)的數目壓至最小限度。然而,既然晶圓包含有不良元件,若使用此晶圓製造層積元件晶片,則會製造出至少一定數目的不良晶片。因此,降低不良晶片的數目會有極限。
本發明是鑑於此問題而完成的發明,目的在於提供一種可抑制層積元件晶片的良率下降的晶圓之製造方法,以及一種使用該晶圓的層積元件晶片之製造方法。
[解決課題的技術手段]
根據本發明之一態樣,提供一種晶圓之製造方法,其具備:晶圓準備步驟,準備晶圓,所述晶圓在藉由互相交叉之多條切割道所劃分的多個區域分別形成有半導體元件;挖空步驟,判別形成於該晶圓的多個該半導體元件分別是良品或不良品,並將包含已被判別為不良品之該半導體元件的不良元件區域從該晶圓挖空;及嵌入步驟,將元件晶片嵌入藉由該不良元件區域的挖空而形成之空隙,該元件晶片具備與已被判別為不良品的該半導體元件具有相同的功能之良品的半導體元件,且為可嵌入該空隙之尺寸。
此外,根據本發明之一態樣,提供一種層積元件晶片之製造方法,其具備:晶圓準備步驟,準備多片晶圓,所述晶圓在藉由互相交叉之多條切割道所劃分的多個區域分別形成有半導體元件;挖空步驟,判別形成於一片之該晶圓的多個該半導體元件分別是良品或不良品,並將包含已被判別為不良品之該半導體元件的不良元件區域從該晶圓挖空;嵌入步驟,將該晶圓固定於支撐晶圓後,將元件晶片嵌入藉由該不良元件區域的挖空而形成之空隙,該元件晶片具備與已被判別為不良品的該半導體元件具有相同的功能之良品的半導體元件,且為可嵌入該空隙之尺寸;樹脂充填步驟,在被嵌入的該元件晶片與該晶圓之間充填樹脂;薄化步驟,在實施該樹脂充填步驟之後,薄化該晶圓;晶圓層積步驟,在被薄化的該晶圓上,層積在該晶圓準備步驟所準備之其他的晶圓,並且對該其他的晶圓實施該挖空步驟、該嵌入步驟及該樹脂充填步驟,而形成具備經層積之多片晶圓的層積晶圓;及分割步驟,藉由沿著該切割道分割該層積晶圓,而形成具備經層積之多個該半導體元件的層積元件晶片。
另外,也可在該晶圓層積步驟中,於被薄化的該晶圓上,層積在該晶圓準備步驟所準備之多片其他的晶圓,並且對多片該其他的晶圓實施該挖空步驟、該嵌入步驟及該樹脂充填步驟。
[發明功效]
本發明之一態樣的晶圓之製造方法,具備:挖空步驟,將包含已被判別為不良品之半導體元件的不良元件區域從晶圓挖空;及嵌入步驟,將具備良品之半導體元件的元件晶片嵌入藉由不良元件區域的挖空而形成的空隙,該良品之半導體元件具有與已被判別為不良品的半導體元件相同的功能。
根據上述的晶圓之製造方法,可製造不包含不良元件的晶圓。然後,可將以此方式所製造的晶圓層積而形成層積晶圓,並藉由分割此層積晶圓,而形成不包含不良元件的層積元件晶片。藉此,抑制層積元件晶片的良率下降。
以下,參照隨附圖式說明本發明的實施方式。首先,說明關於本實施方式之晶圓的構成例。圖1(A)為表示晶圓11的立體圖,圖1(B)為表示晶圓11的剖面圖。
晶圓11例如是已形成為圓盤狀的矽晶圓,具備正面11a及背面11b。晶圓11藉由以互相交叉的方式而排列成格子狀之多條切割道(分割預定線)13而被劃分成多個區域,並在此區域的正面11a側分別形成有IC(Integrated Circuit)、LSI(Large Scale Integration)等的半導體元件15。
另外,晶圓11的材質、形狀、構造、大小等並無限制。例如晶圓11也可為以矽以外的半導體(GaAs、InP、GaN、SiC等)、玻璃、陶瓷、樹脂、金屬等之材料形成的晶圓。此外,半導體元件15的種類、數量、形狀、構造、大小、配置等也無限制。
圖1(C)為放大表示半導體元件15的立體圖。半導體元件15具備多個電極17,所述多個電極17於半導體元件15的正面露出,且與其他的配線、電極、半導體元件等連接。另外,在電極17的正面也可形成凸塊等的連接電極。
此外,在藉由切割道13所劃分之多個區域的內部分別埋入有與半導體元件15連接的多個電極(通孔電極、貫通電極)19。電極19沿著晶圓11的厚度方向形成為柱狀,例如與半導體元件15的電極17連接。電極17與電極19分別位於半導體元件15的兩側。
電極19分別從半導體元件15朝向晶圓11的背面11b側配置,其前端從半導體元件15的背面隔開間隔,且其長度(高度)未達晶圓11的厚度。因此,電極19不會露出於晶圓11的背面11b,而成為埋沒在晶圓11之內部的狀態。另外,電極19的材質並無限制,例如藉由銅、鎢、鋁等的金屬形成電極19。此外,在晶圓11與電極19之間也可形成絕緣晶圓11與電極19的絕緣層。
若對晶圓11的背面11b側實施研削加工或電漿蝕刻等而薄化晶圓11,則電極19於晶圓11的背面11b側露出。然後準備多片具備於背面11b側露出之電極19的晶圓11並層積,則已形成於各晶圓11之半導體元件15以互相重疊的方式層積,並且半導體元件15彼此透過電極19而連接。
然後,對具備經層積之多片晶圓11的層積晶圓實施切割加工或雷射加工等,且沿著切割道13分割層積晶圓。其結果,製造具備經層積之多個半導體元件15的元件晶片(層積元件晶片)。
另外,有時晶圓11會包含有半導體元件15的不良品(不良元件)。在圖1(A)及圖1(B)表示了晶圓11包含有不良元件15a的例子。此不良元件15a例如相當於未滿足預先設定之預定電特性的基準的半導體元件15。
若將包含不良元件15a的晶圓11層積且形成層積晶圓,並將此層積晶圓分割,則會製造包含不良元件15a的層積元件晶片。然後,若層積元件晶片所包含之部分的半導體元件15是不良品15a,則即使其他的半導體元件15是良品,作為層積元件晶片整體也會被判別成不良品(不良晶片)。
於是,在本實施方式的晶圓之製造方法中,從晶圓11挖空不良元件15a,且將良品的半導體元件15嵌入藉由此挖空而形成於晶圓11的空隙。藉此,製造不包含不良元件15a的晶圓11。以下,說明本實施方式的晶圓之製造方法的具體例。
首先,準備晶圓11(參照圖1(A)),所述晶圓11在藉由互相交叉之多條切割道13所劃分的多個區域分別形成有半導體元件15(晶圓準備步驟)。另外,因為要藉由在之後的步驟層積多片晶圓11而形成層積晶圓,所以較佳為在晶圓準備步驟先準備多片的晶圓11。此外,於此處說明關於在晶圓準備步驟所準備之一晶圓11包含有不良元件15a的情況。
接著,對晶圓11所包含的每個半導體元件15,實施判別半導體元件15是良品或不良品的檢查。在半導體元件15的檢查中,例如以金屬形成的探針(Probe)抵住半導體元件15且測量半導體元件15的電氣特性(探測)。然後,基於所測量到的電氣特性是否滿足預定的基準,判別半導體元件15是良品或不良品。
若晶圓11包含有半導體元件15的不良品(不良元件15a),則該半導體元件15會藉由檢查而被判別為不良品。此外,記錄已被判別為不良品之半導體元件15的位置。
接著,將包含已被判別為不良品之半導體元件15(不良元件15a)的區域從晶圓11挖空(挖空步驟)。圖2(A)為表示挖空步驟中之晶圓11的剖面圖。
在挖空步驟中,首先,準備支撐晶圓11的支撐構件(未圖示),並將晶圓11固定在此支撐構件上。例如晶圓11以背面11b側與支撐構件之正面對向的方式,透過暫時接著劑或保護膠膜而固定於支撐構件上。作為支撐構件,例如可以使用以與晶圓11相同材質形成且與晶圓11大致相同直徑之圓盤狀的晶圓,或支撐晶圓11的專用的治具等。
接著,沿著包圍不良元件15a的4條切割道13切斷晶圓11。藉此,從晶圓11挖空並去除包含不良元件15a之長方體狀的不良元件區域11c。另外,切斷晶圓11的方法沒有限制,例如藉由雷射加工或電漿切割等切斷晶圓11。
在藉由雷射加工切斷晶圓11的情況是使用雷射加工裝置。雷射加工裝置具備:卡盤台(支撐台),保持晶圓11;及雷射照射單元,朝向藉由卡盤台所保持的晶圓11照射雷射光束。
從雷射照射單元所照射之雷射光束的波長,例如以被晶圓11吸收雷射光束的至少一部份之方式設定。此情況下,對晶圓11照射具有吸收性的雷射光束。若沿著包圍不良元件15a之4條切割道13照射此雷射光束,則會對晶圓11實施燒蝕加工,且沿著該4條切割道13切斷晶圓11。其結果,從晶圓11挖空不良元件區域11c。
雷射光束可對晶圓11的正面11a側照射,也可對背面11b側照射。此外,雷射光束的照射條件(功率、點徑、重複頻率、照射次數等)以藉由雷射光束的照射而切斷晶圓11的方式適當設定。
另外,包含構成半導體元件15的各種膜(導電膜、絕緣膜)或用於評價半導體元件15的TEG(Test Element Group,測試元件群)等的層(功能層),有時在晶圓11的正面11a側會沿著切割道13殘留。此情況下,較佳為預先藉由沿著切割道13對晶圓11的正面11a側照射雷射光束,而先去除功能層。
此外,在使用對晶圓11具有吸收性之雷射光束的情況下,也可在照射雷射光束的同時噴射液體(純水等),並使用透過水柱而對晶圓11照射雷射光束的方法(水雷射)。此情況下,藉由以雷射光束加工晶圓11而產生的加工屑(碎片)會藉由液體沖走。特別是在實施後述的薄化步驟之前的晶圓11相對較厚,藉由晶圓11的加工而產生之碎片的量較多,因此較佳為使用水雷射。
此外,雷射光束的波長也可以雷射光束對晶圓11具有穿透性的方式設定。此情況下,藉由使雷射光束聚光於晶圓11的內部,且沿著包圍不良元件15a的4條切割道13掃描,而在晶圓11的內部形成經改質的區域(改質層)。已形成此改質層的區域成為比晶圓11的其他區域還脆的區域。然後,此改質層成為晶圓11的斷裂起點(誘發點),將不良元件區域11c挖空。
具體而言,若形成改質層,則會從改質層沿著晶圓11的厚度方向產生裂痕。然後,裂痕透過改質層而以從晶圓11的正面11a到背面11b的方式連結後,則容易將不良元件區域11c挖空。另外,為了容易使裂痕形成為從晶圓11的正面11a到背面11b,所以也可在晶圓11的內部形成2層以上的改質層。改質層的層數根據晶圓11的厚度或材質而適當設定。
此外,形成上述的改質層及裂痕後,也可藉由濕式蝕刻進行不良元件區域11c的挖空。相較晶圓11的其他區域,晶圓11中形成改質層或裂痕的區域容易進行蝕刻,因此,若在不良元件區域11c的周圍供給蝕刻液,則沿著包圍不良元件15a的4條切割道13進行部分地蝕刻,並從晶圓11挖空不良元件區域11c。
此外,不良元件區域11c的挖空也可使用超音波。具體而言,在形成改質層後,於晶圓11已沉入純水等之液體的狀態下,對該液體照射超音波。其結果,藉由賦予液體的超音波振動,從晶圓11挖空不良元件區域11c。
另一方面,在藉由電漿切割而切斷晶圓11的情況下,首先,在晶圓11的正面11a側或背面11b側形成遮罩層。此遮罩層以露出包圍不良元件15a之4條切割道13的方式而形成。之後,使用電漿蝕刻裝置,隔著遮罩層對晶圓11供給已電漿化的氣體。藉此,沿著未以遮罩層覆蓋之4條切割道蝕刻並切斷晶圓11。然後,從晶圓11挖空不良元件區域11c。
另外,遮罩層的材料並無限制,例如可以使用以感光性樹脂形成的光阻。此外,也可在將PVA(聚乙烯醇)等的水溶性的樹脂塗布於晶圓11後,藉由沿著包圍不良元件15a的4條切割道13照射雷射光束並去除液體(燒蝕加工),而形成遮罩層。
圖2(B)為表示不良元件區域11c被挖空之晶圓11的立體圖。若實施挖空步驟,則從晶圓11挖空不良元件區域11c,且在晶圓11已不存在有不良元件區域11c的位置形成長方體狀的空隙(開口部)11d。然後,若結束不良元件區域11c的挖空,則從晶圓11剝離支撐構件。
接著,準備元件晶片,其具備與不良元件15a相同種類的良品之半導體元件15,且為可嵌入空隙11d的尺寸。在此元件晶片的製造,例如使用具有與晶圓11相同構造的晶圓31。圖3(A)為表示元件晶片準備用之晶圓31的立體圖。
晶圓31為與晶圓11相同的材質,具備正面31a及背面31b。此外,晶圓31是藉由以互相交叉的方式而排列成格子狀之多條切割道(分割預定線)33而劃分成多個區域,並在此區域的正面31a側分別形成有半導體元件35。
另外,半導體元件35具有與圖1(C)所示的半導體元件15相同的功能。此外,半導體元件35的構造與半導體元件15相同。半導體元件35連接有電極(通孔電極、貫通電極)37(參照圖5(B))。電極37的構成及材質與圖1(C)所示之與半導體元件15連接的電極19相同。
藉由沿著切割道33分割晶圓31,製造分別具備半導體元件35的多個元件晶片。晶圓31的分割例如藉由所述的雷射加工或電漿蝕刻等而實施。此外,也可使用切割裝置分割晶圓31。
切割裝置具備:卡盤台(支撐台),保持晶圓31;及切割單元,切割藉由卡盤台所保持的晶圓31。切割單元具備主軸(旋轉軸),該主軸裝設有用於切割晶圓31之環狀的切割刀片。藉由使已裝設於主軸之前端部的切割刀片旋轉,並沿著切割道33切入晶圓31,而沿著切割道33分割晶圓31。藉此,得到分別具備半導體元件35的多個元件晶片39。
圖3(B)為表示已被分割成多個元件晶片39之晶圓31的立體圖。另外,元件晶片39形成為在後述的嵌入步驟中,可嵌入晶圓11之空隙11d(參照圖5(A))的尺寸。例如在沿著切割道33加工晶圓31時,藉由控制所加工之區域的寬度而調整元件晶片39的尺寸。此外,在預先掌握元件晶片39之尺寸的情況下,只要在所述的挖空步驟中,先形成比元件晶片39還大的空隙11d即可。
此外,對形成於晶圓31的多個半導體元件35進行檢查,並判別半導體元件35分別是良品或不良品。然後,從藉由晶圓31的分割而得到的多個件晶片39,將具備已被判別是不良品之半導體元件35的元件晶片39去除。
藉此,得到具備與良品的半導體元件15(參照圖1(C))相同的半導體元件35的元件晶片39。亦即,元件晶片39具備與不良元件15a(參照圖1(A))具有相同功能的良品之半導體元件35(具備不良元件15a原本應具有之功能的半導體元件35)。
另外,準備(製造)元件晶片39的時間點並無限制。例如,元件晶片39可在晶圓準備步驟之前,或與晶圓準備步驟同時進行製造,也可在晶圓準備步驟與挖空步驟之間,或在挖空步驟之後製造。
接著,將元件晶片39嵌入晶圓11的空隙11d(嵌入步驟)。在嵌入步驟中,首先,準備支撐晶圓11的支撐晶圓51。圖4(A)為表示晶圓11及支撐晶圓51的立體圖。
支撐晶圓51例如為形成與晶圓11大致相同直徑之圓盤狀的晶圓,具備正面51a及背面51b。另外,支撐晶圓51的材質並無限制,例如支撐晶圓51是以與晶圓11相同的材質形成。
然後,以晶圓11的正面11a側與支撐晶圓51的正面51a側對向之方式,使晶圓11與支撐晶圓51貼合(參照圖4(A))。晶圓11與支撐晶圓51例如透過接著層53而貼合。藉此,晶圓11被固定於支撐晶圓51。另外,最終要從晶圓11剝離支撐晶圓51。因此,較佳為在接著層53使用藉由實施預定的處理(紫外線的照射、加熱處理、藥液處理等)而降低接著力的暫時接著劑。
圖4(B)為表示固定於支撐晶圓51之晶圓11的剖面圖。將晶圓11與支撐晶圓51貼合後,藉由支撐晶圓51覆蓋並塞住已形成於晶圓11之空隙11d的支撐晶圓51側(在圖4(B)中為正面11a側)。
之後,在晶圓11的空隙11d嵌入元件晶片39。圖5(A)為表示元件晶片39被嵌入晶圓11的空隙11d之態樣的立體圖。將元件晶片39以已形成半導體元件35的面側與支撐晶圓51之正面51a對向的方式,嵌入晶圓11的空隙11d。
圖5(B)為表示已嵌入元件晶片39之晶圓11的剖面圖。另外,在元件晶片39的尺寸比空隙11d還小,元件晶片39的輪廓與空隙11d的輪廓不一致的情況下,在於空隙11d的內部露出之晶圓11的側面與元件晶片39之間形成空隙55。
另外,前述的挖空步驟也可在已藉由支撐晶圓51支撐晶圓11的狀態下進行。於此情況,在已將晶圓11的正面11a側與支撐晶圓51的正面51a側貼合之狀態下,進行不良元件區域11c的挖空(參照圖2(A))與元件晶片39的嵌入(參照圖5(A))。藉此,在挖空步驟中變得不需要另外準備支撐晶圓11的支撐構件。
接著,在已嵌入晶圓11之空隙11d的元件晶片39與晶圓11之間的空隙充填樹脂(樹脂充填步驟)。圖6為表示在樹脂充填步驟中之晶圓的剖面圖。
在樹脂充填步驟中,於晶圓11之背面11b側形成有樹脂層57。樹脂層57是例如藉由將環氧樹脂等的液狀樹脂塗布於晶圓11的背面11b側並使其硬化而形成。但是,樹脂層57的材料並無限制。
若將液狀樹脂塗布於晶圓11的背面11b側,則樹脂的一部分流入晶圓11與元件晶片39之間的空隙55(參照圖5(B)),且於空隙55充填樹脂。若在此狀態下使液狀樹脂硬化,則晶圓11與元件晶片39透過樹脂層57而結合,且將元件晶片39固定於晶圓11。
接著,對晶圓11之背面11b側實施研削加工等,並薄化晶圓11(薄化步驟)。薄化步驟例如使用研削裝置而實施。研削裝置具備:卡盤台(支撐台),保持晶圓11;及研削單元,研削藉由卡盤台所保持之晶圓11。此外,研削單元具備裝設有研削輪的主軸(旋轉軸),於該研削輪固定有用於研削晶圓11的研削磨石。
晶圓11以背面11b側露出於上方的方式,藉由卡盤台而被保持。然後,一邊使卡盤台與研削輪分別以預定的旋轉數旋轉,一邊使研削輪的研削磨石接觸晶圓11的背面11b側(樹脂層57側)。藉此,研削樹脂層57及晶圓11的背面11b側,並將晶圓11薄化成為預定的厚度。
圖7為表示薄化步驟中之晶圓11的剖面圖。例如晶圓11的薄化是持續到與半導體元件15連接的電極19及與半導體元件35連接的電極37在晶圓11的背面11b側露出為止。
如上述,在已將晶圓11固定於支撐晶圓51後,進行晶圓11的薄化時,晶圓11與支撐晶圓51的貼合(參照圖4(A))是在晶圓11為厚的且晶圓11之剛性高的狀態下進行。藉此,抑制貼合時之晶圓11的變形,防止晶圓11的破損,並且晶圓11與支撐晶圓51的對位變得容易。
另外,薄化晶圓11的方法並不限定於使用研削裝置的研削加工。例如,也可藉由對晶圓11的背面11b側實施電漿蝕刻來薄化晶圓11。此外,也可利用使用研削裝置的研削加工與電漿蝕刻兩者來薄化晶圓11。
若實施薄化步驟,則在晶圓11之背面11b側露出電極19、37。藉此,半導體元件15、35及形成在配置於晶圓11之背面11b側的其他晶圓的半導體元件(未圖示)成為可透過電極19、37而連接。亦即,根據使用本實施方式的晶圓之製造方法,製造可用於形成層積晶圓的晶圓11。
另外,在本實施方式中,雖然說明了藉由薄化埋入有電極19、37的晶圓11,而使電極19、37於晶圓11之背面11b露出的製程,但也可在薄化晶圓11後形成電極19、37。此情況下,在薄化晶圓11後,於晶圓11形成從晶圓11之背面11b到半導體元件15、35的開口。然後,於此開口充填導電性材料,形成電極19、37。
接著,說明使用上述的晶圓11,製造具備經層積的多個半導體元件之元件晶片(層積元件晶片)的方法之具體例。在製造層積元件晶片時,首先,形成具有經層積之多片晶圓的層積晶圓(晶圓層積步驟)。
在晶圓層積步驟中,使用薄化步驟後的晶圓11(參照圖7),及已在所述的晶圓準備步驟中所準備之其他的晶圓61(參照圖8(A))。另外,晶圓61的構成與圖1(A)所示的晶圓11相同。
晶圓61是以與晶圓11相同的材質形成,具備正面61a及背面61b。此外,晶圓61是藉由以互相交叉的方式而排列成格子狀之多條切割道(分割預定線)而劃分成多個區域,並在此區域的正面61a側分別形成有半導體元件63。
另外,半導體元件63的構成及功能與圖1(C)所示的半導體元件15相同。此外,在半導體元件63連接有電極(通孔電極、貫通電極)65。電極65的構成及材質與圖1(C)所示之連接於半導體元件15的電極19相同。
首先,在晶圓11上層積晶圓61。圖8(A)為表示經層積之晶元11及晶圓61的剖面圖。晶圓61以正面61a側與晶圓11之背面11b側對向的方式,貼合於晶圓11。晶圓11及晶圓61例如透過接著層67貼合。
另外,一旦接合晶圓11及晶圓61後,晶圓11及晶圓61則不會再度分離。因此,接著層67使用永久接著劑。此外,晶圓11及晶圓61的貼合不一定要使用接著層67。例如,也可藉由表面活化接合來接合晶圓11的背面11b側及晶圓61的正面61a側。
在晶圓11及晶圓61的貼合之前或之後,進行晶圓61所具備之多個半導體元件63的檢查,判別半導體元件63是良品或不良品。然後,在晶圓61包含半導體元件63的不良品之情況,對已層積在晶圓11上的晶圓61實施所述的挖空步驟及嵌入步驟。
亦即,在晶圓61包含已被判別為不良品之半導體元件63的情況,將包含該半導體元件63的不良元件區域從晶圓61挖空(參照圖2(A))。此外,在藉由不良元件區域的挖空而形成於晶圓61的空隙嵌入元件晶片39(參照圖5(A))。另外,挖空步驟及嵌入步驟亦可分別在晶圓61層積於晶圓11前實施。之後,對晶圓61實施所述的樹脂充填步驟。
晶圓11及晶圓61以晶圓11所包含的半導體元件15、35與晶圓61所包含的半導體元件63、35重疊之方式貼合。然後,與晶圓11所包含之半導體元件15、35連接的電極19、37與晶圓61所包含之半導體元件63、35連接。
另外,在半導體元件63的正面例如形成有作為連接電極的凸塊(未圖示)。然後,若使晶圓11與晶圓61透過接著層67而貼合,則凸塊埋入接著層67,且與電極19、37接觸。藉此,半導體元件63與電極19、37連接。
接著,對晶圓61實施所述的薄化處理。藉此,薄化晶圓61並且使已與半導體元件63連接的電極65於晶圓61之背面61b側露出。圖8(B)為表示薄化處理後之晶圓11及晶圓61的剖面圖。另外,在晶圓61嵌入有元件晶片39的情況,與元件晶片39之半導體元件35連接的電極37也於晶圓61之背面61b側露出。以此方式進行,形成具備經層積之晶圓11及晶圓61的層積晶圓71。
另外,在晶圓層積步驟中,可將多片晶圓61層積在晶圓11上。例如,可在已層積於晶圓11上的一片晶圓61上,進一步層積其他的晶圓61。此情況下,分別對於已層積於晶圓11上的多片晶圓61實施挖空步驟、嵌入步驟及樹脂充填步驟。藉此,得到具備3層以上之晶圓的層積晶圓71。
此外,在本實施方式中,雖然說明了透過已埋入晶圓11之內部的電極19及電極37連接半導體元件彼此的構成,但連接半導體元件彼此的連接方法並不限定於上述。例如,也可在層積晶圓11及晶圓61後,於層積晶圓71的內部形成連接半導體元件15及半導體元件35的電極。
接著,沿著切割道13分割層積晶圓71,形成具備經層積之多個半導體元件的層積元件晶片(分割步驟)。在分割步驟中,首先,以環狀的框架支撐層積晶圓71。
圖9(A)為表示藉由環狀的框架75所支撐之層積晶圓71的剖面圖。在層積晶圓71的正面側或背面側(在圖9(A)中為晶圓61的背面61b側)黏貼直徑比層積晶圓71還大之圓形的膠膜73。例如膠膜73是藉由在以聚烯烴、聚氯乙烯、聚對苯二甲酸乙二酯等的樹脂形成的基材上,形成橡膠類或丙烯酸類的黏著層(膠層)而得到之柔軟的膜。
此外,將膠膜73的外周部黏貼在環狀的框架75,該環狀的框架75在中央部具備直徑比層積晶圓71還大之圓形的開口75a。藉此,在將層積晶圓71配置於開口75a之內側的狀態下,層積晶圓71透過膠膜73而被框架75所支撐。
之後,從晶圓11的正面11a側剝離支撐晶圓51(參照圖8(B))。在剝離支撐晶圓51時,可對接著層53(參照圖8(B))實施預定的處理,而使接著層53的接著力降低。
接著,例如使用所述的切割裝置分割層積晶圓71。使用切割裝置分割層積晶圓71時,層積晶圓71透過膠膜73而被切割裝置的卡盤台所保持。然後,藉由切割刀片切割、分割層積晶圓71。
以切割刀片切割層積晶圓71時,切割刀片的位置調整為將切割刀片的下端定位於比膠膜73之上表面(晶圓61的背面61b)還下方,且比膠膜73之下表面(卡盤台的保持面)還上方。於此狀態下,藉由使切割刀片旋轉,且使其沿著切割道13切入層積晶圓71,而沿著切割道13切割、分割層積晶圓71。
圖9(B)為表示已分割之層積晶圓71的剖面圖。沿著切割道13切斷層積晶圓71後,層積晶圓71被分割成具備多個經層積之半導體元件15、35、63的層積元件晶片77。如此,藉由層積多片晶圓(晶圓11及晶圓61)形成層積晶圓71,並分割此層積晶圓71,而形成層積元件晶片77。
另外,於上述說明了在剝離支撐晶圓51(參照圖8(B))後分割層積晶圓71的例子。但是,層積晶圓71的分割也可在層積晶圓71藉由支撐晶圓51所支撐的狀態下進行。
此外,雖然在上述說明了使用切割裝置分割層積晶圓71的例子,但層積晶圓71的分割方法並無限制,例如也可使用雷射加工裝置分割層積晶圓71。此情況下,藉由沿著切割道13對層積晶圓71照射雷射光束且實施燒蝕加工,而將層積晶圓71分割成多個層積元件晶片77。
如以上所述,本實施方式的晶圓之製造方法具備:挖空步驟,將包含已被判別為不良品之半導體元件15的不良元件區域11c從晶圓11挖空;及嵌入步驟,將具備良品之半導體元件15的元件晶片嵌入藉由不良元件區域11c的挖空而形成的空隙,該良品之半導體元件15具有與已被判別為不良品的半導體元件15相同的功能。
根據上述的晶圓之製造方法,可製造不包含不良元件15a的晶圓11。然後,可將以此方式所製造的晶圓11層積而形成層積晶圓71,並藉由分割此層積晶圓71,而形成不包含不良元件15a的層積元件晶片77。藉此,抑制層積元件晶片77的良率下降。
另外,關於上述實施方式的構造、方法等,只要不脫離本發明目的之範圍,就可以適當變更而實施。
11:晶圓
11a:正面
11b:背面
11c:不良元件區域
11d:空隙(開口部)
13:切割道(分割預定線)
15:半導體元件
15a:不良元件
17:電極
19:電極(通孔電極、貫通電極)
31:晶圓
31a:正面
31b:背面
33:切割道(分割預定線)
35:半導體元件
37:電極(通孔電極、貫通電極)
39:元件晶片
51:支撐晶圓
51a:正面
51b:背面
53:接著層
55:空隙
57:樹脂層
61:晶圓
61a:正面
61b:背面
63:半導體元件
65:電極(通孔電極、貫通電極)
67:接著層
71:層積晶圓
73:膠膜
75:框架
75a:開口
77:層積元件晶片
圖1(A)為表示晶圓的立體圖;圖1(B)為表示晶圓的剖面圖;圖1(C)為放大表示半導體元件的立體圖。
圖2(A)為表示挖空步驟中之晶圓的剖面圖;圖2(B)為表示不良元件區域被挖空之晶圓的立體圖。
圖3(A)為表示元件晶片準備用之晶圓的立體圖;圖3(B)為表示已分割之晶圓的立體圖。
圖4(A)為表示晶圓及支撐晶圓的立體圖;圖4(B)為表示固定於支撐晶圓之晶圓的剖面圖。
圖5(A)為表示元件晶片被嵌入晶圓的空隙之態樣的立體圖;圖5(B)為表示已嵌入元件晶片之晶圓的剖面圖。
圖6為表示在樹脂充填步驟中之晶圓的剖面圖。
圖7為表示薄化步驟中之晶圓的剖面圖。
圖8(A)為表示經層積的多片晶圓的剖面圖;圖8(B)為表示薄化處理後之多片晶圓的剖面圖。
圖9(A)為表示藉由框架所支撐之層積晶圓的剖面圖;圖9(B)為表示已分割之層積晶圓的剖面圖。
11:晶圓
11a:正面
11b:背面
11d:空隙(開口部)
13:切割道(分割預定線)
15:半導體元件
19:電極(通孔電極、貫通電極)
35:半導體元件
37:電極(通孔電極、貫通電極)
39:元件晶片
51:支撐晶圓
51a:正面
51b:背面
53:接著層
55:空隙
Claims (8)
- 一種晶圓之製造方法,其特徵在於具備:晶圓準備步驟,準備晶圓,所述晶圓在藉由互相交叉之多條切割道所劃分的多個區域分別形成有具備於正面露出之電極的半導體元件,並埋入有與該電極連接的通孔電極;挖空步驟,判別形成於該晶圓的多個該半導體元件分別是良品或不良品,並將包含已被判別為不良品之該半導體元件的不良元件區域從該晶圓挖空;及嵌入步驟,將元件晶片嵌入藉由該不良元件區域的挖空而形成之空隙,該元件晶片具備與已被判別為不良品的該半導體元件具有相同的功能之良品的半導體元件,且為可嵌入該空隙之尺寸。
- 如請求項1所述之晶圓之製造方法,其中,該電極與該通孔電極分別位於該半導體元件的兩側。
- 如請求項1所述之晶圓之製造方法,其中,該通孔電極的前端從該半導體元件的背面隔開間隔。
- 一種層積元件晶片之製造方法,其特徵在於具備:晶圓準備步驟,準備多片晶圓,所述晶圓在藉由互相交叉之多條切割道所劃分的多個區域分別形成有具備於正面露出之電極的半導體元件,並埋入有與該電極連接的通孔電極;挖空步驟,判別形成於一片該晶圓的多個該半導體元件分別是良品或不良品,並將包含已被判別為不良品之該半導體元件的不良元件區域從該晶圓挖空;嵌入步驟,將該晶圓固定於支撐晶圓後,將元件晶片嵌入藉由該不良元件區域的挖空而形成之空隙,該元件晶片具備與已被判別為不良品的該半導體元件具有相同的功能之良品的半導體元件,且為可嵌入該空隙之尺寸;樹脂充填步驟,在被嵌入的該元件晶片與該晶圓之間充填樹脂;薄化步驟,在實施該樹脂充填步驟之後,薄化該晶圓;晶圓層積步驟,在被薄化的該晶圓上,層積在該晶圓準備步驟所準備之其他的晶圓,並且對該其他的晶圓實施該挖空步驟、該嵌入步驟及該樹脂充填步驟,而形成具備經層積之多片晶圓的層積晶圓;及 分割步驟,藉由沿著該切割道分割該層積晶圓,而形成具備經層積之多個該半導體元件的層積元件晶片。
- 如請求項4所述之層積元件晶片之製造方法,其中,在該晶圓層積步驟中,於被薄化的該晶圓上,層積在該晶圓準備步驟所準備之多片其他的晶圓,並且對多片該其他的晶圓實施該挖空步驟、該嵌入步驟及該樹脂充填步驟。
- 如請求項4所述之層積元件晶片之製造方法,其中,該電極與該通孔電極分別位於該半導體元件的兩側。
- 如請求項4所述之層積元件晶片之製造方法,其中,該通孔電極的前端從該半導體元件的背面隔開間隔。
- 如請求項4或5所述之層積元件晶片之製造方法,其中,在該晶圓層積步驟中,以形成於該晶圓之該通孔電極與形成於該其他的晶圓之該半導體元件連接的方式,將該其他的晶圓層積於該晶圓上。
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