TWI736055B - 半導體製造裝置及半導體裝置的製造方法 - Google Patents

半導體製造裝置及半導體裝置的製造方法 Download PDF

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Publication number
TWI736055B
TWI736055B TW108145034A TW108145034A TWI736055B TW I736055 B TWI736055 B TW I736055B TW 108145034 A TW108145034 A TW 108145034A TW 108145034 A TW108145034 A TW 108145034A TW I736055 B TWI736055 B TW I736055B
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TW
Taiwan
Prior art keywords
die
imaging device
crystal grains
aforementioned
crystal grain
Prior art date
Application number
TW108145034A
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English (en)
Chinese (zh)
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TW202101604A (zh
Inventor
小橋英晴
保坂浩二
Original Assignee
日商捷進科技有限公司
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Application filed by 日商捷進科技有限公司 filed Critical 日商捷進科技有限公司
Publication of TW202101604A publication Critical patent/TW202101604A/zh
Application granted granted Critical
Publication of TWI736055B publication Critical patent/TWI736055B/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67288Monitoring of warpage, curvature, damage, defects or the like
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52Mounting semiconductor bodies in containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67132Apparatus for placing on an insulating substrate, e.g. tape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67144Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67259Position monitoring, e.g. misposition detection or presence detection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Die Bonding (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
TW108145034A 2019-03-22 2019-12-10 半導體製造裝置及半導體裝置的製造方法 TWI736055B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2019055460A JP7299728B2 (ja) 2019-03-22 2019-03-22 半導体製造装置および半導体装置の製造方法
JP2019-055460 2019-03-22

Publications (2)

Publication Number Publication Date
TW202101604A TW202101604A (zh) 2021-01-01
TWI736055B true TWI736055B (zh) 2021-08-11

Family

ID=72559747

Family Applications (1)

Application Number Title Priority Date Filing Date
TW108145034A TWI736055B (zh) 2019-03-22 2019-12-10 半導體製造裝置及半導體裝置的製造方法

Country Status (4)

Country Link
JP (1) JP7299728B2 (ko)
KR (1) KR102304880B1 (ko)
CN (1) CN111725086B (ko)
TW (1) TWI736055B (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2022182232A (ja) * 2021-05-28 2022-12-08 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法

Citations (1)

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JP2001013085A (ja) 1999-06-30 2001-01-19 Nidek Co Ltd 欠陥検査装置
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JP4387089B2 (ja) * 2002-08-30 2009-12-16 株式会社日立製作所 欠陥検査装置および欠陥検査方法
DE10330006B4 (de) * 2003-07-03 2006-07-20 Leica Microsystems Semiconductor Gmbh Vorrichtung zur Inspektion eines Wafers
KR20100110321A (ko) * 2007-12-06 2010-10-12 가부시키가이샤 니콘 검사 장치 및 검사 방법
JP5144401B2 (ja) * 2008-07-01 2013-02-13 直江津電子工業株式会社 ウエハ用検査装置
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JP6685126B2 (ja) * 2015-12-24 2020-04-22 ファスフォードテクノロジ株式会社 半導体製造装置および半導体装置の製造方法
JP6505776B2 (ja) * 2016-07-05 2019-04-24 キヤノンマシナリー株式会社 欠陥検出装置、欠陥検出方法、ウェハ、半導体チップ、ダイボンダ、半導体製造方法、および半導体装置製造方法
JP6975551B2 (ja) * 2017-05-18 2021-12-01 ファスフォードテクノロジ株式会社 半導体製造装置および半導体装置の製造方法
JP7029900B2 (ja) * 2017-08-03 2022-03-04 ファスフォードテクノロジ株式会社 ダイボンディング装置および半導体装置の製造方法

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WO2018008512A1 (ja) * 2016-07-05 2018-01-11 キヤノンマシナリー株式会社 欠陥検出装置、欠陥検出方法、ウェハ、半導体チップ、半導体装置、ダイボンダ、ボンディング方法、半導体製造方法、および半導体装置製造方法

Also Published As

Publication number Publication date
CN111725086B (zh) 2024-03-12
TW202101604A (zh) 2021-01-01
CN111725086A (zh) 2020-09-29
KR102304880B1 (ko) 2021-09-27
KR20200112639A (ko) 2020-10-05
JP7299728B2 (ja) 2023-06-28
JP2020155737A (ja) 2020-09-24

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