TWI732517B - 電子封裝件及其製法 - Google Patents

電子封裝件及其製法 Download PDF

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Publication number
TWI732517B
TWI732517B TW109111986A TW109111986A TWI732517B TW I732517 B TWI732517 B TW I732517B TW 109111986 A TW109111986 A TW 109111986A TW 109111986 A TW109111986 A TW 109111986A TW I732517 B TWI732517 B TW I732517B
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Taiwan
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conductive
electronic package
item
electronic
patent application
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TW109111986A
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English (en)
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TW202139381A (zh
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邱志賢
蔡文榮
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矽品精密工業股份有限公司
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Priority to TW109111986A priority Critical patent/TWI732517B/zh
Priority to CN202010303669.3A priority patent/CN113517238A/zh
Priority to US16/878,250 priority patent/US11195808B2/en
Application granted granted Critical
Publication of TWI732517B publication Critical patent/TWI732517B/zh
Publication of TW202139381A publication Critical patent/TW202139381A/zh
Priority to US17/518,146 priority patent/US11594501B2/en
Priority to US18/103,196 priority patent/US11973043B2/en

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Abstract

一種電子封裝件，係於一具有天線功能之承載結構上配置電子元件與一具有複數導電柱之導電架，再以封裝層包覆該電子元件及導電架，且該封裝層係定義有較高之第一包覆部及較低之第二包覆部，以令該電子元件位於該第一包覆部中，且該複數導電柱位於該第二包覆部中，並使該導電柱之端面外露於該第二包覆部之表面，以利於對外電性連接一連接器。

Description

電子封裝件及其製法
本發明係有關一種封裝製程，尤指一種具天線功能之電子封裝件及其製法。
隨著電子產業的蓬勃發展，電子產品也逐漸邁向多功能、高性能的趨勢。目前***(4G)的無線傳輸通訊技術已廣泛應用於各式各樣的消費性電子產品以利接收或發送各種無線訊號。
然而，隨著無線通信發展迅速，以及網路資源流量日趨龐大，所需的無線傳輸頻寬也越來越大，故無線傳輸第五代(5G)之研發已呈趨勢。
第1圖係習知無線通訊裝置之立體示意圖。如第1圖所示，該無線通訊裝置1係包括：一配置有電子元件11之電路板10、設於該電路板10上之複數晶片元件16、一天線元件12以及封裝體13。該晶片元件16係設於該電路板10上且電性連接該電路板10。該天線元件12係藉由一傳輸線17電性連接該晶片元件16。該封裝體13覆蓋該晶片元件16與該部分傳輸線17。
惟，習知無線通訊裝置1中，由於5G用天線元件12為了加強訊號強度，該天線元件12需設於靠近該可攜式電子產品之機殼附近處，故該可攜式電 子產品可提供設置該天線元件12的空間有限，故需進一步滿足無線通訊裝置1的微小化需求；此外，設於機殼附近處的無線通訊裝置1如何與設於中央的可攜式電子產品之內部其它組件(如主機板)進行電性溝通也是一需解決的問題。
因此，如何克服上述習知技術之種種問題，實已成為目前業界亟待克服之難題。
鑑於上述習知技術之種種缺失，本發明提供一種電子封裝件，係包括：承載結構，係具有天線功能；電子元件，係設於該承載結構上且電性連接該承載結構；導電架，係設於該承載結構上且具有複數相分離之導電柱，其中，該複數導電柱係電性連接該承載結構；以及封裝層，係設於該承載結構上以包覆該電子元件及導電架，該封裝層係定義有一體成形之第一包覆部及第二包覆部，該電子元件係位於該第一包覆部中，且該複數導電柱係位於該第二包覆部中，其中，該第一包覆部之高度係高於該第二包覆部之高度，且該複數導電柱之端面係外露於該第二包覆部之表面以供電性連接一連接器。
本發明亦提供一種電子封裝件之製法，係包括：提供一具有天線功能之承載結構；將至少一電子元件與至少一導電架設置並電性連接於該承載結構上，且該導電架係具有複數相分離之導電柱；以及形成一封裝層於該承載結構上，以令該封裝層包覆該電子元件及導電架，該封裝層係定義有一體成形之第一包覆部及第二包覆部，該電子元件係位於該第一包覆部中，且該複數導電柱係 位於該第二包覆部中，其中，該第一包覆部之高度係高於該第二包覆部之高度，且該複數導電柱之端面係外露於該第二包覆部之表面以供電性連接一連接器。
前述之製法中，該封裝層之製程係於形成包覆該電子元件及導電架之封裝材後，移除部分該封裝材及部分該導電架，以形成該封裝層，使該封裝層具有該第一包覆部與該第二包覆部，且使該複數導電柱之端面係外露於該第二包覆部之表面。
前述之電子封裝件及其製法中，該承載結構係包含相堆疊之線路板與天線板。
前述之電子封裝件及其製法中，復包括以屏蔽結構遮蓋該電子元件。例如，復包括形成該屏蔽結構於該封裝層部分表面，使該屏蔽結構遮蓋該電子元件，且不接觸該複數導電柱。進一步，該導電架復具有至少一埋設於該封裝層中之導電牆，該導電牆與該複數導電柱相分離，且外露於該第二包覆部，並連接該屏蔽結構。或者，該導電架復具有至少一埋設於該封裝層中之導電塊，該導電塊與該導電柱相分離，且外露於該第一包覆部，並連接該屏蔽結構。
前述之電子封裝件及其製法中，復包括設置連接器於該複數導電柱上。
前述之電子封裝件及其製法中，復包括將一配置有連接器之轉接件設於該複數導電柱上。例如，該轉接件係為可撓式電路板。
前述之電子封裝件及其製法中，該第二包覆部設置於該承載結構的其中一側。
前述之電子封裝件及其製法中，該第二包覆部係設置於該承載結構之角落處。
前述之電子封裝件及其製法中，該封裝層係具有複數該第二包覆部，且該第一包覆部係位於其中兩該第二包覆部之間。
前述之電子封裝件及其製法中，該封裝層係具有複數該第一包覆部，且該第二包覆部係位於其中兩該第一包覆部之間。
由上可知，本發明之電子封裝件主要藉由該第一包覆部高於該第二包覆部之設計，使該複數導電柱外露於該第二包覆部，俾供作為接點，因而可依需求將該連接器直接/間接整合於該電子封裝件中，進而使該承載結構之天線可藉由該連接器高自由度地電性連接該電子產品之主機板，使該承載結構可依訊號強度需求設置於靠近該電子產品之機殼附近處，故相較於習知技術，若電子產品採用本發明之電子封裝件，可令其它組件之設計不會受到空間限制，使該電子產品可依需求滿足所有之功能。
1:無線通訊裝置
10:電路板
11:電子元件
12:天線元件
13:封裝體
16:晶片元件
17:傳輸線
2,2’,2”,3,3’,4:電子封裝件
20,20’:承載結構
20a:第一側
20b:第二側
20c,230c,231c:側面
200:導電體
201:線路板
202:天線板
21,21’,21”:電子元件
210:導電凸塊
22,32:導電架
220:板體
220’:導電塊
221,421:導電柱
222:導電牆
23,33,33’:封裝層
23’:封裝材
230,330:第一包覆部
231,331:第二包覆部
24,24’:屏蔽結構
240:屏蔽部
25:轉接件
26:連接器
421c:周面
9:電子產品
9a:機殼
90:主機板
91:支撐架
900:連接埠
A:第一區域
B:第二區域
H1,H2:高度
第1圖係習知無線通訊裝置之立體示意圖。
第2A至2D圖係為本發明之電子封裝件之製法之剖面示意圖。
第2A’圖係為第2A圖之另一態樣。
第2D’圖係為第2D圖之另一態樣。
第2D”圖係為第2D’圖之另一態樣。
第2E及2E’圖係為第2D圖之其它態樣。
第2E”圖係為第2E圖之後續應用之剖面示意圖。
第3A至3C圖係為第2E圖之不同態樣之上視示意圖。
第3D及3E圖係為第3A圖之其它態樣之上視示意圖。
第3D’及3E’圖係為第3D及3E圖增設屏蔽結構之剖面示意圖。
第4圖係為本發明之電子封裝件之另一實施例之剖面示意圖。
第4’圖係為第4圖之上視圖。
以下藉由特定的具體實施例說明本發明之實施方式，熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。
須知，本說明書所附圖式所繪示之結構、比例、大小等，均僅用以配合說明書所揭示之內容，以供熟悉此技藝之人士之瞭解與閱讀，並非用以限定本發明可實施之限定條件，故不具技術上之實質意義，任何結構之修飾、比例關係之改變或大小之調整，在不影響本發明所能產生之功效及所能達成之目的下，均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。同時，本說明書中所引用之如「上」、「第一」、「第二」及「一」等之用語，亦僅為便於敘述之明瞭，而非用以限定本發明可實施之範圍，其相對關係之改變或調整，在無實質變更技術內容下，當亦視為本發明可實施之範疇。
第2A至2D圖係為本發明之電子封裝件2之製法之剖面示意圖。
如第2A圖所示，提供一配置有至少一電子元件21,21’與至少一導電架22之承載結構20，且該承載結構20係具有相對之第一側20a與第二側20b，以令該電子元件21,21’與該導電架22均設於該承載結構20之第一側20a。
於本實施例中，該承載結構20係例如為封裝基板(substrate)，其可為具有核心層之線路結構或無核心層(coreless)之線路結構，且其構成係於介電材上形成複數線路層，如扇出(fan out)型重佈線路層(redistribution layer，簡稱RDL)。形成該線路層之材質係例如為銅，且該介電材係例如為聚對二唑苯(Polybenzoxazole，簡稱PBO)、聚醯亞胺(Polyimide，簡稱PI)、預浸材(Prepreg，簡稱PP)等。具體地，該承載結構20之第一側20a上定義有相鄰接之第一區域A與第二區域B，且該第一區域A係作為作用區以配置該電子元件21,21’，而該第二區域B係作為外接區以配置該導電架22。應可理解地，該承載結構20亦可為其它可供承載如晶片等電子元件之承載單元，例如導線架(lead frame)、矽中介板(silicon interposer)或功能模組，並不限於上述。
再者，該承載結構20係具有天線功能，如天線基板，其線路層具有天線功能。或者，如第2A’圖所示，該承載結構20’可為天線模組，其由一線路板201與一天線板202相堆疊組合而成，該線路板201係位於該承載結構20’之第一側20a，而該天線板202係位於該承載結構20’之第二側20b，且該線路板201可藉由如銲錫材料之導電體200接置該天線板202。
又，該電子元件21,21’係為主動元件、被動元件或其二者組合，且該主動元件係例如半導體晶片(如電子元件21)，而該被動元件(如 電子元件21’)係例如電阻、電容及電感。例如，該半導體晶片係藉由複數如銲錫材料、金屬柱(pillar)或其它等之導電凸塊210以覆晶方式設於該承載結構20之第一側20a之線路層(圖未示)上並電性連接該線路層，且可依需求以如底膠(圖略)包覆該些導電凸塊210；或者，該電子元件21可藉由複數銲線(圖未示)以打線方式電性連接該承載結構20之線路層；亦或，該電子元件21’可直接接觸該承載結構20之線路層。應可理解地，有關電子元件21,21’電性連接承載結構20之方式繁多，並不限於上述。
另外，該導電架22係包含一板體220及複數分離設於該板體220上之導電柱221與導電牆222，且該導電架22以其導電柱221與導電牆222立設於該承載結構20之第一側20a之第二區域B上。例如，以蝕刻、雷射或其它方式移除一如銅材之金屬板之部分材質，以形成該導電架22。
如第2B圖所示，形成一封裝材23’於該承載結構20之第一側20a上，以包覆該電子元件21,21’與該導電架22。
於本實施例中，該封裝材23’係為絕緣材，如聚醯亞胺(polyimide，簡稱PI)、乾膜(dry film)、如環氧樹脂(epoxy)之封裝膠體或封裝材(molding compound)。例如，該封裝材23’之製程可選擇液態封膠(liquid compound)、噴塗(injection)、壓合(lamination)或模壓(compression molding)等方式形成於該承載結構20上。
如第2C圖所示，移除部分該封裝材23’及該導電架22之部分板體220，以形成一外觀具缺口之封裝層23，其定義有一位於該第一區域A之第一包覆部230及一位於該第二區域B之第二包覆部231，其中，該第一包覆部230之高度H1係高於該第二包覆部231之高度H2，以令該導電柱221與導電牆222外露於 該封裝層23之第二包覆部231，且該導電塊220’(即該板體220之剩餘部分)係外露於該第一包覆部230之側面230c，使該導電柱221作為接點(I/O)，且該導電牆222及該導電塊220’作為接地。例如，該導電牆222及該導電塊220’相連接並為一體成型。
於本實施例中，使用研磨方式移除該第二區域B上方之部分板體220及部分封裝材23’，以保留該第二區域B上之導電柱221與導電牆222周圍之封裝材23’，俾供作為該第二包覆部231。應可理解地，有關移除方式繁多，如蝕刻、雷射、銑具等，並不限於上述。
再者，該導電柱221之接點功能可為訊號接點(signal pin)、組裝(SMT)用接點或其他用途等，且其端面形狀可為矩形(如第3A圖所示)、圓形(如第3B圖所示)或其它形狀，並無特別限制。
又，該第二包覆部231之範圍可依需求調整，如第3A及3B圖所示之整個第二區域B上方(即該封裝層23之外觀呈階梯狀)或第3C圖所示之部分第二區域B上(其第一包覆部330係延伸至該第二區域B，即該封裝層23之外觀呈缺角狀)，以調整該導電柱221作為接點(I/O)之數量。應可理解地，亦可藉由增加該導電架22之數量，以調整該導電柱221作為接點(I/O)之數量，如第3D及3D’圖所示之電子封裝件3，其將兩導電架22,32設於該電子元件21,21’之相對兩側，即令該第一區域A之相對兩側分別定義為第二區域B，使該第一包覆部230位於兩第二包覆部231,331之間，即該封裝層33之外觀呈凸狀。
另外，可依電子產品之空間需求，調整該導電架22之位置。例如，該導電架22係遠離該承載件20之第二區域B之側面20c，如第3E及3E’圖所示之電子封裝件3’，其封裝層33’之第一包覆部330係位於該承載件20之相對兩側上以包 覆該電子元件21,21’,21”，使該第二包覆部231位於兩第一包覆部230,330之間，即該封裝層33’之外觀呈凹狀。
如第2D圖所示，形成一屏蔽結構24於該封裝層23上，以遮蓋該電子元件21,21’，使該電子元件21,21’不會受外界之電磁干擾。
於本實施例中，該屏蔽結構24之佈設區域可依需求選擇覆蓋該封裝層23之第一包覆部230之全部表面或部分表面(如1/2或1/3)，甚至可選擇覆蓋該承載件20之第一區域A之部分側面20c或全部側面20c。例如，該屏蔽結構24可延伸至該第一包覆部230之側面230c以接觸該導電塊220’，甚至接觸該導電牆222。因此，藉由該導電塊220’與該導電牆222外露於該封裝層23，以電性連接該屏蔽結構24，使該屏蔽結構24可透過該導電塊220’與該導電牆222連接該承載件20的接地線路而達到屏蔽的效果。應可理解地，該屏蔽結構24亦可接觸該承載件20之第一區域A之側面20c之線路層，使該屏蔽結構24接地而達到屏蔽的效果。
再者，可藉由塗佈金屬層(如銅材)之加工方式形成該屏蔽結構24於該封裝層23上，例如，濺鍍(sputtering)、蒸鍍(vaporing)、電鍍、無電電鍍或化鍍等方式；或者，利用蓋設金屬架或金屬罩、或貼膜(foiling)等設置方式形成該屏蔽結構24於該封裝層23上；亦或，可先於該承載結構20上設置如金屬架或金屬罩之屏蔽結構24’，以遮蓋該電子元件21,21’，再以該封裝層23包覆該屏蔽結構24’，如第2D’圖所示之電子封裝件2’。應可理解地，有關屏蔽方式繁多，如第2D”圖所示之電子封裝件2”，其可於該兩電子元件21,21’之間形成至少一電性連接該屏蔽結構24之屏蔽部240(如柱狀或牆狀)，故該屏蔽結構之態樣並無特別限制。
又，該電子封裝件2,2’,3,3’復可依需求於該些導電柱221上接置一連接器26，如第2E圖所示，以藉由該連接器26接合電子產品之主機板之連接埠 上，以令該電子封裝件2電性連接該主機板，使該電子封裝件2整合配置於該電子產品中。例如，該連接器26可直接銲接或其它方式設於該導電柱221上以電性連接該導電柱221。
另外，如第2E’圖所示，該電子封裝件2,2’,3,3’亦可依需求將一轉接件25連接該些導電柱221，且將該連接器26設於該轉接件25上。例如，該轉接件25係為軟性或可撓式電路板，其可依需求彎折，並銲接於該導電柱221上以電性連接該導電柱221。具體地，該轉接件25係以其中一端側接置該些導電柱221，而另一端側接置該連接器26，以依電子產品9之內部空間狀況，如第2E”圖所示，藉由彎折該轉接件25(其兩端側之方位約呈90度或其它度數之夾角)，令該連接器26接合該電子產品9之主機板90之連接埠900上，使該電子封裝件2電性連接該主機板90，因而能將該電子封裝件2整合配置於該電子產品9中，其中，該電子產品9內可藉由至少一支撐架91固定該電子封裝件2，故當該電子產品9之內部空間有限時，可彎折該轉接件25，以利於該電子產品9之其它組件之設計。
因此，本發明之製法中，藉由將封裝材23’研磨形成具缺口之封裝層23，使該導電架22之導電柱221外露於該封裝層23之高度較低之第二包覆部231，俾供作為接點，以電性連接該連接器26或其它用途，因而能將該連接器26直接/間接整合於該電子封裝件2,2’,3,3’中，且該承載結構20,20’之天線(線路層或天線板202)可電性連接該主機板90，使該承載結構20可依訊號強度需求設置於靠近該電子產品9之機殼9a附近處，故相較於習知技術，該電子產品9之內部其它組件(如主機板90)之設計不會受到空間限制，致使該電子產品9可依需求滿足所有之功能。
再者，若將該連接器26直接整合於該電子封裝件2,2’,3,3’上，使該主機板90所提供的電能可直接傳輸至該承載結構20,20’，而不需經過其它傳輸路徑(如轉接件25)，以避免傳輸電能於通過該轉接件25時產生電性損耗(loss)，故不僅可增快傳輸速度，且可提升電性表現(performance)。
又，若該電子封裝件2,2’,3,3’與該主機板90距離較遠，則於封裝端需藉由一如軟板型或硬板型之轉接件25連接該連接器26，以增加該電子封裝件2,2’,3,3’設置位置的自由度；此外，封裝端直接焊接該轉接件25可減少該連接器26的使用數量(該承載結構20,20’上無需使用連接器)，以降低封裝成本。
另外，如第4及4’圖所示之導電柱421之周面421c若外露於該第二包覆部231之側面231c(例如，該導電柱421之周面421c齊平該第二包覆部231之側面231c)，除了可藉由將該導電柱421接地達到屏蔽的效果之外，亦可藉由該導電柱421與系統端的其他元件(即該電子產品9之內部組件)電性連接以作為訊號聯通及/或接地，故可增加該電子封裝件2,2’,3,3’與系統端之其他元件(即該電子產品9之內部組件)之配置彈性，即該封裝層23之第二包覆部231之側面231c亦可作為外部連接區域。
本發明復提供一種電子封裝件2,2’,2”,3,3’,4，係包括：一承載結構20,20’、至少一電子元件21,21’、一導電架22以及一封裝層23,23’,33,33’。
所述之承載結構20,20’係具有天線功能。
所述之電子元件21,21’係設於該承載結構20,20’上且電性連接該承載結構20,20’。
所述之導電架22係設於該承載結構20,20’上且具有複數相分離之導電柱221,421，其中，該複數導電柱221,421係電性連接該承載結構20,20’。
所述之封裝層23,23’,33,33’係設於該承載結構20,20’上以包覆該電子元件21,21’及導電架22，且該封裝層23,23’,33,33’係定義有一體成形之第一包覆部230,330及第二包覆部231,331，該電子元件21,21’係位於該第一包覆部230,330中，且該複數導電柱221,421係位於該第二包覆部231,331中，其中，該第一包覆部230,330之高度H1係高於該第二包覆部231,331之高度H2，且該複數導電柱221,421之端面係外露於該第二包覆部231,331之表面以電性連接一連接器26。
於一實施例中，該承載結構20’係包含相堆疊之線路板201與天線板202。
於一實施例中，所述之電子封裝件2,2’,2”,3,3’,4復包括一遮蓋該電子元件21,21’之屏蔽結構24,24’。例如，該屏蔽結構24係形成於該封裝層23部分表面且遮蓋該電子元件21，該屏蔽結構24不接觸該複數導電柱221,421。進一步，該導電架22復具有至少一埋設於該封裝層23中之導電牆222，該導電牆222與該複數導電柱221,421相分離，且外露於該第二包覆部231，並連接該屏蔽結構24’。或者，該導電架22復具有至少一埋設於該封裝層23中之導電塊220’，該導電塊220’與該導電柱221,421相分離，且外露於該第一包覆部230，並連接該屏蔽結構24’。
於一實施例中，該連接器26係接置於該複數導電柱221上。
於一實施例中，該連接器26係藉由一接置於該複數導電柱221上之轉接件25電性連接該導電柱221。例如，該轉接件25係為可撓式電路板。
於一實施例中，該第二包覆部231係設置於該承載結構20之其中一側。
於一實施例中，該第二包覆部231係設置於該承載結構20之角落處。
於一實施例中，該封裝層33係具有複數該第二包覆部231,331，且該第一包覆部230係位於其中兩該第二包覆部231,331之間。
於一實施例中，該封裝層33’係具有複數該第一包覆部230,330，且該第二包覆部231係位於其中兩該第一包覆部230,330之間。
綜上所述，本發明之電子封裝件，主要藉由該封裝層之設計，使該導電柱外露於該第二包覆部，俾供作為接點，因而可依需求將該連接器直接/間接整合於該電子封裝件中，且該承載結構之天線可藉由該連接器高自由度地電性連接該電子產品之主機板，使該承載結構可依訊號強度需求設置於靠近該電子產品之機殼附近處，故若電子產品採用本發明之電子封裝件，可令其它組件之設計不會受到空間限制，使該電子產品可依需求滿足所有之功能。
上述實施例係用以例示性說明本發明之原理及其功效，而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下，對上述實施例進行修改。因此本發明之權利保護範圍，應如後述之申請專利範圍所列。
2:電子封裝件
20:承載結構
20a:第一側
20b:第二側
20c:側面
21,21’:電子元件
22:導電架
220’:導電塊
221:導電柱
222:導電牆
23:封裝層
230:第一包覆部
231:第二包覆部
24:屏蔽結構

Claims (27)

  1. 一種電子封裝件，係包括：
    承載結構，係具有天線功能；
    電子元件，係設於該承載結構上且電性連接該承載結構；
    導電架，係設於該承載結構上且具有複數相分離之導電柱，其中，該複數導電柱係電性連接該承載結構；以及
    封裝層，係設於該承載結構上以包覆該電子元件及導電架，該封裝層係定義有一體成形之第一包覆部及第二包覆部，該電子元件係位於該第一包覆部中，且該複數導電柱係位於該第二包覆部中，其中，該第一包覆部之高度係高於該第二包覆部之高度，且該複數導電柱之端面係外露於該第二包覆部之表面以供電性連接一連接器。
  2. 如申請專利範圍第1項所述之電子封裝件，其中，該承載結構係包含相堆疊之線路板與天線板。
  3. 如申請專利範圍第1項所述之電子封裝件，復包括遮蓋該電子元件之屏蔽結構。
  4. 如申請專利範圍第3項所述之電子封裝件，該屏蔽結構係形成於該封裝層部分表面且遮蓋該電子元件，該屏蔽結構不接觸該複數導電柱。
  5. 如申請專利範圍第4項所述之電子封裝件，其中，該導電架復具有至少一埋設於該封裝層中之導電牆，該導電牆與該複數導電柱相分離，且外露於該第二包覆部，並連接該屏蔽結構。
  6. 如申請專利範圍第4項所述之電子封裝件，其中，該導電架復具有至少一埋設於該封裝層中之導電塊，該導電塊與該導電柱相分離，且外露於該第一包覆部，並連接該屏蔽結構。
  7. 如申請專利範圍第1項所述之電子封裝件，其中，該連接器係接置於該複數導電柱上。
  8. 如申請專利範圍第1項所述之電子封裝件，其中，該連接器係藉由一接置於該複數導電柱上之轉接件電性連接該導電柱。
  9. 如申請專利範圍第8項所述之電子封裝件，其中，該轉接件係為可撓式電路板。
  10. 如申請專利範圍第1項所述之電子封裝件，其中，該第二包覆部係設置於該承載結構之其中一側。
  11. 如申請專利範圍第1項所述之電子封裝件，其中，該第二包覆部係設置於該承載結構之角落處。
  12. 如申請專利範圍第1項所述之電子封裝件，其中，該封裝層係具有複數該第二包覆部，且該第一包覆部係位於其中兩該第二包覆部之間。
  13. 如申請專利範圍第1項所述之電子封裝件，其中，該封裝層係具有複數該第一包覆部，且該第二包覆部係位於其中兩該第一包覆部之間。
  14. 一種電子封裝件之製法，係包括：
    提供一具有天線功能之承載結構；
    將至少一電子元件與至少一導電架設置並電性連接於該承載結構上，且該導電架係具有複數相分離之導電柱；以及
    形成一封裝層於該承載結構上，以令該封裝層包覆該電子元件及導電架，該封裝層係定義有一體成形之第一包覆部及第二包覆部，該電子元件係位於該第一包覆部中，且該複數導電柱係位於該第二包覆部中，其中，該第一包覆部之高度係高於該第二包覆部之高度，且該複數導電柱之端面係外露於該第二包覆部之表面以供電性連接一連接器。
  15. 如申請專利範圍第14項所述之電子封裝件之製法，其中，該封裝層之製程係於形成包覆該電子元件及導電架之封裝材後，移除部分該封裝材及部分該導電架，以形成該封裝層，使該封裝層具有該第一包覆部與該第二包覆部，且使該複數導電柱之端面係外露於該第二包覆部之表面。
  16. 如申請專利範圍第14項所述之電子封裝件之製法，其中，該承載結構係包含相堆疊之線路板與天線板。
  17. 如申請專利範圍第14項所述之電子封裝件之製法，復包括以屏蔽結構遮蓋該電子元件。
  18. 如申請專利範圍第17項所述之電子封裝件之製法，復包括形成該屏蔽結構於該封裝層部分表面，使該屏蔽結構遮蓋該電子元件，且不接觸該複數導電柱。
  19. 如申請專利範圍第18項所述之電子封裝件之製法，其中，該導電架復具有至少一埋設於該封裝層中之導電牆，該導電牆與該複數導電柱相分離，且外露於該第二包覆部，並連接該屏蔽結構。
  20. 如申請專利範圍第18項所述之電子封裝件之製法，其中，該導電架復具有至少一埋設於該封裝層中之導電塊，該導電塊與該導電柱相分離，且外露於該第一包覆部，並連接該屏蔽結構。
  21. 如申請專利範圍第14項所述之電子封裝件之製法，復包括設置連接器於該複數導電柱上。
  22. 如申請專利範圍第14項所述之電子封裝件之製法，復包括將一配置有連接器之轉接件設於該複數導電柱上。
  23. 如申請專利範圍第22項所述之電子封裝件之製法，其中，該轉接件係為可撓式電路板。
  24. 如申請專利範圍第14項所述之電子封裝件之製法，其中，該該第二包覆部設置於該承載結構的其中一側。
  25. 如申請專利範圍第14項所述之電子封裝件之製法，其中，該第二包覆部係設置於該承載結構之角落處。
  26. 如申請專利範圍第14項所述之電子封裝件之製法，其中，該封裝層係具有複數該第二包覆部，且該第一包覆部係位於其中兩該第二包覆部之間。
  27. 如申請專利範圍第14項所述之電子封裝件之製法，其中，該封裝層係具有複數該第一包覆部，且該第二包覆部係位於其中兩該第一包覆部之間。
TW109111986A 2020-04-09 2020-04-09 電子封裝件及其製法 TWI732517B (zh)

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