TWI732228B - 麥克風封裝結構 - Google Patents
麥克風封裝結構 Download PDFInfo
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- TWI732228B TWI732228B TW108120356A TW108120356A TWI732228B TW I732228 B TWI732228 B TW I732228B TW 108120356 A TW108120356 A TW 108120356A TW 108120356 A TW108120356 A TW 108120356A TW I732228 B TWI732228 B TW I732228B
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Abstract
一種麥克風封裝結構包含一基板、一金屬殼體、一微機電麥克風元件以及至少一積體電路元件。基板具有二彼此相反的第一表面與第二表面。金屬殼體固定於第一表面,使基板與金屬殼體共同形成一空腔。微機電麥克風元件固定於金屬殼體上且位於空腔內。積體電路元件固定於第二表面,其中積體電路元件位於金屬殼體於第二表面之垂直投影的區域內。
Description
本發明是關於一種電子元件封裝結構,特別是關於一種包含麥克風元件之封裝結構。
在目前配戴型電子裝置在不斷縮小尺寸的潮流下,其裝置內部的各種元件的尺寸也被要求不斷的微型化,麥克風元件的封裝結構即是其中之一。如何設計出小型化麥克風封裝結構又能同時符合麥克風元件的效能需求是相關製造商研發的方向之一。
本發明提出一種創新的麥克風封裝結構,藉以滿足先前技術問題的需求。
於本發明的一實施例中,一種麥克風封裝結構包含一基板、一金屬殼體、一微機電麥克風元件以及至少一積體電路元件。基板具有二彼此相反的第一表面與第二表面。金屬殼體固定於第一表面,使基板與金屬殼體共同形成一空腔。微機電麥克風元件固定於金屬殼體上且位於空腔內。積體電路元件固定於第二表面,其中積體電路元件位於
金屬殼體於第二表面之垂直投影的區域內。
於本發明的一實施例中,積體電路元件至少部份位於微機電麥克風元件於第二表面之垂直投影的區域內。
於本發明的一實施例中,金屬殼體具有一通孔,微機電麥克風元件固定於金屬殼體上的位置對準通孔。
於本發明的一實施例中,麥克風封裝結構更包含一封裝膠層,且基板具有一穿孔,封裝膠層覆蓋穿孔且密封至少一積體電路元件於第二表面上。
於本發明的一實施例中,穿孔不位於至少一積體電路元件於基板垂直投影的區域內。
於本發明的一實施例中,至少一積體電路元件包含鄰近於穿孔之聲學訊號處理元件以及遠離穿孔之電子訊號處理元件。
於本發明的一實施例中,聲學訊號處理元件至少部份位於微機電麥克風元件於第二表面之垂直投影的區域內。
於本發明的一實施例中,麥克風封裝結構更包含二金屬導線穿越穿孔與封裝膠層,並電連接至少一積體電路元件與微機電麥克風元件。
於本發明的一實施例中,麥克風封裝結構更包含一重分布層配置於封裝膠層上,且重分布層包含電連接至聲學訊號處理元件之第一導電路徑、電連接至電子訊號處理元件之第二導電路徑以及接地導電路徑。
於本發明的一實施例中,至少一積體電路元件
係以金屬導線連接至基板的第二表面。
於本發明的一實施例中,至少一積體電路元件係以覆晶方式連接至基板的第二表面。
於本發明的一實施例中,至少一積體電路元件包含複數個積體電路元件,且該些積體電路元件皆固定於基板之第二表面上,並且位於金屬殼體於第二表面之垂直投影的區域內。
於本發明的一實施例中,該些積體電路包含複數個焊墊,並且該些複數個焊墊皆位於金屬殼體於第二表面之垂直投影的區域內。
綜上所述,本發明之麥克風封裝結構利用前述金屬殼體、積體電路元件以及麥克風元件於電路基板的二側彼此重疊的設計,使得封裝結構能架構於面積較小的電路基板,且有助於麥克風封裝結構之縮小化或微型化。
以下將以實施方式對上述之說明作詳細的描述,並對本發明之技術方案提供更進一步的解釋。
為讓本發明之上述和其他目的、特徵、優點與實施例能更明顯易懂,所附符號之說明如下:
100‧‧‧麥克風封裝結構
102‧‧‧金屬殼體
102a‧‧‧內表面
102b‧‧‧通孔
104‧‧‧基板
104a‧‧‧穿孔
104b‧‧‧表面
104c‧‧‧表面
105‧‧‧空腔
106‧‧‧微機電麥克風元件
106a‧‧‧振動膜
108‧‧‧金屬導線
108a‧‧‧金屬導線
108b‧‧‧金屬導線
110‧‧‧積體電路元件
110a‧‧‧焊墊
112‧‧‧積體電路元件
112a‧‧‧焊墊
114‧‧‧封裝膠層
116‧‧‧重分布層
118a~118f‧‧‧導電路徑
P1‧‧‧區域
P2‧‧‧區域
為讓本發明之上述和其他目的、特徵、優點與實施例能更明顯易懂,所附圖式之說明如下:第1圖繪示依照本發明一實施例的一種麥克風封裝結構的剖面示意圖;以及第2A~2D圖繪示依照本發明一實施例的一種麥克風封裝結構的製程步驟之剖面示意圖。
為了使本發明的敘述更加詳盡與完備,可參照所附的附圖及以下所述各種實施例,附圖中相同的號碼代表相同或相似的元件。另一方面,眾所周知的元件與步驟並未描述在實施例中,以避免對本發明造成不必要的限制。
在實施方式與申請專利範圍中,除非內文中對於冠詞有所特別限定,否則「一」與「該」可泛指單一個或大於一個。
請參照第1圖,其繪示依照本發明一實施例的一種麥克風封裝結構的剖面示意圖。一種麥克風封裝結構100包含一基板104、一金屬殼體102、一微機電麥克風元件106以及至少一積體電路元件(110,112)。基板104可以是印刷電路板或其他種類的電路板,且具有二彼此相反的表面104b與表面104c。金屬殼體102固定於基板104的表面104b,使基板104與金屬殼體102共同形成一空腔105。微機電麥克風元件106固定於金屬殼體102的內表面102a上且位於空腔105內。積體電路元件(110,112)固定於基板104的表面104c,其中積體電路元件(110,112)位於金屬殼體102於表面104c之垂直投影的區域(P2)內,即積體電路元件(110,112)與金屬殼體102在垂直方向上彼此重疊。微機電麥克風元件106位於空腔105內,即使不另封膠,亦不受外界水氣的侵蝕。上述金屬殼體102與積體電路元件(110,112)彼此重疊的設計有助於使用較小面積的基板
104,也有助於麥克風封裝結構之整體結構的縮小化或微型化。
在本實施例中,積體電路元件110至少部份位於微機電麥克風元件106於基板104的表面104c之垂直投影的區域(P1)內,即積體電路元件110與微機電麥克風元件106在垂直方向上彼此重疊。此設計有助於使用較小面積的基板104,也有助於麥克風封裝結構之整體結構的縮小化或微型化。
在本實施例中,雖示例二個積體電路元件(110,112)固定於基板104的表面104c,但不排除更多積體電路元件固定於基板104的表面104c。
在本實施例中,金屬殼體102具有一通孔102b,微機電麥克風元件106固定於金屬殼體102上的位置對準通孔102b。微機電麥克風元件106不另封膠的位於空腔105內,使其運作參數(例如其振動膜106a的運作參數)不會因封膠而需另行校正。
在本實施例中,基板104具有一穿孔104a,且封裝膠層114覆蓋基板104之穿孔104a且密封積體電路元件(110,112)於基板104的表面104c上。二金屬導線(108a,108b)穿越穿孔104a與封裝膠層114,並電連接積體電路元件110與微機電麥克風元件106。
在本實施例中,積體電路元件110可以是一聲學訊號處理元件,而積體電路元件112可以是一電子訊號處理元件,積體電路元件110相較於積體電路元件112鄰近於
基板104的穿孔104a,使得微機電麥克風元件106與對應的聲學訊號處理元件(即積體電路元件110)之間訊號傳導距離能夠儘可能縮短。
在本實施例中,麥克風封裝結構更包含一重分布層116配置於封裝膠層114上,且重分布層116包含電連接至積體電路元件110之導電路徑(118b、118c)、電連接至積體電路元件112之導電路徑118d以及接地導電路徑(118a或118e)。
在本實施例中,積體電路元件110或112係以金屬導線連接至基板104的表面104c或以覆晶方式連接至基板104的表面104c,但不以此為限。
在本實施例中,積體電路元件110或112之複數個焊墊(110a或112a)皆位於金屬殼體102於基板104的表面104c之垂直投影的區域(P2)內。
請參照第2A~2D圖,其繪示依照本發明一實施例的一種麥克風封裝結構的製程步驟之剖面示意圖。
在第2A圖所繪示的製程步驟中,提供一具有通孔102b的金屬殼體102,並將微機電麥克風元件106固定於金屬殼體102的內表面102a上並對準通孔102b(使麥克風元件的振動膜106a對準通孔102b)。接著,將金屬導線108的二端連接至微機電麥克風元件106的焊點上。
在第2B圖所繪示的製程步驟中,提供一具有穿孔104a的電路基板104。將前述的金屬殼體102固定於電路基板104的底表面104b,並使金屬導線108通過穿孔104a,
且微機電麥克風元件106位於電路基板104與金屬殼體102所形成的空腔105內。基板104的上表面104c已先固定積體電路元件(110、112),積體電路元件110之其中一焊墊以金屬導線連接至基板104的上表面104c,積體電路元件112係以覆晶方式連接至基板104的上表面104c。為了於製程中金屬導線108能順利通過穿孔104a,穿孔104a的孔徑應大於金屬導線108之線徑的二倍以上。
在第2C圖所繪示的製程步驟中,形成一封裝膠層114覆蓋穿孔104a且密封積體電路元件(110、112)於基板104的上表面104c,並移除凸出於封裝膠層114的金屬導線108部份,藉以形成二金屬導線(108a、108b)。在本實施例中,穿孔104a不位於積體電路元件(110,112)於基板(104)垂直投影的區域內。
在第2D圖所繪示的製程步驟中,形成一重分布層116覆蓋封裝膠層114的頂面,重分布層116包含電連接至積體電路元件110之導電路徑(118b、118c)、電連接至積體電路元件112之導電路徑118d以及接地導電路徑(118a或118e)。另有導電路徑118f連接於二金屬導線(108a、108b)與積體電路元件110之間。
綜上所述,本發明之麥克風封裝結構利用前述金屬殼體、積體電路元件以及麥克風元件於電路基板的二側彼此重疊的設計,使得封裝結構能架構於面積較小的電路基板,且有助於麥克風封裝結構之縮小化或微型化。
雖然本發明已以實施方式揭露如上,然其並非
用以限定本發明,任何熟習此技藝者,於不脫離本發明之精神和範圍內,當可作各種之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
100‧‧‧麥克風封裝結構
102‧‧‧金屬殼體
102b‧‧‧通孔
104‧‧‧基板
104a‧‧‧穿孔
104b‧‧‧表面
104c‧‧‧表面
105‧‧‧空腔
106‧‧‧微機電麥克風元件
106a‧‧‧振動膜
108a‧‧‧金屬導線
108b‧‧‧金屬導線
110‧‧‧積體電路元件
110a‧‧‧焊墊
112‧‧‧積體電路元件
112a‧‧‧焊墊
114‧‧‧封裝膠層
116‧‧‧重分布層
118a~118f‧‧‧導電路徑
P1‧‧‧區域
P2‧‧‧區域
Claims (13)
- 一種麥克風封裝結構,包含:一基板,具有二彼此相反的第一表面與第二表面以及一穿孔;一金屬殼體,固定於該第一表面,使該基板與該金屬殼體共同形成一空腔;一微機電麥克風元件,固定於該金屬殼體上且位於該空腔內;至少一積體電路元件,固定於該第二表面,其中該積體電路元件位於該金屬殼體於該第二表面之垂直投影的區域內;以及二金屬導線,穿越該穿孔並電連接該至少一積體電路元件與該微機電麥克風元件。
- 如申請專利範圍第1項所述之麥克風封裝結構,其中該積體電路元件至少部份位於該微機電麥克風元件於該第二表面之垂直投影的區域內。
- 如申請專利範圍第1項所述之麥克風封裝結構,其中該金屬殼體具有一通孔,該微機電麥克風元件固定於該金屬殼體上的位置對準該通孔。
- 如申請專利範圍第1項所述之麥克風封裝結構,更包含一封裝膠層,其中該封裝膠層覆蓋該穿孔且 密封該至少一積體電路元件於該第二表面上。
- 如申請專利範圍第4項所述之麥克風封裝結構,其中該二金屬導線穿越該封裝膠層。
- 如申請專利範圍第4項所述之麥克風封裝結構,其中該穿孔不位於該至少一積體電路元件於該基板垂直投影的區域內。
- 如申請專利範圍第4項所述之麥克風封裝結構,其中該至少一積體電路元件包含鄰近於該穿孔之聲學訊號處理元件以及遠離該穿孔之電子訊號處理元件。
- 如申請專利範圍第7項所述之麥克風封裝結構,其中該聲學訊號處理元件至少部份位於該微機電麥克風元件於該第二表面之垂直投影的區域內。
- 如申請專利範圍第7項所述之麥克風封裝結構,更包含一重分布層配置於該封裝膠層上,且該重分布層包含電連接至該聲學訊號處理元件之第一導電路徑、電連接至該電子訊號處理元件之第二導電路徑以及接地導電路徑。
- 如申請專利範圍第1項所述之麥克風封裝結構,其中該至少一積體電路元件係以金屬導線連接至 該基板的該第二表面。
- 如申請專利範圍第1項所述之麥克風封裝結構,其中該至少一積體電路元件係以覆晶方式連接至該基板的該第二表面。
- 如申請專利範圍第1項所述之麥克風封裝結構,其中該至少一積體電路元件包含複數個積體電路元件,且該些積體電路元件皆固定於該基板之第二表面上,並且位於該金屬殼體於該第二表面之垂直投影的區域內。
- 如申請專利範圍第12項所述之麥克風封裝結構,其中該些積體電路包含複數個焊墊,並且該些複數個焊墊皆位於該金屬殼體於該第二表面之垂直投影的區域內。
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Also Published As
Publication number | Publication date |
---|---|
CN110690207A (zh) | 2020-01-14 |
TW202033004A (zh) | 2020-09-01 |
US20200267479A1 (en) | 2020-08-20 |
US20200266151A1 (en) | 2020-08-20 |
CN110677793B (zh) | 2021-09-10 |
CN110677793A (zh) | 2020-01-10 |
US10943870B2 (en) | 2021-03-09 |
TW202033001A (zh) | 2020-09-01 |
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