TWI394236B - 具有黏著性間隔結構之可固定積體電路封裝內封裝系統 - Google Patents
具有黏著性間隔結構之可固定積體電路封裝內封裝系統 Download PDFInfo
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- TWI394236B TWI394236B TW096148370A TW96148370A TWI394236B TW I394236 B TWI394236 B TW I394236B TW 096148370 A TW096148370 A TW 096148370A TW 96148370 A TW96148370 A TW 96148370A TW I394236 B TWI394236 B TW I394236B
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Description
本發明係相關於一種積體電路封裝系統,尤其是相關於一種可固定積體電路封裝內封裝系統。
積體電路封裝技術已增加了固定在單一電路板或基板上的積體電路數量,新封裝設計係於外形上更精巧,如積體電路的實體尺寸及形狀,且於整體積體電路密度上提供顯著的增加。然而,積體電路密度持續受限於可利用的“不動產(reality)”,以於基板上固定個別的積體電路,即使是較大外型之系統,如個人電腦、電腦伺服器及儲存伺服器,在相同或更小的“不動產”中需有更多的積體電路,特別是,對於可攜式個人電子裝置的需求,如手機、數位相機、音樂播放器、個人數位助理以及定位型裝置,對積體電路密度的需求更進一步。
因積體電路密度的增加而導致多晶片封裝或封裝內封裝(package-in-packages,PIP)的發展,其使一個以上的積體電路可封裝在一起,每一封裝可提供個別積體電路及一個或更多層的連接跡線之機構上的支撐,以使該積體電路可電性連接至周圍電路。電路多晶片封裝,亦一般係指多晶片模組,通常包含基板且於其上黏著有一群分離的積體電路元件,此類的多晶片封裝已發現可增加積體電路密度及縮小化、改善訊號傳輸速度、減小整體積體電路尺寸及重量、改善效能及降低成本-所有電腦業界的基本目標。
具有堆疊結構、或PIP之多晶片封裝也可能出現問題。間隔結構可用於創造空間以供於堆疊結構作電性連接;封裝內封裝結構在堆疊結構中包含有封裝積體電路,典型封裝積體電路的間隔結構及封裝材料具有低黏性而成為脫層(Delamination)的來源,傳統的間隔結構及封裝積體電路於可靠度測試欠佳即從此介面脫層。
因此,對於可固定積體電路封裝內封裝系統仍維持有提供低成本製造、改善良率及較薄高度之積體電路的需求。從始終有節省成本及改善效能的需求觀點來看,找出這些問題的解答是越來越重要。
已長期設法找出這些問題的解答但未有較佳發展或建議任何的解答,因此,這些問題的解答已長期困擾此領域中之技藝人士。
本發明係提供一種可固定積體電路封裝內封裝系統,包括固定黏著間隔件於積體電路晶粒及封裝基板上、固定具有內部黏著結構之積體電路封裝系統,其中該內部黏著結構係在該黏著間隔件上、以及形成封裝之封裝膠體以覆蓋於該黏著間隔件上之該積體電路封裝系統。
本發明之部分實施例具有除上述外之其他或替代觀點,該觀點係此領域之技藝人士當從閱讀下列詳細說明與參考配合圖示而可顯而易見的。
以下實施例係充分詳細描述以使熟悉本領域之技藝人
士可製造及使用本發明,其他實施例依此揭露可明瞭而理解,而且其系統、製程或機構上的改變並未悖離本發明之範疇。
於下列敘述中,係給定多個詳細說明以提供本發明之完整瞭解,然而,該發明之實施為顯而易見的則未有這些詳細細節。為避免模糊本發明,一些已知的電路、系統結構及製程步驟未詳細地揭露。同樣地,本發明實施例該些圖的顯示係為概略的且未有比例,且特別地,一些尺寸為清楚呈現本發明係誇大地顯示於圖示中。另外,在多個實施例中揭露及描述某些共同特徵,為清楚及容易說明、描述及理解,彼此相似及相同特徵將一般以相同參考編號來描述。
為說明的原因,在此使用的“水平(horizontal)”係定義為平行該積體電路的平面或表面,無論其定位;該“垂直(vertical)”名稱係指垂直所定義的“水平”之方向,稱“在...上面(above)”、“在...下面(below)”、“底部(bottom)”、“上方(top)”、“側邊”(如在“側壁”)、“較高(higher)”、“較低(lower)”、“上面的(upper)”、“覆於...上(over)”以及“在...之下(under)”,係相對該水平平面而定義,稱“在...上(on)”係指在元件間有直接接觸,在此稱“過程(processing)”係包含材料的設置、圖案化、曝光、顯影、蝕刻、清潔、注模,以及/或材料的移除或形成上述結構所需之要求,在此稱“系統(system)”意指且係指依照上下文其係使用的本發明之方法及裝置。
現參考第1圖,其係顯示可固定積體電路封裝內封裝系統100的上視圖,該上視圖係顯示封裝之封裝膠體102(如環氧注模複合物)具有開口104,開口104係暴露一部分的積體電路封裝系統106。被內部封裝膠體110(如環氧注模複合物)所環繞的連接終端108(如接腳(lead))係暴露於開口104中。內部封裝膠體110係暴露預先封裝之積體電路晶粒114之背側112。連接終端108、內部封裝膠體110、以及預先封裝之積體電路晶粒114係為積體電路封裝系統106之一部分。
現參考第2圖,其係顯示第1圖中該可固定積體電路封裝內封裝系統沿2--2之剖面圖,該剖面圖顯示積體電路晶粒202以黏著層206(如晶粒黏著層)固定於封裝基板204之上,如壓合基板。
黏著間隔件208(如聚合物或金屬間隔件)係設於積體電路晶粒202的主動側210及積體電路封裝系統206之間。主動側210其上係設有電路(未圖示),黏著間隔件208並未阻礙封裝基板204和主動側210間的內部連接212的連結,如焊接焊線或引線帶楔焊鍵合焊線(ribbon bond wires)。
積體電路封裝系統106係顯示為倒置形成面對面結構,預先封裝之積體電路晶粒114之上側214係面向主動側210,上側214於其上具有電路(未圖示)。
內部連接216(如焊接焊線或引線帶楔焊鍵合焊線)係連接上側214及連接終端108。內部封裝膠體110暴露內
部黏著結構218(如聚合物或金屬結構),內部黏著結構218係設於上側214上。內部黏著結構218並未阻礙內部連接216與上側214的連結。
黏著間隔件208與主動側210形成預定黏著層,以減輕或消除此介面的脫層(delamination),內部黏著結構218及黏著間隔件208亦彼此形成預定黏著層,其係較佳於形成於黏著間隔件208與內部封裝膠體110間的黏著層。內部黏著結構218及黏著間隔件208間的黏著層係減輕或消除此介面的脫層。減輕或消除可固定積體電路封裝內封裝系統100的脫層來源以改善可靠度測試的可靠度及效能,如濕度敏感等級(moisture sensitivity level,MSL)測試。
黏著間隔件208及內部黏著結構218可作用為散熱結構,熱可從積體電路晶粒202經由黏著間隔件208、內部黏著結構218及預先封裝之積體電路晶粒114而從背側112散失到周圍。
經發現本發明提供可靠度的改善,如抵抗脫層的改善及熱效能的改善,積體電路封裝系統106之內部黏著結構218與黏著間隔件208間的黏著層係減輕或消除此介面的脫層,此改善可靠度測試的效能,如MSL測試。而且,黏著間隔件208及內部黏著結構218可由導熱性材料形成(如金屬或金屬合金)提供熱流路徑,該熱流路徑改善可固定積體電路封裝內封裝系統100的熱效能。
內部連接212亦連結連接終端108及封裝基板204。外部連接220(如焊接錫球)連接至封裝基板204之對向於
積體電路晶粒202的一側上,外部連接220連接至下一個系統階級(未圖示),如印刷電路板或另一封裝裝置。封裝之封裝膠體102係覆於具有積體電路晶粒202的封裝基板204之一側上,封裝之封裝膠體102係覆蓋積體電路晶粒202、黏著間隔件208、內部連接212及一部分的積體電路封裝系統106,封裝之封裝膠體102之開口104係暴露部分的連接終端108、部分的內部封裝膠體110、及預先封裝之積體電路晶粒114的背側112。
現參考第3圖,其係顯示第1圖中可固定積體電路封裝內封裝系統100具有裝置302之剖面圖。裝置302可為複數個不同元件,如覆晶晶片、分離的被動元件、或另一可固定積體電路封裝內封裝系統(未圖示),裝置302具有電性連接304,如焊接凸塊,裝置302設於可固定積體電路封裝內封裝系統100之封裝之封裝膠體102的開口104上,電性連接304係黏著有連接終端108而於暴露於開口104中。
現參考第4圖,其係顯示第1圖中可固定積體電路封裝內封裝系統400之另一實施例沿2--2之剖面圖,第1圖中可固定積體電路封裝內封裝系統100的上視圖亦可表現可固定積體電路封裝內封裝系統400的上視圖。該剖面圖顯示積體電路晶粒402係固定覆於封裝基板404上(如壓合基板)具有黏著層406,如晶粒黏著層。
黏著間隔件408(如聚合物或金屬間隔件)係設於積體電路晶粒402的主動側410及積體電路封裝系統411間。
主動側410其上係設有電路(未圖示),黏著間隔件408並未阻礙封裝基板404和主動側410間的內部連接412的連結,如焊接焊線或引線帶楔焊鍵合焊線(ribbon bond wires)。
該積體電路封裝系統411係顯示為倒置形成一面對面結構,具有預先封裝之積體電路晶粒415之上側414係面向該主動側410,該上側414於其上具有電路(未圖示)。
內部連接416,如焊接焊線或引線帶楔焊鍵合焊線,係連接該上側414及連接終端417。內部封裝膠體419係暴露一內部黏著結構418,如聚合物或金屬結構,其係覆於該上側414上而未與該上側414接觸,該內部黏著結構418並未阻礙該內部連接416與上側414的連結。
黏著間隔件408與主動側410形成預定黏著層,以減輕或消除此介面的脫層,內部黏著結構418及黏著間隔件408亦彼此形成預定黏著層,其係較佳於形成於黏著間隔件408與內部封裝膠體419間的黏著層。內部黏著結構418及黏著間隔件408間的黏著層係減輕或消除此介面的脫層。減輕或消除可固定積體電路封裝內封裝系統400的脫層來源以改善可靠度測試的可靠度及效能,如濕度敏感等級測試。
內部連接412亦連結連接終端417及封裝基板404。外部連接420(如焊接錫球)連接至封裝基板404上對向於積體電路晶粒402之一側上,外部連接420連接至下一個系統階級(未圖示),如印刷電路板或另一封裝裝置。封裝
之封裝膠體422係覆於具有積體電路晶粒402的封裝基板404之一側上,封裝之封裝膠體422係覆蓋積體電路晶粒402、黏著間隔件408、內部連接412及一部分的積體電路封裝系統411,封裝之封裝膠體422中之開口424係暴露部分的連接終端417、部分的內部封裝膠體419及預先封裝之積體電路晶粒415的背側426。
現參考第5圖,其係顯示本發明可固定積體電路封裝內封裝系統500之又另一實施例之上視圖,該上視圖顯示封裝之封裝膠體502(如環氧注模複合物)具有開口504,開口504係暴露一部分的積體電路封裝系統506,開口504係暴露***件505(如壓合基板),具有連接終端508(如接觸墊),連接終端508及***件505係為積體電路封裝系統506之一部分。
現參考第6圖,其係顯示第5圖中可固定積體電路封裝內封裝系統500沿6--6之剖面圖,該剖面圖顯示積體電路晶粒602係以黏著層606(如晶粒黏著層)固定覆於封裝基板604上(如壓合基板)。
黏著間隔件608(如聚合物或金屬間隔件)係設於積體電路晶粒602的主動側610及積體電路封裝系統506間。主動側610其上係設有電路(未圖示),黏著間隔件608並未阻礙主動側610和封裝基板604間的內部連接612的連結,如焊接焊線或引線帶楔焊鍵合焊線。
積體電路封裝系統506係顯示為倒置形成面對面結構,具有預先封裝之積體電路晶粒514之上側614係面向
主動側610,上側614於其上具有電路(未圖示)。
內部連接616(如焊接焊線或引線帶楔焊鍵合焊線)係連接上側614及***件505。內部封裝膠體617(如環氧注模複合物)係暴露內部黏著結構618(如聚合物或金屬結構),內部黏著結構618係設於上側414之上,內部封裝膠體617係覆蓋預先封裝之積體電路晶粒514及內部連接616,而覆於具有預先封裝之積體電路晶粒514的***件505一側上,內部黏著結構618並未阻礙內部連接616與上側614的連結。
黏著間隔件608與主動側610形成預定黏著層,以減輕或消除此介面的脫層,內部黏著結構618及黏著間隔件608亦彼此形成預定黏著層,其係較佳於形成於該黏著間隔件608與內部封裝膠體617間的黏著層。內部黏著結構618及黏著間隔件608間的黏著層係減輕或消除此介面的脫層。減輕或消除可固定積體電路封裝內封裝系統500的脫層來源以改善可靠度測試的可靠度及效能,如濕度敏感等級測試。
黏著間隔件608及內部黏著結構618可作用為散熱結構,熱可從積體電路晶粒602經由黏著間隔件608、內部黏著結構618、及預先封裝之積體電路晶粒514,而從預先封裝之積體電路晶粒514的背側619散失到周圍。
內部連接612亦連結***件505及封裝基板604。外部連接620(如焊接錫球)連接至封裝基板604上對向於積體電路晶粒602之一側上,外部連接620連接至下一個系
統階級(未圖示),如印刷電路板或另一封裝裝置。封裝之封裝膠體502係覆於具有積體電路晶粒602的封裝基板604之一側上,封裝之封裝膠體502係覆蓋積體電路晶粒602、黏著間隔件608、內部連接612及部分的積體電路封裝系統506,封裝之封裝膠體502之開口504係暴露一部分的***件505及連接終端508。
現參考第7圖,其係顯示本發明可固定積體電路封裝內封裝系統700之又另一實施例於第5圖沿6--6之剖面圖,第5圖中可固定積體電路封裝內封裝系統500的上視圖亦可表現可固定積體電路封裝內封裝系統700的上視圖。該剖面圖顯示積體電路晶粒702係固定覆於封裝基板704上(如壓合基板),具有黏著層706,如晶粒黏著層。
黏著間隔件708(如聚合物或金屬間隔件)係設於積體電路晶粒702的主動側710及積體電路封裝系統711間,主動側710其上係設有電路(未圖示),黏著間隔件708並未阻礙封裝基板704和主動側710間的內部連接712的連結,如焊接焊線或引線帶楔焊鍵合焊線。
積體電路封裝系統711係顯示為倒置形成面對面結構,具有預先封裝之積體電路晶粒715之上側714係面向主動側710,上側714於其上具有電路(未圖示)。
內部連接716(如焊接焊線或引線帶楔焊鍵合焊線)係連接上側714及***件717。內部封裝膠體719(如環氧注模複合物)係覆蓋預先封裝之積體電路晶粒715及內部連接716,而覆於具有預先封裝之積體電路晶粒715之***
件717一側上。
內部黏著結構718(如聚合物或金屬結構)係設於上側714且覆於內部封裝膠體719上,內部黏著結構718並未阻礙內部連接716與上側714的連結。
黏著間隔件708與主動側710形成預定黏著層,以減輕或消除此介面的脫層,黏著間隔件708及內部黏著結構718亦彼此形成預定黏著層。黏著間隔件708並未接觸內部封裝膠體719以消除此介面的脫層。內部黏著結構718及黏著間隔件708間的黏著層係減輕或消除此介面的脫層。減輕或消除可固定積體電路封裝內封裝系統700的脫層來源以改善可靠度測試的可靠度及效能,如濕度敏感等級測試。
該內部連接712亦連結***件717及封裝基板704。外部連接720(如焊接錫球)連接至封裝基板704上對向於積體電路晶粒702之一側上,外部連接720連接至下一個系統階級(未圖示),如印刷電路板或另一封裝裝置。封裝之封裝膠體722係覆於具有積體電路晶粒702的封裝基板704之一側上,封裝之封裝膠體722係覆蓋積體電路晶粒702、黏著間隔件708、內部連接712及部分的積體電路封裝系統711,封裝之封裝膠體722之開口724係暴露具有連接終端726之***件717。
現參考第8圖,其係顯示本發明可固定積體電路封裝內封裝系統800之又另一實施例於第5圖沿6--6之剖面圖,第5圖中可固定積體電路封裝內封裝系統500的上視
圖亦可表現該可固定積體電路封裝內封裝系統800的上視圖。該剖面圖顯示可固定積體電路封裝內封裝系統800具有與第6圖可固定積體電路封裝內封裝系統500的剖面圖相似之結構。
積體電路晶片802係固定覆於封裝基板804上(如壓合基板),具有黏著層806,如晶片黏著層。黏著間隔件808係設於積體電路晶片802的主動側810及積體電路封裝系統811間。
積體電路封裝系統811係顯示為倒置形成面對面結構,具有預先封裝之積體電路晶粒815之上側814係面向主動側810。內部連接816係連接上側814及***件817。內部封裝膠體819係覆蓋預先封裝之積體電路晶粒815及內部連接816而覆於具有預先封裝之積體電路晶粒815的***件817一側上。
內部封裝膠體819係暴露內部黏著結構818。內部黏著結構818係覆於上側814上且並未接觸上側814,內部黏著結構818並未阻礙內部連接816與上側814的連結。
黏著間隔件808與主動側810形成預定黏著層,以減輕或消除此介面的脫層,黏著間隔件808及內部黏著結構818亦彼此形成預定黏著層,其係較佳於形成於該黏著間隔件808與內部封裝膠體819間的黏著層。內部黏著結構818及黏著間隔件808間的黏著層係減輕或消除此介面的脫層。
內部連接812亦連結***件817及封裝基板804。外
部連接820(如焊接錫球)係連接至封裝基板804上對向於積體電路晶片802之一側上,外部連接820連接至下一個系統階級(未圖示),如印刷電路板或另一封裝裝置。封裝之封裝膠體822係覆於具有積體電路晶片802的封裝基板804之一側上,封裝之封裝膠體822係覆蓋積體電路晶片802、黏著間隔件808、內部連接812及部分的積體電路封裝系統811,封裝之封裝膠體822之開口824係暴露具有連接終端826之***件817。
現參考第9圖,其係顯示本發明可固定積體電路封裝內封裝系統900之又另一實施例於第5圖沿6--6之剖面圖,第5圖中可固定積體電路封裝內封裝系統500的上視圖亦可表現可固定積體電路封裝內封裝系統900的上視圖,該剖面圖顯示可固定積體電路封裝內封裝系統900具有與第7圖可固定積體電路封裝內封裝系統700的剖面圖相似之結構。
積體電路晶片902係固定覆於封裝基板904上(如壓合基板),具有黏著層906,如晶片黏著層。黏著間隔件908係設於積體電路晶片902的主動側910及積體電路封裝系統911間。
積體電路封裝系統911係顯示為倒置形成面對面結構,具有預先封裝之積體電路晶粒915之上側914係面向主動側910。內部連接916係連結上側914及***件917。內部封裝膠體919係覆蓋該預先封裝之積體電路晶粒915及內部連接916而覆於具有預先封裝之積體電路晶粒915
的***件917之一側上。
內部黏著結構918係覆於內部封裝膠體919上,內部黏著結構918係覆於該上側914上而並未接觸上側914。該內部黏著結構918並未阻礙內部連接916與上側914的連結。
黏著間隔件908與主動側910形成預定黏著層,以減輕或消除此介面的脫層,黏著間隔件908及內部黏著結構918亦彼此形成預定黏著層。內部黏著結構918及黏著間隔件908間的黏著層係減輕或消除此介面的脫層。
內部連接912亦連結***件917及封裝基板904。外部連接920(如焊接錫球)係連接至封裝基板904上對向於積體電路晶片902之一側上,外部連接920係連接至下一個系統階級(未圖示),如印刷電路板或另一封裝裝置。封裝之封裝膠體922係覆於具有積體電路晶片902的封裝基板904之一側上,封裝之封裝膠體922係覆蓋積體電路晶片902、黏著間隔件908、內部連接912及部分的積體電路封裝系統911,封裝之封裝膠體922之開口924係暴露該具有連接終端926之***件917。
現參考第10圖,其係顯示本發明可固定積體電路封裝內封裝系統1000之又另一實施例之上視圖,該上視圖係顯示封裝之封裝膠體1002(如環氧注模複合物),具有開口1004,開口1004係暴露一部分的積體電路封裝系統1006。被內部封裝膠體1010(如環氧注模複合物)所環繞的連接終端1008(如接腳)係暴露於該開口1004中,內部封裝膠體
1010係暴露焊盤1012,如晶片黏著焊盤。連接終端1008、內部封裝膠體1010及焊盤1012係為積體電路封裝系統1006之一部分。
現參考第11圖,其係顯示第10圖中可固定積體電路封裝內封裝系統1000沿11--11之剖面圖,該剖面圖顯示積體電路晶粒1102係固定覆於具有黏著層1106的封裝基板1104上。
黏著間隔件1108係設於積體電路晶粒1102的主動側1110及積體電路封裝系統1006間,主動側1110其上係設有電路(未圖示),黏著間隔件1108並未阻礙介於主動側1110及封裝基板1104間之內部連接1112的連結。
積體電路封裝系統1006係顯示為倒置形成面對面結構,具有預先封裝之積體電路晶粒1014之上側1114係面向主動側1110。上側1114於其上係設有電路(未圖示),預先封裝之積體電路晶粒1014係固定於焊盤1012之上。
內部連接1116連接上側1114及連接終端1008,內部封裝膠體1010係暴露內部黏著結構1118於該上側1114上,內部黏著結構1118並未阻礙內部連接1116與上側1114的連結。
黏著間隔件1108與主動側1110形成預定黏著層以減輕或消除此介面的脫層,內部黏著結構1118及黏著間隔件1108亦彼此形成預定黏著層,其係較佳於形成於黏著間隔件1108與內部封裝膠體1010間的黏著層,內部黏著結構1118及黏著間隔件1108間的黏著層係減輕或消除此介面
的脫層。
黏著間隔件1108及內部黏著結構1118可作用為散熱結構,熱可從積體電路晶粒1102經由黏著間隔件1108、內部黏著結構1118及預先封裝的積體電路晶片1014而從焊盤1012散失到周圍。
內部連接1112亦連結連接終端1008及封裝基板1104。外部連接1120連接至封裝基板1104上對向於積體電路晶粒1102之一側上,外部連接1120連接至下一個系統階級(未圖示);。封裝之封裝膠體1002係覆於具有積體電路晶粒1102的封裝基板1104之一側上,封裝之封裝膠體1002係覆蓋積體電路晶粒1102、黏著間隔件1108、內部連接1112及部分的積體電路封裝系統1006,封裝之封裝膠體1002之開口1004係暴露部分的連接終端1008、部分的內部封裝膠體1010以及焊盤1012。
現參考第12圖,其係顯示本發明可固定積體電路封裝內封裝系統1200之又另一實施例於第10圖沿11--11之剖面圖,第10圖中可固定積體電路封裝內封裝系統1000的上視圖亦可表現可固定積體電路封裝內封裝系統1200的上視圖,該剖面圖顯示積體電路晶片1202係固定覆於具有黏著層1206之封裝基板1204上。
黏著間隔件1208係設於積體電路晶片1202的主動側1210及積體電路封裝系統1211間。黏著間隔件1208係具有第一接合部1228,其中,第一接合部1228具有第一突部1230而其他位置處具有第一凹部1232。主動側1210其
上係設有電路(未圖示)。黏著間隔件1208並未阻礙介於主動側1210及封裝基板1204間之內部連接1212的連結。
積體電路封裝系統1211係顯示為倒置形成面對面結構,具有預先封裝之積體電路晶粒1215之上側1214係面向主動側1210,上側1214於其上具有電路(未圖示),預先封裝之積體電路晶粒1215係固定覆於焊盤1217上。
內部連接1216係連接上側1214及連接終端1219。內部封裝膠體1222係暴露內部黏著結構1218,內部黏著結構1218並未接觸上側1214,內部黏著結構1218具有第二接合部1234,其中,該第二接合部1234具有第二突部1236而在其他位置處具有第二凹部1238,該第一接合部1228及第二接合部1234係為相互配合(complementary mating)之接合部,以使第一突部1230與第二凹部1238相互配合,且第二突部1236與第一凹部1232相配合。黏著間隔件1208及內部黏著結構1218間係顯示有間隙以說明該第一接合部1228及第二接合部1234相互配合之接合部。內部黏著結構1218並未阻礙內部連接1216與上側1214的連結。
黏著間隔件1208與主動側1210形成預定黏著層,以減輕或消除此介面的脫層,內部黏著結構1218及黏著間隔件1208亦彼此形成預定黏著層,其係較佳於形成於黏著間隔件1208與內部封裝膠體1222間的黏著層。內部黏著結構1218及黏著間隔件1208間的黏著層係減輕或消除此介面的脫層。
內部連接1212亦連結該連接終端1219及封裝基板1204。外部連接1220連接至封裝基板1204上對向於積體電路晶片1202之一側上,外部連接1220連接至下一個系統階級(未圖示)。封裝之封裝膠體1224係覆於具有積體電路晶片1202之封裝基板1204一側上,封裝之封裝膠體1224係覆蓋積體電路晶片1202、黏著間隔件1208、內部連接1212及部分的積體電路封裝系統1211,封裝之封裝膠體1224之開口1226係暴露部分的連接終端1219、部分的內部封裝膠體1222以及焊盤1217。
現參考第13圖,其係顯示本發明可固定積體電路封裝內封裝系統1300之一實施例之可固定積體電路封裝內封裝系統製造流程圖。系統1300在方塊1302係包含固定黏著間隔件覆於積體電路晶片及封裝基板上;方塊1304係包含於該黏著間隔件上固定具有內部黏著結構之積體電路封裝系統與該內部黏著結構;以及方塊1306係包含形成封裝之封裝膠體以覆蓋該積體電路封裝系統覆於該黏著間隔件上。
該實施例其他重要的觀點還有包括降低成本、簡化系統及增加效能。
本實施例這些及其他可貴特點在下一階段必然地使技術狀態往前更進一步。
因此,經發現本發明之可固定積體電路封裝內封裝系統提供重要以及在此之前未知及未可得的解決方法、性能及功能特點以改善系統的可靠度。該製程結果及結構為明
確地、符合經濟效益、不複雜、高度地多方面適用及有效的,可藉由採用已知技術而實施,且可立即地適用而有效且經濟地製造積體電路封裝裝置。
因該發明係以一特定的最佳模式而描述,眾多替代的、修改的及各種變化,因前述說明而為熟悉此項技藝的人士了解所顯而易見的,據此,其係傾向包含所有這類替代的、修改的及各種變化皆於包含的專利範圍內,在此提出的所有事項或顯示於附圖係為範例之說明而非用於限制。
100、400、500、700、800、900、1000、1200、1300‧‧‧可固定積體電路封裝內封裝系統
102、422、502、722、822、922、1002、1224‧‧‧封裝之封裝膠體
104、424、504、724、824、924、1004、1226‧‧‧開口
106、411、506、711、811、911、1006、1211‧‧‧積體電路封裝系統
108、508、826‧‧‧連接終端
110‧‧‧內部封裝膠體
112、426、619‧‧‧背側
114、514、715、815、915、1014、1215‧‧‧預先封裝之積
體電路晶粒
602、702、1102‧‧‧積體電路晶粒
202、402、415、802、902、1014、1202‧‧‧積體電路晶片
204、404、604、704、804、904、1104、1204‧‧‧封裝基板
206、406、606、706、806、906、1106、1206‧‧‧黏著層
208、408、608、708、808、908、1108、1208‧‧‧黏著間隔件
210、410、610、710、810、910、1110、1210‧‧‧主動側
212、412、612、712、812、912、1112、1212‧‧‧內部連接
214、414、614、714、814、914、1114、1214‧‧‧上側
216、416、616、716、816、916、1116、1216‧‧‧內部連接
218、418、618、718、818、918、1118、1218‧‧‧內部黏著結構
220、420、620、720、820、920、1120、1220‧‧‧外部連接
302‧‧‧裝置
304‧‧‧電性連接部
417、726、926、1008、1219‧‧‧連接終端
419、617、719、819、919、1010、1222‧‧‧內部封裝膠體
505、717、817、917‧‧‧***件
1012、1217‧‧‧焊盤
1228‧‧‧第一接合部
1230‧‧‧第一突部
1232‧‧‧第一凹部
1234‧‧‧第二接合部
1236‧‧‧第二突部
1238‧‧‧第二凹部
1300、1302、1304、1306‧‧‧方塊
第1圖係為本發明可固定積體電路封裝內封裝系統之實施例之上視圖;第2圖係為第1圖中該可固定積體電路封裝內封裝系統沿2-2之剖面圖;第3圖係為第1圖中該可固定積體電路封裝內封裝系統與裝置之剖面圖;第4圖係為第1圖中該可固定積體電路封裝內封裝系統之另一實施例沿2-2之剖面圖;第5圖係為本發明可固定積體電路封裝內封裝系統之另一實施例之上視圖;第6圖係為第5圖中該可固定積體電路封裝內封裝系統沿6-6之剖面圖;第7圖係為本發明可固定積體電路封裝內封裝系統之又另一實施例於第5圖沿6-6之剖面圖;
第8圖係為本發明可固定積體電路封裝內封裝系統之又另一實施例於第5圖沿6-6之剖面圖;第9圖係為本發明可固定積體電路封裝內封裝系統之又另一實施例於第5圖沿6-6之剖面圖;第10圖係為本發明可固定積體電路封裝內封裝系統之又另一實施例之上視圖;第11圖係為第10圖中該可固定積體電路封裝內封裝系統沿11--11之剖面圖;第12圖係為本發明可固定積體電路封裝內封裝系統之又另一實施例於第10圖沿11-11之剖面圖;以及第13圖係為可固定積體電路封裝內封裝系統之流程圖以製造本發明可固定積體電路封裝內封裝系統之實施例。
100‧‧‧可固定積體電路封裝內封裝系統
102‧‧‧封裝膠體
104‧‧‧開口
106‧‧‧積體電路封裝系統
108‧‧‧連接終端
110‧‧‧內部封裝膠體
112‧‧‧背側
114‧‧‧預先封裝之積體電路晶粒
202‧‧‧積體電路晶粒
204‧‧‧封裝基板
206‧‧‧黏著層
208‧‧‧黏著間隔件
210‧‧‧主動側
212‧‧‧內部連接
214‧‧‧上側
216‧‧‧內部連接
218‧‧‧內部黏著結構
220‧‧‧外部連接
Claims (10)
- 一種製造可固定積體電路封裝內封裝系統之方法,包括:固定黏著間隔件覆於積體電路晶粒及封裝基板之上;固定具有內部黏著結構及內部封裝膠體之積體電路封裝系統,該內部封裝膠體封裝該內部黏著結構之一部分,該內部黏著結構係在該黏著間隔件上;以及形成封裝之封裝膠體以覆蓋於該黏著間隔件之上之該積體電路封裝系統。
- 如申請專利範圍第1項所述之方法,其中,形成該封裝之封裝膠體包含形成該封裝之封裝膠體具有開口,且該開口係暴露該積體電路封裝系統之一部分。
- 如申請專利範圍第1項所述之方法,復包括將裝置固定於該封裝之封裝膠體之開口中及在由該開口所暴露之該積體電路封裝系統之上。
- 如申請專利範圍第1項所述之方法,復包括形成該積體電路封裝系統,該積體電路封裝系統具有該內部封裝膠體及預先封裝之積體電路晶粒,該內部封裝膠體係暴露該預先封裝之積體電路晶粒。
- 如申請專利範圍第1項所述之方法,復包括:形成該黏著間隔件具有第一突出部及第一凹部;以及形成該內部黏著結構具有第二突出部及第二凹部, 其係與該第一突出部及該第一凹部相互配合。
- 一種可固定積體電路封裝內封裝系統,包括:封裝基板;積體電路晶粒,係設於該封裝基板之上;黏著間隔件,係設於該積體電路晶粒之上;內部黏著結構;積體電路封裝系統,具有該內部黏著結構及內部封裝膠體,該內部封裝膠體封裝該內部黏著結構之一部分,該內部黏著結構係設於該黏著間隔件上;以及封裝之封裝膠體,覆蓋於該黏著間隔件之上之該積體電路封裝系統。
- 如申請專利範圍第6項所述之系統,其中,該封裝之封裝膠體係包含開口,該開口係暴露該積體電路封裝系統之一部分。
- 如申請專利範圍第6項所述之系統,復包括裝置,該裝置係設於該封裝之封裝膠體之開口中,且在由該開口所暴露之該積體電路封裝系統之上。
- 如申請專利範圍第6項所述之系統,其中,該積體電路封裝系統係包含該內部封裝膠體及由該內部封裝膠體所暴露之預先封裝之積體電路晶粒。
- 如申請專利範圍第6項所述之系統,其中:該黏著間隔件係包含第一突出部及第一凹部;以及該內部黏著結構係包含第二突出部及第二凹部,其係與該第一突出部及該第一凹部相互配合。
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