TWI525658B - 設計製造用於微影蝕刻遮罩應用的富硼薄膜之方法 - Google Patents
設計製造用於微影蝕刻遮罩應用的富硼薄膜之方法 Download PDFInfo
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- TWI525658B TWI525658B TW100112695A TW100112695A TWI525658B TW I525658 B TWI525658 B TW I525658B TW 100112695 A TW100112695 A TW 100112695A TW 100112695 A TW100112695 A TW 100112695A TW I525658 B TWI525658 B TW I525658B
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- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 title claims description 244
- 229910052796 boron Inorganic materials 0.000 title claims description 244
- 239000000463 material Substances 0.000 claims description 50
- 238000000034 method Methods 0.000 claims description 49
- 239000000758 substrate Substances 0.000 claims description 47
- 238000005530 etching Methods 0.000 claims description 31
- 239000002243 precursor Substances 0.000 claims description 29
- 238000000151 deposition Methods 0.000 claims description 20
- 239000001257 hydrogen Substances 0.000 claims description 12
- 229910052739 hydrogen Inorganic materials 0.000 claims description 12
- 229920002120 photoresistant polymer Polymers 0.000 claims description 12
- 239000000203 mixture Substances 0.000 claims description 11
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 10
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 6
- 238000006243 chemical reaction Methods 0.000 claims description 6
- 150000002431 hydrogen Chemical class 0.000 claims description 6
- 239000000126 substance Substances 0.000 claims description 6
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 5
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 5
- 229910052799 carbon Inorganic materials 0.000 claims description 5
- 229910052757 nitrogen Inorganic materials 0.000 claims description 5
- 239000001301 oxygen Substances 0.000 claims description 5
- 229910052760 oxygen Inorganic materials 0.000 claims description 5
- 238000010438 heat treatment Methods 0.000 claims description 4
- 238000000059 patterning Methods 0.000 claims description 4
- 238000009832 plasma treatment Methods 0.000 claims description 3
- 230000000116 mitigating effect Effects 0.000 claims 2
- 229910052582 BN Inorganic materials 0.000 claims 1
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 claims 1
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 claims 1
- 238000007517 polishing process Methods 0.000 claims 1
- 239000010410 layer Substances 0.000 description 142
- 230000008569 process Effects 0.000 description 28
- 238000004380 ashing Methods 0.000 description 16
- 238000005229 chemical vapour deposition Methods 0.000 description 14
- 238000004140 cleaning Methods 0.000 description 14
- 230000008021 deposition Effects 0.000 description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 8
- 239000000654 additive Substances 0.000 description 8
- 229910052802 copper Inorganic materials 0.000 description 8
- 239000010949 copper Substances 0.000 description 8
- 239000007789 gas Substances 0.000 description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 6
- 229920005591 polysilicon Polymers 0.000 description 6
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 5
- 230000008859 change Effects 0.000 description 5
- 239000004020 conductor Substances 0.000 description 5
- 239000003085 diluting agent Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 4
- 238000005137 deposition process Methods 0.000 description 4
- 229910052698 phosphorus Inorganic materials 0.000 description 4
- 239000011574 phosphorus Substances 0.000 description 4
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 4
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 3
- 238000005033 Fourier transform infrared spectroscopy Methods 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 229910052731 fluorine Inorganic materials 0.000 description 3
- 239000011737 fluorine Substances 0.000 description 3
- 238000001459 lithography Methods 0.000 description 3
- 230000000704 physical effect Effects 0.000 description 3
- 239000002002 slurry Substances 0.000 description 3
- 229910052715 tantalum Inorganic materials 0.000 description 3
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 229910052734 helium Inorganic materials 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- QLOAVXSYZAJECW-UHFFFAOYSA-N methane;molecular fluorine Chemical compound C.FF QLOAVXSYZAJECW-UHFFFAOYSA-N 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 238000011282 treatment Methods 0.000 description 2
- 101150084548 Cubn gene Proteins 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- TZHYBRCGYCPGBQ-UHFFFAOYSA-N [B].[N] Chemical compound [B].[N] TZHYBRCGYCPGBQ-UHFFFAOYSA-N 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 229910052754 neon Inorganic materials 0.000 description 1
- GKAOGPIIYCISHV-UHFFFAOYSA-N neon atom Chemical compound [Ne] GKAOGPIIYCISHV-UHFFFAOYSA-N 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 239000010955 niobium Substances 0.000 description 1
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000005549 size reduction Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
- RUDFQVOCFDJEEF-UHFFFAOYSA-N yttrium(III) oxide Inorganic materials [O-2].[O-2].[O-2].[Y+3].[Y+3] RUDFQVOCFDJEEF-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/62—Pellicles, e.g. pellicle assemblies, e.g. having membrane on support frame; Preparation thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/32115—Planarisation
- H01L21/3212—Planarisation by chemical mechanical polishing [CMP]
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
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- Plasma & Fusion (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
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- Chemical Vapour Deposition (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Description
本專利申請案主張於2010年5月24日提出申請的名稱為「ENGINEERING BORON-RICH FILMS FOR LITHOGRAPHIC MASK APPLICATIONS」之美國專利申請第12/786,245號為優先權,其以參照方式併入本文中。
本發明的具體實施例一般關於在基材(如半導體基材)上形成薄膜的方法。更特別地,本發明的具體實施例關於用來在基材上形成富硼薄膜的方法。
自從數十年前引進了積體電路,積體電路幾何形態之尺寸已經顯著地減小。從那時候起,積體電路一般遵循著兩年/尺寸減半規則(通常稱為摩爾定律),其意謂晶片上的元件數量每兩年會變成兩倍。現今的製造設施可常規地生產具有0.13 μm甚至是0.1 μm的特徵尺寸之元件,而來日的設施很快將生產具有甚至更小的特徵尺寸之元件。
以針對許多目的而在半導體處理中使用非晶硼薄膜。非晶硼具有良好的機械特性、優越的階梯覆蓋率(step coverage)、良好的濕式蝕刻抗性以及對低介電性薄膜而言的高乾式蝕刻選擇性。就諸如對低-k介電蝕刻之微影硬式遮罩,以及自我校準雙重圖案化製程(self-aligned double-patterning process)等應用而言,所有這些特徵都是有利的。然而,非晶硼的問題在於,其傾向具有高薄膜應力,其造成線路彎折並損壞積體電路。
本發明的具體實施例一般提供透過化學氣相沉積(CVD)製程,於基材上沉積富硼薄膜的方法。已發現富硼薄膜具有許多有利的特徵,如良好的機械特性、優越的階梯覆蓋率、良好的濕式蝕刻抗性及其它與非晶硼類似的特性。可藉由沉積製程調和並控制富硼薄膜的許多物理特徵。
於一具體實施例中,硼薄膜透過CVD處理沉積於基材上。將含硼前驅物導入CVD處理腔室。將基材及前驅物加熱至300℃以上的溫度。含硼前驅物在300℃以上發生熱反應。熱反應造成富硼薄膜沉積於基材上。可以硼及添加物的不同百分比來改變所沉積之富硼層的成分。
在其它具體實施例中,可將氫加入硼材料。為了加入氫,含硼前驅物可包括氫。合適的含硼前驅物之一實例為B2H6。富硼薄膜也可包括氫、氧、碳、氮及磷。藉由改變化學組分的濃度,可控制所沉積之富硼層的物理特性。
為了控制硼層的最終成分,可控制沉積條件。沉積條件包括:前驅物流動速率、溫度、電漿功率及其它製程腔室參數。反應性前驅物也將控制硼成分,並可與稀釋劑(如N2、H2、Ar、He或這些氣體的任何組合)結合。藉由控制不同薄膜組分的相對濃度,可針對特定應用來最佳化硼薄膜的物理特徵。舉例而言,於一具體實施例中,在半導體處理期間,經沉積的硼薄膜可被圖案化且可被使用作為硬式遮罩。在硬式遮罩的實施例中,硼含量大於60%,且諸如氫等其它添加物的含量可小於5%。
在較佳的具體實施例中,使用以下CVD沉積製程條件。含硼前驅物可為B2H6,且其流入CVD腔室的流動速率可介於10 sccm與10 slm之間。製程氣體稀釋劑可為N2及Ar,且各者的流動速率可介於200 sccm與20 slm之間。CVD腔室內的壓力介於10 mT與760 T之間,且基座溫度介於25℃與550℃之間。
富硼薄膜具有非常良好的階梯覆蓋率,且可沉積在具有非平面表面的基材上。在沉積之後,可蝕刻富硼層成為某圖案。將光阻薄膜沉積於富硼薄膜上,並以微影製程圖案化。接著使用乾式蝕刻來蝕刻富硼層成為期望的圖案。在蝕刻富硼層之後,以灰化製程移除光阻層,並以濕式蝕刻製程清潔經圖案化的富硼層。可使用經蝕刻的富硼層作為供下層基材之蝕刻所用的圖案化硬式遮罩。舉例而言,用於蝕刻的下層材料層可包括:介電材料(氧化矽、氮化矽、低-k材料)、金屬(銅、鋁、鎢)以及多晶矽。
在某些具體實施例中,富硼薄膜可包含多重相異的硼層。可以本文所述的方式來沉積各層。各層可具有相同的化學成分及硼濃度。或者,各富硼層可具有相異的化學成分。化學成分與相較於不同蝕刻材料的選擇性有關。因此,若待蝕刻的下層基材為不同材料的層堆疊,富硼材料可具有多個相應層,各相應層就各下層而言具有最佳的選擇性。舉例而言,若基材為層堆疊,其包括由氮化矽覆蓋的多晶矽且二者皆需要進行蝕刻,則富硼硬式遮罩可包括上方層以及下方層,其中上方層相對於氮化矽具高度選擇性,且下方層對多晶矽具高度選擇性。當進行蝕刻處理時,就暴露的氮化矽使用第一蝕刻化學物質,並就多晶矽使用第二蝕刻化學物質。相對於氮化矽具高度選擇性的上方富硼層將被暴露至第一蝕刻化學物質。第一蝕刻化學物質將蝕刻氮化矽,也將蝕刻硼薄膜上方層。當第一蝕刻完成並暴露多晶矽層時,使用第二蝕刻化學物質。在第二蝕刻期間,可將對多晶矽具高度選擇性的下方富硼層暴露至第二蝕刻化學物質。在完成蝕刻處理後,可移除硼層並清潔基材。在其它具體實施例中,可於元件中使用剩餘的硼材料而不將其自基材移除。一般而言,具有較高硼含量的富硼薄膜將傾向於對蝕刻更具抗性,且非晶硼具有最高的蝕刻抗性。
在其它具體實施例中,可於CMP製程中移除硼層。舉例而言,富硼層可覆蓋介電層。可使用微影製程來圖案化硼層,接著可使用經圖案化硼層作為供蝕刻介電層所用之硬式遮罩。在蝕刻(多個)下層介電層之後,可將諸如銅等導電材料沉積於所蝕刻的溝槽中。在金屬沉積後,可以CMP製程平坦化硼層及金屬層,使得所沉積的材料與介電層共平面。可進行額外處理來完成該元件,包括紫外線(UV)硬化或電漿處理,以減輕富硼薄膜中的應力。
本發明針對供半導體元件所用之基材上的富硼層沉積。可使用富硼層作為硬式遮罩,其可在圖案化之後犧牲或留在結構中。舉例而言,富硼薄膜可作為硬式遮罩,以供蝕刻氧化物、氮化物、矽、多晶矽或金屬層所用。
除了硼之外,富硼薄膜也可包括氫、氧、碳、氮及磷。於測試樣本中,氫及其它添加物濃度自低於1%改變至10%。藉由改變添加物的濃度,可控制富硼層的物理特性。舉例而言,富硼層的硬度(HD)傾向於隨著硼的百分比而增加。Young氏模數(MOD)範圍也傾向於隨著硼的百分比而增加。
富硼薄膜具有高階梯覆蓋率及低圖案負載效應(pattern loading effect)。如本文所界定,相較於具低階梯覆蓋率的薄膜而言,具高階梯覆蓋率的薄膜在特徵結構的不同表面(即,側壁、頂部及底部)之間具有低百分比的薄膜厚度差異。圖案負載效應(PLE)界定為:具少量特徵結構(分離的區塊)的基材區域中的特徵結構部分(如,底部、頂部或側壁)上的薄膜厚度,與具高密度特徵結構(密集的區塊)的基材區域中的對應特徵結構部分上的薄膜厚度之間的薄膜厚度差異百分比,且因此,較低的圖案負載效應百分比反映出基材各處之較高薄膜厚度均勻性。富硼層的階梯覆蓋率大於90%,且幾乎所有的硼氮層的圖案負載效應(PLE)皆小於5%。這些特徵非常良好,並與非晶硼一致。
在化學氣相沉積(CVD)處理腔室中,使用特別的製程將富硼層沉積至基材上。第1圖為繪示用來沉積富硼層的基本製程步驟之流程圖。將含硼前驅物導入CVD處理腔室(步驟102)。藉由加熱腔室、控制含硼前驅物的流動速率並控制其它處理腔室參數,來控制CVD處理腔室的操作條件(步驟104)。含硼前驅物及諸如氫、氧、碳、氮及磷等任何添加物發生熱反應。熱反應造成富硼薄膜沉積在基材上(步驟106)。富硼薄膜可在CVD腔室中不存在電漿的情況下,於腔室中沉積至基材上。
當在腔室中無電漿存在的情況下沉積富硼薄膜時,於沉積期間,可將腔室中之基材支撐件的溫度設定在介於約25℃與約650℃之間,且腔室中的壓力可介於約10 mTorr與約760 Torr之間。具富硼薄膜沉積於其上之基底基材可為矽、含矽材料、玻璃或任何其它合適的基材材料。基材可具有一或多個材料層沉積於其上,及/或具有若干特徵結構形成於其中。富硼層可沉積於這些層上。
為了沉積富硼層,將含硼前驅物導入腔室。含硼前驅物可為B2H6,且流動速率可為10sccm至10slm。除了前驅物氣體之外,也可將諸如氫、氧、碳、氮及磷等添加物導入腔室。也可將稀釋氣體導入處理腔室。舉例而言,稀釋氣體可為N2,可以200sccm至20slm的流動速率將其導入。額外的稀釋氣體可為具有200sccm至20slm的流動速率之Ar。在富硼沉積製程期間,腔室壓力可為10mT至760T。富硼材料的沉積速率可在約400至1,450Å/分鐘的範圍內。
在其它具體實施例中,於電漿增進化學氣相沉積(PECVD)腔室中,在電漿存在下沉積富硼薄膜的沉積期間,可將腔室中基材支撐件的溫度設定在介於約100℃與約1,000℃之間,且腔室中的壓力可介於約10mTorr與約760Torr之間。可藉由將RF功率傳送至腔室的噴頭電極及/或基材支撐件電極來提供電漿。可提供功率位準介於約2W與約5,000W之間,處在介於約100kHz至約1MHz(例如,約300kHz至約400kHz)之單一低頻率下的RF功率,或可提供功率位準介於約2W與約5000W之間,處在約1MHz至約60MHz之單一高頻率下的RF功率。或者,可提供處在混合頻率下的RF功率,其包括處在介於約2W與約5000W之間的功率位準下之介於約100kHz至約1MHz之第一頻率,,以及處在介於約2W與約5000W之間的功率位準下之約1MHz至約60MHz之第二頻率。
導入含硼前驅物的腔室可為任何CVD腔室或PECVD腔室。可使用之腔室的實例包括 SE以及 GT PECVD腔室,二者皆可自加州聖大克勞拉市的Applied Materials,Inc.獲得。
藉由在所述的範圍內變化流動速率及其它處理條件,可控制富硼層中的硼濃度。除了薄膜成分之外,可藉由在導入含硼前驅物期間將其它前驅物導入腔室,來制定富硼薄膜的其它特性,如折射係數(RI)及階梯覆蓋率。舉例而言,可結合硼前驅物,將諸如NH3及SiH4等添加物導入CVD處理腔室。以B2H6、NH3及SiH4沉積之富硼薄膜具有最佳的階梯覆蓋率。可使用多種其它添加物來改變沉積之富硼層的效能。
在一具體實施例中,於半導體製造期間,可使用富硼層作為硬式遮罩材料。不同百分比的硼可造成不同的物理特性。舉例而言,就第2圖來說,柱狀圖顯示了不同富硼層的蝕刻速率。此圖表可拆分成三組含硼材料,其個別以不同的氟製程進行蝕刻。第一蝕刻為低溫氧化物(low temperature oxide;LTO)電漿蝕刻,其使用CHF3及C2F6等製程氣體。第二蝕刻為超低K(ultra low K;ULK)主蝕刻(main etch;ME),其典型地使用氟化碳(CxFx),如CHF3:CF4等蝕刻化學物質。第三蝕刻為阻障層低-k(barrier low-k;BLOK),其典型地以諸如CF4等氟化碳(CxFx)進行蝕刻。
前述三個組中的含硼材料具有不同的硼濃度,包括:54%、60%、64%及66%。基於比較的需要,也繪製非晶硼的特徵之圖表。各柱的高度代表不同含硼材料的蝕刻速率。在各組中,按硼含量由左(最低硼含量)至右增加的順序排列柱。隨著硼含量增加,蝕刻速率傾向降低。對蝕刻1及蝕刻2而言的蝕刻速率非常類似。就具有54%至64%的硼之硼層而言,蝕刻速率介於約480至520/min之間。當硼含量增加至66%,蝕刻速率下落至約390 /min。相對地,相同蝕刻條件中的非晶硼之蝕刻速率約為160 /min。就第三蝕刻而言,具有54%至64%的硼之硼層的蝕刻速率約自400至420 /min,具有66%的硼之硼層的蝕刻速率為300 /min,且非晶硼的蝕刻速率為100 /min。
就第3圖來說,柱狀圖繪示了富硼層針對三種氟系蝕刻製程的選擇性。此圖表以介於0與1之間的數字說明硼的選擇性,該數字指示富硼層與基材的未經覆蓋區塊之相對蝕刻速率。選擇性傾向於降低,表示下方層的蝕刻速率較富硼層高。在前兩種蝕刻中,具有54%至64%的硼含量之富硼層的選擇性介於0.54至0.56之間。具有66%的硼之富硼層的選擇性約為0.41,且非晶硼的選擇性約為0.17。就第三氟蝕刻而言,具有54%至64%的硼含量之富硼層的選擇性介於0.58至0.62之間,且非晶硼的選擇性為0.17。
就第4圖來說,也測量了灰化及濕式清潔後之富硼層的厚度損失。在灰化及濕式清潔之前及之後測量厚度,以測定厚度損失。富硼層因灰化損失9 至18 的厚度,且在灰化及濕式清潔兩者進行之後損失33至40 的厚度。比較而言,97%的硼層因灰化損失17 的厚度,且因灰化及濕式清潔損失34 的厚度。因此,這些富硼材料的材料移除特徵類似於非晶硼。
可以諸如HF:H2O2、熱H3PO4及H2SO4:H2O2等溶液進行濕式清潔。就表1來說,針對這些濕式清潔溶液之富硼材料的蝕刻速率列示於其中。隨著硼含量的增加,蝕刻速率範圍縮小。含有60%+的硼之富硼所具有的蝕刻速率非常類似非晶硼。
在灰化及濕式清潔之後,除了富硼層厚度改變之外,這些製程也可改變富硼層的折射係數。第5圖為柱狀圖,其繪示灰化及濕式清潔後之折射係數(RI)的改變。處理後的折射係數保持相當程度的恆定,在灰化後的改變介於-0.004與-0.0045之間,且在灰化及濕式清潔後的改變介於-0.001與-0.004之間。在灰化後,非晶硼的折射係數改變約0.002,且在灰化及濕式清潔後,非晶硼的折射係數改變約0.0015。富硼與非晶硼之間的差異非常小且不明顯。
第6圖為傅立葉轉換紅外線光譜(Fourier transform infrared spectroscopy;FTIR)作圖,其顯示灰化及濕式清潔對沉積之富硼層的材料成分之影響。於此實例中,沉積之富硼層含有54%的硼。圖中顯示三個峰部。左邊的峰部指示來自硼的氧化之B-OH的存在。於富硼層沉積時不存在此訊號,而僅於灰化後偵測到此訊號。於濕式清潔後,此訊號再次去除,表示在濕式清潔後已去除氧化。中間的峰部指示B-H的存在,且右邊的峰部指示B-N的存在。
相異的富硼成分可針對相異的材料提供最佳的選擇性。於一具體實施例中,可能對使用多重層硼薄膜的相異材料層堆疊進行蝕刻。在使用第一蝕刻化學物質的情況下,就位在上方的下層材料而言,富硼材料的上方層可具有最佳的選擇性,且在使用第二蝕刻化學物質的情況下,就位在下方的下層材料而言,下方富硼層可具有最佳的選擇性。第7至11圖繪示了多重層蝕刻。就第7圖來說,其繪示蝕刻前的層堆疊。層堆疊包括基材501、下方材料層503、上方材料層505、下方富硼層513以及上方富硼層515。光阻層507可沉積於上方富硼層515上,並以微影製程進行圖案化。就第8圖來說,上方富硼層515及下方富硼層513被蝕刻。其後,如第9圖所示,移除經圖案化的光阻層507。就第10圖來說,以第一蝕刻化學物質蝕刻上方材料層505,且第一蝕刻化學物質也蝕刻上方富硼層515。就第11圖來說,以第二蝕刻化學物質蝕刻下方材料層503,且第二蝕刻化學物質也蝕刻殘存的上方富硼層515及大部分的下方富硼層513。在其它具體實施例中,可以蝕刻各別具有相異材料成分的多重富硼層之類似方式,來蝕刻具有額外層堆疊的基材。
在完成蝕刻處理後,可在圖案化之後犧牲並自結構移除富硼層,或將富硼層留在結構中。舉例而言,可將作為蝕刻氧化物、氮化物、矽、多晶矽或金屬層之硬式遮罩的富硼薄膜留在結構中。也可就後端應用來使用富硼薄膜,如銅阻障層,或銅及銅阻障層之間的黏著層,例如,藉由在其間形成CuBN、CuPBN或CuBCSiN層。富硼的銅阻障層或黏著層可具有介於1.1與6.5之間的介電常數。可將富硼的銅阻障層用在常用的金屬鑲嵌結構(damascene structure)或包括空氣間隙(air gap)的結構中,空氣間隙是藉由沉積並接著移除犧牲材料所形成。
於一具體實施例中,可藉由化學機械研磨(CMP)製程移除富硼層。於CMP處理期間,將基材固持於旋轉頭中並壓迫其抵靠移動中之飽含研磨漿料的CMP襯墊。基材的移動及其抵靠研磨漿料所產生的壓力可自基材移除材料。基材上暴露至研磨漿料的不同材料具有不同的蝕刻速率。第12圖為繪示CMP處理期間富硼材料的材料移除率之作圖。於此實例中,具54%的硼之富硼的CMP蝕刻速率為310 /min,60%的硼為280 /min,64%的硼為250 /min,且66%的硼為200 /min。材料移除的速率隨著富硼層中之硼的百分比增加而下降。除了富硼材料之外,此作圖也繪示了TiN具有600 /min之蝕刻速率,這樣的CMP材料移除速率比任何進行測試的富硼層都高了許多。
請參見第13至17圖,該等圖式繪示伴隨富硼層之CMP處理步驟。就第13圖來說,基材601具有介電層603、富硼層605以及經圖案化的光阻層607。就第14圖來說,蝕刻富硼層605。就第15圖來說,移除光阻層607,並蝕刻介電層603。就第16圖來說,將諸如銅等導電材料609沉積在富硼層605上填充介電層的經蝕刻部分。就第17圖來說,以CMP製程平坦化富硼層605及導電材料609,直到移除富硼層且導電材料609與介電層603共平面為止。
在某些具體實施例中,可於富硼層上進行額外處理。在某些例子中,沉積的富硼薄膜可具有高應力水平(stress level)。應力水平可與薄膜的硼含量成正比,其中較高的硼含量創造了較高的應力水平。減輕應力的可能方法為控制沉積的溫度。於300℃下,富硼薄膜的應力可為非常高的伸張應力,並隨著溫度增加而減輕。在高於約480℃的沉積溫度下,應力成為壓縮應力。藉由在接近此過渡點下沉積富硼層,可使應力最小化。在其它具體實施例中,可進行後沉積製程來減輕應力。舉例而言,在沉積特定厚度的薄膜後,可將紫外線(UV)硬化或氬、氦或氙等之電漿處理施加至整個富硼薄膜。舉例而言,可在沉積5至50埃的富硼薄膜厚度之後應用這些處理。UV硬化傾向於使富硼薄膜應力更為伸張,因此若在高於480℃的溫度下沉積具壓縮應力的薄膜,則UV硬化將使薄膜較不具壓縮應力。
人們將可理解以上描述中的諸多特定細節是為了提供對本發明的徹底瞭解而闡述。然而,對本發明所屬技術領域中的習知技藝之人而言為顯而易見的是,可不需要這些特定細節而能實施本發明。在其他情況中,將已知的結構及元件顯示為方塊圖形式以助於解說。較佳具體實施例的描述不欲限制後附之申請專利範圍的範疇。
102、104、106...步驟
501...基材
503...下方材料層
505...上方材料層
507...光阻層
513...下方富硼層
515...上方富硼層
601...基材
603...介電層
605...富硼層
607...光阻層
609...導電材料
第1圖為用以形成富硼層之製程的流程圖;
第2圖為繪示針對不同富硼層的蝕刻速率之作圖,該等富硼層包括相異的硼百分比;
第3圖為繪示針對不同富硼層的蝕刻選擇性之作圖,該等富硼層包括相異的硼百分比;
第4圖為繪示針對不同富硼層在製程步驟之後的薄膜厚度變化之作圖,該等富硼層包括相異的硼百分比;
第5圖為繪示在灰化及濕式清潔後,富硼層的折射係數之變化的作圖;
第6圖為FTIR作圖,其顯示富硼層的材料成分;
第7至11圖繪示針對多重富硼層的蝕刻製程;
第12圖為繪示包括相異的硼百分比的相異層之間的CMP材料移除率之差異的作圖;以及
第13至17圖繪示作為CMP終止層的富硼層。
102、104、106...步驟
Claims (17)
- 一種處理一基材的方法,包含下列步驟:a)將該基材置入一處理腔室內;b)導入一含硼前驅物至該腔室內;c)加熱該基材、該含硼前驅物及一含氮前驅物至300°C以上;d)熱反應該含硼前驅物;e)於該基材上沉積一富硼薄膜作為一均質材料,該富硼薄膜具有至少60%的硼;f)於該富硼薄膜上形成一經圖案化光阻層;g)蝕刻該富硼薄膜成為一圖案,其對應該經圖案化光阻層;h)蝕刻該圖案至該基材內;以及i)於該富硼薄膜的經蝕刻部分內沉積一材料。
- 如申請專利範圍第1項所述之方法,進一步包含下列步驟:重複步驟(b)至(e),直到形成該富硼薄膜之一預定厚度為止。
- 如申請專利範圍第2項所述之方法,其中形成多重層 該富硼薄膜,且該富硼薄膜的各個層具有相異的材料成分。
- 如申請專利範圍第1項所述之方法,進一步包含下列步驟:j)以一化學機械研磨製程平坦化該材料,直到該材料與該基材共平面且該富硼薄膜被移除為止。
- 如申請專利範圍第1項所述之方法,進一步包含下列步驟:k)減輕該經沉積之富硼薄膜的應力。
- 如申請專利範圍第1項所述之方法,其中該含硼前驅物包括氫。
- 如申請專利範圍第1項所述之方法,其中該含硼前驅物為B2H6。
- 如申請專利範圍第1項所述之方法,其中該富硼薄膜含有介於約1%至40%之間的下列一或多者:氫、氧、碳或氮。
- 一種處理一基材的方法,包含下列步驟: a)將該基材置入一處理腔室內;b)於該基材上形成一第一層,並於該第一層上形成一第二層;c)導入一含硼前驅物至該腔室內;d)加熱該基材及該含硼前驅物至300℃以上;e)熱反應該含硼前驅物;f)於該第二層上沉積一第一富硼薄膜;g)重複該導入、該加熱以及該熱反應步驟;以及h)於該第一富硼薄膜上沉積一第二富硼薄膜,該第二富硼薄膜具有與該第一富硼薄膜相異之一材料成分i)於該第二富硼薄膜上形成一經圖案化光阻層;j)蝕刻該第一富硼薄膜及該第二富硼薄膜成為一圖案,其對應該經圖案化光阻層;k)蝕刻該圖案至該基材內;以及l)於該第一富硼薄膜的經蝕刻部分內沉積一材料。
- 如申請專利範圍第9項所述之方法,其中蝕刻該第一富硼薄膜及該第二富硼薄膜包含:以一第一蝕刻化學物質蝕刻該第二層成為該圖案,以暴露該第一層;以及以一第二蝕刻化學物質蝕刻該第一層成為該圖案,該第二蝕刻化學物質相異於該第一蝕刻化學物質。
- 如申請專利範圍第9項所述之方法,進一步包含下列步驟:m)於蝕刻該第二層期間,移除大部分之該第二富硼膜。
- 如申請專利範圍第11項所述之方法,進一步包含下列步驟:n)於蝕刻該第一層期間,移除大部分之該第一富硼膜。
- 如申請專利範圍第9項所述之方法,其中該含硼前驅物包括氫。
- 如申請專利範圍第13項所述之方法,其中該含硼前驅物為B2H6。
- 如申請專利範圍第9項所述之方法,進一步包含下列步驟:o)減輕該經沉積之第二富硼薄膜的應力。
- 如申請專利範圍第15項所述之方法,其中該減輕應力 之步驟包括該氮化硼薄膜之紫外線或電漿處理。
- 如申請專利範圍第9項所述之方法,其中該第一富硼薄膜及該第二富硼薄膜具有大於60%之一硼含量。
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-
2010
- 2010-05-24 US US12/786,245 patent/US8337950B2/en active Active
-
2011
- 2011-04-12 TW TW100112695A patent/TWI525658B/zh active
- 2011-05-20 KR KR1020127033694A patent/KR20130113345A/ko not_active Application Discontinuation
- 2011-05-20 JP JP2013512094A patent/JP2013533376A/ja not_active Withdrawn
- 2011-05-20 WO PCT/US2011/037295 patent/WO2011149770A2/en active Application Filing
- 2011-05-20 CN CN2011800247278A patent/CN102906859A/zh active Pending
Also Published As
Publication number | Publication date |
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US20100233633A1 (en) | 2010-09-16 |
US8337950B2 (en) | 2012-12-25 |
WO2011149770A3 (en) | 2012-04-19 |
CN102906859A (zh) | 2013-01-30 |
TW201212098A (en) | 2012-03-16 |
JP2013533376A (ja) | 2013-08-22 |
KR20130113345A (ko) | 2013-10-15 |
WO2011149770A2 (en) | 2011-12-01 |
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